| Commit message (Collapse) | Author | Age | Files | Lines |
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Decrease amount of the similar defconfigs and use generic one instead.
The change was declared by commit 4b37c13dc353
("arm64: zynqmp: Introduce virtual defconfig") and this patch removes
configs for the most of the boards.
Utra96/zcu100/zcu102/zcu102 and ZynqMP based System controllers *a2197*.
have been also boot tested to make sure that funcionality
remains the same.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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These options are taken from zcu102/104 platforms. Also use OF_SEPARATE
instead of OF_BOARD. Maybe at some point this option will be taken back but
as of now board detection is not ready.
export DEVICE_TREE="zynqmp-zcu102-revA"
make xilinx_zynqmp_virt_defconfig
make -j
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Follow i.MX, Sunxi, RISC-V and Rockchip to generate u-boot.itb which
includes U-Boot proper, ATF and DTBs in FIT format. ZynqMP supports FIT for
quite a long time but with using out of tree solution. The patch is filling
this gap.
Tested on zcu102, zcu104 and zcu100/Ultra96.
zcu100/Ultra96 v2.2 ATF build by:
make DEBUG=0 ZYNQMP_CONSOLE=cadence1 RESET_TO_BL31=1 PLAT=zynqmp bl31
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Extend test suite to cover also automatic octal/hex converstions which
haven't been implemented in past.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
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All drivers should be converted to DM already that's why these hardcoded
base addresses are not needed anymore.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Remove hardcoded base addresses of smc controller and nand controller.
Get those addresses from dt and replace wherever they are used.
Remove smc and nand base address from header file too.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Move the zynq nand driver to driver model. Select DM_MTD if
zynq nand controller (NAND_ZYNQ) is selected.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This patch adds new jtag distro boot command to look for bootscript
file in DDR and execute it first incase of jtag bootmode.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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handoff_setup() was used to generate fixed handoff structure for ATF on
ZynqMP platform.
Switching to bl2_plat_get_bl31_params() platform brings more flexibility
because information can be taken from fit image where /fit-images node is
created at run time.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Xilinx ZynqMP platform is passing information to ATF in private format and
ATF bl31 parameters are not used. That's why enable option to rewrite this
function by platform specific implementation.
The patch also move and update kernel-doc format with missing parameters.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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When two instances of AXI QSPI with flash are added and tested
simultaneously the spi driver operations are relocated twice.
As a result code is accessing addresses outside of RAM when
relocated second time which is causing a crash.
Tested on Microblaze.
Similar change was done in past by:
commit f238b3f0fbc9 ("watchdog: dm: Support manual relocation for watchdogs")
commit 2588f2ddfd60 ("dm: sf: Add support for all targets which requires MANUAL_RELOC")
commit 1b4c2aa25bdf ("gpio: dm: Support manual relocation for gpio")
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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DEVICE_TREE variable has been added by commit 6ab6b2afa091
("dts: re-write dts/Makefile more simply with Kbuild")
where DT can be specified on command line. If it is not then
CONFIG_DEFAULT_DEVICE_TREE is used to ensure backward compatibility.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Empty implementation should not return 0 (success) because that mean that
passed name matches the board configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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In past SPL_ZYNQMP_TWO_SDHCI symbol was introduced to handle boards with
two sdhci controllers. The problem was that U-Boot is registering
controllers based on aliases in DT but bootmode targets specific controller
ID. That's why on boards with one "second" sdhci controller bootmode was
pointing to second controller(MMC2) but alias was setup to mmc0 (the first
controller). And SPL requires to point to mmc0 in this case.
Long time ago commit f101e4bd3703
("spl: add support for alternative boot device") added support for handling
multiple bootmodes in SPL. Use this functionality and setup second sdhci
controller as backup boot device.
Below is table with behavior:
HW/bootmode bootorder
sd0/sd0 mmc0/mmc1 (mmc1 never called)
sd1/sd1 mmc1/mmc0 (mmc0 fails and mmc1 is called)
sd0+sd1/sd0 mmc0/mmc1 (mmc1 never called)
sd0+sd1/sd1 mmc1/mmc0 (mmc0 never called)
All other bootmodes are not affected but order can be extended to cover
advance boot flows.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Names have to match device tree file names. Also add missing one.
Fixes: 50d92833477e ("arm64: zynqmp: Sync names for SC with Versal")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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There shouldn't be a need to use any partition description because it
can be used for writing data anywhere.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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These commands are useful in connection to usb and other devices that's why
enable it by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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There is no reason to do serial initializationin low level code. Uart
driver does it already based on DT.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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There is no reason to do serial initialization. Uart driver does it already
based on DT. Good effect is that it is clear which interface is console.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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MIO34 is connected to POWER_KILL signal. When MIO configuration is done in
psu_init() and this pin is assigned to PMU but PMU configuration is not
loaded yet. PMU gpio output is high that means board is powered off
immediately.
The patch is fixing this sequence that MIO34 stays assing to ps gpio IP.
PMU config is loaded in SPL and then pin assigned to PMU through
psu_post_config_data().
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup().
OF_BOARD option is mostly used for picking up DTB from certain location.
OF_SEPARATE option is used when DTB is appended after u-boot binary.
This board specific function is aligned with current version in
lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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The reason for this change is just get in sync with board_fdt_blob_setup()
available at lib/fdtdec.c.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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When position-independent pre-relocation code is enable there is also
necessary to enable relative early stack pointer not to use origin location
pointed by CONFIG_SYS_INIT_SP_ADDR macro.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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There is no reason to clear bss and call board_init_r() from board_init_f()
beca it can be called directly from crt0_64.S with also support for SPL
stack relocation to SDRAM.
For more information please take a look at arch/arm/lib/crt0_64.S
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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ndepth needs to be initialized before it is used in fdt_next_node().
Uninitialized value is causing that node is found and depth increase but
won't pass condition below because initial state wasn't setup.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Currently "script_offset_f" env variable is hardcoded, this variable
specifies from which offset of the flash boot.scr should be read/write.
As flashes are of different sizes having a fixed offset makes it
difficult to load other images into the flash which may overwrite the
boot script or cannot utilize the full memory. This current fix
creates a new config "CONFIG_BOOT_SCRIPT_OFFSET" which holds the
offset address, overwrites the "script_offset_f" variable.
Also removed existing variable with default values, as the default
values are held by CONFIG_BOOT_SCRIPT_OFFSET
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Emmc boot devcie is mounted to mmc@ff160000 controller on zynqmp.
Detect mmc alias at run time for setting up proper boot_targets
sequence instead of setting boot_targets manually.
Removed setting "modeboot" variable as it not longer need as we
switched to distro boot.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Emmc boot devcie is mounted to sdhci@f1050000 controller on versal, while
in emmc boot mode, boot tragets are set to mmc0. So removed mmc0 and using
the dev seq number from the sdhci@f1050000 controller.
Dev seq number is setup based on DT aliases that's why needs to be setup at
run time.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Remove hardcoded base address of nand and replace it with the
value taken from device tree. Remove base address from header
file too.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Make changes to arasan nand driver to move it to driver model.
Select DM_MTD if arasan nand driver is selected.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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- MediaTek improvements
- Some generic clk improvements
- A few assorted bugfixes
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This patch add CONFIG_TARGET_MT7623 into mt7623n_bpir2_defconfig
to fix the mt7623 compile error after building others mediatek target
platform
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
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This patch move u-boot properties to -u-boot.dtsi file.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
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This adds a general board file based on MT7622 SoCs from MediaTek.
This commit is adding the basic boot support for the MT7622 rfb.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
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This patch add mmc and sd support for Mediatek MT7622 SoCs
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
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This patch add power domain support for Mediatek MT7622 SoCs
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
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This patch fix clock-rate overflow problem in mediatek
clock driver common part.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
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This patch add clock driver for MediaTek MT7622 SoC.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
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Due to the pinctrl hardware of MT7622 is difference from others
SoC which using the common part of mediatek pinctrl.
So we need to modify the common part of mediatek pinctrl.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
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This patch add Pinctrl driver for MediaTek MT7622 SoC.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
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Add support for MediaTek MT7622 SoC. This include the file
that will initialize the SoC after boot and its device tree.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
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If make the ref clock optional, no need refer to fixed-clock when
the ref clock is always on or comes from oscillator directly.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
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No need check -ENOSYS anymore after add dummy_enable() for
fixed-clock.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
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This is used to avoid clk_enable() return -ENOSYS.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
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Sometimes we may need get (optional) clock without a device,
that means use ofnode.
e.g. when the phy node has subnode, and there is no device created
for subnode, in this case, we need these new APIs to get subnode's
clock.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
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Add valid check for clk->dev, it's useful when get optional
clock even when the clk point is valid, but its dev will be
NULL.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
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If skip all return error number, it may skip some real error cases,
so only skip the error when the clock is not provided in DTS
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
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The SSUSB IP's clocks come from ssusbsys module on mt7629,
so add its driver
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
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This adds a general board file based on MT8512 SoCs from MediaTek.
Apart from the generic parts (cpu) we add some low level init codes
and initialize the early clocks.
This commit is adding the basic boot support for the MT8512 eMMC board.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
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For CMD21 tuning data, the 128/64 bytes data may coming in very
short time, before msdc_start_data(), the read data has already
come, in this case, clear MSDC_INT will cause the interrupt disappear
and lead to the thread hang.
the solution is just clear all interrupts before command was sent.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
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