summaryrefslogtreecommitdiff
Commit message (Expand)AuthorAgeFilesLines
...
| * soc: xilinx: zynqmp: Add soc_xilinx_zynqmp driverT Karthik Reddy2021-08-268-0/+98
| * fdt_support: Add kernel-doc for fdt_fixup_memory_banks()Michal Simek2021-08-261-0/+18
| * xilinx: Disable ARCH_FIXUP_FDT_MEMORYMichal Simek2021-08-263-0/+3
| * ARM: zynq: Enable smcc and nor for zc770-xm012Michal Simek2021-08-261-0/+9
| * ARM: zynq: Wire single qspi on couple of boardsMichal Simek2021-08-264-0/+32
| * ARM: zynq: Replace 'io-standard' with 'power-source' propertySai Krishna Potthuri2021-08-262-20/+20
| * xilinx: Add jedec compatible string for QSPI (Zynq/ZynqMP)Raju Kumar Pothuraju2021-08-264-4/+4
| * arm64: zynqmp: Update comment style sm-k26Michal Simek2021-08-261-1/+1
| * arm64: zynqmp: Fix header alignment on kv260 boardsMichal Simek2021-08-262-8/+8
| * arm64: zynqmp: Fix node name for ds35/36 ledsMichal Simek2021-08-261-2/+2
| * xilinx: zynqmp: Initialize usb and scsi via prebootMichal Simek2021-08-261-0/+1
| * arm64: zynqmp: Disable WDT_CDNS driver by defaultMichal Simek2021-08-261-1/+0
| * mmc: zynq_sdhci: Use set_control_reg from sdhci.cAshok Reddy Soma2021-08-261-20/+1
| * mmc: zynq_sdhci: Wait till sd card detect state is stableT Karthik Reddy2021-08-261-0/+19
| * mmc: zynq_sdhci: Move setting tapdelay code to driverAshok Reddy Soma2021-08-264-152/+107
| * mmc: zynq_sdhci: Add xilinx_pm_request() method to set tapdelaysAshok Reddy Soma2021-08-263-87/+159
| * zynqmp_firmware: Add zynqmp firmware related enumsT Karthik Reddy2021-08-061-0/+127
| * mmc: sdhci: Change prototype of set_delay to return errorsAshok Reddy Soma2021-08-062-3/+9
| * mmc: zynq_sdhci: Return errors from arasan_sdhci_set_tapdelayAshok Reddy Soma2021-08-061-5/+18
| * reset: zynqmp: Add reset controller for ZynqMP SoCMichal Simek2021-08-065-0/+242
| * xilinx: zynqmp: Enable CMD_RTC command with Zynqmp RTC driverMichal Simek2021-08-061-0/+2
| * rtc: zynqmp: Add support for ZynqMP RTCMichal Simek2021-08-064-0/+167
| * cmd: date: rtc: Update command to read the first RTC with seq 0Michal Simek2021-08-061-3/+6
| * dm: rtc: uclass: Add flag to control sequence numberingMichal Simek2021-08-061-0/+1
| * firmware: xilinx: Use explicit values for all enum valuesMichal Simek2021-08-061-44/+49
| * xilinx: zynqmp: Add support for runtime dfu_alt_info setupMichal Simek2021-08-062-0/+55
| * xilinx: zynqmp: Config non zero SYS_SPI_U_BOOT_OFFSMichal Simek2021-08-061-0/+1
| * xilinx: zynqmp: use zynqmp_mmio_read() in multi_boot()Michal Simek2021-08-061-2/+5
| * xilinx: zynqmp: Change multi_boot() to return valueMichal Simek2021-08-061-4/+2
| * xilinx: zynqmp: Free allocated field for target variableMichal Simek2021-08-061-0/+1
* | Merge branch 'next-socfpga' of https://github.com/tienfong/uboot_mainlineTom Rini2021-08-2543-90/+4467
|\ \
| * | arm: socfpga: Enable Intel N5X device buildSiew Chin Lim2021-08-255-6/+257
| * | include: configs: Add Intel N5X device CONFIGsSiew Chin Lim2021-08-251-0/+45
| * | arm: dts: Add base dtsi and devkit dts for Intel N5X deviceSiew Chin Lim2021-08-254-0/+377
| * | board: intel: Add socdk board support for Intel N5X deviceSiew Chin Lim2021-08-253-0/+21
| * | arm: socfpga: Add SPL for Intel N5X deviceSiew Chin Lim2021-08-251-0/+94
| * | ddr: altera: Add SDRAM driver for Intel N5X deviceTien Fong Chee2021-08-256-2/+2386
| * | ddr: socfpga: Enable memory test on memory size less than 1GBTien Fong Chee2021-08-251-3/+21
| * | arm: socfpga: Changed misc_s10.c to misc_soc64.cSiew Chin Lim2021-08-252-8/+8
| * | arm: socfpga: Add clock manager for Intel N5X deviceSiew Chin Lim2021-08-253-0/+94
| * | arm: socfpga: Move cm_get_mpu_clk_hz function declaration to clock_manager.hSiew Chin Lim2021-08-255-5/+1
| * | drivers: clk: Add memory clock driver for Intel N5X deviceSiew Chin Lim2021-08-253-0/+221
| * | arm: socfpga: Get clock manager base address for Intel N5X deviceSiew Chin Lim2021-08-251-0/+3
| * | drivers: clk: Add clock driver for Intel N5X deviceSiew Chin Lim2021-08-254-1/+779
| * | arm: socfpga: Add handoff data support for Intel N5X deviceTien Fong Chee2021-08-243-48/+140
| * | arm: socfpga: Add base address for Intel N5X deviceSiew Chin Lim2021-08-241-1/+2
| * | arm: socfpga: Changed base_addr_s10.h to base_addr_soc64.hSiew Chin Lim2021-08-242-5/+5
| * | arm: socfpga: Move linux_qspi_enable from bootcommand to board_prep_linux fun...Siew Chin Lim2021-08-243-10/+11
|/ /
* | Merge tag 'efi-2021-10-rc3' of https://source.denx.de/u-boot/custodians/u-boo...WIP/23Aug2021Tom Rini2021-08-2327-53/+100
|\ \
| * | efi_loader: use EfiBootServicesData for DP to textHeinrich Schuchardt2021-08-171-1/+1
View Lorry Controller Status