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* common: Drop floppy disk supportSimon Glass2020-01-1710-1159/+1
| | | | | | | | | This seems pretty old now. It has not been converted to driver model and is not used by any boards. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Move jumptable_init() out of common.hSimon Glass2020-01-173-3/+4
| | | | | | | This function is defined in exports.c so move it to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* common: Move relocate_code() to init.hSimon Glass2020-01-1740-22/+48
| | | | | | | | | This is an init function so move it out of the common header. Avoid using the typedef so that we don't have to include the global_data header file. Also tidy up the function style in comments while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Move functions for loading from fat/ext2 to fs.hSimon Glass2020-01-175-7/+25
| | | | | | | These are filesystem functions and belong in the filesystem header file. Move them. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Move do_tftpb() to net.hSimon Glass2020-01-173-3/+12
| | | | | | This function belongs in the network header file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Move embedded fdt location to fdtdec.hSimon Glass2020-01-172-3/+3
| | | | | | | These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop checkflash() and checkdram()Simon Glass2020-01-171-2/+0
| | | | | | These functions are not used in U-Boot. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Move flash_perror() to flash.hSimon Glass2020-01-177-6/+14
| | | | | | | | This function belongs more in flash.h than common.h so move it. Also remove the space before the bracket in some calls. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Move main_loop() to init.hSimon Glass2020-01-174-3/+9
| | | | | | | Move this function out of common.h and into a better place. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
* common: Drop mdm_init()Simon Glass2020-01-171-1/+0
| | | | | | | This is not used in U-Boot. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
* Merge branch '2020-01-17-improve-aes-support'Tom Rini2020-01-1719-87/+1268
|\ | | | | | | - Add support and tests for AES192 and AES256
| * u-boot: fit: add support to decrypt fit with aesWIP/2020-01-17-improve-aes-supportPhilippe Reynes2020-01-178-1/+240
| | | | | | | | | | | | | | | | | | | | This commit add to u-boot the support to decrypt fit image encrypted with aes. The FIT image contains the key name and the IV name. Then u-boot look for the key and IV in his device tree and decrypt images before moving to the next stage. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
| * mkimage: fit: add support to encrypt image with aesPhilippe Reynes2020-01-1710-2/+716
| | | | | | | | | | | | | | | | | | | | | | This commit add the support of encrypting image with aes in mkimage. To enable the ciphering, a node cipher with a reference to a key and IV (Initialization Vector) must be added to the its file. Then mkimage add the encrypted image to the FIT and add the key and IV to the u-boot device tree. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
| * aes: add test unit for aes196 and aes256Philippe Reynes2020-01-171-0/+4
| | | | | | | | | | | | | | This commit add test unit for aes196 and aes256. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * aes: add test unit for aes128Philippe Reynes2020-01-172-0/+163
| | | | | | | | | | | | | | This commit add test unit for aes128. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * aes: add support of aes192 and aes256Philippe Reynes2020-01-174-65/+125
| | | | | | | | | | | | | | | | Until now, we only support aes128. This commit add the support of aes192 and aes256. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * aes: add a define for the size of a blockPhilippe Reynes2020-01-173-20/+21
|/ | | | | | | | | | | In the code, we use the size of the key for the size of the block. It's true when the key is 128 bits, but it become false for key of 192 bits and 256 bits. So to prepare the support of aes192 and 256, we introduce a constant for the iaes block size. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge tag 'mmc-1-16-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcWIP/16Jan2020Tom Rini2020-01-1619-166/+66
|\ | | | | | | | | - Cleanup of fsl_esdhc driver together with arch/defconfig change - Add quirk for APP_CMD retry
| * mmc: config help typo fixJoel Johnson2020-01-161-1/+1
| | | | | | | | | | | | Fix typo in description of MMC_QUIRKS config option. Signed-off-by: Joel Johnson <mrjoel@lixil.net>
| * mmc: add additional quirk for APP_CMD retryJoel Johnson2020-01-162-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | It was observed (on ClearFog Base) that sending MMC APP_CMD returned an error on the first attempt. The issue appears to be timing related since even inserting a puts() short debug entry before the execution added sufficient delay to receive success on first attempt. Follow the existing quirks pattern to retry if initial issuance failed so as to not introduce any delay unless needed. Signed-off-by: Joel Johnson <mrjoel@lixil.net>
| * Drop CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK usageYangbo Lu2020-01-164-50/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The eSDHC reference clocks should be provided by speed.c in arch/. And we do not need CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK option to select which clock to use. Because we can make the driver to select the periperhal clock which is better (provides higher frequency) automatically if its value is provided by speed.c. This patch is to drop this option and make driver to select clock automatically. Also fix peripheral clock calculation issue in fsl_lsch2_speed.c/fsl_lsch3_speed.c. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
| * configs: ls1028a: use default SDHC clock divider valueYangbo Lu2020-01-164-4/+0
| | | | | | | | | | | | | | The SDHC clock divider value for LS1028A should be default 2, not 1. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
| * Add global variable sdhc_per_clk for arm/powerpcYangbo Lu2020-01-162-0/+5
| | | | | | | | | | | | | | | | | | | | | | The QorIQ eSDHC controller supports two reference clocks. They are platform clock and periperhal clock. The global variable sdhc_clk has already been used for platform clock. This patch is to add another global variable sdhc_per_clk for periperhal clock, which provides higher frequency and is required to be used for SD UHS and eMMC HS200/HS400 speed modes. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
| * powerpc/mpc85xx: drop eSDHC periperhal clock codeYangbo Lu2020-01-166-61/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The below patch added eSDHC periperhal clock code initially. 2d9ca2c mmc: fsl_esdhc: Add peripheral clock support The purpose was to fix up device tree properties "peripheral-frequency" so that linux could get the periperhal clock by it. However the implementation on both u-boot and linux was only for a Freescale SDK release. The linux part implementation had never been upstreamed. These code should not have been exist on u-boot mainline. Let's remove the powerpc part changes but keep the changes in fsl_esdhc driver. The changes in fsl_esdhc driver could be utilized to support SD UHS and eMMC HS200/HS400 speed modes for current Layerscape ARM platforms. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
| * mmc: fsl_esdhc: drop useless fdt fixupYangbo Lu2020-01-161-9/+0
| | | | | | | | | | | | | | | | The fdt fixup for properties "peripheral-frequency" and "adapter-type" was once for a Freescale SDK release. The properties haven't been existed in linux mainline. Drop these useless code. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
| * mmc: fsl_esdhc_imx: drop QorIQ eSDHC specific peripheral clock codeYangbo Lu2020-01-161-40/+0
| | | | | | | | | | | | Drop QorIQ eSDHC specific peripheral clock code. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini2020-01-164-9/+27
|\ \ | | | | | | | | | | | | | | | - Clearfog: Fix SD booting (Baruch) - Misc updates to MMC handling in SPL to support booting from main data partition (vs hardware boot partition) on MVEBU (Baruch)
| * | arm: mvebu: clearfog: update eMMC documentationBaruch Siach2020-01-161-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPL now automatically selects the correct U-Boot image offset for both eMMC and SD card. No need to tweak CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR anymore. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: clearfog: set uboot image SD card offsetBaruch Siach2020-01-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Armada 38x ROM skips the first SD card offset when loading SPL. This affects the location of the main U-Boot image. SPL MMC code now supports U-Boot image offset based on run-time detection of the boot partition. Use this feature to make the same generated image support both SD card and eMMC boot partition. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | spl: mmc: support uboot image offset on main partitionBaruch Siach2020-01-162-2/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Armada 38x platforms the ROM code loads SPL from offset 0 of eMMC hardware boot partitions. When there are no boot partitions (i.e. SD card) the ROM skips the first sector that usually contains the (logical) partition table. Since the generated .kwb image contains the main U-Boot image in a fixed location (0x140 sectors by default), we end up with the main U-Boot image in offset of 1 sector. The current workaround is to manually set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x141 to compensate for that. This patch uses the run-time detected boot partition to determine the right offset of the main U-Boot partition. The generated .kwb image is now compatible with both eMMC boot partition, and SD card main data partition. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | configs: clearfog: enable SPL_DM_GPIO to fix boot from SDBaruch Siach2020-01-161-0/+1
| |/ | | | | | | | | | | | | | | | | | | SPL needs DM GPIO to read the SD card-detect signal. This complements the fix in commit 70bae02f71d4 ("arm: mvebu: clearfog: fix boot from SD card"). Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge tag 'xilinx-for-v2020.04' of ↵Tom Rini2020-01-16119-3899/+1677
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx/FPGA changes for v2020.04 ARM64: - Add INIT_SPL_RELATIVE dependency SPL: - FIT image fix - Enable customization of bl2_plat_get_bl31_params() Pytest: - Add test for octal/hex conversions Microblaze: - Fix manual relocation for one SPI instance Nand: - Convert zynq/zynqmp drivers to DM Xilinx: - Enable boot script location via Kconfig - Support OF_SEPARATE in board FDT selection - Remove low level uart setup it is done later by code - Add support for DEVICE_TREE variable passing for SPL Zynq: - Enable jtag boot mode via distro boot - Removing unused baseaddresses from hardware.h - DT fixups ZynqMP: - Fix emmc boot sequence - Simplify spl logic around bss and board_init_r() - Support psu_post_config_data() calling - Tune mini-nand DTS - Fix psu wiring for a2197 boards - Add runtime MMC device boot order filling in spl - Clear ATF handoff handling with custom bl2_plat_get_bl31_params() - Add support u-boot.its generation - Use single image configuration for all platforms - Enable PANIC_HANG via Kconfig - DT fixups - Firmware fixes - Add support for zcu208 and zcu1285 Versal: - Fix emmc boot sequence - Enable board_late_init() by default
| * | arm64: versal: Enable board_late_init callingMichal Simek2020-01-141-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Qemu v4.2.0 maps bootmode registers to address space which was the reason why board_late_init() was disabled and accesses were failing. With new Qemu board_late_init() can be called without any issue. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM: dts: zynq: enablement of coresight topologyZumeng Chen2020-01-141-0/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to build the coresight topology structure of zynq-7000 series according to the docs of coresight and userguide of zynq-7000. Signed-off-by: Zumeng Chen <zumeng.chen@windriver.com> Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Sync gem clock nodes with mainline LinuxMichal Simek2020-01-141-9/+13
| | | | | | | | | | | | | | | | | | Just fixing indentation and update year in Copyright. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Sync gpio-controller name locationMichal Simek2020-01-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Sync location with mainline kernel. Added by Linux kernel commit 75926f07baae ("arm64: dts: zynqmp: Add missing gpio-controller to ps gpio"). Fixes: 0b33e0b15600 ("arm64: zynqmp: Add missing gpio property to dtsi") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: dts: zynqmp: replace gpio-key,wakeup with wakeup-source propertySudeep Holla2020-01-144-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the legacy "gpio-key,wakeup" boolean property is already replaced with "wakeup-source". However few occurrences of old property has popped up again, probably from the remnants in downstream trees. This patch replaces the legacy properties with the unified "wakeup-source" property introduced by: "Input: gpio_keys - switch to using generic device properties" (sha1: 700a38b27eefc582099fdf69effacfad0ad738a4) Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: dts: zcu100-revC: Give wifi some time after power-onJan Kiszka2020-01-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Somewhere along recent changes to power control of the wl1831, power-on became very unreliable on the Ultra96, failing like this: wl1271_sdio: probe of mmc2:0001:1 failed with error -16 wl1271_sdio: probe of mmc2:0001:2 failed with error -16 After playing with some dt parameters and comparing to other users of this chip, it turned out we need some power-on delay to make things stable again. In contrast to those other users which define 200 ms, Ultra96 is already happy with 10 ms. Fixes: 5869ba0653b9 ("arm64: zynqmp: Add support for Xilinx zcu100-revC") Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: dts: zynqmp: Fix node names which contain "_"Michal Simek2020-01-146-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | s/_/-/ for node names. It fixes warnings like this: ... Warning (node_name_chars_strict): /cpu_opp_table: Character '_' not recommended in node name ... Issues reported by make dtbs W=12 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: dts: Remove inconsistent use of 'arm,armv8' compatible stringRob Herring2020-01-141-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'arm,armv8' compatible string is only for software models. It adds little value otherwise and is inconsistently used as a fallback on some platforms. Remove it from those platforms. This fixes warnings generated by the DT schema. Reported-by: Michal Simek <michal.simek@xilinx.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Chanho Min <chanho.min@lge.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Wei Xu <xuwei5@hisilicon.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Chunyan Zhang <zhang.lyra@gmail.com> Acked-by: Robert Richter <rrichter@cavium.com> Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | arm64: zynqmp: Remove incorrect phy from DT for zcu102-revB upMichal Simek2020-01-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | zcu102-revB/up are not removing phy from revA properly because of incorrect name. Fixes: 2975a42b42c5 ("arm64: zynqmp: Use ethernet-phy as node name for ethernet phys") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Add support for zcu1285 revA boardMichal Simek2020-01-143-1/+247
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | zcu1285 is the same as zcu1275 but it is using Avnet FMC http://www.ultrazed.org/product/network-fmc-module Unfortunately not everything is connected now that's why this is only describing system which Xilinx is using. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | net: zynq: Add a note about RX_BUF macroMichal Simek2020-01-141-0/+1
| | | | | | | | | | | | | | | | | | Record note about reducing number of BDs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Switch zcu100 revC to use firmware clock driverMichal Simek2020-01-141-1/+1
| | | | | | | | | | | | | | | | | | | | | There is no issue with using firmware based driver instead of fixed clock one. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | zynqmp: dts: Cleanup no-1-8-v property from sdhci dt nodesT Karthik Reddy2020-01-143-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removed no-1-8-v property from zynqmp sdhci devicetree nodes to allow UHS-I capable SD cards to work in SD3.0 UHS modes. Boards that does not have level shifter for SD, does not support 1.8v. so no-1-8-v property to sdhci dt nodes should be present in zcu102 Rev-A,B, zcu104 Rev-A,C, zcu100, zcu1275 Rev-B boards. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Add support for zcu208Michal Simek2020-01-143-1/+590
| | | | | | | | | | | | | | | | | | The board is very similar to zcu216 with zu49dr device. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM: zynq: Add missing nand/smcc nodesMichal Simek2020-01-141-0/+8
| | | | | | | | | | | | | | | | | | Add missing nand/smcc description. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | firmware: Remove probe which is causing extra bindAshok Reddy Soma2020-01-141-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove probe function dm_scan_fdt_dev from zynqmp-firmware driver. It is just binding its subnode zynqmp-clk. As a result one extra node is showing up in dm tree. This is not required, it is anyway bound from it's own zynqmp-clk driver. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Correct the type of eeprom for zcu216 boardsRaviteja Narayanam2020-01-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Corrected the type of eeprom in device tree for zcu216 boards according to schematic. Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Fix ina226 shunt resistor valueMichal Simek2020-01-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Fix shunt resistor value for ina226 vccint_ams and vccint_io_bram_ps. 2mOhm shunt was only in early board revision schematics but never got to real revA board. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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