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* m68k: add architecture-specific u-boot.ldsangelo@sysam.it2015-04-2337-1780/+153
| | | | | | | | | | | Add architecture-specific u-boot.lds and remove all board-specific u-boot.lds. All the .text customization that was board-specific have been moved inside the related include/configs, inside a LDS_BOARD_TEXT define. Signed-off-by: Angelo Dureghello <angelo@sysam.it>
* fastboot: ARM: OMAP5: Enable reboot-bootloaderDileep Katta2015-04-232-0/+17
| | | | | | | | | | | | | | | | | | | | | | Implemented fb_set_reboot_flag() for OMAP5 to set an environment variable 'dofastboot' when reboot-bootloader called. This environment variable will be checked in boot command and fastboot will be called if the variable is set. If the bootcmd env variable of OMAP5 common is overwritten with board-specific command, then these changes will not apply. This was originally intended for DRA7 platform, but now applies to all OMAP5. Ref: http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=19da2e436e9806259cf1f4988b9e046ab256bf2c Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Dileep Katta <dileep.katta@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Make it check for !CONFIG_ENV_IS_NOWHERE as we can't saveenv() in that case] Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7: Set serial number environment variableDileep Katta2015-04-234-0/+28
| | | | | | | | | | | | | | | | | This patch populates serial number environment variable from die_id_0 and die_id_1 register values for DRA7xx boards. The function is added in omap common code so that this can be re-used. Serial# environment variable will be useful to show correct information in "fastboot devices" commands. Ref: http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=a6bcaaf67f6e4bcd97808f53d0ceb4b0c04d583c Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Dileep Katta <dileep.katta@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7XX: Enable FastbootDileep Katta2015-04-231-2/+10
| | | | | | | | | | - Fastboot is enable by default for DRA7XX - This is based on following patch modified accordingly http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=b2e04f92b5d91c708b6fd6b79d2266966ac51f4b Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Dileep Katta <dileep.katta@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* mvgpio: remove CONFIG_SHEEVA_88SV331xV5 dependencyZhou Zhu2015-04-231-5/+1
| | | | | | | The Marvell GPIO driver can be used on Marvell platforms other than Sheeva, so remove the ifdef to enable it for others. Signed-off-by: Rob Herring <robh@kernel.org>
* gpio: mvmfp: support newer MFP bit definitionsXiang Wang2015-04-232-49/+55
| | | | | | | | | | | 1. The bits 11..10 for mfp driver strength is only valid for aspen and old xscale family, for newer Marvell chip, this range has been moved to 12..11. 2. add sleep bit support Signed-off-by: Xiang Wang <wangx@marvell.com> [robh: rebase to current mainline] Signed-off-by: Rob Herring <robh@kernel.org>
* davinci: add support for omapl138-lcdk boardPeter Howard2015-04-239-0/+769
| | | | | | Signed-off-by: Peter Howard <phoward@gme.net.au> [trini: Add config file, update for ..._ether_addr() -> ..._ethaddr() rename] Signed-off-by: Tom Rini <trini@konsulko.com>
* cmd_led: Extend led command to support blinking and more ledsStefan Roese2015-04-233-10/+53
| | | | | | | | | | | This patch extends the U-Boot "led" command to support automatic blinking by setting a blink frequency in milliseconds. Additionally the number of supported LEDs is increased to 6 (0...5). This will be used by the PCA9551 LED driver. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* integrator: stop zeroing the gd flagsLinus Walleij2015-04-231-2/+0
| | | | | | | | | | | This assignment conflicts with code that add flags with gd->flags |= FOO prior to the execution of this function. Seems like a historical artifact and creates bugs with early alloc(). Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Simon Glass <sjg@chromium.org>
* ARM: integrator: move CONFIG_ARCH_CINTEGRATOR to KconfigMasahiro Yamada2015-04-232-1/+4
| | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Linus Walleij <linus.walleij@linaro.org>
* ARM: integrator: abolish CONFIG_INTEGRATORMasahiro Yamada2015-04-232-4/+2
| | | | | | | Switch to CONFIG_ARCH_INTEGRATOR defined by Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Linus Walleij <linus.walleij@linaro.org>
* ARM: integrator: split board select into AP/CP select and CM selectMasahiro Yamada2015-04-239-48/+41
| | | | | | | | | | | Select integrator boards by the combination of platform select (AP/CP) and core module select (CM720T, CM920T, ...). This allows us to remove CONFIG_SYS_EXTRA_OPTIONS and make Kconfig much cleaner. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Linus Walleij <linus.walleij@linaro.org>
* ARM: integrator: move board select into mach-integrator/KconfigMasahiro Yamada2015-04-2312-137/+70
| | | | | | | | | The board/SoC select menu in arch/arm/Kconfig is still cluttered. Add ARCH_INTEGRATOR into arch/arm/Kconfig and move the board select under arch/arm/mach-integrator. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Linus Walleij <linus.walleij@linaro.org>
* ARM: ARM720t: remove empty asm/arch/hardware.hMasahiro Yamada2015-04-236-91/+0
| | | | | | | | | | arch/arm/cpu/arm720t/start.S includes <asm/arch/hardware.h>, but the hardware.h headers of ARM720T boards are all empty. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com>
* SPDX: add X11 SPDX-License-IdentifierMasahiro Yamada2015-04-232-0/+26
| | | | | | | | | | | These is a growing trend to license DT files dual GPL and X11 especially in the Linux community. It allows easier reuse of device trees for other software projects. This commit prepares for doing so in U-Boot too, since DT files are often copied from the kernel to U-Boot. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Licenses: fix a typo in READMEMasahiro Yamada2015-04-231-1/+1
| | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* vexpress64: use DM for all vexpress64 boardsLinus Walleij2015-04-232-17/+5
| | | | | | | | | | | | | | | | | | Commit d8bafe1310487ba0e0785997726b4792072178d3 "ARMv8: enable DM in vexpress64 board" only enabled DM for the simulated vexpress64 board (FVP) with the hardcoded clock value for the simulated board, causing a console regression on the Juno board which was using a different clock setting. Fix this by enabling DM for all vexpress64 boards, defining the clock frequency per-board, deleting the static array of PL01x ports from the config file and relying solely on the port defined in the boardfile using platform data. Cc: David Feng <fenghua@phytium.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* board/BuR/tseries: change pinmuxHannes Petermaier2015-04-231-3/+9
| | | | | | | some pins on the board have been rerouted to other peripherals, so we change the pinmux to apply with hardware-design. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* board/BuR/tseries: reactivate NAND-boardHannes Petermaier2015-04-234-22/+35
| | | | | | | | | | | | | | The NAND-version has been become a bit orphan. Now we need to reactivate it, so bring necessary things: - loading devicetree - switch control signal to correct pins - setup pinmux - default-environment up to date. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* board/BuR/common: simplify access to devicetreeHannes Petermaier2015-04-231-59/+55
| | | | | | | | | | instead of polling everytime the environment, we take usage of the global gd->fdt_blob variable and check it only against NULL. Variable "dtbaddr" from environment is needed only one time on loading the devicetree within "load_devicetree()" Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* cmd_scsi: Enable SoC AHCI device on platforms with PCItang yuantian2015-04-221-2/+2
| | | | | | | | | | | | | | Current driver assumes the AHCI is connected to PCI, this is not true on some SoCs, e.g. LS1021A, which has PCI but the AHCI is in SoC. This patch will enable embedded AHCI devices on platforms with PCI. PCI AHCI devices still can be used by commenting CONFIG_SCSI_AHCI_PLAT option in head file. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* stm32f4: Add support for stm32f429-discovery boardrev13@wp.pl2015-04-228-0/+471
| | | | | Signed-off-by: Kamil Lulko <rev13@wp.pl> Reviewed-by: Tom Rini <trini@konsulko.com>
* stm32f4: Add serial driverrev13@wp.pl2015-04-223-0/+120
| | | | | Signed-off-by: Kamil Lulko <rev13@wp.pl> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARMv7M: Add STM32F4 supportrev13@wp.pl2015-04-2212-0/+1021
| | | | | Signed-off-by: Kamil Lulko <rev13@wp.pl> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: Add ARMv7-M supportrev13@wp.pl2015-04-2211-2/+332
| | | | Signed-off-by: Kamil Lulko <rev13@wp.pl>
* unzip: add gzwrite command to write compressed image to block deviceEric Nelson2015-04-221-0/+47
| | | | | | | | | | | | Add gzwrite command to write gzip-compressed images to block devices. Input must be gzip-compressed according to RFC1952, since the crc and file size in the trailer will be confirmed during operation. The decompressed file size must be specified on the command line for images with decompressed sizes >= 4GiB because the trailer only contains the low 32 bits of the original file size. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* gunzip: add gzwrite routine for extracting compresed images to block deviceEric Nelson2015-04-222-1/+233
| | | | | | | | | | Initial filesystem images are generally highly compressible. Add a routine gzwrite that allows gzip-compressed images to be written to block devices. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Reviewed-by: Tom Rini <trini@ti.com>
* serial: pl01x: fix PL010 regressionLinus Walleij2015-04-211-2/+11
| | | | | | | | | | | | | | | | | | | | commit aed2fbef5e9a0ab5a7cd01e742039a962f0b24ef "dm: serial: Tidy up the pl01x driver" caused a regression on (real hardware) PL010 by omitting to update the line control register when switching baudrate. Fix this by inlining the missing write to the baud control register. Also renaming the set_line_control() function to pl011_set_line_control() since this function is clearly PL011-specific, and it won't suffice to call that to set up line control. Tested on the Integrator/AP hardware. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* kconfig: remove duplicated CMD_DNS optionAndrey Skvortsov2015-04-211-5/+0
| | | | | | | | two CMD_DNS options were added by commit 60296a835cb17 ("commands: add more command entries in Kconfig") Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2015-04-2010-26/+89
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| * net: pch_gbe: Fix pch_gbe device nameBin Meng2015-04-201-1/+1
| | | | | | | | | | | | | | The name "pch_gbe.%x" exceeds the limit of the name in the 'struct eth_device'. Rename it as just "pch_gbe". Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * net: gem: Use correct type for castingMichal Simek2015-04-201-1/+2
| | | | | | | | | | | | | | Use phys_addr_t which is used in function prototype in system.h. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net/phy: fixup for get_phy_idShengzhou Liu2015-04-202-1/+2
| | | | | | | | | | | | | | | | commit 3c6928fd7b0f84 "net: phy: fix warnings with W=1" caused some PHYs(e.g. CS4315/CS4340) not working. This patch fixes the warning and make those special PHYs working as well. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
| * net: phy: micrel: add support for KSZ8081MNXLuca Ellero2015-04-201-0/+11
| | | | | | | | | | | | | | This patch adds a support for KSZ8081MNX in MII mode. Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com> Acked-by: Pavel Machek <pavel@denx.de>
| * mii: add read-modify-write option to mii commandTim James2015-04-201-9/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When accessing PHY registers it is often desirable to only update selected bits, so it is necessary to first read the current value before writing back an modified value with the relevant bits updated. To simplify this and to allow such operations to be incorporated into simple shell scripts propose adding a 'modify' option to the existing mii command, which takes a mask indicating the bits to be updated in addition to a data value containing the new bits, ie, <updated> = (<data> & <mask>) | (<current> & ~<mask>). Signed-off-by: Tim <tim.james@macltd.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Tom Rini <trini@konsulko.com> Cc: Tim <tim.james@macltd.com>
| * Update MAINTAINERS and git-mailrc for netJoe Hershberger2015-04-202-2/+5
| | | | | | | | | | | | | | Update to my corporate email and make the supported filter and aliases more accurate. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: rtl8169: Build warning fixes for 64-bitThierry Reding2015-04-201-11/+13
| | | | | | | | | | | | | | | | | | | | | | Turn ioaddr into an unsigned long rather than a sized 32-bit variable. While at it, fix a couple of pointer to integer cast size mismatch warnings by casting through unsigned long going from pointers to integers and vice versa. Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: phy: realtek: Disable interrupt on Realtek Ethernet PHY driversCodrin Ciubotariu2015-04-201-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Realtek Ethernet PHYs, like RTL8211D(G/N) and RTL8211E(G), have interrupts enabled by default. If the interrupt is not treated later by the OS and the PHY's interrupt line is enabled and shared with other interrupts, the system will get an interrupt storm. This patch disables the interrupt for PHY devices that use one of the current Realtek Ethernet PHY drivers. Some of Realtek Ethernet PHYs, such as RTL8211B(L) have the interrupt masked. In this case, the functionality of the PHY should not be afected since this patch brings INER and INSR registers to their default values. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2015-04-2012-271/+147
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| * powerpc/mpc8641hpcn: Move environment to avoid conflictScott Wood2015-04-201-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot on this board grew a long time ago past the 384 KiB that it reserves for the U-Boot image, before the environment. Thus, saveenv overwrites the U-Boot image and bricks the board. I tried to find out when U-Boot grew beyond this point, but there is a long stretch in the history where this board did not build -- and AFAICT when it did fit in 384 KiB, it was missing vital features such as fdt support. Turning off CONFIG_VIDEO was not enough to make it fit. Thus, I don't think we have any choice other than to move the environment. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * board/t2080rdb: enable CONFIG_PHY_AQUANTIAShengzhou Liu2015-04-201-1/+1
| | | | | | | | | | | | | | CONFIG_PHY_AQ1202 is no longer needed, use CONFIG_PHY_AQUANTIA. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/mpc85xx: Remove some dead codeScott Wood2015-04-202-138/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot does not have system calls (the services it exposes to standalone commands use a different mechanism), so the syscall handler is dead code. It's also broken code, as it assumes it is located at 0xc00 -- while even before the patch to stop relocating exception vectors to 0, U-Boot had the syscall at 0x900. The critical and machine check return paths are never called -- the regular exception return path is used instead, which works because xSRR0/1 have already been saved and can be restored via the regular SRR0/1 (we don't care too much in U-Boot about taking a critical/mcheck inside another exception prolog/epilog). Also remove a few other small unused functions. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/mpc85xx: Don't relocate exception vectorsScott Wood2015-04-203-125/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Booke does not require exception vectors to be located at address zero. U-Boot was doing so anyway, simply because that's how it had been done on other PPC. The downside of this is that once the OS is loaded to address zero, the exception vectors have been overwritten -- which makes it difficult to diagnose a crash that happens after that point. The IVOR setup and trap entry code is simplified somewhat as a result. Also, there is no longer a need to align individual exceptions on 0x100 byte boundaries. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/t2080rdb: update ddr to support 1866MT/sShengzhou Liu2015-04-202-2/+7
| | | | | | | | | | | | | | | | Support SODIMM D3XP12081XL10AA 1866MT/s on T2080RDB. Enable CONFIG_CMD_MEMTEST as well. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * T4240RDB: Enable CONFIG_SYS_CORTINA_FW_IN_NOR configChunhe Lan2015-04-201-0/+1
| | | | | | | | | | | | | | | | | | Now cortina driver uses macro CONFIG_SYS_CORTINA_FW_IN_NOR to define that firmware of cortina driver is stored in the nor flash. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * board/t208xrdb: VID supportYing Zhang2015-04-202-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/t2080: enable erratum_a007186 for t2080 rev1.1Shengzhou Liu2015-04-201-1/+1
| | | | | | | | | | | | | | T2080 rev1.1 also needs erratum a007186. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * qemu-ppce500: Add support for 64bit CCSR mapAlexander Graf2015-04-201-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QEMU 2.3 changes the address layout of the CCSR map in the PV ppce500 machine to reside in higher address space. Unfortunately, this exposed a glitch in u-boot for ppce500: While providing a function to dynamically evaluate the CCSR region's position in physical address space, we never used it. Plus we forgot to support 64bit physical addresses. This patch fixes that mishap, making u-boot work fine with latest QEMU again. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * MPC8541/MPC8555: Enable SS_EN in DDR_SDRAM_CLK_CNLT registerCurt Brune2015-04-201-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the MPC8555/MPC8541 reference manual the SS_EN (source synchronous enable) bit in the DDR_SDRAM_CLK_CNLT register must be set during initialization. >From section 9.4.1.8 of that manual: Source synchronous enable. This bit field must be set during initialization. See Section 9.6.1, "DDR SDRAM Initialization Sequence," details. 0 - Reserved 1 - The address and command are sent to the DDR SDRAMs source synchronously. In addition, Freescale application note AN2805 is also very clear that this bit must be set. This patch reverts a change introduced by commit 457caecdbca3df21a93abff19eab12dbc61b7897. Testing Done: Compiled targets CONFIG_TARGET_MPC8555CDS and CONFIG_TARGET_MPC8541CDS and inspected the generated assembly code to verify the SS_EN bit was being set. There is one extra instruction emitted: fff9b774: 65 29 80 00 oris r9,r9,32768 Compiled the CONFIG_TARGET_MPC8548CDS target and verified that no additional instructions were emitted related to this patch. Booted an image on a MPC8541 based board successfully. Signed-off-by: Curt Brune <curt@cumulusnetworks.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2015-04-2017-114/+618
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