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* Merge tag 'u-boot-stm32-20210209' of ↵WIP/09Feb2021Tom Rini2021-02-0916-93/+249
|\ | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-stm - Enable the fastboot oem commands in stm32mp15 defconfig - Fixes pinctrol for stmfx and stm32 - Add support of I2C6_K in stm32mp15 clock driver - Alignment with Linux kernel device tree v5.11-rc2 for ST boards
| * arm: dts: stm32mp15: alignment with v5.11-rc2Patrick Delaunay2021-02-098-75/+200
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device tree alignment with Linux kernel v5.11-rc2 - fix DCMI DMA features on stm32mp15 family - Add alternate pinmux for FMC EBI bus - Harmonize EHCI/OHCI DT nodes name on stm32mp15 - update sdmmc IP version for STM32MP15 - Add LP timer irqs on stm32mp151 - Add LP timer wakeup-source on stm32mp151 - enable HASH by default on stm32mp15 - enable CRC1 by default on stm32mp15 - enable CRYP by default on stm32mp15 - set bus-type in DCMI endpoint for stm32mp157c-ev1 board - reorder spi4 within stm32mp15-pinctrl - add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx - fix mdma1 clients channel priority level on stm32mp151 - fix dmamux reg property on stm32mp151 - adjust USB OTG gadget fifo sizes in stm32mp151 - update stm32mp151 for remote proc synchronization support - support child mfd cells for the stm32mp1 TAMP syscon Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * ARM: dts: stm32: Fix cosmetic typo: use 'kHz' as kilohertz abbreviationFabrice GIRARDOT2021-02-092-2/+2
| | | | | | | | | | | | | | | | | | The kilohertz unit abbreviation should read 'kHz'. Note to STM32 team: modified files were generated, it may be worth to fix STM32CubeMX tool. Signed-off-by: Fabrice GIRARDOT <fabrice.girardot@flowbird.group> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * clk: stm32mp1: add support of I2C6_KPatrick Delaunay2021-02-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | Add support of missing I2C6_K with bit 3 of RCC_MC_APB5ENSETR = I2C6EN: I2C6 peripheral clocks enable. This patch allows customer to use I2C6 in SPL or in U-Boot as other I2C instance, already support in clk driver. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * pinctrl: stm32: bind only the enabled GPIO subnodePatrick Delaunay2021-02-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bind only the enabled GPIO subnode, to avoid to probe the node "gpio-controller" present in SOC dtsi (disabled by default) but not enabled in the included pincontrol dtsi file. For example, in stm32mp15xxac-pinctrl.dtsi 2 gpio bank are absent: gpioj: gpio@5000b000 gpiok: gpio@5000c000 Then these GPIO are absent in output of command "dm tree" and "gpio status -a" Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * pinctrl: stm32: correct management pin display of OTYPEPatrick Delaunay2021-02-091-10/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | OTYPE can be used for output or for alternate function to select PP = push-pull or OP = open-drain mode, according reference manual (Table 81. Port bit configuration table). This patch removes this indication for input pins and adds it for AF and output pins for pinmux command output. Fixes: b305dbc08b08 ("pinctrl: stm32: display bias information for all pins") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * pinctrl: stmfx: Use PINNAME_SIZE for pin's name sizePatrice Chotard2021-02-091-4/+3
| | | | | | | | | | | | | | | | Instead of redefining a pin's name size, use PINNAME_SIZE defined in include/dm/pinctrl.h Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * pinctrl: stmfx: Fix pin configuration issuePatrice Chotard2021-02-091-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pin-controller pin's name must be equal to pin's name used in device tree with "pins" DT property. Issue detected on stm32mp157c-ev1 board with goodix touchscreen. In DT, the goodix's pin is declared in DT with the node: goodix_pins: goodix { pins = "gpio14"; bias-pull-down; }; Whereas in stmfx pin-controller driver, pin's name are equal to "stmfx_gpioxx" where xx is the pin number. This lead to not configure stmfx's pins at probe because pins is identified by its name (see pinctrl_pin_name_to_selector() in pinctrl-generic.c) and stmfx pin "gpio14" can't be found. To fix this issue, come back to the original stmfx pin's name. Revert "pinctrl: stmfx: update pin name" This reverts commit 38d30cdcd65c73eeefac5efa328ad444a53b77dd. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Tested-by: Patrick DELAUNAY <patrick.delaunay@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * configs: stm32mp1: enable the fastboot oem command bootbusPatrick Delaunay2021-02-092-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Enable the fastboot oem command bootbus, used to configure the eMMC boot behavior, with same format than 'mmc bootbus' and with parameter: boot_bus_width reset_boot_bus_width boot_mode On stm32mp1 boards the expected command is $> fastboot oem partconf:0 0 0 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * configs: stm32mp1: enable the fastboot oem command partconfPatrick Delaunay2021-02-092-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the fastboot oem command partconf, used to select the correct eMMC boot partition, with same format than 'mmc partconf' with parameter: boot_ack boot_partition On stm32mp1 family: - boot_ack = 1 (Boot Acknowledge is needed by ROM code) - boot_partition = 1 or 2 (Boot partition 1 / 2 enabled for boot) So on EV1 board the expected commands to select boot partition 1 or 2 $> fastboot oem partconf:1 1 $> fastboot oem partconf:1 2 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * configs: stm32mp1: enable the fastboot oem command formatJean-Philippe ROMAIN2021-02-093-0/+16
| | | | | | | | | | | | | | | | | | Enable the fastboot oem command format and set the variable "partitions" with default eMMC partitions list. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Jean-Philippe ROMAIN <jean-philippe.romain@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * configs: stm32mp1: enable fastboot support of eMMC boot partitionJean-Philippe ROMAIN2021-02-092-0/+10
|/ | | | | | | | | Activate fastboot support on boot partition for eMMC, mmc1 device on STMicroelectronics board (EV1). Signed-off-by: Jean-Philippe ROMAIN <jean-philippe.romain@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* Merge git://git.denx.de/u-boot-marvellWIP/08Feb2021Tom Rini2021-02-089-68/+202
|\ | | | | | | | | | | | | | | | | - Espressobin: Set default env values at runtime (Pali) - Espressobin: Set the maximum slave SPI speed to 40MHz (Pali) - theadorable: PCIe test code enhancement and early deemphasis enabling (Stefan) - pci_mvebu: Disable config access to PCI host bridge ports (Stefan) - mv_sdhci: parse device-tree entry (Baruch)
| * mmc: mv_sdhci: parse device-tree entryBaruch Siach2021-02-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Call mmc_of_parse() so that generic DT properties like 'non-removable' are taken into account. This fixes boot on Clearfog with eMMC on SOM that requires the non-removable property. Reported-by: Thorsten Spille <thorsten_spille@netcor.de> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Marek Behún <marek.behun@nic.cz>
| * arm: mvebu: Espressobin: Set the maximum slave SPI speed to 40MHzKonstantin Porotchkin2021-02-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the SPI controller speed is defined by DTS, the maximum slave speed (connected devices) is limited by the pre-defined configuration value CONFIG_SF_DEFAULT_SPEED to 1MHz This patch increases this maximum SPI slave device speed to 40MHz Change-Id: I0d1239bd8a2061c66725c2c227c1e1f49c92c29e Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/59516 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> [pali: Set CONFIG_SF_DEFAULT_SPEED via defconfig] Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
| * cmd: mvebu/bubt: Fix default options in helpPali Rohár2021-02-081-3/+3
| | | | | | | | | | | | | | Default options depends on compile time defines. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
| * arm: mvebu: theadorable: Set deephasis bit in PCIe configs very earlyStefan Roese2021-02-081-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | Testing has shown, that the quality of the PCIe signals and also the stability of correct link establishment on the 2 PCIe ports is better, when the deemphasis bit is set in the PCIe config register. This needs to be done very early, even before the SERDES setup code is run. This way, the first link will already be established with this setup. Signed-off-by: Stefan Roese <sr@denx.de>
| * arm: mvebu: theadorable: Enhance "pcie" test cmd to check link width/speedStefan Roese2021-02-081-21/+87
| | | | | | | | | | | | | | | | | | | | | | This patch changes the board specific "pcie" U-Boot command to not only check for PCIe device existance but also for the correct link speed and width that has been established. This cmd can be used by U-Boot scripts for automated testing, if the PCIe setup is correct. Meaning, that all PCIe devices are correctly detected and the link speed and width is corrent. Signed-off-by: Stefan Roese <sr@denx.de>
| * pci: pci_mvebu: Disable config access to PCI host bridge portsStefan Roese2021-02-081-39/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the PCI config routines in the Armada XP / 38x driver to not allow access to the PCIe root ports. While updating the Armada XP based theadorable to the latest mainline and testing it with the DM PCI driver I noticed, that the PCI root bridge was being configured incorrectly. Resulting in the PCIe Intel WiFi was not working correctly in Linux. With this patch applied, all PCIe devices work without any issues in Linux again. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Behún <marek.behun@nic.cz> Cc: Phil Sutter <phil@nwl.cc> Cc: Mario Six <mario.six@gdsys.cc>
| * arm: mvebu: Espressobin: Set default value for $ethNaddr env variablePali Rohár2021-02-082-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Espressobin board are MAC addresses stored in U-Boot env area. Therefore they are not present in default_environment[] array constructed at compile time. This change puts permanent MAC addresses into default_environment[] array at board runtime. Espressobin board has enabled DEFAULT_ENV_IS_RW option and therefore can modify this array. This change ensure that 'env default -a' does not delete permanent MAC addresses from Espressobin env storage area. Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Andre Heider <a.heider@gmail.com>
| * arm: mvebu: Espressobin: Set default value for $fdtfile env variablePali Rohár2021-02-082-5/+27
| | | | | | | | | | | | | | | | | | | | | | | | On Espressobin board value for $fdtfile cannot be determined at compile time and is calculated at board runtime code. This change uses a new option DEFAULT_ENV_IS_RW to allow modifying default_environment[] array at runtime and set into it correct value. This change also ensure that 'env default -a' set correct value to $fdtfile. Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Andre Heider <a.heider@gmail.com>
| * env: Allow to set default_environment[] from board code via compile option ↵Pali Rohár2021-02-082-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | DEFAULT_ENV_IS_RW This change allows board code to modify default_environment[] array when compile option DEFAULT_ENV_IS_RW is specified in board config file. Some board default variables depend on runtime configuration which is not known at compile time. Therefore allow to set default_environment[] array as non-const and allow board code to modify it when it is needed. Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Andre Heider <a.heider@gmail.com>
* | Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2021-02-08183-192/+3894
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | Layerscape: Enable gpio Bug fixes & updates related to dspi, qspi, pciep, SVR mask, stream-id, env variables, mdio for LAyerscape Platforms Add SATA, network variant 1, 2 support on sl28 powerpc: T1042: drop CONFIG_VIDEO, Add kmcent2 board supporrt, keymile Bug fixes and updates for keymile, Kontron
| * | configs: lx2160aqds: enable CMD_GPIOBiwen Li2021-02-082-0/+2
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board lx2160aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: lx2160ardb: enable CMD_GPIOBiwen Li2021-02-083-0/+3
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board lx2160ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1088ardb: enable DM_GPIO and CMD_GPIOBiwen Li2021-02-086-0/+10
| | | | | | | | | | | | | | | | | | | | | Enable DM_GPIO and CMD_GPIO for board ls1088ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1088aqds: enable DM_GPIO and CMD_GPIOBiwen Li2021-02-086-0/+11
| | | | | | | | | | | | | | | | | | | | | Enable DM_GPIO and CMD_GPIO for board ls1088aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls2088aqds: enable CMD_GPIOBiwen Li2021-02-081-0/+1
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls2088aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls2088ardb: enable DM_GPIO and CMD_GPIOBiwen Li2021-02-084-0/+6
| | | | | | | | | | | | | | | | | | | | | Enable DM_GPIO and CMD_GPIO for board ls2088ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1046aqds: enable CMD_GPIOBiwen Li2021-02-089-0/+9
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls1046aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1046ardb: enable CMD_GPIOBiwen Li2021-02-088-0/+8
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls1046ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1043ardb: enable CMD_GPIOBiwen Li2021-02-088-0/+8
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls1043ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1043aqds: enable CMD_GPIOBiwen Li2021-02-089-0/+9
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls1043aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1028ardb: enable CMD_GPIOBiwen Li2021-02-082-0/+2
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls1028ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1028aqds: enable CMD_GPIOBiwen Li2021-02-083-0/+3
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls1028aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1021atwr: enable CMD_GPIOBiwen Li2021-02-087-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for ls1021atwr Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1021aqds: enable CMD_GPIOBiwen Li2021-02-089-0/+9
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls1021aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1012ardb: enable CMD_GPIOBiwen Li2021-02-084-0/+4
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for ls1012ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1012afrwy: enable CMD_GPIOBiwen Li2021-02-084-0/+4
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for ls1012afrwy Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1021aqds: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for board ls1021aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1021atwr: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for board ls1021atwr Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1046a: enable MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable MPC8XXX_GPIO for SoC LS1046A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: lx2160a: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for SoC LX2160A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls208xa: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for LS208xA Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1088a: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for LS1088A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1028a: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for SoC LS1028A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1043a: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for SoC LS1043A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1012a: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | arm64: dts: ls208xa: add gpio nodeBiwen Li2021-02-081-1/+45
| | | | | | | | | | | | | | | | | | | | | Add gpio node for SoC LS208xA Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | arm64: dts: ls1088a: add gpio nodeBiwen Li2021-02-081-1/+46
| | | | | | | | | | | | | | | | | | | | | Add gpio node for SoC LS1088A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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