summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeFilesLines
...
| * | sandbox: drop CONFIG_SYS_RELOC_GD_ENV_ADDRAKASHI Takahiro2020-05-294-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | As we discussed in [1], this option is not needed for sandbox build. [1] https://lists.denx.de/pipermail/u-boot/2020-February/400182.html Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge tag 'bugfixes-for-v2020.07-rc4' of ↵WIP/29May2020Tom Rini2020-05-293-13/+48
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-i2c i2c changes for v2020.07-rc4 - fix eeprom issue with AT24MAC402 (address != 0) - fix in i2c-uclass.c when compiling compiling with -Wtype-limits - designware_i2c: small fixes: - check if the device is powered - tidy up use of NULL priv
| * | misc: i2c_eeprom: implement different probe test eeprom offsetEugen Hristev2020-05-281-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because of this commit : 5ae84860b0 ("misc: i2c_eeprom: verify that the chip is functional at probe()") at probe time, each eeprom is tested for read at offset 0. The Atmel AT24MAC402 eeprom has different mapping. One i2c slave address is used for the lower 0x80 bytes and another i2c slave address is used for the upper 0x80 bytes. Because of this basically the i2c master sees 2 different slaves. We need the upper bytes because we read the unique MAC address from this EEPROM area. However this implies that our slave address will return error on reads from address 0x0 to 0x80. To solve this, implemented an offset field inside platform data that is by default 0 (as it is used now), but can be changed in the compatible table. The probe function will now read at this offset and use it, instead of blindly checking offset 0. This will fix the regression noticed on these EEPROMs since the commit abovementioned that introduces the probe failed issue. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | i2c: observe scl_count in i2c_deblock_gpio_loop()Heinrich Schuchardt2020-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When compiling with -Wtype-limits we see this error: drivers/i2c/i2c-uclass.c: In function ‘i2c_deblock_gpio_loop’: drivers/i2c/i2c-uclass.c:517:21: error: comparison of unsigned expression >= 0 is always true [-Werror=type-limits] 517 | while (scl_count-- >= 0) { | Don't loop forever. Fixes: 1f746a2c82b1 ("i2c: Make deblock delay and SCL clock configurable") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | i2c: designware_i2c: Check if the device is poweredRaul E Rangel2020-05-281-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the device doesn't return a version that means the device is non-functional. The dw_i2c_regs had invalid offsets for the version field. I got the correct value from the DesignWare databook. It also matches what the Picasso PPR says. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Tested on chromebook_coral: Signed-off-by: Simon Glass <sjg@chromium.org>
| * | i2c: designware_i2c: Tidy up use of NULL privSimon Glass2020-05-281-11/+23
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present we still have pre-driver-model code in this driver and it makes things a bit confusing. In particular calc_bus_speed() is called with priv as NULL if not using driver model. This results in spk_cnt and comp_param1 being read from an invalid address if not using driver model. For comp_param1 this may not cause problems if reading from addresses close to 0 happens to be allowed, as high speed is only supported by DM code. But spk_cnt is subsequently used to calculate the bus periods and so this may cause problems (e.g. on spear600 board which has not been migrated yet). Add a new parameter regs parameter to calc_bus_speed() and add more comments to this function and to _dw_i2c_set_bus_speed(), which calls it. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | Merge tag 'u-boot-amlogic-20200529' of ↵Tom Rini2020-05-298-4/+39
|\ \ | |/ |/| | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - Finally enable config to support HDMI console output in VIM3 boards - Fix USB gadget support for libretech-ac/pc & vim/vim2 boards
| * arm: dts: meson-gxl: fix USB gadget by adding missing nodes for U-BootNeil Armstrong2020-05-295-4/+24
| | | | | | | | | | | | | | | | | | | | The khadas-vim, khadas-vim2, libretech-ac & libretech-*-pc boards were missing DT tweak to enable USB gadget. Add them to their -u-boot.dtsi files and include the right gxl-u-boot.dtsi. Fixes: a19e8a0f03 ("arm: dts: meson-gxl: Add USB Gadget nodes for U-Boot") Reported-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * configs: khadas-vim3: enable HDMI outputNeil Armstrong2020-05-292-0/+13
| | | | | | | | | | | | Enable options to permit HDMI output on Khadas VIM3 & VIM3L boards. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * arm: dts: khadas-vim3: include meson-g12-common-u-boot.dtsi to enable HDMI ↵Neil Armstrong2020-05-291-0/+2
|/ | | | | | | | | output Include the common g12 u-boot tweaks to permit enabling video output tweaks on Khadas VIM3 boards. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini2020-05-2716-147/+179
|\ | | | | | | | | | | - Fix SPI boot on ds414 (Ezra) - Fix PHY mode definition on armada-3720-uDPU (Jakov) - Convert CRS305-1G-4S to generic version (Luka)
| * arm: mvebu: Convert CRS305-1G-4S board to CRS3xx-98DX3236Luka Kovacic2020-05-2713-145/+165
| | | | | | | | | | | | | | | | | | | | | | Convert the CRS305-1G-4S board to CRS3xx-98DX3236 to enable easier implementation of new CRS3xx series boards, based on Marvell Prestera 98DX3236. Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Jakov Petrina <jakov.petrina@sartura.hr>
| * arm: mvebu: armada-3720-uDPU: fix PHY mode definition to sgmii-2500Jakov Petrina2020-05-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f49ac7e1c4 switched the default PHY speed to 3.125Gbit to resolve issues with SFP modules. However, U-Boot does not have a "2500base-x" phy-mode. Resolve this by using "sgmii-2500" instead. Signed-off-by: Jakov Petrina <jakov.petrina@sartura.hr> Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Stefan Roese <sr@denx.de>
| * arm: mvebu: ds414: define CONFIG_SYS_U_BOOT_OFFSEzra Buehler2020-05-271-0/+3
| | | | | | | | | | | | | | | | | | Without CONFIG_SYS_U_BOOT_OFFS set to CONFIG_SYS_SPI_U_BOOT_OFFS, U-Boot will be located at address 0x16000. But, SPL will try to load the payload from 0x24000 causing the boot to hang. Signed-off-by: Ezra Buehler <ezra@easyb.ch> Reviewed-by: Stefan Roese <sr@denx.de>
| * arm: mvebu: ds414: add u-boot,dm-pre-reloc to spi0Ezra Buehler2020-05-271-0/+9
| | | | | | | | | | | | | | | | | | Without this U-Boot-specific property, booting on the Synology DS414 (or DS214+) fails in SPL. The spi0 DT node is not scanned, as a result the SPI flash cannot be found. Signed-off-by: Ezra Buehler <ezra@easyb.ch> Reviewed-by: Stefan Roese <sr@denx.de>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini2020-05-2718-678/+3399
|\ \ | |/ |/| | | | | | | - Use device tree for FSP-M and FSP-S configuration on Intel Apollo Lake - Add SMBIOS cbmem entry parsing for coreboot - Various clean-ups to CBFS implementation
| * cbfs: Don't require the CBFS size with cbfs_init_mem()Simon Glass2020-05-273-8/+8
| | | | | | | | | | | | | | | | The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * cbfs: Allow reading a file from a CBFS given its base addrSimon Glass2020-05-272-0/+27
| | | | | | | | | | | | | | | | | | Currently we support reading a file from CBFS given the address of the end of the ROM. Sometimes we only know the start of the CBFS. Add a function to find a file given that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * cbfs: Change file_cbfs_find_uncached() to return an errorSimon Glass2020-05-272-29/+36
| | | | | | | | | | | | | | | | | | | | | | | | This function currently returns a node pointer so there is no way to know the error code. Also it uses data in BSS which seems unnecessary since the caller might prefer to use a local variable. Update the function and split its body out into a separate function so we can use it later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * cbfs: Return the error code from file_cbfs_init()Simon Glass2020-05-273-13/+19
| | | | | | | | | | | | | | | | | | We may as well return the error code and use it directly in the command code. CBFS still uses its own error enum which we may be able to remove, but leave it for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * cbfs: Record the start address in cbfs_privSimon Glass2020-05-271-13/+31
| | | | | | | | | | | | | | | | | | | | | | The start address of the CBFS is used when scanning for files. It makes sense to put this in our cbfs_priv struct and calculate it when we read the header. Update the code accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * cbfs: Use void * for the position pointersSimon Glass2020-05-271-9/+8
| | | | | | | | | | | | | | | | | | It doesn't make sense to use u8 * as the pointer type for accessing the CBFS since we do not access it as bytes, but via structures. Change it to void *, which allows us to avoid a cast. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * cbfs: Unify the two header loadersSimon Glass2020-05-271-22/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | These two functions have mostly the same code. Pull this out into a common function. Also make this function zero the private data so that callers don't have to do it. Finally, update cbfs_load_header_ptr() to take the base of the ROM as its parameter, which makes more sense than passing the address of the header within the ROM. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * cbfs: Adjust cbfs_load_header_ptr() to use cbfs_privSimon Glass2020-05-271-3/+6
| | | | | | | | | | | | | | | | | | This function is strange at the moment in that it takes a header pointer but then accesses the cbfs_s global. Currently clients have their own priv pointer, so update the function to take that as a parameter instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * cbfs: Adjust file_cbfs_load_header() to use cbfs_privSimon Glass2020-05-271-4/+5
| | | | | | | | | | | | | | | | | | This function is strange at the moment in that it takes a header pointer but then accesses the cbfs_s global. Currently clients have their own priv pointer, so update the function to take that as a parameter instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * cbfs: Adjust return value of file_cbfs_next_file()Simon Glass2020-05-271-20/+23
| | | | | | | | | | | | | | | | | | | | | | At present this uses a true return to indicate it found a file. Adjust it to use 0 for this, so it is consistent with other functions. Update its callers accordingly and add a check for malloc() failure in file_cbfs_fill_cache(). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * cbfs: Use bool type for whether initialisedSimon Glass2020-05-271-4/+4
| | | | | | | | | | | | | | | | At present this uses an int type. U-Boot now supports bool so use this instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * cbfs: Use ulong consistentlySimon Glass2020-05-272-7/+6
| | | | | | | | | | | | | | | | | | U-Boot uses ulong for addresses but there are a few places in this driver that don't use it. Convert this driver over to follow this convention fully. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * cbfs: Rename the result variableSimon Glass2020-05-271-10/+10
| | | | | | | | | | | | | | | | | | At present the result variable in the cbfs_priv is called 'result' as is the local variable in a few functions. Change the latter to 'ret' which is more common in U-Boot and avoids confusion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * cbfs: drop file_cbfs_result declarationChristian Gmeiner2020-05-271-2/+0
| | | | | | | | | | | | | | | | It is not definded anywhere. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.gpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: coreboot: add SMBIOS cbmem entry parsingChristian Gmeiner2020-05-273-0/+27
| | | | | | | | | | Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: apl: Use devicetree for FSP-S configurationBernhard Messerklinger2020-05-276-387/+1922
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: apl: Use devicetree for FSP-M configurationBernhard Messerklinger2020-05-277-164/+1244
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A the moment the FSP-M configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-M full configurable from devicetree by adding binding properties for all FSP-M parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) [sjg: Fix a build error for coral] Signed-off-by: Simon Glass <sjg@chromium.org> [bmeng: Add __maybe_unused to fsp_update_config_from_dtb()] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabledBernhard Messerklinger2020-05-271-21/+25
| | | | | | | | | | | | | | | | | | | | Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: mtrr: Drop the mask display when changing an mtrrSimon Glass2020-05-271-1/+0
|/ | | | | | | | We don't need to print this information since it is shown when the MTRRs are displayed. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscvTom Rini2020-05-263-23/+21
|\ | | | | | | | | - sifive: fix palmer's email address. - Move all SMP related SBI calls to SBI_v01.
| * sifive: fix palmer's email addressPragnesh Patel2020-05-261-1/+1
| | | | | | | | | | | | | | | | Fix Palmer's email address Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
| * riscv: Move all SMP related SBI calls to SBI_v01Atish Patra2020-05-262-22/+20
| | | | | | | | | | | | | | | | | | | | | | SMP support for S-mode U-Boot is enabled only if SBI_V01 is enabled. There is no point in supporting SMP related (IPI and fences) SBI calls when SBI_V02 is enabled. Modify all the SMP related SBI calls to be defined only for SBI_V01. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | configs: Resync with savedefconfigTom Rini2020-05-2614-22/+16
|/ | | | | | Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
* Prepare v2020.07-rc3v2020.07-rc3Tom Rini2020-05-251-1/+1
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge tag 'ti-v2020.07-rc3' of ↵WIP/25May2020Tom Rini2020-05-2522-39/+455
|\ | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Enable DM_ETH on omap3_logic board - Enable Caches in SPL for K3 platforms - Enable backup boot mode support for J721E - Update the DDR timings for AM654 EVM - Add automated tests for RX-51
| * arm: mach-k3: Enable dcache in SPLJan Kiszka2020-05-195-0/+40
| | | | | | | | | | | | | | | | | | | | Add support for enabling dcache already in SPL. It accelerates the boot and resolves the risk to run into unaligned 64-bit accesses. Based on original patch by Lokesh Vulta. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
| * Nokia RX-51: Add automated test for running RX-51 build in qemuPali Rohár2020-05-195-0/+291
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains test/nokia_rx51_test.sh script which automatically download and compile all needed tools in local temporary directory to generate a simple MTD images for booting Maemo kernel image by U-Boot from RAM, eMMC and OneNAND. MTD images are then run in virtual n900 machine provided by qemu-linaro project. This script does not need any special privileges, so it can be run as non-root nobody user. It can be used to check that U-Boot for Nokia N900 is not broken and can be successfully booted in emulator. Script is registered to .azure-pipelines.yml, .gitlab-ci.yml and .travis.yml so it would be automatically run on those CI services. Signed-off-by: Pali Rohár <pali@kernel.org>
| * arm: mach-k3: j721e_init: Add support for backup boot modesAndreas Dannenberg2020-05-193-2/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | When the boot of J721E devices using the primary bootmode (configured via device pins) fails a boot using the configured backup bootmode is attempted. To take advantage of the backup boot mode feature go ahead and add support to the J721E init code to determine whether the ROM code performed the boot using the primary or backup boot mode, and if booted from the backup boot mode, decode the bootmode settings into the appropriate U-Boot mode accordingly so that the boot can proceed. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
| * ARM: omap3_logic boards: Convert to DM_ETHAdam Ford2020-05-199-23/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the converstion of SMC911x to DM, this can facilitate the omap3 boards from LogicPD (now called Beacon EmbeddedWorks) to be converted. There isn't a clean solution to doing this in phases, so the boards are all being done together to avoid breaking functionality. Because the GPMC bus hasn't been converted, the -u-boot.dtsi node needs to show the address of the ethernet controller for each board. The board file, which is common betwen the OMAP35 and DM37 SOM LV and Torpedo boards, can remove the manual ethernet initialization, but it still needs to register the address and GPMC configuration for the Ethernet controller which is now being moved around to board_late_init(). Lastly, this patch updates the various config files to add the reference for DM_ETH and remove the SMC address, which is now fetched from the newly created device tree nodes. Signed-off-by: Adam Ford <aford173@gmail.com>
| * ddr: k3-am654: EMIF Tool update to 2.02 for IO optimizations and fixesPraneeth Bajjuri2020-05-191-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | EMIF tool for AM65x [1] is now updated from rev 1.98 to 2.02 This update includes * Optimizations in IO configuration. * Fix for byte enablement in GCR registers. * Fixes for PG2.0 including ZQ control. [1]: http://www.ti.com/lit/zip/sprcah7 Acked-by: James Doublesin <doublesin@ti.com> Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
* | Merge branch '2020-05-25-misc-fixes'Tom Rini2020-05-2532-60/+254
|\ \ | | | | | | | | | | | | | | | | | | - A few minor Kconfig migrations / corrections - DFU doc fixes/improvements - Bugfix for ARMv8, env userspace building, more NULL checks in generic PHY code
| * | sandbox: move compression option to KconfigMichael Walle2020-05-252-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | CONFIG_BZIP2 and CONFIG_GZIP_COMPRESSED are Kconfig options. Select them by CONFIG_SANDBOX instead of setting them in configs/sandbox.h. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | cmd: zip: fix implicit declaration warningMichael Walle2020-05-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following warning: cmd/zip.c: In function ‘do_zip’: cmd/zip.c:30:6: warning: implicit declaration of function ‘gzip’; did you mean ‘do_zip’? [-Wimplicit-function-declaration] if (gzip((void *) dst, &dst_len, (void *) src, src_len) != 0) ^~~~ do_zip Include gzip.h header which declares the gzip() function. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | cmd: zip: automatically pull in gzip()Michael Walle2020-05-253-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the CONFIG_GZIP_COMPRESSED from a config.h macro to a Kconfig menu item. It is not selectable by a user because there is no reason to do so. Instead it will be automatically selected by the stuff which uses gzip(), like the zip command. Remove it from the config_whitelist.txt. Also remove CONFIG_GZIP_COMPRESS_DEF_SZ as this was never used on any board. The default seems to be sane, otherwise it should be added as a Kconfig option. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Simon Glass <sjg@chromium.org>