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* disk: part: fix typoHeinrich Schuchardt2019-04-261-1/+1
| | | | | | %g/rathen then/rather than/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* board/BuR/brxre1: use common resetcontroller implementationHannes Schmelzer2019-04-262-142/+18
| | | | | | | The handling of regarding bootmode and early setup has been moved to central location 'common/br_resetc.c', so use this on brxre1 board. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
* board/BuR/brxre1: cosmetic cleanupHannes Schmelzer2019-04-261-9/+8
| | | | | | | - fixup coding style - drop unused 'PUSH_KEY' define Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
* board/BuR/common: add br resetcontoller implementationHannes Schmelzer2019-04-262-0/+260
| | | | | | | | | | | On many B&R boards we have a reset-controller, responsible for very early board-bringup (voltages, clocks, ...) and bootmode selection. To be ready for adding more B&R boards to source tree while avoiding duplicate code, we add the resetcontroller implementation to the common part of B&R boards. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
* board/BuR/common: add 'brdefaulip_setup' functionHannes Schmelzer2019-04-262-0/+36
| | | | | | | | | | | | | | | Many B&R boards are equipped with an I2C-EEPROM where various information can be stored. Today there is only a single byte for 'board_id' used. We write this 'board_id' into environment for later use during boot. If the value != 0xFF, meaning the byte is programmed, we modify the "brdefaultip" environment variable for setting an IP-Address based on board_id. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
* board/BuR/common: cosmetic: move 'overwrite_console' up to more related stuffHannes Schmelzer2019-04-261-4/+5
| | | | Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
* board/BuR/common: prepare for compiling common into non AM33XX boardsHannes Schmelzer2019-04-261-16/+14
| | | | | | | | | Today the BuR common stuff is only used on AM33XX boards. In future we plan to have many other platforms than AM33XX so we have to move arch- specific #include(s) to responsible #ifdef sections. By the way we drop unneeded #include(s). Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
* Merge git://git.denx.de/u-boot-marvellTom Rini2019-04-2645-345/+743
|\ | | | | | | | | | | | | | | | | | | | | - Add DM based generic watchdog start and reset implementation and remove all ad-hoc implementations (Stefan) - Move mv_sdhci to DM (Pierre) - Misc turris_omnia updates (Pierre) - Change openrd targets to correctly build again (size changes and fixes to the dts targets) and bring it back into Travis builds (Stefan) - Add Kirkwood db-88f6281-bp board (Chris)
| * arm: kirkwood: openrd: Mark openrd boards as maintained againStefan Roese2019-04-262-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the latest size increase of the openrd boards, they all compile clean again. Let's mark them as maintained again and add the Travis job. Please note that I can only compile-test these targets as I don't have access to one of those boards. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Albert ARIBAUD <albert-u-boot@aribaud.net> Cc: Vagrant Cascadian <vagrant@debian.org> Cc: Chris Packham <judge.packham@gmail.com> Cc: Tom Rini <trini@konsulko.com>
| * watchdog: at91sam9_wdt: Remove now superfluous wdt start and resetStefan Roese2019-04-264-57/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | With the new generic function, the scattered other functions are now removed to be replaced by the generic one. The new version also enables the configuration of the watchdog timeout via the DT "timeout-sec" property (if enabled via CONFIG_OF_CONTROL). The watchdog servicing is enabled via CONFIG_WATCHDOG. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Eugen Hristev <eugen.hristev@microchip.com>
| * watchdog: mpc8xx_wdt: Watchdog driver and macros cleanupStefan Roese2019-04-265-9/+6
| | | | | | | | | | | | | | | | | | | | | | With the generic watchdog driver now implemented, this patch removes some legacy stuff from the MPC8xx watchdog driver and its Kconfig integration. CONFIG_MPC8xx_WATCHDOG is completely removed and hw_watchdog_reset() is made static, as the watchdog will now get serviced via the DM infrastructure if enabled via CONFIG_WATCHDOG. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Christophe Leroy <christophe.leroy@c-s.fr>
| * watchdog: cadence: Remove driver specific "timeout-sec" handlingStefan Roese2019-04-261-9/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have a generic DT property "timeout-sec" handling, the driver specific implementation can be dropped. This patch also changes the timeout restriction to the min and max values (clipping). Before this patch, the value provided via "timeout-sec" was used if the parameter was too high or low. Now the driver specific min and max values are used instead. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
| * watchdog: Implement generic watchdog_reset() versionStefan Roese2019-04-2614-259/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch tries to implement a generic watchdog_reset() function that can be used by all boards that want to service the watchdog device in U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG. Without this approach, new boards or platforms needed to implement a board specific version of this functionality, mostly copy'ing the same code over and over again into their board or platforms code base. With this new generic function, the scattered other functions are now removed to be replaced by the generic one. The new version also enables the configuration of the watchdog timeout via the DT "timeout-sec" property (if enabled via CONFIG_OF_CONTROL). This patch also adds a new flag to the GD flags, to flag that the watchdog is ready to use and adds the pointer to the watchdog device to the GD. This enables us to remove the global "watchdog_dev" variable, which was prone to cause problems because of its potentially very early use in watchdog_reset(), even before the BSS is cleared. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Marek Behún" <marek.behun@nic.cz> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Maxim Sloyko <maxims@google.com> Cc: Erik van Luijk <evanluijk@interact.nl> Cc: Ryder Lee <ryder.lee@mediatek.com> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Simon Glass <sjg@chromium.org> Cc: "Álvaro Fernández Rojas" <noltari@gmail.com> Cc: Philippe Reynes <philippe.reynes@softathome.com> Cc: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
| * arm: mvebu: turris_omnia: Use thumb instructions in SPL to save spaceStefan Roese2019-04-261-2/+3
| | | | | | | | | | | | | | | | | | | | | | With the latest changes to the drivers (SPI_FLASH_SPANSION etc), Travis reports that the SPL image is too big. Let's use the thumb instructions in SPL to save some space and make the image fit again. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Baruch Siach <baruch@tkos.co.il> Cc: Marek Behun <marek.behun@nic.cz> Reviewed-by: Marek Behún <marek.behun@nic.cz>
| * ARM: kirkwood: enable CONFIG_DM_USB on db-88f6281-bpChris Packham2019-04-262-0/+2
| | | | | | | | | | | | | | | | | | Switch to the driver model for USB on the db-88f6281-bp board. CONFIG_BLK can't be enabled yet because mvebu_mmc.c needs converting. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * ARM: kirkwood: add db-88f6281-bp boardChris Packham2019-04-2614-0/+555
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is Marvell's Kirkwood development board. It has the following features - 512M DDR2 - 2 PCI connectors - 1 x1 PCI-e interface - 1 Gigabit Ethernet Port - 2 SATA Ports - USB 2.0 Interface - SDIO - 128M NAND Flash - 16M SPI Flash It can be strapped to boot from SPI or NAND so there are two defconfigs (one per boot media). Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * arm: kirkwood: lsxl: add note about sata in READMEMichael Walle2019-04-261-0/+10
| | | | | | | | | | | | | | | | | | The boot commands have changed in the environment. Add a note about the incompatible change and how resolve the issue in the board's README. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * arm: kirkwood: openrd: Increase U-Boot size in flash to make it fitStefan Roese2019-04-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have run now multiple times into size issues with the openrd board port. To finally fix this, this patch now moves the U-Boot size from 0x6.0000 to 0x8.0000, giving enough space for the next time. This also changes the environment location and potentially the MTD partitioning, but I see no better fix for now. Especially since this board does not have an active maintainer. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chris Packham <judge.packham@gmail.com> Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * arm: kirkwood: openrd: Remove superfluous CONFIG_ENV_ADDRStefan Roese2019-04-261-1/+0
| | | | | | | | | | | | | | | | | | | | Remove the superfluous CONFIG_ENV_ADDR definition. Its not needed as CONFIG_ENV_OFFSET is also set to the same value. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chris Packham <judge.packham@gmail.com> Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * arm: kirkwood: dts: Add openrd-* dtb makefile build targetsStefan Roese2019-04-261-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following Kirkwood dtb build targets are currently missing: kirkwood-openrd-base.dtb kirkwood-openrd-client.dtb kirkwood-openrd-ultimate.dtb This patch adds them to the Makefile to fix the build error. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chris Packham <judge.packham@gmail.com> Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * arm: mvebu: turris_omnia: use MMC driver modelPierre Bourdon2019-04-261-0/+1
| | | | | | | | | | | | | | | | Enable DM_MMC for compliance with the driver model migration. Signed-off-by: Pierre Bourdon <delroth@gmail.com> Cc: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
| * mmc: mv_sdhci: add driver model supportPierre Bourdon2019-04-263-2/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | The new DM implementation currently does not support the Sheeva 88SV331xV5 specific quirk present in the legacy implementation. The legacy code is thus kept for this SoC and others not yet migrated to DM_MMC. Signed-off-by: Pierre Bourdon <delroth@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * arm: mvebu: turris_omnia: fix eeprom/mcu device namesPierre Bourdon2019-04-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Commit c4bd12a7dad4 ("i2c: mux: Generate longer i2c mux name") changed the naming scheme of i2c devices within a mux. This broke references to i2c@0 in the Turris Omnia board initialization code. Signed-off-by: Pierre Bourdon <delroth@gmail.com> Cc: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Behún <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2019-04-2636-288/+104
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| * arm: socfpga: mailbox: Fix off-by-one error on command length checkingLey Foon Tan2019-04-251-2/+2
| | | | | | | | | | | | | | | | | | | | A mailbox command contains 1-u32 header + arguments. The "len" variable only contains the length of the arguments, but not the 1-u32 header. Include the length of header when checking the ring buffer space to prevent off-by-one error. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
| * arm: socfpga: clean up board config filesSimon Goldschmidt2019-04-2511-42/+0
| | | | | | | | | | | | | | | | | | | | | | | | Remove outdated defines (not used any more, outdated due to DM conversion) from various socfpga files in include/config. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Series-version: 3 Series-changes: 2 - added (this) patch with further cleanups to the socfpga board config files
| * arm: socfpga: remove CONFIG_SYS_BOOTMAPSZSimon Goldschmidt2019-04-251-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | socfpga_common.h defines CONFIG_SYS_BOOTMAPSZ to 64 MiB. Since having this define overrides the 'bootm_size' env variable for the whole socfpga platform, let's remove this define from socfpga_common.h and instead rely on the 'bootm_size' env variable (which is initialized to 160 MiB in the same file's default env). This gives users the chance to override it in their own environment. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Series-to: Marek Vasut <marex@denx.de> Series-to: u-boot@lists.denx.de Cover-letter: arm: socfpga: clean up socfpga_common.h This series cleans up the include/configs/socfpga_common.h file a bit. It removes some defines that are used nowhere and cleans up some leftovers after various subsystems have been converted to use DM. END
| * arm: socfpga: clean up socfpga_common.hSimon Goldschmidt2019-04-251-40/+0
| | | | | | | | | | | | | | | | | | | | | | | | Remove outdated macros and comments (not used any more, outdated due to DM conversion) from socfpga_common.h. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Series-changes: 3 - changed commit message: s/defines/macros and comments/ Series-changes: 2 - remove even more outdated things
| * arm: socfpga: move vining_fpga to DM_I2CSimon Goldschmidt2019-04-254-44/+8
| | | | | | | | | | | | | | | | | | | | All socfpga boards except for vining_fpga use DM_I2C. Enable DM_I2C for this board and set the EEPROM defines via Kconfig (enabling CONFIG_I2C_EEPROM from MISC). Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Series-changes: 2 - added (this) patch to move socfpga_vining to DM_I2C
| * arm: socfpga: gen5: reduce SPL pre-reloc mallocSimon Goldschmidt2019-04-251-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By enabling debug prints in malloc_simple, we can see that SPL for socfpga gen5 does by far not need the 8 KiB malloc pool currently allocated for SPL in pre-reloc phase. On socfpga_socrates, 1304 bytes are currently used (and this increases by ~200 bytes only for the sdram/reset fixes in socfpga-next). To prevent wasting precious SRAM space, let's reduce the initial heap used for SPL to 2 KiB. This is still some hundred bytes more than currently used. Also, the gen5 SPL enables stack and heap in DDR memory pretty early. Only the initial uclass/dm parsing, serial console and DDR initialization is done in the initial heap, so these 2 KiB should be enough for all boards. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
| * arm: socfpga: imply/default common config optionsSimon Goldschmidt2019-04-2515-116/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit moves common config options used in all socfpga boards to select/imply in Kconfig. This both cleans up the defconfig files as well as makes future changes easier. Options implied/defaulted for all sub-arches: - SPL, SPL_DM, USE_TINY_PRINTF, NR_DRAM_BANKS Options implied/defaulted for implied for A10 & gen5: - FPGA_SOCFPGA, SYS_MALLOC_F_LEN, SYS_TEXT_BASE Options implied/defaulted for gen5: - SPL_STACK_R, SPL_SYS_MALLOC_SIMPLE, SPL_STACK_R_ADDR Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
| * arm: socfpga: put initial U-Boot stack into DDRSimon Goldschmidt2019-04-251-22/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If SPL post-reloc stage puts the stack into DDR, U-Boot should be able to do that, too. The reason to do so is that this way, U-Boot initial stack can be larger than SPL initial stack. In situations where we want to save the SPL in SRAM for next boot without reloading, this prevents overwriting the SPL DTB in SRAM if U-Boot stack usage gets too high. To achieve this, the malloc definition for a10 is moved up and sligthly changed to ensure CONFIG_SYS_INIT_RAM_SIZE is the remaining available size. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
| * arm: socfpga: fix comment about SPL memory layoutSimon Goldschmidt2019-04-251-3/+3
| | | | | | | | | | | | | | | | | | The comment about SPL memory layout for socfpga gen5 is outdated: the initial malloc memory is now at the end of the SRAM, gd is below it (see board_init_f_alloc_reserve). Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
| * configs: socfpga: socrates: enable rtc supportSimon Goldschmidt2019-04-251-0/+2
| | | | | | | | | | | | | | | | This enables DM_RTC and RTC_M41T62 to enable support for the rtc on the socrates board. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * arm: socfpga: socrates: make rtc workSimon Goldschmidt2019-04-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes the on-board RTC work on the socfpga_socrates board. This rtc is present on the board, but it does not work (fails with a timeout). This patch adds a weak pull-up on the I2C0-SCL pin connected to the m41t82 RTC on this board. While the SDA line has a pull-up on the pcb, the pull-up on the SCL line seems to be missing. To work around this, enable the weak-pull-up feature on this pin. After applying this patch, the rtc timeout is gone and the 'date' command can access the rtc chip. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * rtc: m41t62: add compatible for m41t82Simon Goldschmidt2019-04-251-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a compatible string for m41t82. This ensures that this driver can be used for m41t82 in DM mode, too (asit was usable for this model in non-DM mode before). In addition, the HT bit has to be reset during probe, since the m41t82 chip sets it when entering battery standby mode. This patch ensures this driver works on socfpga_socrates. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * i2c: designware: fix reset handling on socfpga gen5Simon Goldschmidt2019-04-251-6/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using this driver on socfpga gen5 with DM_I2C enabled leads to a data abort as the 'i2c' reset property cannot be found (the gen5 dtsi does not provide reset-names). The actual bug was to check 'if (&priv->reset_ctl)', which is never false. While at it, convert the driver to use 'reset_get_bulk' instead of looking at a specific named reset and also make it release the reset on driver remove before starting the OS. Fixes: 622597dee4f6 ("i2c: designware: add reset ctrl to driver") Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * Revert "cmd: Kconfig: Do not include EEPROM if DM_I2C is used without ↵Simon Goldschmidt2019-04-251-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | DM_I2C_COMPAT" This reverts commit 65a97e7fcf54feb7c4ebe1aee8a572830af4cf51. The 'eeprom' command has been converted to work with DM_I2C in a patch submitted around the same time as this commit: commit 0c07a9b4078d ("eeprom: Add device model based I2C support to eeprom command") Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
| * eeprom: fix DM_I2C support without CONFIG_SYS_I2C_EEPROM_BUSSimon Goldschmidt2019-04-251-8/+15
| | | | | | | | | | | | | | | | | | | | | | The current device model enabled eeprom code only works if CONFIG_SYS_I2C_EEPROM_BUS is set. This patch makes it work without that define so that the bus number passed to 'eeprom_init' is used. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * socfpga: add Simon Goldschmidt as co-custodianSimon Goldschmidt2019-04-242-1/+3
| | | | | | | | | | | | | | | | | | This updates MAINTAINERS and git-mailrc to add me as a co-custodian for socfpga. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* | Merge tag 'pull-24apr19' of git://git.denx.de/u-boot-dmTom Rini2019-04-2429-152/+335
|\ \ | | | | | | | | | | | | | | | Various minor sandbox iumprovements Fixes for tracing with sandbox Refactoring for boot_get_fdt()
| * | pci: pci.h: add missing maskbitRamon Fried2019-04-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | PCI_MSI_FLAGS_MASKBIT was missing from include file, add it. Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle()Thierry Reding2019-04-232-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | dm: core: Change platform specific translation-offset handlingStefan Roese2019-04-237-48/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Testing has shown that the current DM implementation of a platform / board specific translation offset, as its needed for the SPL on MVEBU platforms is buggy. The translation offset is confingured too late, after the driver bind functions are run. This may result in incorrect address translations. With the current implementation its not possible to configure the offset earlier, as the DM code has not run at all. This patch now removed the set_/get_translation_offset() calls and moves the translation offset into the GD variable translation_offset. This variable will get used when CONFIG_TRANSLATION_OFFSET is enabled. This option is enabled only for MVEBU on ARM32 platforms, where its currenty needed and configured in the SPL. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Pierre Bourdon <delroth@gmail.com> Cc: Baruch Siach <baruch@tkos.co.il> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Tested-by: Pierre Bourdon <delroth@gmail.com> Tested-by: Baruch Siach <baruch@tkos.co.il>
| * | simple-bus: add DM_FLAG_PRE_RELOC flag to simple-bus driverLukas Auer2019-04-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Boards such as qemu-riscv, which receive their device tree at runtime, for example from QEMU or firmware, are unable to add the appropriate device tree properties to make devices available pre relocation. Instead, they must rely on the DM_FLAG_PRE_RELOC flag to be set for the required drivers. Add the DM_FLAG_PRE_RELOC flag to the simple-bus driver to make devices under it with drivers that have set the flag as well available pre relocation for these boards. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * | sandbox: Enable the 'trace' command when tracing is usedSimon Glass2019-04-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable this by default so that tracing can be inspected if enabled. This cannot rely on the 'imply' in lib/Kconfig since this method of enabling tracing relates on an environment variable (FTRACE) and does not use Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | Convert CONFIG_TRACE_BUFFER_SIZE et al to KconfigSimon Glass2019-04-233-5/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_TRACE_BUFFER_SIZE CONFIG_TRACE_EARLY_SIZE CONFIG_TRACE_EARLY CONFIG_TRACE_EARLY_ADDR Signed-off-by: Simon Glass <sjg@chromium.org>
| * | Convert CONFIG_TRACE to KconfigSimon Glass2019-04-233-2/+10
| | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_TRACE Signed-off-by: Simon Glass <sjg@chromium.org>
| * | trace: Tidy up error returnsSimon Glass2019-04-231-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | At present many functions in this file return -1. Update them to return a valid error code. Also tidy up the 'return' statements at the same time, since these should have a blank line before them. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | div64: Don't instrument the division functionSimon Glass2019-04-231-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function may be called from tracing code, since that code needs to read the timer and this often requires calling do_div(), which calls __div64_32(). If this function is instrumented it causes an infinite loop, since emitting a trace record requests the time, which in turn emits a trace record, etc. Update the prototype to prevent instrumentation code being added. Signed-off-by: Simon Glass <sjg@chromium.org>
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