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* reset: uniphier: add PXs3 supportMasahiro Yamada2017-08-301-0/+23
| | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* reset: uniphier: fix compatible for SD reset node for LD11/LD20Masahiro Yamada2017-08-301-1/+5
| | | | | | LD20 has SD ctrl instead of MIO ctrl. LD11 has both of them. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* clk: uniphier: add System clock supportMasahiro Yamada2017-08-304-0/+67
| | | | | | Support system clocks for LD4, Pro4, sLD8, Pro5, PXs2/LD6b, LD11, LD20. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: fix DSPLL init code for LD20 SoCDai Okamura2017-08-301-3/+3
| | | | | Signed-off-by: Dai Okamura <okamura.dai@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: remove ad-hoc pin settings for NANDMasahiro Yamada2017-08-301-24/+4
| | | | | | | This is now set up by the pinctrl driver when the NAND driver is probed. Remove the legacy code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: enable CONFIG_NAND_DENALI_DTMasahiro Yamada2017-08-303-0/+3
| | | | | | Migrate to the DT-based NAND init entry. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: remove unneeded NAND config optionsMasahiro Yamada2017-08-301-3/+0
| | | | | | | | CONFIG_NAND_DENALI select's CONFIG_SYS_NAND_SELF_INIT, so the NAND initialization process is driven by the driver itself. CONFIG_SYS_NAND_MAX_CHIPS and CONFIG_SYS_NAND_BASE are unused. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add PLL settings for PXs3Masahiro Yamada2017-08-301-0/+55
| | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: move PLLCTRL register macros to each SoC .c fileMasahiro Yamada2017-08-303-21/+30
| | | | | | | | The new SoC PXs3 changed the address of PLL, but still uses the same PLL name. We can not define SC_*PLLCTRL in the common header. Move them to per-SoC .c file. Also, fix some PLL comments. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: replace <common.h> with <linux/delay.h> in pll settingsMasahiro Yamada2017-08-302-2/+2
| | | | | | | | | | The #include <common.h> was added for mdelay(). Later, the declaration of mdelay was moved to <linux/delay.h> by commit 5bc516ed661a ("delay: collect {m, n, u}delay declarations to include/linux/delay.h"). There is no need to include <common.h> now. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* mtd: nand: denali_dt: add a DT driverMasahiro Yamada2017-08-305-1/+81
| | | | | | | | | | | | | | | | | | A patch for NAND uclass support was proposed about half a year ago: https://patchwork.ozlabs.org/patch/722282/ It was not merged and I do not see on-going work for this. Without DM-based probing, we need to set up pinctrl etc. in an ad-hoc way and give lots of crappy CONFIG options for base addresses and properties, which are supposed to be specified by DT. This is painful. This commit just provides a probe hook to retrieve "reg" from DT and allocate private data in a DM manner. This DT driver is not essentially a NAND driver, in fact it is (ab)using UCLASS_MISC. Once UCLASS_NAND is supported, it would be possible to migrate to it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ofnode: add {ofnode, dev}_read_resource_byname()Masahiro Yamada2017-08-294-1/+39
| | | | | | | | | | | Linux supports platform_get_resource_byname() to look up a resource by name. We want a similar helper. It is useful when a device node has named register regions. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mtdparts: Fix uninitialized scalar usageTom Rini2017-08-261-0/+1
| | | | | | | | | When reworking this code to fix other issues found by Coverity, I forgot to ensure tmp_ep was always cleared before use. Reported-by: Coverity (CID: 166612) Fixes: bc028345acc4 ("mtdparts: Fix final outstanding issue reported by Coverity") Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-shTom Rini2017-08-261-4/+5
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| * arch/sh: don't bring common/env_embedded.o into the linkThomas Petazzoni2017-08-261-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The linker script for SuperH brings the .ppcenv and .ppcenvr section of common/env_embedded.o into the .text section. However, the .ppcenv section is only ever filled in by env_embedded.o when CONFIG_SYS_USE_PPCENV is defined, but no platforms in mainline U-Boot use this. In addition, common/env_embedded.o is not always built (when you use CONFIG_ENV_IS_NOWHERE for example), which causes the following build failure: Fixes: LD u-boot /home/thomas/sh4aeb-linux-musl/bin/sh4aeb-linux-ld.bfd: cannot find common/env_embedded.o We fix this by no longer adding the .ppcenv and .ppcenvr sections from common/env_embedded.o into the .text section. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * arch/sh: allow building in big-endian modeThomas Petazzoni2017-08-261-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | The SuperH architecture allows to be run in either little or big endian mode. Some SuperH SoCs get the little vs. big endian decision through mode pins sampled at reset, so if big endian has been choosen by HW designers, it cannot be easily changed. Therefore, it makes sense to allow building U-Boot for SuperH in big endian mode. To allow this, the only change needed is to adjust the OUTPUT_FORMAT() in the linker script. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* | Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2017-08-269-105/+120
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| * | ARM: rmobile: Enable MMC and USB DM on ULCBMarek Vasut2017-08-262-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the MMC and USB DM on the board since it's the modern method and now supported by the drivers. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Enable MMC and USB DM on Salvator-XMarek Vasut2017-08-262-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the MMC and USB DM on the board since it's the modern method and now supported by the drivers. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Remove SH SDHI probing from ULCB boardMarek Vasut2017-08-261-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | Drop the SH SDHI bit from the board since SD now probes from DT instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Remove SH SDHI probing from Salvator-X boardMarek Vasut2017-08-261-15/+1
| | | | | | | | | | | | | | | | | | | | | | | | Drop the SH SDHI bit from the board since SD now probes from DT instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Remove Serial SH probing from ULCB boardMarek Vasut2017-08-261-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | Drop the Serial SH bit from the board since UART now probes from DT instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Remove Serial SH probing from Salvator-X boardMarek Vasut2017-08-261-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | Drop the Serial SH bit from the board since UART now probes from DT instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Remove RAVB probing from ULCB boardMarek Vasut2017-08-261-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | Drop the RAVB bit from the board since RAVB now probes from DT instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Remove RAVB probing from Salvator-X boardMarek Vasut2017-08-261-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | Drop the RAVB bit from the board since RAVB now probes from DT instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Enable HUSH parserMarek Vasut2017-08-264-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | The HUSH parser was disabled somewhere along the way, reenable it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Alexandru Gagniuc <alex.g@adaptrum.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Enable KSZ90X1 PHY on Salvator-XMarek Vasut2017-08-262-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit da3b9e7fd6a1 (Move PHY_MICREL and PHY_MICREL_KSZ90X1 to Kconfig) broke ethernet support on R8A779x Salvator-X boards by disabling the KSZ90x1 PHY in Kconfig. Reenable it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Alexandru Gagniuc <alex.g@adaptrum.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Add u-boot, dm-pre-reloc to clock nodes on Gen3Marek Vasut2017-08-262-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | We need the clock available very early, add the u-boot,dm-pre-reloc DT property on those nodes, so they come up very in the process. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | clk: rmobile: Split R8A7795 and R8A7796 core clock tablesMarek Vasut2017-08-261-33/+96
| |/ | | | | | | | | | | | | | | | | | | The R8A7795 and R8A7796 tables use different constants to identify clock in DT, so split the tables and use the correct constants on R8A7795. This fixes UART clock misconfiguration on R8A7795. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge git://git.denx.de/u-boot-x86Tom Rini2017-08-2639-269/+162
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| * | x86: tangier: kconfig: Guard tangier-specific optionsBin Meng2017-08-241-0/+4
| | | | | | | | | | | | | | | | | | | | | These options should not be exposed to other platforms. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | x86: bayleybay: Adjust VGA rom addressBin Meng2017-08-241-1/+1
| | | | | | | | | | | | | | | | | | | | | Adjust VGA rom address to 0xfffb0000 so that u-boot.rom image can be built again. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: baytrail: Fix turbo enableBin Meng2017-08-241-0/+1
| | | | | | | | | | | | | | | | | | CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED must be turned on for Baytrail. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: Convert CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED to KconfigBin Meng2017-08-243-2/+8
| | | | | | | | | | | | | | | | | | This converts CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED to a Kconfig option. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: dfi-bt700: Select SERIAL_RX_BUFFER via KconfigStefan Roese2017-08-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To support more input characters (longer stings pasted into the U-Boot prompt) without dropping, lets selects the recently added UART RX buffer for these boards. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: conga-qeval20-qa3-e3845: Select SERIAL_RX_BUFFER via KconfigStefan Roese2017-08-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To support more input characters (longer stings pasted into the U-Boot prompt) without dropping, lets selects the recently added UART RX buffer for these boards. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | serial: serial-uclass: Add generic serial RX buffer supportStefan Roese2017-08-243-3/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pasting longer lines into the U-Boot console prompt sometimes leads to characters missing. One problem here is the small 16-byte FIFO of the legacy NS16550 UART, e.g. on x86 platforms. This patch now introduces a Kconfig option to enable RX buffer support for all DM based serial drivers. With this option enabled, I was able paste really long lines into the U-Boot console, without any characters missing. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * | Revert "serial: ns16550: Add RX interrupt buffer support"Stefan Roese2017-08-243-138/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 6822cf3ec7c8768b8727573b8f4b2cb3d870b881. As Bin Meng has tested and pointed out, we don't need the RX interrupt for the RX buffer support at all. Just reading all available characters into a buffer is sufficient to solve the problem with the dropped characters upon long lines pasted into the U-Boot prompt. Since this RX buffer support can be implemented in a generic way, without any device specifica (e.g. for the ns16550), I'll post a new patch with a new serial RX buffer support for DM, which all DM based serial drivers can use. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | vbe: Drop vbe_get_video_info()Bin Meng2017-08-242-43/+0
| | | | | | | | | | | | | | | | | | With DM video, this is not used any more. Drop it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: kconfig: Imply CMD_PCIBin Meng2017-08-2422-20/+2
| | | | | | | | | | | | | | | | | | | | | | | | Let's imply the 'pci' command to access the de facto interconnect bus in an x86 system. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | x86: fsp: Configure SPI opcode registers before SPI is locked downBin Meng2017-08-242-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Intel FSP (like Braswell) does SPI lock-down during the call to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done, it's bootloader's responsibility to configure the SPI controller's opcode registers properly otherwise SPI controller driver doesn't know how to communicate with the SPI flash device. This introduces a Kconfig option CONFIG_FSP_LOCKDOWN_SPI for such FSPs. When it is on, U-Boot will configure the SPI opcode registers before the lock-down. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | x86: ich-spi: Move opcode registers configuration to another routineBin Meng2017-08-241-6/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the ICH SPI opcode registers configuration is done in the ich_spi_remove() routine, a little bit weird but that's how current. Linux MTD driver works. This changes to move the opcode registers configuration to a separate routine ich_spi_config_opcode() which might be called by U-Boot itself as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | x86: ich-spi: Don't read cached lock statusBin Meng2017-08-242-8/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the ICH SPI controller driver reads the controller lock status from its register in the probe routine and saves the lock status to a member of priv. Later the driver uses the cached status from priv to judge whether the controller setting is locked and do different setup. But such logic is only valid when there is only the SPI controller driver that touches the SPI hardware. In fact the lock status change can be trigged outside the driver, eg: during the fsp_notify() call when Intel FSP is used. This changes the driver to read the lock status every time when an SPI transfer is initiated instead of reading the cached one. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | x86: ich-spi: Remove unnecessary assignment in ich_init_controller()Bin Meng2017-08-241-1/+0
| | | | | | | | | | | | | | | | | | | | | There is no need to do another assignment to ich7_spi. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | x86: ich-spi: Remove spi_write_protect_region()Bin Meng2017-08-241-50/+0
| |/ | | | | | | | | | | | | This routine is not called anywhere. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* | Merge git://git.denx.de/u-boot-i2cTom Rini2017-08-267-0/+1081
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| * | i2c: muxes: add i2c gpio multiplexer driverPeng Fan2017-08-233-0/+148
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an i2c mux driver providing access to i2c bus segments using a hardware MUX sitting on a master bus and controlled through gpio pins. E.G. something like: ---------- ---------- Bus segment 1 - - - - - | | SCL/SDA | |-------------- | | | |------------| | | | | | Bus segment 2 | | | Linux | GPIO 1..N | MUX |--------------- Devices | |------------| | | | | | | | Bus segment M | | | |---------------| | ---------- ---------- - - - - - SCL/SDA of the master I2C bus is multiplexed to bus segment 1..M according to the settings of the GPIO pins 1..N. Note commit log from kernel commit 92ed1a76("i2c: Add generic I2C multiplexer using GPIO API") Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Peng Fan <peng.fan@nxp.com> (i.MX6QP-Sabreauto) Cc: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Simon Glass <sjg@chromium.org>
| * | i2c: add i2c driver for stm32Patrice Chotard2017-08-234-0/+933
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i2c driver which can be used on both STM32F7 and STM32H7. This I2C block supports the following features: _ Slave and master modes _ Multimaster capability _ Standard-mode (up to 100 kHz) _ Fast-mode (up to 400 kHz) _ Fast-mode Plus (up to 1 MHz) _ 7-bit and 10-bit addressing mode _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask) _ All 7-bit addresses acknowledge mode _ General call _ Programmable setup and hold times _ Easy to use event management _ Optional clock stretching _ Software reset Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge git://www.denx.de/git/u-boot-cfi-flashTom Rini2017-08-263-11/+4
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| * | mtd: cfi: staticize functionsMarek Vasut2017-08-223-11/+4
| | | | | | | | | | | | | | | | | | | | | | | | Staticize a few functions and variables which are no longer exposed. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
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