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* rtc: fall back to ->{read, write} if ->{read, write}8 are not providedRasmus Villemoes2020-07-091-6/+19
| | | | | | | | | | | | | | | | Similar to how the dm_rtc_{read,write} functions fall back to using the {read,write}8 methods, do the opposite in the rtc_{read,write}8 functions. This way, each driver only needs to provide either ->read8 or ->read to make both rtc_read8() and dm_rtc_read() work - without this, a driver that provides ->read() would most likely just duplicate the logic here for implementing a ->read8() method in term of its ->read() method. The same remarks of course apply to the write case. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
* rtc: add dm_rtc_write() helperRasmus Villemoes2020-07-092-0/+43
| | | | | | | | | | | Similar to dm_rtc_read(), introduce a helper that allows the caller to write multiple consecutive 8-bit registers with one call. If the driver provides the ->write method, use that, otherwise loop using ->write8. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
* rtc: add dm_rtc_read helper and ->read methodRasmus Villemoes2020-07-092-0/+42
| | | | | | | | | | | | Some users may want to read multiple consecutive 8-bit registers. Instead of each caller having to implement the loop, provide a dm_rtc_read() helper. Also, allow a driver to provide a ->read method, which can be more efficient than reading one register at a time. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
* i2c: imx_lpi2c: Improve the codes to use private dataYe Li2020-07-091-11/+11
| | | | | | | | | | | | Current driver calls the devfdt_get_addr to get the base address of lpi2c controller in each sub-functions. Since the devfdt_get_addr accesses the DTB and translate the address, it introduces much overhead. Improve the codes to use private variable which has recorded the base address from probe. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* board: presidio-asic: Add I2C supportAlex Nemirovsky2020-07-091-0/+3
| | | | | | | | Add I2C board support for Cortina Access Presidio Engineering Board Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Heiko Schocher <hs@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
* i2c: i2c-cortina: added CAxxxx I2C supportArthur Li2020-07-096-0/+465
| | | | | | | | | | | Add I2C controller support for Cortina Access CAxxxx SoCs Signed-off-by: Arthur Li <arthur.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Heiko Schocher <hs@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de> hs: fixed build error, add include log.h
* i2c: octeon_i2c: Add I2C controller driver for OcteonSuneel Garapati2020-07-094-0/+882
| | | | | | | | | | | | | | | | | Add support for I2C controllers found on Octeon II/III and Octeon TX TX2 SoC platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
* Merge branch '2020-07-08-misc-features-and-fixes'Tom Rini2020-07-0827-207/+746
|\ | | | | | | | | | | | | - mem cmd improvements - TPM fixes - SPL/NAND/FIT fixes - RSA improvements
| * lib: rsa: function to verify a signature against a hashWIP/2020-07-08-misc-features-and-fixesHeiko Stuebner2020-07-082-24/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | rsa_verify() expects a memory region and wants to do the hashing itself, but there may be cases where the hashing is done via other means, like hashing a squashfs rootfs. So add rsa_verify_hash() to allow verifiying a signature against an existing hash. As this entails the same verification routines we can just move the relevant code over from rsa_verify() and also call rsa_verify_hash() from there. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
| * cmd: Add a memory-search commandSimon Glass2020-07-086-0/+456
| | | | | | | | | | | | | | | | | | | | | | | | | | It is useful to be able to find hex values and strings in a memory range. Add a command to support this. cmd: Fix 'md' and add a memory-search command At present 'md.q' is broken. This series provides a fix for this. It also implements a new memory-search command called 'ms'. It allows searching memory for hex and string data. END Signed-off-by: Simon Glass <sjg@chromium.org>
| * command: Drop #ifdef for MEM_SUPPORT_64BIT_DATASimon Glass2020-07-081-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is defined only when __lp64__ is defined. That means that ulong is 64 bits long. Therefore we don't need to use a separate u64 type on those architectures. Fix up the code to take advantage of that, removing the preprocessor conditions. Also include the header file that defines MEM_SUPPORT_64BIT_DATA. It is included by env.h in this file, but that might not last forever. Signed-off-by: Simon Glass <sjg@chromium.org>
| * display_options: Drop #ifdef for MEM_SUPPORT_64BIT_DATASimon Glass2020-07-081-14/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is defined only when __lp64__ is defined. That means that ulong is 64 bits long. Therefore we don't need to use a separate u64 type on those architectures. Fix up the code to take advantage of that, removing the preprocessor conditions. Also include the missing header file that defines MEM_SUPPORT_64BIT_DATA Fixes: 09140113108 ("command: Remove the cmd_tbl_t typedef") Signed-off-by: Simon Glass <sjg@chromium.org>
| * cmd: mem: Drop #ifdef for MEM_SUPPORT_64BIT_DATASimon Glass2020-07-081-79/+38
| | | | | | | | | | | | | | | | | | | | | | | | This is defined only when __lp64__ is defined. That means that ulong is 64 bits long. Therefore we don't need to use a separate u64 type on those architectures. Fix up the code to take advantage of that, removing the preprocessor conditions. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
| * cmd: mem: Use a macro to avoid #ifdef in helpSimon Glass2020-07-081-51/+17
| | | | | | | | | | | | | | | | It is a bit painful to have #ifdefs in the middle of the help for each command. Add a macro to avoid this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
| * Update MEM_SUPPORT_64BIT_DATA to be always definedSimon Glass2020-07-084-32/+34
| | | | | | | | | | | | | | | | | | | | | | Define this macro always so we don't need the preprocessor to check it. Convert the users to #if instead of #ifdef. Note that '#if MEM_SUPPORT_64BIT_DATA' does not give an error if the macro is not define. It just assumes zero. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
| * spl: fit: improve spl_nand_fit_read(...) readabilityDario Binacchi2020-07-081-5/+5
| | | | | | | | | | | | | | | | | | | | | | Replacing the ret variable with err and handling first the error condition about the value returned by the spl_nand_fit_read routine, improves the code readability. Furthermore, the 'else' int the 'else return ret' instruction was useless. cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dariobin@libero.it>
| * spl: fit: nand: fix fit loading in case of bad blocksDario Binacchi2020-07-083-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | The offset at which the image to be loaded from NAND is located is retrieved from the itb header. The presence of bad blocks in the area of the NAND where the itb image is located could invalidate the offset which must therefore be adjusted taking into account the state of the sectors concerned. cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
| * spl: fit: fail fit loading in case of FDT appending errorDario Binacchi2020-07-081-3/+6
| | | | | | | | | | | | | | | | | | | | | | If uboot does not embed its device tree and the FIT loading function returns error in case of failure in the FDT append, the redundant itb image could be loaded. cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * spl: fix format of function documentationDario Binacchi2020-07-081-1/+1
| | | | | | | | | | | | | | | | U-Boot adopted the kernel-doc annotation style. cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
| * spl: fit: select SPL_CRYPTO_SUPPORT for SPL_FIT_SIGNATUREHeiko Stuebner2020-07-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Verifying FIT images obviously needs the rsa parts of crypto support and while main uboot always compiles crypto support, it's optional for SPL and we should thus select the necessary option to not end up in compile errors like: u-boot/lib/rsa/rsa-verify.c:328: undefined reference to `rsa_mod_exp' So select SPL_CRYPTO_SUPPORT in SPL_FIT_SIGNATURE. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * spl: fit: select SPL_HASH_SUPPORT for SPL_FIT_SIGNATUREHeiko Stuebner2020-07-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | rsa-checsum needs support for hash functions or else will run into compile errors like: u-boot/lib/rsa/rsa-checksum.c:28: undefined reference to `hash_progressive_lookup_algo' So similar to the main FIT_SIGNATURE entry selects HASH, select SPL_HASH_SUPPORT for SPL_FIT_SIGNATURE. Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * lib: rsa: add documentation to padding_pss_verify to document limitationsHeiko Stuebner2020-07-081-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | padding_pss_verify only works with the default pss salt setting of -2 (length to be automatically determined based on the PSS block structure) not -1 (salt length set to the maximum permissible value), which makes verifications of signatures with that saltlen fail. Until this gets implemented at least document this behaviour. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * lib: rsa: free local arrays after use in rsa_gen_key_prop()Heiko Stuebner2020-07-081-11/+10
| | | | | | | | | | | | | | | | | | | | n, rr and rrtmp are used for internal calculations, but in the end the results are copied into separately allocated elements of the actual key_prop, so the n, rr and rrtmp elements are not used anymore when returning from the function and should of course be freed. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * lib: rsa: fix allocated size for rr and rrtmp in rsa_gen_key_prop()Heiko Stuebner2020-07-081-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When calculating rrtmp/rr rsa_gen_key_prop() tries to make (((rlen + 31) >> 5) + 1) steps in the rr uint32_t array and (((rlen + 7) >> 3) + 1) / 4 steps in uint32_t rrtmp[] with rlen being num_bits * 2 On a 4096bit key this comes down to to 257 uint32_t elements in rr and 256 elements in rrtmp but with the current allocation rr and rrtmp only have 129 uint32_t elements. On 2048bit keys this works by chance as the defined max_rsa_size=4096 allocates a suitable number of elements, but with an actual 4096bit key this results in other memory parts getting overwritten. So as suggested by Heinrich Schuchardt just use the actual bit-size of the key as base for the size calculation, in turn making the code compatible to any future keysizes. Suggested-by: Heinrich Schuchardt <xypron.debian@gmx.de> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> rrtmp needs 2 + (((*prop)->num_bits * 2) >> 5) array elements. Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * lib: rsa: bring exp_len in line when generating a key_propHeiko Stuebner2020-07-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The exponent field of struct key_prop gets allocated an uint64_t, and the contents are positioned from the back, so an exponent of "0x01 0x00 0x01" becomes 0x0 0x0 0x0 0x0 0x0 0x1 0x0 0x1" Right now rsa_gen_key_prop() allocates a uint64_t but sets exp_len to the size returned from the parser, while on the other hand the when getting the key from the devicetree exp_len always gets set to sizeof(uint64_t). So bring that in line with the established code. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * lib: rsa: take spl/non-spl into account when building rsa_verify_with_pkey()Heiko Stuebner2020-07-082-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now in multiple places there are only checks for the full CONFIG_RSA_VERIFY_WITH_PKEY option, not split into main,spl,tpl variants. This breaks when the rsa functions get enabled for SPL, for example to verify u-boot proper from spl. So fix this by using the existing helpers to distinguis between build-steps. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * lib: rsa: distinguish between tpl and spl for CONFIG_RSA_VERIFYHeiko Stuebner2020-07-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the SPL may want to do signature checking this won't be the case for TPL in all cases, as TPL is mostly used when the amount of initial memory is not enough for a full SPL. So on a system where SPL uses DM but TPL does not we currently end up with a TPL compile error of: lib/rsa/rsa-verify.c:48:25: error: dereferencing pointer to incomplete type ‘struct checksum_algo’ To prevent that change the $(SPL_) to $(SPL_TPL_) to distinguish between both. If someone really needs FIT signature checking in TPL as well, a new TPL_RSA_VERIFY config symbol needs to be added. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * cmd: add a panic commandHeiko Stuebner2020-07-082-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | Even in boot scripts it may be needed to "panic" when all options are exhausted and the device specification specifies hanging instead of resetting the board. So add a new panic command that just wraps around the core panic call in U-Boot and can take an optional message. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
| * debug_uart: Add CR before and after announce stringStefan Roese2020-07-081-1/+1
| | | | | | | | | | | | | | | | | | Add linefeeds before and after the announce string. This makes the output easier to read, especially if some text follows the announce message without a specific additional CR. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * tpm: add #ifndef to fix redeclaration build errorsJohannes Holland2020-07-081-0/+2
| | | | | | | | | | | | | | | | tpm_tis_spi.c directly includes tpm_tis.h and tpm-v2.h which both define the same enums (see e.g. TPM_ACCESS_VALID). Add an #ifndef to prevent redeclaration errors. Signed-off-by: Johannes Holland <johannes.holland@infineon.com>
| * tpm: add TPM2_GetRandom command supportDhananjay Phadke2020-07-082-0/+57
| | | | | | | | | | | | | | Add support for TPM2 GetRandom command Signed-off-by: Dhananjay Phadke <dphadke@linux.microsoft.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * tpm2: tis_spi: add linux compatible fallback stringBruno Thomsen2020-07-082-3/+3
|/ | | | | | | | | | | | | | | | | | | This solves a compatibility issue with Linux device trees that contain TPMv2.x hardware. So it's easier to import DTS from upstream kernel when migrating board init from C code to DTS. The issue is that fallback binding is different between Linux and u-Boot. Linux: "tcg,tpm_tis-spi" U-Boot: "tis,tpm2-spi" As there are currently no in-tree users of the U-Boot binding, it makes sense to use Linux fallback binding. Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge tag 'u-boot-amlogic-20200708' of ↵WIP/08Jul2020Tom Rini2020-07-0819-40/+777
|\ | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - Add proper Odroid-N2 board support code - Add support for Odroid-C4 single board computer
| * ARM: dts: meson-sm1-odroid-c4: add ethernet PHY resetNeil Armstrong2020-07-081-0/+6
| | | | | | | | | | | | | | | | The PHY needs a reset in order to be functionnal for U-Boot, add the old PHY reset bindings for dwmac until we support the new bindings in the PHY node. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Anand Moon <linux.amoon@gmail.com>
| * boards: amlogic: add Odroid C4 supportChristian Hewitt2020-07-085-1/+207
| | | | | | | | | | | | | | | | | | | | Odroid C4 is an Amlogic SM1 device, the board config and board documentation are adapted from the Odroid-N2 support from the same vendor. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> [narmstrong: fix odroid-c4.rst typos and structure] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Anand Moon <linux.amoon@gmail.com>
| * ARM: dts: sync amlogic G12A/G12B/SM1 DT from Linux 5.8-rc1Christian Hewitt2020-07-0810-36/+501
| | | | | | | | | | | | | | | | This imports the changes and the new Odroid-C4 board from the Linux commit b3a9e3b9622a ("Linux 5.8-rc1"). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Anand Moon <linux.amoon@gmail.com>
| * board: amlogic: Add Odroid-N2 board supportPascal Vizeli2020-07-085-3/+63
| | | | | | | | | | | | | | | | | | Add a proper Odroid-N2 board support to handle the Ethernet MAC address stored in the in-SoC eFuses. Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Anand Moon <linux.amoon@gmail.com>
* | gpio: fix test.py for gpio label lookupHeiko Schocher2020-07-083-0/+3
| | | | | | | | | | | | | | | | | | | | commit 2bd261dd1712 ("gpio: search for gpio label if gpio is not found through bank name") disabled DM_GPIO_LOOKUP_LABEL which is needed in sandbox defconfigs, as we have tests for this functionality. Signed-off-by: Heiko Schocher <hs@denx.de>
* | Merge tag 'u-boot-rockchip-20200708' of ↵WIP/07Jul2020Tom Rini2020-07-0720-13/+966
|\ \ | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - dts sync from kernel for rk3399 boards; - Add Radxa Rock Pi N8, N10; - Some feature update for Pinebook Pro;
| * | ARM: dts: rockchip: Add Radxa Rock Pi N8 initial supportJagan Teki2020-07-076-9/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rock Pi N8 is a Rockchip RK3288 based SBC, which has - VMARC RK3288 SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VAMRC RK3288 SOM need to mount on top of radxa dalang carrier board for making Rock Pi N8 SBC. So, add initial support for Rock Pi N8 by including rk3288, rk3288 vamrc-som and raxda dalang carrier board dtsi files. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | ARM: dts: rockchip: Add VMARC RK3288 SOM initial supportJagan Teki2020-07-071-0/+298
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | VMARC RK3288 SOM is a standard SMARC SOM design with Rockchip RK3288 SoC, which is designed by Vamrs. Specification: - Rockchip RK3288 - PMIC: RK808 - SD slot, 16GiB eMMC - 2xUSB-2.0, 1xUSB3.0 - USB-C for power supply - Ethernet, PCIe - HDMI, MIPI-DSI/CSI, eDP Add initial support for VMARC RK3288 SOM, this would use with associated carrier board. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | ARM: dts: rockchip: radxa-dalang: Update sdmmc propertiesJagan Teki2020-07-072-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Radxa dalang carrier boards are used to mount vmarc SoM's of rk3399pro and rk3288 to make complete SBC. Among these combinations, card detection gpio, max-frequency properties are used with rk3399pro SoM but not required for rk3288 SoM based on the hardware schematics. So, let's move these sdmmc specific properties on associate vmarc dtsi to make common use of dalang carrier device tree file. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: rk3399: allow deselecting SPL_ATF_NO_PLATFORM_PARAMHugh Cole-Baker2020-07-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPL_ATF_NO_PLATFORM_PARAM is selected by default for RK3399 configs, to guard against issues when used with TF-A versions that perform insufficient validation on the platform parameter. However, since commit 8109f738ffa7 "rockchip: increase FDT buffer size" in TF-A, passing a device tree as platform parameter no longer causes problems for upstream TF-A for RK3399. Since SPL_ATF_NO_PLATFORM_PARAM doesn't need to be selected when using upstream TF-A, change the Kconfig option from select to imply. It'll still default to being selected but can be deselected by a user if they know they will be using a compatible version of TF-A. Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Walter Lozano <walter.lozano@collabora.com>
| * | arm64: dts: rockchip: Add Radxa Rock Pi N10 initial supportJagan Teki2020-07-076-1/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rock Pi N10 is a Rockchip RK3399Pro based SBC, which has - VMARC RK3399Pro SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VAMRC RK3399Pro SOM need to mount on top of radxa dalang carrier board for making Rock Pi N10 SBC. So, add initial support for Rock Pi N10 by including rk3399, rk3399pro vamrc-som and raxda dalang carrier board dtsi files. rk3399pro-rock-pi-n10.dts was synced from linux-next v5.7-rc1. Tested - ROCK PI N10 Model B - ROCK PI N10 Model C - Boot from SD Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | ARM: dts: rockchip: Sync v5.7-rc1 Radxa Dalang CarrierJagan Teki2020-07-071-0/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Carrier board often referred as baseboard. For making complete SBC or any other industrial boards, these carrier boards will be used with associated SOMs. Radxa has Dalang carrier board which supports on-board peripherals, ports like USB-2.0, USB-3.0, HDMI, MIPI DSI/CSI, eDP, Ethernet, WiFi, PCIe, USB-C, 40-Pin GPIO header and etc. Right now Dalang carrier board is used with two SBC-variants: Rock Pi N10 => VMARC RK3399Por SOM + Dalang carrier board Rock Pi N8 => VMARC RK3288 SOM + Dalang carrier board(+codec) So add this carrier board dtsi as a separate file in ARM directory, so-that the same can reuse it in both rk3288, rk3399pro variants of Rockchip SOMs. Sync this dtsi from linux-next v5.7-rc1. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | arm64: dts: rockchip: Sync v5.7-rc1 VMARC RK3399Pro SOMJagan Teki2020-07-071-0/+333
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | VMARC RK3399Pro SOM is a standard SMARC SOM design with Rockchip RK3399Pro SoC, which is designed by Vamrs. Specification: - Rockchip RK3399Pro - PMIC: RK809-3 - SD slot, 16GiB eMMC - 2xUSB-2.0, 1xUSB3.0 - USB-C for power supply - Ethernet, PCIe - HDMI, MIPI-DSI/CSI, eDP Add initial support for VMARC RK3399Pro SOM, this would use with associated carrier board. Sync this dtsi from linux-next v5.7-rc1. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | arm64: dts: rockchip: Sync v5.7-rc1 rk3399pro.dtsiJagan Teki2020-07-071-0/+22
| | | | | | | | | | | | | | | | | | | | | Sync linux-next v5.7-rc1 rk3399pro.dtsi. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: Pinebook Pro: Fix SPI flash and store env on itPeter Robinson2020-07-073-16/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some minor fixes for SPI flash on the Pinebook Pro and also default to saving environment to the SPI flash as it's guaranteed to be on board. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (applied with make savedefconfig) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: Pinebook Pro: Fix USB and the USB attached keyboardPeter Robinson2020-07-072-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | The built in keyboard on the Pinebook Pro is attached via USB so fix this up to ensure USB works as expected. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | rockchip: Pinebook Pro: enable rng to provide an entropy sourcePeter Robinson2020-07-073-0/+10
| | | | | | | | | | | | | | | | | | | | | Enable the rng so UEFI can provide entropy for KASLR Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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