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| * stm32mp1: support of STM32MP15x Rev.ZPatrick Delaunay2020-02-132-0/+4
| | | | | | | | | | | | | | Add support for Rev.Z of STM32MP15x cpu. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * board: stm32mp1: update readmePatrick Delaunay2020-02-131-18/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | Update readme: - list the supported SOC and change family to STM32MP15x - add warning on OTP write and prerequisite: check if MAC address is not yet provisioned. - Use filesize for mmc write command (avoid to write all partition with ${partsize}). ${filesize} and ${partsize} are set by previous load command. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * ARM: dts: stm32m1: add reg for pll nodesPatrick Delaunay2020-02-136-4/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following DT dtc warnings for stm32mp1 boards: Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@0: node has a unit name, but no reg property Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@1: node has a unit name, but no reg property Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@2: node has a unit name, but no reg property Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@3: node has a unit name, but no reg property Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * ARM: dts: stm32mp1: correct ddr nodePatrick Delaunay2020-02-131-1/+1
| | | | | | | | | | | | | | | | | | This patch fix the warning: dt.dts: Warning (simple_bus_reg): Node /soc/ddr@5A003000 simple-bus unit address format error, expected "5a003000" Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * ARM: dts: stm32mp1: move FDCAN to PLL4_RAntonio Borneo2020-02-134-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | LTDC modifies the clock frequency to adapt it to the display. Such frequency change is not detected by the FDCAN driver that instead cache the value at probe and pretend to use it later. Keep the LTDC alone on PLL4_Q by moving the FDCAN to PLL4_R. Signed-off-by: Antonio Borneo <antonio.borneo@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * ARM: dts: stm32mp1: DT alignment with kernel v5.5-rc7Patrick Delaunay2020-02-137-32/+112
| | | | | | | | | | | | | | Device tree and binding alignment with kernel v5.5-rc7 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * stm32mp1: pwr: use the last binding for pwrPatrick Delaunay2020-02-139-63/+42
| | | | | | | | | | | | | | | | | | | | Update the driver to use the latest binding from kernel v5.5-rc1: no more use syscon or regmap to access to pwr register and only one pwr_regulators node with the compatibility "st,stm32mp1,pwr-reg" is available. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * ARM: dts: stm32mp1: DT alignment with kernel v5.4Patrick Delaunay2020-02-134-11/+12
| | | | | | | | | | | | | | Device tree and binding alignment with kernel v5.4 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * ARM: dts: stm32: Add DH Electronics DHCOM SoM and PDK2 boardMarek Vasut2020-02-1211-1/+1587
| | | | | | | | | | | | | | | | | | | | | | Add support for DH Electronics DHCOM SoM and PDK2 rev. 400 carrier board. This is an SoM with STM32MP15xx and an evaluation kit. The baseboard provides Ethernet, UART, USB, CAN and optional display. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
* | Merge tag 'ti-v2020.04-rc3' of ↵Tom Rini2020-02-1410-2/+60
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-ti K3 J721E/AM65X: - UART boot fixes for J721E - Enabling debug uart for AM65x DRA7xx/AM57xx: - Preveinting boot from Invalid boot configuration for AM57xx Keysonte2: - Linux Boot fixes for K2 platforms. AM33/AM43/Davinci: - Ethernt boot fixes for AM43XX - USB Host boot fixes for AM43XX
| * | armV7R: K3: am654: Activate early console functionalityAndreas Dannenberg2020-02-131-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | Activate early console functionality on AM65x devices to allow for early diagnostic messages until the main console is ready to get activated. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | arm: K3: j721e: Fix boot parameter table index memory addressAndreas Dannenberg2020-02-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The boot parameter table index memory address for J721E was configured to an incorrect value which prevented the use of this definition to determine which boot parameter table is active which is needed to be able to distinguish between primary and backup boot modes. Fix this issue by updating the value to the correct one also in alignment with the J721E Technical Reference Manual (TRM). Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | ARM: keystone2: enable initrd fixup for LPAE addressingTero Kristo2020-02-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Keystone2 u-boot loads the initrd image into non-LPAE addressed memory but linux kernel is running in LPAE. This causes a conflict as kernel detects that non-memory address is passed and kernel ignores initrd. There is an existing fixup logic to modify the address in the proper configuration, but this is disabled at the moment. Enable the fixup by setting the env variable for this so that initrd can be used properly. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | board: ti: am57xx-idk: Prevent boot for invalid configuationRoger Quadros2020-02-131-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On am571x-idk there can be following configurations based on Jumper J51 and LCD panel detected. 1) J51 removed (6port): 6 port Ethernet. Disable LCD panel. 2) J51 placed (LCD) + Panel detected: 4 port Ethernet with appropriate LCD. 3) J51 placed (LCD) + Panel not detected/not supported. Configuration 3 is considered invalid as we can't use display nor ICSS1 ethernet ports due to hardware muxing. Alert the user to fix the configuration and prevent boot. Alternative was to allow boot and limit to 4 port Ethernet with no display but this involved introduction of another DTB for the kernel and was considered not worth the hassle. Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | arm: mach-k3: Fix nomenclature on Silicon RevisionsLokesh Vutla2020-02-131-1/+1
| | | | | | | | | | | | | | | | | | | | | Data manual mentions the new silicon revisions as SR instead of PG. Use the same nomenclature inside U-Boot as well. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | configs: am43xx_evm_usbhost_boot: Add device for environmentFaiz Abbas2020-02-131-0/+2
| | | | | | | | | | | | | | | | | | | | | Add mmc device partition 0 as the seat of the environment. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | configs: am43xx_evm_usbhost: Add configs for USB Host boot modeFaiz Abbas2020-02-131-0/+10
| | | | | | | | | | | | | | | | | | | | | Enable configs to fix USB Host boot mode. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | configs: j721e_evm_r5: Enable early consLokesh Vutla2020-02-131-0/+1
| | | | | | | | | | | | | | | | | | Early cons will be used in uart boot. Enable the same for j721e_r5 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | arm: dts: k3-j721e-r5-common-proc-board: Disable power-domains for mcu uartLokesh Vutla2020-02-131-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | mcu uart will be used during uart boot for loading sysfw.itb. Since sysfw is not yet available during uart load, power-domain cannot be enabled. We need to rely on ROM for doing that, so disable power-domains and clocks for mcu uart. Also fix the mcu uart frequency. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | configs: am43xx_evm: Enable SPL_ETH_SUPPORTFaiz Abbas2020-02-131-0/+1
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_SPL_ETH_SUPPORT to fix ethernet boot support. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | arm: dts: am437x-gp-evm: Add some nodes to u-boot.dtsiFaiz Abbas2020-02-131-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | Add scm_conf syscon node and its parents as well as the ethernet phy node to u-boot.dtsi. This enables ethernet boot. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | | Merge branch '2020-02-13-master-imports'Tom Rini2020-02-1312-38/+50
|\ \ \ | |/ / |/| | | | | | | | | | | - Minor Kconfig fixes - Ensure we use python3 on all CI in all cases. - Other minor fixes
| * | travis/gitlab/azure: Ensure we use python3 alwaysWIP/2020-02-13-master-importsTom Rini2020-02-133-13/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When running our tests there are some cases where as part of the Python 2.7 to Python 3.6 migration we didn't force Python 3.6 to be used as everything wasn't yet migrated. Now that everything is, make sure to tell virtualenv to use python3. In the case of Travis this is best done by making the tools test happen after the main tests so that it will already have been run in all cases, TEST_PY_TOOLS is a subset of TEST_PY_BD. Signed-off-by: Tom Rini <trini@konsulko.com>
| * | board_f: Make clear_bss genericOvidiu Panait2020-02-131-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | clear_bss is already used by 3 arches (x86, arc, xtensa), so make it generic and provide a weak nop stub for it. This also removes arch-specific ifdef duplications around clear_bss. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
| * | net: convert NET_MAXDEFRAG to KconfigRasmus Villemoes2020-02-133-4/+10
| | | | | | | | | | | | | | | Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | ram: rockchip: Fix Kconfig dependency for RAM_ROCKCHIP_DEBUGMichal Simek2020-02-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no reason to show RAM_ROCKCHIP_DEBUG entry in other .config files as I see it for Xilinx ZynqMP. \# CONFIG_U_QE is not set \# CONFIG_RAM is not set CONFIG_RAM_ROCKCHIP_DEBUG=y Add missing dependency on RAM_ROCKCHIP driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | doc: board: add Rockchip to doc/board/index.rstHeinrich Schuchardt2020-02-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a build error checking consistency... /doc/board/rockchip/index.rst: WARNING: document isn't included in any toctree Fixes: 338b86c9b305 ("doc: boards: Add rockchip documentation") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | common/console.c: discard volatileHeinrich Schuchardt2020-02-131-10/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid errors of like common/console.c: In function ‘console_record_reset’: common/console.c:615:16: error: passing argument 1 of ‘membuff_purge’ discards ‘volatile’ qualifier from pointer target type [-Werror=discarded-qualifiers] 615 | membuff_purge(&gd->console_out); | ^~~~~~~~~~~~~~~~ by casting to non-volatile. The volatile property stems from declarations like arch/arm/include/asm/global_data.h:114: But there is no need to treat gd->console_out and gd->console_in as volatile in the context of common/console.c. Fixes: b612312816ff ("console: Add a function to read a line of the output / eof") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | test: aes: fix memleakPhilippe Reynes2020-02-131-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the first version, the result of malloc is checked with ut_assertnonnull. But on a fail, this macro exit the function, so previously malloc are not freed. So to avoid a memleak, we don't use ut_assertnonnull, but simply check the return of malloc. If one has failed, we freed all the allocated memory and quit the function. Reported-by: Coverity (CID: 284403) Reported-by: Coverity (CID: 284404) Reported-by: Coverity (CID: 284405) Reported-by: Coverity (CID: 284406) Reported-by: Coverity (CID: 284407) Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
| * | pci: definition of pci_addr_t and pci_size_tHeinrich Schuchardt2020-02-131-2/+2
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the size of pci_addr_t and pci_size_t depends on CONFIG_SYS_PCI_64BIT. For qemu_arm64_defconfig with 4 GiB RAM this leads to an error pci_hose_phys_to_bus: invalid physical address which is due to the truncation of the bus address in _dm_pci_phys_to_bus. Defining CONFIG_SYS_PCI_64BIT is not a solution as this results in an error PCI: Failed autoconfig bar 10 So let's use unsigned long for pci_addr_t and pci_size_t if CONFIG_SYS_PCI_64BIT is not defined. Considering that 32bit U-Boot is used to launch some 64bit x86 systems we cannot do without CONFIG_SYS_PCI_64BIT requiring u64 as type. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge tag 'arc-fixes-for-2020.04-rc2' of ↵Tom Rini2020-02-1220-196/+250
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-arc As usual a bit late a couple of tiny fixes and improvements for ARC. 1. Switch from ARC UART to a convenient DW UART on ARC simulation platforms. This became avaialble when nSIM got support of that much more standard UART (starting from nSIM v2019.06). FWIW also available now in Free nSIM [1]. This among other things allows us finally to use the same one binary on all our simulators & FPGA-based emulators. 2. Disable networking support on simulated platforms as there's no network interface in them. 3. Add Virtio net & block devices for the configuration supported by QEMU so that we may leverage those virtual peripherals and in fact it's possible to load uImage from TFTP server and bootm it. 4. Minor fixes for HSDK clocks. 5. Rework of how we chose and use compiler options for ARC-based boards. In real world ARC-based designs are customized more or less but very rarely match any of our "templates" thus it makes not much sense to pretend we have some fixed configs, instead we now will fully reply on a SoC or even board on getting precise set of compiler options preferably even extracted from real HW via "tcfgen" utility. 6. Well and finally yet another simplification - switch to generic written in C accessors which are much more universal and just work for any target supported by the complier as compared to GAS implementation which is much more target-dependent. This one was heavily "inspired" by similar implementation for RISCV and ARM. [1] https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgi
| * ARC: Switch to generic accessorsAlexey Brodkin2020-02-121-129/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | First of all U-Boot is not that performance oriented as real run-time software like OS or user bare-metal app so we may afford being not super fast as we only being executed once. That in return allows us to be more universal and support wider variety of devices. And looking forward that will significantly reduce maintenance and simplify support of newer architectures. And while at it we add quad-word accessors like readq(), writeq() etc. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * ARC: rework setting of ARC CPU specific compiler optionsEugeniy Paltsev2020-02-1212-22/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | It's a very rare if at all existing occasion when ARC CPU template is used as is w/o any changes - in the end it's a beauty and competitive advantage of ARC cores to be tailored for a particular use-case - and so it doesn't make a lot of sense to offer template-based "-mcpu" selection. Given for each and every platform we end-up adding quite a few more flags it's logical to move "-mcpu" selection to platform's definition as well which we exactly do here. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * CLK: HSDK: fix HDMI clock calculationEugeniy Paltsev2020-02-121-10/+21
| | | | | | | | | | | | | | | | | | HDMI PLL has its own xtal with 27 MHz output but we treat it the same way as other PLLs with 33.33 MHz input. Fix that. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * CLK: HSDK: Check for PLL bypass firstlyEugeniy Paltsev2020-02-121-4/+4
| | | | | | | | | | | | | | Pll bypass has priority over enable/disable. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * ARC: nsim_hs38: Add support of Virtio NET & BLKAlexey Brodkin2020-02-127-2/+77
| | | | | | | | | | | | | | | | | | Given now nsim_hs38 configuration is usable on QEMU and in QEMU we have Virtio working perfectly fine the next logical step is to add support of supported & known to work net & bkl to this config. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * ARC: nsim_{700|700be|hs38be}_defconfigs: Disable networkingAlexey Brodkin2020-02-123-0/+3
| | | | | | | | | | | | | | | | | | | | We don't have yet any brc700 or big-enadian platforms with networking support to run this particular configuration. Whenever QEMU for ARC supports arc700 or big-endian targets we may revisit this one. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * ARC: nSIM: switch from ARC UART to DW UARTAlexey Brodkin2020-02-125-21/+23
| | | | | | | | | | | | | | | | | | | | | | Since v2019.06 DesingWare nSIM supports DesignWare UART simulation and so we may switch from pretty unusual ARC UART to much more standard DesignWare UART (which in case of U-Boot is just an ordinary 16650 UART). This among other things makes built dinaries compatible with our other platforms to name a few: FPGA-based HAPS boards, QEMU and even ZeBU. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | Prepare v2020.04-rc2v2020.04-rc2Tom Rini2020-02-121-1/+1
|/ | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* Revert "gitlab: Disable SDL when building sandbox"Simon Glass2020-02-121-3/+2
| | | | | | | | | This is not needed now that we have SDL2 in the docker image. It causes test failures for tests which need video to work. This reverts commit af800722eb718bec51c5943cfb69231acf15178f. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dmTom Rini2020-02-11697-754/+2772
|\ | | | | | | | | | | | | sandbox conversion to SDL2 TPM TEE driver Various minor sandbox video enhancements New driver model core utility functions
| * sandbox: Complete migration away from os_malloc()Simon Glass2020-02-051-4/+4
| | | | | | | | | | | | | | | | | | | | Now that we can use direct access to the system malloc() in sandbox, drop the remaining uses of os_malloc(). The only one remaining now is for the RAM buffer, which we do want to be at a known address, so this is intended. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: core: Drop the inclusion of linux/compat.h in dm.hSimon Glass2020-02-056-2/+7
| | | | | | | | | | | | | | Most files don't need this header and it pulls in quite of lots of stuff, malloc() in particular. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: core: Create a new header file for 'compat' featuresSimon Glass2020-02-05460-77/+593
| | | | | | | | | | | | | | | | | | | | | | | | At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: core: Require users of devres to include the headerSimon Glass2020-02-05242-5/+275
| | | | | | | | | | | | | | | | | | | | At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
| * sandbox: Support changing the LCD colour depthSimon Glass2020-02-053-6/+9
| | | | | | | | | | | | | | | | | | | | Add a new device-tree property to control the colour depth. At present we support 16bpp and 32bpp. While we are here, update the code to use livetree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
| * sandbox: sdl: Add an option to double the screen sizeSimon Glass2020-02-055-6/+36
| | | | | | | | | | | | | | | | | | On high-DPI displays U-Boot's LCD window can look very small. Add a -K flag to expand it to make things easier to read, while still using the existing resolution internally. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
| * sandbox: sdl: Move to use SDL2Simon Glass2020-02-054-127/+158
| | | | | | | | | | | | | | | | | | | | Sandbox currently uses SDL1.2. SDL2 has been around for quite a while and is widely supported. It has a number of useful features. It seems appropriate to move sandbox over. Update the code to use SDL2 instead of SDL1.2. Signed-off-by: Simon Glass <sjg@chromium.org>
| * gitlab: Disable SDL when building sandboxSimon Glass2020-02-051-2/+3
| | | | | | | | | | | | | | I am not sure how to add libsdl2-dev to the gitlab image, so disable building sandbox with SDL for now. Signed-off-by: Simon Glass <sjg@chromium.org>
| * sandbox: sdl: Support waiting for audio to completeWIP/bisectSimon Glass2020-02-051-2/+13
| | | | | | | | | | | | | | | | | | At present when audio stops, any in-progress output is cut off. Fix this by waiting for output to finish. Also use booleans for the boolean variables. Signed-off-by: Simon Glass <sjg@chromium.org>