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* test: add asn1 unit testWIP/2019-12-06-master-importsAKASHI Takahiro2019-12-063-1/+410
| | | | | | | This test will exercise asn1 compiler as well as asn1 decoder functions via various parsers. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
* lib: crypto: add pkcs7 message parserAKASHI Takahiro2019-12-067-3/+962
| | | | | | | | | | Imported from linux kernel v5.3: pkcs7.asn1 without changes pkcs7.h with changes marked as __UBOOT__ pkcs7_parser.h without changes pkcs7_parser.c with changes marked as __UBOOT__ Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
* lib: crypto: add x509 parserAKASHI Takahiro2019-12-069-0/+1172
| | | | | | | | | | | Imported from linux kernel v5.3: x509.asn1 without changes x509_akid.asn1 without changes x509_parser.h without changes x509_cert_parser.c with changes marked as __UBOOT__ x509_public_key.c with changes marked as __UBOOT__ Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
* lib: crypto: add rsa public key parserAKASHI Takahiro2019-12-065-0/+281
| | | | | | | | | Imported from linux kernel v5.3: rsapubkey.asn1 without changes rsa.h without changes rsa_helper.c with changes marked as __UBOOT__ Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
* lib: crypto: add public key utilityAKASHI Takahiro2019-12-066-0/+1251
| | | | | | | | | | Imported from linux kernel v5.3: asymmetric-type.h with changes marked as __UBOOT__ asymmetric_type.c with changes marked as __UBOOT__ public_key.h with changes marked as __UBOOT__ public_key.c with changes marked as __UBOOT__ Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
* lib: add oid registry utilityAKASHI Takahiro2019-12-065-0/+520
| | | | | | | | | Imported from linux kernel v5.3: build_OID_registry without changes oid_registry.h without changes oid_registry.c with changes marked as __UBOOT__ Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
* doc: add README for asn1 compiler and decoderAKASHI Takahiro2019-12-061-0/+40
| | | | | | | This document gives a brief description about ASN1 compiler as well as ASN1 decoder. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
* lib: add asn1 decoderAKASHI Takahiro2019-12-063-0/+533
| | | | | | | Imported from linux kernel v5.3: lib/asn1_decoder.c with changes marked as __UBOOT__ Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
* Makefile: add build script for asn1 parsersAKASHI Takahiro2019-12-062-1/+4
| | | | | | This rule will be used to build x509 and pkcs7 parsers. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
* cmd: add asn1_compilerAKASHI Takahiro2019-12-067-2/+1793
| | | | | | | | | | | | | | | Imported from linux kernel v5.3: asn1.h without changes asn1_ber_bytecode.h without changes asn1_decoder.h without changes asn1_compiler.c without changes This host command will be used to create a ASN1 parser, for example, for pkcs7 messages or x509 certificates. More specifically, it will generate *byte code* which will be interpreted by asn1 decoder library. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* linux/time.h: include vsprintf.hAKASHI Takahiro2019-12-061-0/+1
| | | | | | | Without this commit, time.h possibly causes a build error as asctime_r() uses sprintf(). Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
* include: kernel.h: include printk.hAKASHI Takahiro2019-12-061-1/+1
| | | | | | | | Adding "printk.h" will help improve portability from linux kernel code (in my case, lib/asn1_decoder.c and others) where printf and pr_* variant functions are used. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
* lib: add mktime64() for linux compatibilityAKASHI Takahiro2019-12-062-0/+30
| | | | | | | This function will be used in lib/crypto/x509_cert_parser.c, which will also be imported from linux code in a later commit. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
* rtc: move date.c from drivers/rtc/ to lib/AKASHI Takahiro2019-12-066-4/+9
| | | | | | | | In the next commit, rtc_mktime(), for compatibility with linux, will be implemented using rtc_mktime(), which is no longer drivers/rtc specific. So move this file under lib/. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
* rtc.h: add struct udevice declarationAKASHI Takahiro2019-12-061-0/+2
| | | | | | Without this change, including rtc.h solely will cause a build error. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
* linux_compat: move kmemdup() from ubifs.c to linux_compat.cAKASHI Takahiro2019-12-062-18/+20
| | | | | | | | | | linux_compat.c is the best place for kmemdup(), which is currenly used only in ubifs.c, but will also be used when other kernel files (in my case, lib/crypto/x509_cert_parser.c and pkcs7_parser.c) will be imported. So just move it. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* Merge tag 'u-boot-rockchip-20191206' of ↵WIP/06Dec2019Tom Rini2019-12-0624-45/+973
|\ | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - rockchip pwm driver update to support all the SoCs - RK3308 GMAC and pinctrl support - More UART interface support on PX30 and pmugrf reg fix - Fixup on misc for eth_addr/serial# - Other updates on variant SoCs
| * rockchip: allow loading larger kernelsBen Wolsieffer2019-12-062-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Recent versions of the Linux kernel with many options enabled have grown large enough to overwrite the beginning of the initrd. For example, the kernel I use on my Rock64 and RockPro64 is 34.1 MiB, while only 31.5 MiB are available between kernel_addr_r and ramdisk_addr_r. This patch moves ramdisk_addr_r up by 32 MiB on the RK3328 and RK3399, allowing for much larger kernels. Signed-off-by: Ben Wolsieffer <benwolsieffer@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3328: rock64: enable CONFIG_MISC_INIT_RBen Wolsieffer2019-12-061-0/+1
| | | | | | | | | | | | | | This enables reading of the cpuid and a static MAC address. Signed-off-by: Ben Wolsieffer <benwolsieffer@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * pinctrl: rockchip: Add pinctrl support for rk3308David Wu2019-12-064-1/+468
| | | | | | | | | | | | | | | | | | | | | | | | | | An iomux register contains 8 pins, each of which is represented by 2 bits, but the register offset is 0x8. For example, GRF_GPIO0A_IOMUX offset is 0x0, but GRF_GPIO0B_IOMUX offset is 0x8, the offset 0x4 is reserved. So add a type IOMUX_8WIDTH_2BIT to calculate offset. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * arm: rockchip: rk3308: Initialize the iomux configurationDavid Wu2019-12-061-0/+37
| | | | | | | | | | | | | | | | When we want to use plus pinctrl feature, we need to enable them at spl. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * pwm: rk_pwm: Make PWM driver to support all Rockchip SocsDavid Wu2019-12-062-25/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This PWM driver can be used to support pwm functions for on all Rockchip Socs. The previous chips than RK3288 did not support polarity, and register layout was different from the RK3288 PWM. The RK3288 keep the current functions. RK3328 and the chips after it, which can support hardware lock, configure duty, period and polarity at next same period, to prevent the intermediate temporary state. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * dts: rk3308: Enable ethernet function supported for Firefly ROC_RK3308_CCDavid Wu2019-12-061-0/+9
| | | | | | | | | | | | | | | | The Firefly ROC_RK3308_CC use ref_clock of input mode, and rmii pins of m1 group. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * arm: dts: Add mac node for rk3308 at dtsi levelDavid Wu2019-12-061-0/+22
| | | | | | | | | | | | | | | | The rk3308 only support RMII mode, and if it is output clock mode, better to use ref_clk pin with drive strength 12ma. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * net: gmac_rockchip: Add support for rk3308David Wu2019-12-061-0/+65
| | | | | | | | | | | | | | | | Add the glue code to allow the rk3308 variant of the Rockchip gmac to provide network functionality. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: config: add support for firefly-px30 boardKever Yang2019-12-062-0/+114
| | | | | | | | | | | | | | | | | | This is a core board named Core-PX30-JD4 with a mainboard from Firefly, name it as firefly-px30 for now. This board can re-use the dts of PX30, the only difference is the UART IO, the firefly use UART2 M1 while evb use UART2 M0. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: misc: protect serial# from getting overwrittenHeiko Stuebner2019-12-051-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | serial# is one of the vendor properties and thus protected from being overwritten if already set. If env_set is called anyway this result in some nasty warnings, so check for presence before trying that. In the same direction check for the presence of cpuid# and compare it to the actual hardware and emit a warning if they don't match. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: misc: don't fail if eth_addr already setHeiko Stuebner2019-12-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | rockchip_setup_macaddr() runs from an initcall, so returning an error code will make that initcall fail thus breaking the boot process. And if an ethernet address is already set this is definitly not a cause for that, so just return success in that case. Fixes: 04825384999f ("rockchip: rk3399: derive ethaddr from cpuid"); Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: px30: Add support for using UART3 as debug UARTPaul Kocialkowski2019-12-052-0/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some generic PX30 SoMs found in the wild use UART3 as their debug output instead of UART2 (used for MMC) and UART5. Make it possible to use UART3 as early debug output, with the associated clock and pinmux configuration. Two sets of output pins are supported (M0/M1). Future users should also note that the pinmux default in the dts is to use the M1 pins while the Kconfig option takes M0 as a default. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
| * rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNELPaul Kocialkowski2019-12-052-5/+5
| | | | | | | | | | | | | | | | | | | | UART3 also has two sets of pins that can be selected. Rename the config option to a common name, to allow it to be used for both UART2 and UART3. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: px30: Fixup PMUGRF registers layout orderPaul Kocialkowski2019-12-051-8/+8
| | | | | | | | | | | | | | | | | | According to the PX30 TRM, the iomux registers come first, before the pull and strength control registers. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
| * rockchip: evb-px5: disable NETAndy Yan2019-12-051-1/+1
| | | | | | | | | | | | | | PX5 evb has no ETH port, so disable it. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: px5: enable spl-fifo-mode for emmc for px5-evbAndy Yan2019-12-051-0/+2
| | | | | | | | | | | | | | | | | | | | We need load some parts of ATF to sram, but rockchip dwmmc controllers can't do dma to non-ddr addresses space, so set the mmc controller into fifo mode in spl. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3308: enable spl-fifo-mode for emmcAndy Yan2019-12-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | We need load some parts of ATF to sram, but rockchip dwmmc controllers can't do dma to non-ddr addresses space, so set the mmc controller into fifo mode in spl. And show my best respect to Heiko's work for this solution. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * doc: rockchip: Update build instruction for rk3308Andy Yan2019-12-051-1/+0
| | | | | | | | | | | | | | | | | | | | After commit d8765e2422cd ("Enable building of u-boot.itb on Rockchip platform"), u-boot.itb will automatically generated by "make all" command, manually command "make u-boot.itb" is no longer needed. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | Revert "spl: fix entry_point equal to load_addr"Tom Rini2019-12-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | Due to the (seemingly bogus) assumption of a default CONFIG_SYS_UBOOT_START value we will revert this change for now and evaluate it again for the next release along with changes to CONFIG_SYS_UBOOT_START. This reverts commit d3e97b53c1f2464f4898226de7d89abf242e4aa8. Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge branch '2019-12-05-master-imports'Tom Rini2019-12-0514-15/+167
|\ \ | |/ |/| | | | | | | - Assorted omapl138_lcdk / da850-evm fixes - FAT fix, add another pytest as well for FAT. - Assorted general fixes
| * ARM: omapl138_lcdk: Shrink code size by building with ThumbAdam Ford2019-12-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPL has limited available resources, and the performance between ARM and Thumb isn't that significant. This patch builds using Thumb instruction set to reduce the code size by nearly 6K. Original: text data bss dec hex filename 26526 4004 1376 31906 7ca2 spl/u-boot-spl Thumb: text data bss dec hex filename 20232 4004 1376 25612 640c spl/u-boot-spl Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * Fix typo in macros, "FIRMEWARE" -> "FIRMWARE"Thomas Hebb2019-12-053-7/+7
| | | | | | | | Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
| * ARM: da850-evm: Disable SYS_MMCSD_RAW_MODE_USE_SECTORAdam Ford2019-12-052-0/+2
| | | | | | | | | | | | | | | | | | | | | | The da850-evm doesn't have the boot pins configured in a way to make MMC/SD booting an option, and MMC/SD support is not enabled in SPL. Therefore, there is no need to support raw mode mmc/sd support in SPL. This patch disables CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR Signed-off-by: Adam Ford <aford173@gmail.com>
| * spl: fix entry_point equal to load_addrGiulio Benetti2019-12-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | At the moment entry_point is set to image_get_load(header) that sets it to "load address" instead of "entry point", assuming entry_point is equal to load_addr, but it's not true. Then load_addr is set to "entry_point - header_size", but this is wrong too since load_addr is not an entry point. So use image_get_ep() for entry_point assignment and image_get_load() for load_addr assignment. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
| * test/py: test_fs: add tests for creating/deleting many filesAKASHI Takahiro2019-12-051-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | # This is actually a resent patch of # [1] https://lists.denx.de/pipermail/u-boot/2019-May/369170.html Two test cases are added under test_fs_ext: test case 10: for root directory test case 11: for non-root directory Those will verify a behavior fixed by the commits related to root directory ("fs: fat: allocate a new cluster for root directory of fat32" and "fs: fat: flush a directory cluster properly"), and focus on handling long-file-name directory entries under a directory. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
| * fs: fat: handle deleted directory entries correctlyAKASHI Takahiro2019-12-051-1/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unlink test for FAT file system seems to fail at test_unlink2. (When I added this test, I haven't seen any errors though.) for example, ===8<=== fs_obj_unlink = ['fat', '/home/akashi/tmp/uboot_sandbox_test/128MB.fat32.img'] def test_unlink2(self, u_boot_console, fs_obj_unlink): """ Test Case 2 - delete many files """ fs_type,fs_img = fs_obj_unlink with u_boot_console.log.section('Test Case 2 - unlink (many)'): output = u_boot_console.run_command('host bind 0 %s' % fs_img) for i in range(0, 20): output = u_boot_console.run_command_list([ '%srm host 0:0 dir2/0123456789abcdef%02x' % (fs_type, i), '%sls host 0:0 dir2/0123456789abcdef%02x' % (fs_type, i)]) assert('' == ''.join(output)) output = u_boot_console.run_command( '%sls host 0:0 dir2' % fs_type) > assert('0 file(s), 2 dir(s)' in output) E AssertionError: assert '0 file(s), 2 dir(s)' in ' ./\r\r\n ../\r\r\n 0 0123456789abcdef11\r\r\n\r\r\n1 file(s), 2 dir(s)' test/py/tests/test_fs/test_unlink.py:52: AssertionError ===>8=== This can happen when fat_itr_next() wrongly detects an already- deleted directory entry. File deletion, which was added in the commit f8240ce95d64 ("fs: fat: support unlink"), is implemented by marking its entry for a short name with DELETED_FLAG, but related entry slots for a long file name are kept unmodified. (So entries will never be actually deleted from media.) To handle this case correctly, an additional check for a directory slot will be needed in fat_itr_next(). In addition, I added extra comments about long file name and short file name format in FAT file system. Although they are not directly related to the issue, I hope it will be helpful for better understandings in general. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
| * drivers: optee: rpmb: fix returning CID to TEEJorge Ramirez-Ortiz2019-12-051-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The mmc CID value is one of the input parameters used to provision the RPMB key. The trusted execution environment expects this value to be specified in big endian format. Before this fix, on little endian systems, the value returned by the linux kernel mmc driver differed from the one returned by u-boot. This meant that if linux provisioned the RPMB key, u-boot would not have access to the partition (and the other way around). Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
| * cmd: cp: add missing map_sysmemPhilippe Reynes2019-12-051-3/+13
| | | | | | | | | | | | | | | | The command cp fails on sandbox because the address is used directly. To fix this issue, we call the function map_sysmem to translate the address. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
| * iminfo: add missing map_sysmemPhilippe Reynes2019-12-051-1/+11
| | | | | | | | | | | | | | | | The command iminfo fails on sandbox because the address is used directly. To fix this issue, we call the function map_sysmem to translate the address. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
| * spl: Introduce SPL_DM_GPIO Kconfig defineLukasz Majewski2019-12-051-0/+6
| | | | | | | | | | | | | | | | This define indicates if DM_GPIO shall be supported in SPL. This allows proper operation of DM converted GPIO drivers in SPL, which use boards. Signed-off-by: Lukasz Majewski <lukma@denx.de>
| * drivers: pci: ignore disabled devicesMichael Walle2019-12-051-0/+5
|/ | | | | | | | | | | | PCI devices may be disabled in the device tree. Devices which are probed by the device tree handle the "status" property and are skipped if disabled. Devices which are probed by the PCI enumeration don't check that property. Fix it. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Alex Marginean <alexandru.marginean@nxp.com> Tested-by: Alex Marginean <alexandru.marginean@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Merge git://git.denx.de/u-boot-shTom Rini2019-12-043-6/+6
|\ | | | | | | - Convert some R-Car Gen3 platforms to DM_SPI{,_FLASH}
| * ARM: rmobile: Convert M2N Gose to DM_SPI{,_FLASH}Marek Vasut2019-12-041-2/+2
| | | | | | | | | | | | | | Enable DM_SPI and DM_SPI_FLASH in U-Boot on M2N Gose. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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