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* env: ti: boot: Use ttyS2 instead of ttyO2WIP/2019-07-26-ti-importsSam Protsenko2019-07-274-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ttyO2 console enables legacy CONFIG_SERIAL_OMAP driver in kernel. Nowadays it's preferred to use the generic CONFIG_SERIAL_8250_OMAP driver, which being enabled via ttyS2 console. Both drivers are enabled in multi_v7_defconfig and in omap2plus_defconfig, for compatibility reasons. Let's switch to ttyS2 console, to be sure that standard 8250 serial driver is used. Similar behavior can be also achieved by enabling CONFIG_SERIAL_8250_OMAP_TTYO_FIXUP option in kernel, but it's better not to rely on that, as it can be disabled or removed after transitional period. Right now on DRA7/AM57x platforms the 8250-omap driver is being probed first, and omap-serial driver is only probed if the first one failed. It can be seen from uart3 definition in arch/arm/boot/dts/dra7-l4.dtsi: compatible = "ti,dra742-uart", "ti,omap4-uart"; So the kernel already uses 8250 driver. This change basically allows kernel developers to throw away the omap-serial driver and associated compatibility options. Similar discussions [1,2] have started several years ago, so it should be safe to do that now. [1] https://patchwork.kernel.org/patch/6198471/ [2] http://processors.wiki.ti.com/index.php/Sitara_Linux_UART_-_Switching_to_8250_Driver Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Andrew F. Davis <afd@ti.com> [trini: Update omap5_uevm] Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: am57xx: Allow bootm to load larger kernelsSam Protsenko2019-07-271-0/+2
| | | | | | | | | | | linux-mainline with multi_v7_defconfig + Android configs takes more space than regular TI Android kernel and bootm will fail to load it. Let's increase max kernel size up to 64 MiB to make it possible to run such kernel. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: da850-evm: Remove dead/unneeded codeAdam Ford2019-07-271-8/+0
| | | | | | | | The DA8850-evm supports DM_I2C and boots with SPL_DM, so we can drop some of the code which disables DM_I2C in SPL. This patch removes some #undef's now rendered obsolete. Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: omap3/omap35_logic: Fix broken Logic PD Torpedo bootingAdam Ford2019-07-272-2/+0
| | | | | | | | | | The SOM-LV and Torpedo boards are very similar, but something happened growing SPL enough to break the Torpedo. The SOM-LV board were not doing alias sequencing during SPL and they continue to work while something broke the Torpedo. This patch disables SPL_DM_SEQ_ALIAS allowing it to boot again. Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: dts: Logic PD SOM-LV and Torpedo Boards: Resync DTSAdam Ford2019-07-278-41/+9
| | | | | | | Re-sync all Logic PD OMAP35 and AM/DM37 boards with Kernel 5.2.1 Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: da850evm: Remove legacy OHCI referencs and unify platformAdam Ford2019-07-275-4/+19
| | | | | | | | | | | OHCI was added with DM_USB support, so there are a few unneeded items in the header file that can be removed. This also unifies da850evm with NOR and NAND booting options so all have OHCI support. Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Migrate da850_am18xxevm] Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: am3517_evm: Fix pin muxing to enable EHCI Host in the futureAdam Ford2019-07-262-13/+15
| | | | | | | | | This patch enables the pinmuxing to support gpio_57 for phy reset and fixes the pinmuxing for the ECHI tranceiver. The clocks don't appear to by fully enabled yet, so OMAP-EHCI on am3517 is still not yet working, but we're one step closer. Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: omap3_logic & omap35_logic: Disable OMAP EHCI for TorpedoAdam Ford2019-07-262-0/+2
| | | | | | | | The OMAP35 and AM/DM37 Torpedo boards do not have a USB tranceiver connected to the USB host port, so this patch removes it from the defconfig files. Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: omap3_logic: Enable OMAP EHCI support for SOM-LV BoardsAdam Ford2019-07-262-0/+23
| | | | | | | | | The SOM-LV boards support the OMAP EHCI driver using port 2. With the driver updated to support device tree, this patch sets the corresponding pin muxing for the tranceiver as well as the reset pin. Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: am3517-evm: Remove undefined pinmuxingAdam Ford2019-07-261-12/+0
| | | | | | | | | The pinmux controller on AM3517 is the same as OMAP3, however according to the AM3517 TRM, there are no valid entries between 48002180 and 48002210, which are supported by other OMAP3 devices. This patch removes the references undefined pin muxing. Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: am3517-evm: Remove non-DM legacy codeAdam Ford2019-07-261-11/+0
| | | | | | | | | With both SPL and U-Boot now supporting DM, we can start removing legacy code. This patch removes the legacy MMC initalization and legacy I2C initialization since both are now available via DM and device tree. Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: am3517-evm: Migrate to SPL_OF_CONTROLAdam Ford2019-07-262-11/+42
| | | | | | | | | | | | | Like the other Logic PD OMAP35/DM37 boards, this board has device tree enabled for U-Boot. This patch converts the board to enable SPL_OF_CONTROL and further shrinks the device tree in SPL to limit it to UART3 (console), MMC1, i2c1, and GPIO4 (for mmc1 CD and WP). There appears to be a bug in minicom so users may need to switch the minicom terminal emulation to ANSI from VT102 due to the junk that gets pushed out of the UART on startup. Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: da850-evm: Remove repeated pinmuxing callsAdam Ford2019-07-261-4/+0
| | | | | | | | arch_cpu_init() initializes the pinmuxing which is called fairly early in the start sequences, so the board_init function doesn't need to do it again. This patch removes the call from board_init. Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: da850-evm: Remove duplicate UART initializationAdam Ford2019-07-261-5/+0
| | | | | | | | The Low Level init functions start the UART, so it doesn't need to happen during board_init. This patch removes it from board_init. Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: am3517-evm: Remove manual ethernet reset codeAdam Ford2019-07-261-30/+4
| | | | | | | | The reset line going to the ethernet controller is controlled by a global reset controlling multiple peripherals. There is no need to manually invoke the reset. Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: am3517-evm: Enable DM_PMIC and DM_REGULATOR functionsAdam Ford2019-07-261-0/+6
| | | | | | | | The PBIAS regulator is available on OMAP3's, and it's shared on the AM35, so this patch enables that in U-Boot along with GPIO based regulators. Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: dts: dra76x: Update MMC2_HS200_MANUAL1 iodelay valuesFaiz Abbas2019-07-261-20/+20
| | | | | | | | | | | | Update the MMC2_HS200_MANUAL1 iodelay values to match with the latest dra76x data manual[1]. Also this particular pinctrl-array is using spaces instead of tabs for spacing between the values and the comments. Fix this as well. [1] http://www.ti.com/lit/ds/symlink/dra76p.pdf Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
* ARM: dts: am57xx: Disable voltage switching for SD cardFaiz Abbas2019-07-266-24/+6
| | | | | | | | | | | | | | | | | If UHS speed modes are enabled, a compatible SD card switches down to 1.8V during enumeration. If after this a software reboot/crash takes place and on-chip ROM tries to enumerate the SD card, the difference in IO voltages (host @ 3.3V and card @ 1.8V) may end up damaging the card. The fix for this is to have support for power cycling the card in hardware (with a PORz/soft-reset line causing a power cycle of the card). Because the beaglebone X15 (rev A,B and C), am57xx-evms and am57xx-idks don't have this capability, disable voltage switching for these boards. The major effect of this is that the maximum supported speed mode is now high speed(50 MHz) down from SDR104(200 MHz). Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
* ARM: dts: am574x-idk: Add pinmuxes for mmc1 and mmc2Faiz Abbas2019-07-261-0/+15
| | | | | | | | Sync with kernel dts by adding pinmuxes for mmc1 and mmc2. This fixes an issue where mmc2 (eMMC) was coming up in HS52 mode instead of the highest DDR52 mode. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
* ARM: dts: dra7-mmc-iodelay: Add a new pinctrl group for clk line without pullupFaiz Abbas2019-07-263-2/+23
| | | | | | | | | | | | | | | | | | During a short period when the bus voltage is switched from 3.3v to 1.8v, (to enumerate UHS mode), the mmc module is disabled and the mmc IO lines are kept in a state according to the programmed pad mux pull type. According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the host should hold CLK low for at least 5ms. In order to keep the card line low during voltage switch, the pad mux of mmc1_clk line should be configured to pull down. Add a new pinctrl group for clock line without pullup to be used in boards where mmc1_clk line is not connected to an external pullup. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
* configs: j721e_evm_a72: Add initial supportLokesh Vutla2019-07-262-0/+87
| | | | | | | | Add initial defconfig support for J721e that runs on A72. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [trini: Add MAINTAINERS entry] Signed-off-by: Tom Rini <trini@konsulko.com>
* configs: j721e_evm_r5: Add initial supportLokesh Vutla2019-07-262-0/+101
| | | | | | | | Add initial defconfig support for J721e that runs on R5. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [trini: Add MAINTAINERS file] Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: dts: k3-j721e: Add r5 specific dt supportLokesh Vutla2019-07-263-1/+218
| | | | | | | Add initial support for dt that runs on r5. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
* arm: dts: k3-j721e: Add initial support for common processor boardLokesh Vutla2019-07-263-0/+93
| | | | | | | | | | Common Processor board is the baseboard that has most of the actual connectors, power supply etc. A SOM (System on Module) is plugged on to the common processor board and this contains the SoC, PMIC, DDR and basic highspeed components necessary for functionality. Add initial dt support for this common processor board. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: dts: ti: Add Support for J721E SoCLokesh Vutla2019-07-263-0/+480
| | | | | | | | Add initial SoC definition for J721E SoC. Kernel dts posted here: https://lore.kernel.org/lkml/20190522161921.20750-1-nm@ti.com/ Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721ELokesh Vutla2019-07-261-0/+3
| | | | | | | | | Add pinctrl macros for J721E SoC. These macro definitions are similar to that of AM6, but adding new definitions to avoid any naming confusions in the soc dts files. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
* mmc: am654_sdhci: Separate J721E compatible into 8bit and 4bit versionsFaiz Abbas2019-07-261-43/+71
| | | | | | | | | | | | | | The j721e 4 bit instances don't have a hard DLL and therefore don't need any DLL related configurations. Split the compatibles into an 8 bit and a 4 bit one. Add a private flags field which can be used to check if the DLL is present and don't register the set_ios_post callback for the 4 bit compatible instances. Also update the compatibles in k3-j721e-main.dtsi to avoid breaking boot with the new compatibles. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* board: ti: j721e: Enable fixing up msmc sram nodeSuman Anna2019-07-261-0/+14
| | | | | | | | | Create a ft_board_setup() api that gets called as part of DT fixup before jumping to kernel. In this ft_board_setup() call fdt_fixup_msmc_ram that update msmc sram node. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* board: ti: j721e: Add board support for j721e evmLokesh Vutla2019-07-265-0/+235
| | | | | | | | Add board specific initialization for j721e evm Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
* armv8: K3: j721e: Add custom MMU supportSuman Anna2019-07-261-0/+55
| | | | | | | | | | | | | | | The A72 U-Boot code loads and boots a number of remote processors including the C71x DSP, both the C66_0 and C66_1 DSPs, and the various Main R5FSS Cores. Change the memory attributes for the DDR regions used by the remote processors so that the cores can see and execute the proper code. A separate table based on the current AM65x table is added for J721E SoCs, since the number of remote processors and their DDR usage will be different between the two SoC families. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* armv7R: K3: j721e: Load SYSFW binary and config from boot mediaAndreas Dannenberg2019-07-261-0/+30
| | | | | | | | | | Use the System Firmware (SYSFW) loader framework to load and start the SYSFW as part of the J721E early initialization sequence. While at it also initialize the MCU_UART0 pinmux as it is used by SYSFW to print diagnostic messages. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* armv7R: K3: j721e: Shut down R5 core after ATF startup on A72Lokesh Vutla2019-07-261-0/+57
| | | | | | | | Populate the release_resources_for_core_shutdown() api with shutting down r5 cores so that it will by called just after jumping to ATF. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* armv7R: K3: j721e: Store boot index from ROMAndreas Dannenberg2019-07-261-2/+15
| | | | | | | Obtain the boot index as left behind by the device boot ROM and store it in scratch pad SRAM for later use before it may get overwritten. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
* armv7R: K3: j721e: Unlock all applicable control MMR registersAndreas Dannenberg2019-07-261-1/+42
| | | | | | | | | To access various control MMR functionality the registers need to be unlocked. Do that for all control MMR regions in the MCU and MAIN domains. We may want to go back later and limit the unlocking that's being done. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
* armv7R: K3: j721e: Add support for boot device detectionLokesh Vutla2019-07-265-0/+141
| | | | | | | | | | | | | | J721E allows for booting from primary or backup boot media. Both media can be chosen individually based on switch settings. ROM looks for a valid image in primary boot media, if not found then looks in backup boot media. In order to pass this boot media information to boot loader, ROM stores a value at a particular address. Add support for reading this information and determining the boot media correctly. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
* arm: K3: j721e: Add basic support for J721E SoC definitionLokesh Vutla2019-07-265-8/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The J721E SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration to enable lower system costs of automotive applications such as infotainment, cluster, premium Audio, Gateway, industrial and a range of broad market applications. This SoC is designed around reducing the system cost by eliminating the need of an external system MCU and is targeted towards ASIL-B/C certification/requirements in addition to allowing complex software and system use-cases. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, three clusters of lockstep capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA), C7x floating point Vector DSP, Two C66x floating point DSPs. * 3D GPU PowerVR Rogue 8XE GE8430 * Vision Processing Accelerator (VPAC) with image signal processor and Depth and Motion Processing Accelerator (DMPAC) * Two Gigabit Industrial Communication Subsystems (ICSSG), each with dual PRUs and dual RTUs * Two CSI2.0 4L RX plus one CSI2.0 4L TX, one eDP/DP, One DSI Tx, and up to two DPI interfaces. * Integrated Ethernet switch supporting up to a total of 8 external ports in addition to legacy Ethernet switch of up to 2 ports. * System MMU (SMMU) Version 3.0 and advanced virtualisation capabilities. * Upto 4 PCIe-GEN3 controllers, 2 USB3.0 Dual-role device subsystems, 16 MCANs, 12 McASP, eMMC and SD, UFS, OSPI/HyperBus memory controller, QSPI, I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals. * Two hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL management. * Configurable L3 Cache and IO-coherent architecture with high data throughput capable distributed DMA architecture under NAVSS * Centralized System Controller for Security, Power, and Resource Management (DMSC) See J721E Technical Reference Manual (SPRUIL1, May 2019) for further details: http://www.ti.com/lit/pdf/spruil1 Add base support for J721E SoC Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
* remoteproc: k3_rproc: Rename to ti_k3_arm64_rprocLokesh Vutla2019-07-267-42/+43
| | | | | | | | | | k3_rproc driver is specifically meant for controlling an arm64 core using TISCI protocol. So rename the driver, Kconfig symbol, compatible and functions accordingly. While at it drop this remoteproc selection for a53 defconfig. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* remoteproc: k3_rproc: Update the driver to use ti_sci_proc helpersLokesh Vutla2019-07-261-48/+31
| | | | | | | Update the k3_rproc driver to use the generic ti_sci_proc helper apis which simplifies the driver a bit. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* remoteproc: tisci: add TI-SCI processor control helper functionsLokesh Vutla2019-07-261-0/+121
| | | | | | | | | | | | | | | | | | | | | | | | | Texas Instruments' K3 generation SoCs has specific modules/register spaces used for configuring the various aspects of a remote processor. These include power, reset, boot vector and other configuration features specific to each compute processor present on the SoC. These registers are managed by the System Controller such as DMSC on K3 AM65x SoCs. The Texas Instrument's System Control Interface (TI-SCI) Message Protocol is used to communicate to the System Controller from various compute processors to invoke specific services provided by the firmware running on the System Controller. Add a common processor control interface header file that can be used by multiple remoteproc drivers. The helper functions within this header file abstract the various TI SCI protocol ops for the remoteproc drivers, and allow them to request the System Controller to be able to program and manage various remote processors on the SoC. The common macros required by the R5 remoteproc driver were also added. The remoteproc drivers are expected to manage the life-cycle of their ti_sci_proc_dev local structures. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com>
* cmd: remoteproc: Allow list command to print the probed devicesLokesh Vutla2019-07-261-5/+4
| | | | | | | | | 'rproc list' is currently allowed only after probing all the available remoteproc devices. Given that 'rproc init' is updated to probe and initialize devices individually, allow the 'rproc list' command to print all probed devices at any point. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* cmd: remoteproc: Add support for initializing devices individuallyLokesh Vutla2019-07-261-15/+18
| | | | | | | | | | | | 'rproc init' does the probe and initialization of all the available remoteproc devices in the system. This doesn't allow the flexibility to initialize the remote cores needed as per use case. In order to provide flexibility, update 'rproc init' command to accept one more parameter with rproc id which when passed initializes only that specific core. If no id is passed, command will initializes all the cores which is compatible with the existing behaviour. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: dts: k3-am654: Update power-domains property for each nodeLokesh Vutla2019-07-267-13/+18
| | | | | | | | | Update the power-domain-cells to 2 and add the permissions to each node. Mark the following nodes accessed by r5 as shared: - DDR node - main uart 0 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* power: domain: ti_sci_power_domains: Add support for exclusive and shared accessLokesh Vutla2019-07-261-1/+30
| | | | | | | | | | | | | | | TISCI protocol supports for enabling the device either with exclusive permissions for the requesting host or with sharing across the hosts. There are certain devices which are exclusive to Linux context and there are certain devices that are shared across different host contexts. So add support for getting this information from DT by increasing the power-domain cells to 2. For keeping the DT backward compatibility intact, defaulting the device permissions to set the exclusive flag set. In this case the power-domain-cells is 1. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared accessLokesh Vutla2019-07-262-2/+18
| | | | | | | | | | | TISCI protocol supports for enabling the device either with exclusive permissions for the requesting host or with sharing across the hosts. There are certain devices which are exclusive to Linux context and there are certain devices that are shared across different host contexts. So add support for getting this information from DT by increasing the power-domain cells to 2. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* power-domain: Add private data to power domainLokesh Vutla2019-07-261-13/+2
| | | | | | | | Certain drivers want to attach private data corresponding to each power domain. This data might be specific be to the drvier. So add a priv entry into the power_domain structure. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* armv7R: k3: Release all the exclusive devicesLokesh Vutla2019-07-261-0/+4
| | | | | | Release all the exclusive devices held by SPL. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* armv7R: K3: am654: Shut down R5 core after ATF startup on A53Andreas Dannenberg2019-07-263-2/+68
| | | | | | | | | | | Rather than simply parking the R5 core in WFE after starting up ATF on A53 instead use SYSFW API to properly shut down the R5 CPU cores as well as associated timer resources that were pre-allocated. This allows software further downstream to properly and gracefully bring the R5 cores back online if desired. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* firmware: ti_sci: Add a command for releasing all exclusive devicesLokesh Vutla2019-07-262-0/+79
| | | | | | | | | | | | | Any host while requesting for a device can request for its exclusive access. If an exclusive permission is obtained then it is the host's responsibility to release the device before the software entity on the host completes its execution. Else any other host's request for the device will be nacked. So add a command that releases all the exclusive devices that is acquired by the current host. This should be used with utmost care and can be called only at the end of the execution. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* firmware: ti_sci: Add processor shutdown API methodAndreas Dannenberg2019-07-263-4/+241
| | | | | | | | | | | | | Add and expose a new processor shutdown API that wraps the two TISCI messages involved in initiating a core shutdown. The API will first queue a message to have the DMSC wait for a certain processor boot status to happen followed by a message to trigger the actual shutdown- with both messages being sent without waiting or requesting for a response. Note that the processor shutdown API call will need to be followed up by user software placing the respective core into either WFE or WFI mode. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
* firmware: ti_sci: Allow for device shared and exclusive requestsLokesh Vutla2019-07-262-5/+23
| | | | | | | | | | | | | Sysfw provides an option for requesting exclusive access for a device using the flags MSG_FLAG_DEVICE_EXCLUSIVE. If this flag is not used, the device is meant to be shared across hosts. Once a device is requested from a host with this flag set, any request to this device from a different host will be nacked by sysfw. Current tisci driver enables this flag for every device requests. But this may not be true for all the devices. So provide a separate commands in driver for exclusive and shared device requests. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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