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* ata: Migrate CONFIG_DWC_AHSATA to KconfigTuomas Tynkkynen2017-12-1241-17/+29
| | | | Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* ata: Migrate CONFIG_FSL_SATA to KconfigTuomas Tynkkynen2017-12-1226-20/+24
| | | | | | | Use 'imply' here liberally to avoid the combinatorial explosion of defconfig changes in the PowerPC boards. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* ata: Migrate CONFIG_SATA_MV to KconfigTuomas Tynkkynen2017-12-126-3/+8
| | | | Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* ata: Migrate CONFIG_SATA_SIL3114 to KconfigTuomas Tynkkynen2017-12-127-3/+8
| | | | Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* ata: Migrate CONFIG_SATA_SIL to KconfigTuomas Tynkkynen2017-12-126-4/+12
| | | | | | | Use 'imply' here liberally to avoid the combinatorial explosion of defconfig changes in the PowerPC boards. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* ata: Drop CONFIG_MX51_PATATuomas Tynkkynen2017-12-122-130/+0
| | | | | | | The last user of this driver went away in August 2015 in commit: b6073fd2115 ("arm: Remove mx51_efikamx, mx51_efikasb boards") Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* ata: Drop CONFIG_SATA_DWCTuomas Tynkkynen2017-12-123-2536/+0
| | | | | | | The last user of this driver went away in June 2017, in commit: 98f705c9ce ("powerpc: remove 4xx support") Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* Merge git://git.denx.de/u-boot-arcTom Rini2017-12-121-1/+1
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| * gpio/hsdk: Depend on DM_GPIO instead of simple DMAlexey Brodkin2017-12-121-1/+1
|/ | | | | | | | | | | | | | | | This driver really is DM GPIO one and so we need to have a correct dependency, because DM alone doesn't provide required for CMD_GPIO call and we're seeing build failures like this: ---------------------->8--------------------- cmd/built-in.o: In function 'do_gpio': .../cmd/gpio.c:188: undefined reference to 'gpio_request' ... ---------------------->8--------------------- Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Eugeniy Paltsev <paltsev@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-uniphierTom Rini2017-12-113-9/+14
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| * ARM: uniphier: use FIELD_PREP for PLL settingsMasahiro Yamada2017-12-121-6/+8
| | | | | | | | | | | | | | | | It is tedious to define both mask and bit-shift. <linux/bitfield.h> provides a convenient way to get access to register fields with a single shifted mask. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: compute SSCPLL values more preciselyMasahiro Yamada2017-12-121-2/+4
| | | | | | | | | | | | | | Use DIV_ROUND_CLOSEST(). To make the JK value even more precise, I used a bigger coefficient, then divide it by 512. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: fix SSCPLL init code for LD11 SoCDai Okamura2017-12-121-0/+1
| | | | | | | | | | | | | | | | | | Commit 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC") missed to write the computed value to the SSCPLLCTRL2 register. Fixes: 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC") Signed-off-by: Dai Okamura <okamura.dai@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mtd: nand: denali: make NAND_DENALI unconfigurable optionMasahiro Yamada2017-12-121-4/+3
| | | | | | | | | | | | | | | | | | | | denali.c has no driver entry in itself. It makes sense only when compiled together with denali_dt.c Let NAND_DENALI_DT select NAND_DENALI, and hide NAND_DENALI from the Kconfig menu. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: compile pll-base-ld20.c for PXs3Masahiro Yamada2017-12-121-0/+1
| | | | | | | | | | | | | | | | | | Fix the link error for the combination of CONFIG_ARCH_UNIPHIER_LD11=n CONFIG_ARCH_UNIPHIER_LD20=n CONFIG_ARCH_UNIPHIER_PXS3=y Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Merge git://git.denx.de/u-boot-arcTom Rini2017-12-1110-9/+683
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| * ARC: clk: introduce HSDK CGU clock driverEugeniy Paltsev2017-12-116-0/+654
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Synopsys HSDK clock controller generates and supplies clocks to various controllers and peripherals within the SoC. Each clock has assigned identifier and client device tree nodes can use this identifier to specify the clock which they consume. All available clocks are defined as preprocessor macros in the dt-bindings/clock/snps,hsdk-cgu.h header and can be used in device tree sources. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * ARC: cache: explicitly initialize "*_exists" variablesEugeniy Paltsev2017-12-111-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dcache_exists, icache_exists, slc_exists and ioc_exists global variables in "arch/arc/lib/cache.c" remain uninitialized if SoC doesn't have corresponding HW. This happens because we use the next constructions for their definition and initialization: -------------------------->>--------------------- int ioc_exists __section(".data"); if (/* condition */) ioc_exists = 1; -------------------------->>--------------------- That's quite a non-trivial issue as one may think of it. The point is we intentionally put those variables in ".data" section so they might survive relocation (remember we initilaize them very early before relocation and continue to use after reloaction). While being non-initialized and not explicitly put in .data section they would end-up in ".bss" section which by definition is filled with zeroes. But since we place those variables in .data section we need to care about their proper initialization ourselves. Also while at it we change their type to "bool" as more appropriate. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * ARC: add defines of some cache and xCCM AUX registersEugeniy Paltsev2017-12-111-0/+6
| | | | | | | | | | Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * ARC: add macro to get CPU idEugeniy Paltsev2017-12-111-0/+3
| | | | | | | | | | | | | | | | | | | | ARCNUM [15:8] field in ARC_AUX_IDENTITY register allows us to uniquely identify each core in a multi-core system. I.e. with help of this macro each core may get its index in SMP system. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * ARC: HSDK: Fixup DW SDIO CIU frequency to 50000000HzEugeniy Paltsev2017-12-111-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DW SDIO controller has external CIU clock divider controlled via register in the SDIO IP. Due to its unexpected default value (we expected it to divide by 1 but in reality it divides by 8) SDIO IP uses wrong CIU clock (it should be 100000000Hz but actual is 12500000Hz) and works unstable (see STAR 9001204800). So increase SDIO CIU frequency from actual 12500000Hz to 50000000Hz by switching from the default divisor value (div-by-8) to the minimum possible value of the divisor (div-by-2) in HSDK platform code. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * ARC: add asm/gpio.h to fix compilation error with CONFIG_CMD_GPIOEugeniy Paltsev2017-12-101-0/+1
|/ | | | | | | | | | | | With CONFIG_CMD_GPIO compilation reports error: -------------------------->8--------------------- common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory #include <asm/gpio.h> ^ -------------------------->8--------------------- Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* Merge git://git.denx.de/u-boot-mpc85xxTom Rini2017-12-0824-29/+31
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| * powerpc: mpc85xx: Fix static TLB table for SDRAMYork Sun2017-12-0622-29/+29
| | | | | | | | | | | | | | | | | | | | | | | | Most predefined TLB tables don't have memory coherence bit set for SDRAM. This wasn't an issue before invalidate_dcache_range() function was enabled. Without the coherence bit, dcache invalidation doesn't automatically flush the cache. The coherence bit is already set when dynamic TLB table is used. For some boards with different SPL boot method, or with legacy fixed setting, this bit needs to be set in TLB files. Signed-off-by: York Sun <york.sun@nxp.com>
| * powerpc/p1_p2_rdb_pc: Fix endian access issue on EHCI intinalizationRan Wang2017-12-061-0/+1
| | | | | | | | | | | | | | | | | | This issue is exposed after commit 9000eddbae0d ("drivers/usb/ehci: Use platform-specific accessors"), the wrong endianness of EHCI controller programing will cause USB function down. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * powerpc/T104xRDB: Fix endian access issue on EHCI intinalizationRan Wang2017-12-061-0/+1
| | | | | | | | | | | | | | | | | | This issue is exposed after commit 9000eddbae0d ("drivers/usb/ehci: Use platform-specific accessors"), the wrong endianness of EHCI controller programing will cause USB function down. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge git://git.denx.de/u-boot-rockchipTom Rini2017-12-081-1/+1
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| * | rockchip: rk3399-puma: preserve leading zeros in serial#Jakob Unterwurzacher2017-12-081-1/+1
|/ / | | | | | | | | | | | | | | | | | | | | | | | | Linux preserves leading zeros in /proc/cpuinfo, so we should as well. Otherwise we have the situation that /sys/firmware/devicetree/base/serial-number and /proc/cpuinfo disagree in Linux. Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-12-0740-1384/+1445
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| * | armv8: ls1088a: Add nand support for ls1088ardbAshish Kumar2017-12-061-0/+2
| | | | | | | | | | | | | | | Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | driver: fsl-mc: MC object cleanup when DPL not loadedYogesh Gaur2017-12-061-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | For case when MC is loaded but DPL is not deployed perform MC object [DPBP, DPIO, DPNI and DPRC] cleanup. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | SECURE BOOT: Add fall back optionVinitha Pillai-B572232017-12-064-23/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add fall back option, to boot from NOR/QSPI/SD for LS1043, LS1046, LS1021 in case of distro boot failure. For LS1046, add kernel validation in case of secure boot in sd_bootcmd and qspi_bootcmd. For LS1043 and LS1021, add kernel validation in case of secure boot in sd_bootcmd, qspi_bootcmdand nor_bootcmd. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: LS2080A_SECURE_BOOT: Enable CONFIG_FSL_LS_PPA.Udit Agarwal2017-12-062-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds config CONFIG_FSL_LS_PPA and CONFIG_FSL_CAAM in LS2080AQDS and LS2080ARDB secure boot defconfig. Removes CONFIG_FIT, as with CONFIG_FSL_LS_PPA enabled, CONFIG_FIT is selected. Removes CONFIG_SPL_RSA as in NOR boot SPL boot is not done. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: LS1088A_QSPI: Add secure boot defconfigs for QSPI boot.Udit Agarwal2017-12-063-0/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the secure boot defconfigs for QSPI boot on LS1088ARDB and LS1088AQDS platforms. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: LS1088A_QSPI: SECURE_BOOT: Images validationUdit Agarwal2017-12-066-19/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC phase using esbc_validate command. Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment Add header address for PPA to be validated during ESBC phase for LS1088A platform based on LAyerscape Chasis 3. Moves sec_init prior to ppa_init as for validation of PPA sec must be initialised before the PPA is initialised. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls1012a: Modify Kernel and Environment offsetBhaskar Upadhaya2017-12-062-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Kernel is now located at 0x1000000 instead of 0xa00000 and envirorment variables are located at 3MB offset instead of 2MB in Flash. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: Workaround for USB erratua on LS1012ARan Wang2017-12-062-7/+24
| | | | | | | | | | | | | | | | | | | | | | | | This is suplement for patch which handle below errata: A-009007, A-009008, A-008997, A-009798 Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: fsl-layerscape: Add support of disabling core prefetchPrabhakar Kushwaha2017-12-062-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instruction prefetch feature is by default enabled during core release. This patch add support of disabling instruction prefetch by setting core mask in PPA. Here each core mask bit represents a core and prefetch is disabled at the time of core release. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls1088: Add fsl_fdt_fixup_flashAshish Kumar2017-12-061-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IFC-NOR and QSPI-NOR signals are muxed on SoC to save pins Add fsl_fdt_fixup_flash() to disable IFC-NOR node in dts if QSPI is enabled and vice-versa Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | driver: net: fsl-mc: flib changes for MC 10.3.0Yogesh Gaur2017-12-0616-1327/+1085
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Existing MC driver framework is based on MC-9.x.x flib. This patch migrates MC obj (DPBP, DPNI, DPRC, DPMAC etc) to use latest MC flib which is MC-10.3.0. Changes introduced due to migration: 1. To get OBJ token, pair of create and open API replaces create APIs 2. Pair of close and destroy APIs replaces destroy APIs 3. For version read, get_version APIs replaces get_attributes APIs 4. dpni_get/reset_statistics APIs replaces dpni_get/set_counter APIs 5. Simplifies struct dpni_cfg and removes dpni_extended_cfg struct 6. Single API dpni_get_buffer_layout/set_buffer_layout replaces dpni_get_rx/set_rx, tx related, tx_conf_buffer_layout related APIs. New API takes a queue type as an argument. 7. Similarly dpni_get_queue/set_queue replaces dpni_get_rx_flow/set_rx_flow , tx_flow related, tx_conf related APIs Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls1088a: Unset USE_BOOTCOMMAND in defconfigAshish Kumar2017-12-064-0/+4
| |/ | | | | | | | | | | | | | | | | | | Unset USE_BOOTCOMMAND for all ls1088 defconfig files to fix redefinition error. USE_BOOTCOMMAND was introduced in commit b6251db8c3f ("Kconfig: Introduce USE_BOOTCOMMAND and migrate BOOTCOMMAND"). Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | armv8: fix gd after relocationYork Sun2017-12-071-2/+3
| | | | | | | | | | | | | | | | | | | | Commit 21f4486faa5d ("armv8: update gd after relocate") sets x18 without checking the return value of spl_relocate_stack_gd(). Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: York Sun <york.sun@nxp.com> CC: Kever Yang <kever.yang@rock-chips.com> CC: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | log: Add documentationSimon Glass2017-12-071-0/+214
| | | | | | | | | | | | | | Add documentation for the log system. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | log: test: Add a pytest for loggingSimon Glass2017-12-072-0/+102
| | | | | | | | | | | | | | Add a test which tries out various filters and options to make sure that logging works as expected. Signed-off-by: Simon Glass <sjg@chromium.org>
* | log: sandbox: Enable loggingSimon Glass2017-12-071-0/+3
| | | | | | | | | | | | | | Enable all logging features on sandbox so that the tests can be run. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | log: Plumb logging into the init sequenceSimon Glass2017-12-074-1/+8
| | | | | | | | | | | | | | Set up logging both before and after relocation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | log: Add a test commandSimon Glass2017-12-078-1/+235
| | | | | | | | | | | | Add a command which exercises the logging system. Signed-off-by: Simon Glass <sjg@chromium.org>
* | log: Add a 'log level' commandSimon Glass2017-12-073-0/+63
| | | | | | | | | | | | | | Add a command for adjusting the log level. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | log: Add a console driverSimon Glass2017-12-073-0/+44
| | | | | | | | | | | | | | | | | | | | | | It is useful to display log messages on the console. Add a simple driver to handle this. Note that this driver outputs to the console, which may be serial or video. It does not specifically select serial output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | log: Add an implementation of loggingSimon Glass2017-12-076-0/+555
| | | | | | | | | | | | | | Add the logging header file and implementation with some configuration options to control it. Signed-off-by: Simon Glass <sjg@chromium.org>
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