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* armv8: ls1012afrx: Add TFABOOT supportRajesh Bhagat2018-12-069-1/+251
| | | | | | | | | | | | TFABOOT support includes: - ls1012a2g5rdb/ls1012afrdm/ls1012afrwy_tfa_defconfig to be loaded by trusted firmware - define BOOTCOMMAND for TFABOOT Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: remove unnecessary braces] Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1012aqds: Add TFABOOT supportRajesh Bhagat2018-12-064-3/+144
| | | | | | | | | | | | TFABOOT support includes: - ls1012aqds_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1012aqds: fix secure boot compilationRajesh Bhagat2018-12-063-0/+17
| | | | | | | | Includes environment.h file in ls1012aqds.c Also, enables pfe validation Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1012ardb: Add TFABOOT supportRajesh Bhagat2018-12-067-2/+158
| | | | | | | | | | | | | TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1043aqds: Add TFABOOT supportRajesh Bhagat2018-12-066-3/+327
| | | | | | | | | | | | TFABOOT support includes: - ls1043aqds_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1043ardb: Add TFABOOT supportRajesh Bhagat2018-12-067-1/+288
| | | | | | | | | | | | | TFABOOT support includes: - ls1043ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - FMAN and QE address changes for TFABOOT - define BOOTCOMMAND for TFABOOT Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1046aqds: Add TFABOOT supportRajesh Bhagat2018-12-066-3/+347
| | | | | | | | | | | | | TFABOOT support includes: - ls1046aqds_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - FMAN address changes for TFABOOT - define BOOTCOMMAND for TFABOOT Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1046ardb: Add TFABOOT supportRajesh Bhagat2018-12-066-0/+150
| | | | | | | | | | | | | TFABOOT support includes: - ls1046ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - FMAN address changes for TFABOOT - define BOOTCOMMAND for TFABOOT Signed-off-by: York Sun <york.sun@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
* armv8: fsl-layerscape: add support of MC framework for TFAPankit Garg2018-12-061-1/+52
| | | | | | | | | Add support of MC framework for TFA Make MC framework independent of boot source. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* drivers: qe: add TFABOOT supportRajesh Bhagat2018-12-061-3/+79
| | | | | | | | | | Adds TFABOOT support and allows to pick QE firmware on basis of boot source. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: remove line continuation in quoted string] Reviewed-by: York Sun <york.sun@nxp.com>
* net: fm: add TFABOOT supportRajesh Bhagat2018-12-061-3/+100
| | | | | | | | | | Adds TFABOOT support and allows to pick FMAN firmware on basis of boot source. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: fix checkpatch issues] Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: sec_firmware: return job ring status as true in TFABOOTPankit Garg2018-12-061-0/+4
| | | | | | | | | Returns job ring status as true in TFABOOT, as one job ring is always reserved. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: sec_firmware: change el2_to_aarch32 SMC IDRajesh Bhagat2018-12-061-1/+1
| | | | | | | | Changes the el2_to_aarch32 SMC ID from 0xc000ff04 to 0xc200ff17, it is applicable to both TFA and non-TFA boot. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: fsl-layerscape: Update parsing boot sourceYork Sun2018-12-062-4/+23
| | | | | | | | | | | Workaround of erratum A010539 clears the RCW source field in PORSR1 register, causing failure of detecting boot source using this method. Use SMC call if U-Boot runs at EL2. If SMC is not implemented or running at EL3, continue to read PORSR1 and presume QSPI as boot source if erratum workaround A010539 is enabled and RCW source is cleared. Signed-off-by: York Sun <york.sun@nxp.com>
* armv8: layerscape: skip OCRAM init for TFABOOTRajesh Bhagat2018-12-061-1/+2
| | | | | | | | OCRAM initialization is performed by TFA, Hence skipped from u-boot. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: layerscape: add SMC calls for DDR size and bank infoRajesh Bhagat2018-12-062-0/+88
| | | | | | | | Adds SMC calls for getting DDR size and bank info for TFABOOT. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: fsl-layerscape: bootcmd identification for TFABOOTPankit Garg2018-12-062-0/+91
| | | | | | | | | | Adds bootcmd identificaton on basis on boot source, valid in TFABOOT configuration. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> [YS: remove unnecessary braces] Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: layerscape: remove EL3 specific erratas for TFABOOTRajesh Bhagat2018-12-061-12/+12
| | | | | | | | | | | | Removes EL3 specific erratas for TFABOOT, And now taken care in TFA. ARM_ERRATA_855873, SYS_FSL_ERRATUM_A008850, SYS_FSL_ERRATUM_A008511, SYS_FSL_ERRATUM_A008336, SYS_FSL_ERRATUM_A009663, SYS_FSL_ERRATUM_A009803, SYS_FSL_ERRATUM_A009942, SYS_FSL_ERRATUM_A010165 Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: fsl-layerscape: identify boot source from PORSR registerRajesh Bhagat2018-12-064-0/+275
| | | | | | | | | | | | PORSR register holds the cfg_rcw_src field which can be used to identify boot source. Further, it can be used to select the environment location. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: fix multiple checkpatch issues] Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: layerscape: Add TFABOOT supportRajesh Bhagat2018-12-062-3/+13
| | | | | | | | Adds TFABOOT support config option and add generic code to enable execution from DDR. Signed-off-by: York Sun <york.sun@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
* drivers: ifc: dynamic chipselect mapping supportPankit Garg2018-12-062-136/+369
| | | | | | | | | | | | IFC driver changes to implement the chipselect mappings at run time. Defines init_early_memctl_regs and init_final_memctl_regs with chipselect dynamic mapping for nor and nand boot. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: fix checkpatch issues] Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: fsl-layerscape: change tlb base from OCRAM to DDR in EL < 3Pankit Garg2018-12-061-1/+4
| | | | | | | | | Change tlb base address from OCRAM to DDR when exception level is less than 3. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: layerscape: Enable routing SError exceptionYork Sun2018-12-061-0/+9
| | | | | | | | In case SError happens at EL2, if SCR_EL3[EA] is not routing it to EL3, and SCR_EL3[RW] is set to aarch64, setting HCR_EL2[AMO] routes the exception to EL2. Otherwise this exception is not taken. Signed-off-by: York Sun <york.sun@nxp.com>
* driver/ifc: replace __ilog2 with LOG2 macroRajesh Bhagat2018-12-067-11/+11
| | | | | | | | | | | | | | Replaces __ilog2 function call with LOG2 macro, required to use macros in global variables. Also, corrects the value passed in LOG2 for some PowerPC platforms. Minimum value that can be configured is is 64K for IFC IP. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: fix white space around operator] Reviewed-by: York Sun <york.sun@nxp.com>
* env: sf: define API to override sf environment addressRajesh Bhagat2018-12-041-1/+8
| | | | | | | | Defines env_sf_get_env_addr API to override sf environment address, required to support multiple environment. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* env: allow flash and nand env driver to compile togetherRajesh Bhagat2018-12-043-11/+8
| | | | | | | | Define env_ptr as static in flash and nand env driver to allow these to compile together. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* move data structure out of cpu.hYork Sun2018-12-042-300/+297
| | | | | | | Move static definitions to cpu.c file, as it doesn't allow the cpu.h file to be included in multiple c files. Signed-off-by: York Sun <york.sun@nxp.com>
* Prepare v2019.01-rc1v2019.01-rc1Tom Rini2018-12-031-3/+3
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* MAINTAINERS: board: qcom: db820c: update email.Jorge Ramirez-Ortiz2018-12-031-1/+1
| | | | | | Update email address Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
* Revert "serial: ns16550: fix debug uart putc called before init"Simon Goldschmidt2018-12-031-16/+2
| | | | | | | | | | | | | | | This reverts commit 6f57c34473d37b8da5e6a3764d0d377d748aeef1 since it does not seem to work at least on rk3399. The Rockchip Technical Reference Manual (TRM) for the rk3399 says the baud rate prescaler register is readable only when USR[0] is zero. Since this bit is defined as "reserved" in the socfpga cylcone5 TRM, let's rather drop this than making the ns16550 debug uart more platform specific. Reported-by: Roosen Henri <Henri.Roosen@ginzinger.com> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com
* dm: MIGRATION: Update migration plan for BLKTom Rini2018-12-031-7/+5
| | | | | | | | | The biggest part of migration to using CONFIG_BLK is that we need to have the various subsystems migrated first, so reword the plan here to reference the new deadlines. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* dm: MIGRATION: Add migration plan for CONFIG_SATATom Rini2018-12-032-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As the core of the subsystem has been converted along with some of the drivers, formalize a deadline for migration. Cc: Akshay Bhat <akshaybhat@timesys.com> Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jason Liu <jason.hui.liu@nxp.com> Cc: Ken Lin <Ken.Lin@advantech.com.tw> Cc: Ludwig Zenz <lzenz@dh-electronics.de> Cc: Marek Vasut <marex@denx.de> Cc: Max Krummenacher <max.krummenacher@toradex.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Soeren Moch <smoch@web.de> Cc: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* dm: MIGRATION: Add migration plan for DM_USBTom Rini2018-12-032-0/+20
| | | | | | | | | As much of the USB system has been migrated to DM now, formalize a deadline for migration. Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* dm: MIGRATION: Add migration plan for DM_MMCTom Rini2018-12-032-0/+19
| | | | | | | | | | | | Given that at this point the MMC subsystem itself has been migrated along with a number of subsystem drivers, formalize a deadline for migration. Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblazeTom Rini2018-12-0346-76/+342
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xilinx changes for v2019.01 microblaze: - Use default functions for memory decoding - Showing model from DT zynq: - Fix spi flash DTs - Fix zynq_help_text with CONFIG_SYS_LONGHELP - Tune cse/mini configurations - Enabling cse/mini testing with current targets zynqmp: - Enable gzip SPL support - Fix chip detection logic - Tune mini configurations - DT fixes(spi-flash, models, clocks, etc) - Add support for OF_SEPARATE configurations - Enabling mini testing with current targets - Add mini mtest configuration - Some minor config setting nand: - arasan: Add subpage configuration net: - gem: Add 64bit DMA support
| * net: zynq_gem: Add check for 64-bit dma support by hardwareSiva Durga Prasad Paladugu2018-12-031-1/+23
| | | | | | | | | | | | | | | | | | | | | | This patch throws an error if 64-bit support is expected but DMA hardware is not capable of 64-bit support. It also prints a debug message if DMA is capable of 64-bit but not using it. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * net: zynq_gem: Added 64-bit addressing supportVipul Kumar2018-12-031-9/+54
| | | | | | | | | | | | | | | | | | | | | | This patch adds 64-bit addressing support for zynq gem. This means it can perform send and receive operations on 64-bit address buffers. Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * arm64: zynqmp: Add new header file for zcu104 RevCT Karthik Reddy2018-12-032-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | Created a new header file for zcu104 RevC board and added below configurations to use MAC address from EEPROM. CONFIG_ZYNQ_GEM_EEPROM_ADDR CONFIG_ZYNQ_EEPROM_BUS Added CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 to xilinx_zynqmp_zcu104_revC_defconfig Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Wire mini-emmc1 configuration with zcu102Michal Simek2018-11-302-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For testing purpose use zcu102 which has SD at controller 1 and this can be used for testing this mini configuration. U-Boot 2018.11-00279-gdc482e7ee092 (Nov 30 2018 - 10:22:56 +0100) Model: ZynqMP MINI EMMC1 Board: Xilinx ZynqMP DRAM: 512 MiB EL Level: EL3 MMC: sdhci@ff170000: 0 In: dcc Out: dcc Err: dcc ZynqMP> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Wire mini-emmc0 configuration with zcu100Michal Simek2018-11-302-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For testing purpose use zcu100 which has SD at controller 0 and this can be used for testing this mini configuration. U-Boot 2018.11-00281-gc5d48466e76e (Nov 30 2018 - 10:41:05 +0100) Model: ZynqMP MINI EMMC0 Board: Xilinx ZynqMP DRAM: 512 MiB EL Level: EL3 MMC: sdhci@ff160000: 0 In: dcc Out: dcc Err: dcc ZynqMP> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Start usb ethernet gadget automaticallyMichal Simek2018-11-301-0/+4
| | | | | | | | | | | | | | | | If only usb ethernet gadget is enabled it can start automatically. If more gagdets are enabled usb ethernet gadget can be bind by "bind /amba/usb1@ff9e0000/dwc3@fe300000 usb_ether" (on zcu100) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Add mini mtest configurationMichal Simek2018-11-304-0/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This configuration is useful when you want to run small u-boot and perform DDR memory test to make sure that DDR is properly configured. It is use for board bringup because alternative u-boot memory tests is quite good. Configuration is running out of OCM. As is done for others mini configurations 0x80 bytes for variables is enough and only default variables are stored there. Alternative memtest is enabled and also 2GB of DDR via DTS files. Configuration is enabling ZYNQMP_PSU_INIT_ENABLED and include psu_init() from zcu102 for testing purpose. In case of size issue this can be moved to SPL configuration as is done for mini_qspi configuration but it is not a problem now. Log: U-Boot 2018.11-00268-gbd58b8ba8915 (Nov 29 2018 - 15:33:35 +0100) Model: ZynqMP MINI Board: Xilinx ZynqMP DRAM: WARNING: Initializing TCM overwrites TCM content 2 GiB EL Level: EL3 In: dcc Out: dcc Err: dcc ZynqMP> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Use minimal size for environment variablesMichal Simek2018-11-304-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no reason to have huge space for variables because none is using that. But there are some which are setup automatically. baudrate=115200 fdtcontroladdr=ffffa0d0 stderr=dcc stdin=dcc stdout=dcc Environment size: 72/124 bytes Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Do not save variables about boardMichal Simek2018-11-303-3/+0
| | | | | | | | | | | | No reason to save this data to environment. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Do not use any EXTRA_ENV_SETTINGSMichal Simek2018-11-291-0/+2
| | | | | | | | | | | | | | No reason to save additional variables to environment for mini configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Disable BOOTCOMMANDMichal Simek2018-11-291-0/+1
| | | | | | | | | | | | | | | | There is no need to waste a space for setting up bootcommand which is passed via xilinx_zynqmp.h by including "config_distro_bootcmd.h" header. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Enable SPL for mini qspi configurationMichal Simek2018-11-292-0/+5
| | | | | | | | | | | | | | | | Wire up mini_qspi SPL with zcu102 for testing purpose. Normally mini u-boot runs with FSBL/SPL for certain board. Enabling SPL and configuration from zcu102 helps with testing. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Disable autoboot feature for miniMichal Simek2018-11-294-4/+4
| | | | | | | | | | | | | | There is no reason to have autoboot enabled because it should never start anything automatically. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Disable net for cse nor/nandMichal Simek2018-11-292-2/+2
| | | | | | | | | | | | | | | | | | There is no need to waste 6k if none needs it. zynq_cse_nand : all -6486 bss -20 data -136 rodata -606 text -5724 zynq_cse_nor : all -6486 bss -20 data -136 rodata -606 text -5724 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Enable mtest command at least on one platformMichal Simek2018-11-291-0/+1
| | | | | | | | | | | | | | mtest is being checked by test/py framework and this test should run at least on one platform that's why enabling mtest on zc702. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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