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| * | pinctrl: Return -ENOSYS when system call is not availableSimon Glass2021-04-061-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the code to use -ENOSYS, which is the correct error code for an unimplemented system call in U-Boot. Also we should not check for a missing operations array as this is not permitted. For now this can be covered by an assert(). Signed-off-by: Simon Glass <sjg@chromium.org>
| * | simple-pm-bus: Use -ENOSYS for checking missing system callSimon Glass2021-04-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need to check -ENOTSUPP since this is not used for this purpose in U-Boot. Update the code accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <seanga2@gmail.com>
| * | clk: Return -ENOSYS when system call is not availableSimon Glass2021-04-061-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update clk_composite_set_parent() to use -ENOSYS, which is the correct error code for U-Boot. Also rearrange the code so that the error condition is clearly indicated and the function runs to the end in the normal case, since this is the common style in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <seanga2@gmail.com>
| * | clk: Update drivers to use -EINVALSimon Glass2021-04-069-17/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present some drivers use -ENOSUPP to indicate that an unknown or unsupported clock is used. Most use -EINVAL, indicating an invalid value, so convert everything to that. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | tlv_eeprom: Return -ENOSYS when system call is not availableSimon Glass2021-04-061-3/+3
| | | | | | | | | | | | | | | | | | | | | When CMD_TLV_EEPROM is not enabled, use -ENOSYS, which is the correct error code for U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | spi: Return -ENOSYS when system call is not availableSimon Glass2021-04-061-1/+1
| | | | | | | | | | | | | | | | | | | | | Update spi_controller_dma_map_mem_op_data() to use -ENOSYS, which is the correct error code for U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | usb: Return -ENOSYS when system call is not availableSimon Glass2021-04-061-1/+1
| | | | | | | | | | | | | | | | | | | | | Update usb_gadget_release() to use -ENOSYS, which is the correct error code for U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: core: Use -ENOSPC in acpi_get_path()Simon Glass2021-04-061-1/+1
| | | | | | | | | | | | | | | | | | | | | Update this function to use -ENOSPC which is more commly used when a buffer runs out of space. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: core: Document the common error codesSimon Glass2021-04-061-0/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | Driver model uses quite strong conventions on error codes, but these are currently not clearly documented. Add a description of the commonly used errors. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <seanga2@gmail.com>
| * | patman: Continue on if warnings are found outside a commitSimon Glass2021-04-061-2/+2
| | | | | | | | | | | | | | | | | | | | | While we cannot know which commit the warning relates to, this should not be fatal. Print the warning and carry on. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dtc: Update the build rule for pylibfdtSimon Glass2021-04-061-0/+1
| |/ | | | | | | | | | | | | | | | | | | | | Some versions of make complain about using a grouped target without a recipe: .../pylibfdt/Makefile:36: *** grouped targets must provide a recipe. Stop. Fix this by adding a dummy recipe. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge tag 'rockchip-for-v2021.07' of ↵WIP/05Apr2021Tom Rini2021-04-0526-327/+1135
|\ \ | |/ |/| | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-rockchip - Fix rk3368 lion board support; - Fix px30 odroid-go2 board support; - Add rk3399 NanoPi R4s and NanoPi M4B board support;
| * board: dts: rockchip: Add NanoPi M4BAlexandre Vicenzi2021-03-306-0/+128
| | | | | | | | | | | | | | | | | | | | | | | | Add initial support for NanoPi M4B, a minor revision of the original NanoPi M4. Commit details of rk3399-nanopi-m4b.dts sync from Linux 5.12-rc4: "arm64: dts: rockchip: Add NanoPi M4B board" (sha1: c7b03115003f7f337ab165542cee37148cf30a8a) Signed-off-by: Alexandre Vicenzi <alexandre.vicenzi@suse.com> Reviewed-by: Kever Yang <kever.yang@rock-cihps.com>
| * arm64: rk3399: Add support NanoPi R4sXiaobo Tian2021-03-305-0/+223
| | | | | | | | | | | | | | | | | | | | | | | | | | | | NanoPi R4s is SBC base on Rockchip RK3399 hexa-core processor with dual-Core Cortex-A72 and Mali-T864 GPU with 4GiB(LPDDR4) of RAM, SD card support, including 2 gigabit ethernet(RTL8211E 1Gbps - RTL8111H 1Gbps) and 2 USB 3.0 port. port.It also has two GPIO headers which allows further peripherals to be used. The devicetree file is taken of the rk3399 nanopi4 Linux kernel [1]. [1] https://github.com/torvalds/linux/commit/e7a095908227fb3ccc86d001d9e13c9ae2bef8e6 Signed-off-by: xiaobo <peterwillcn@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * odroid-go2: fix default FDT file pathRoger Pau Monné2021-03-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | The path in the Linux kernel dts directory is rockchip/rk3326-odroid-go2.dtb. That also seems to match the FDT path set on other boards (ie: rock64-rk3328 for example). Signed-off-by: Roger Pau Monne <royger@FreeBSD.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * odroid-go2: do not disable EFIRoger Pau Monné2021-03-301-1/+0
| | | | | | | | | | | | | | | | | | Remove the unset of the EFI loader, it's possible for U-Boot to provide a EFI environment on this board, and it's also required by the FreeBSD loader which mandated EFI on Aarch64. Signed-off-by: Roger Pau Monné <royger@FreeBSD.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3399-puma: Increase environment size to 16 kiB.Christoph Muellner2021-03-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | On Puma we have the environment at an offset of 16 kiB. On the eMMC this gives us 16 kiB for the environment before the SPL starts. On the SPI NOR we also have 16 kiB until end of flash. So let's increase the environment size from 8 kiB to its maximum of 16 kiB for both MMC and SPI NOR. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3399-puma: Restore correct VDD_LOG supply.Christoph Muellner2021-03-301-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | A commit from last year re-imported the DTS files form the upstream kernel. By doing so the VDD_LOG regulator in the board's DTS was dropped. Let's restore this, but move it into the u-boot overlay to prevent this issue in the future. Fixes: 167efc2c7a46 ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux") Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3399: rock960: explicitly disable SPI flashPeter Robinson2021-03-301-0/+1
| | | | | | | | | | | | | | | | | | The Rock960 doesn't have SPI flash on-board, but the bits get enabled by default which means when booting we get some errors. Explicitly disable it to stop the errors. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * include: configs: rk3399: drop a dangling commentPeter Robinson2021-03-301-2/+0
| | | | | | | | | | | | | | | | Drop a irrelevent comment now the related configs have moved to the various config files. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: lion: update board defconfigHeiko Stuebner2021-03-301-2/+14
| | | | | | | | | | | | | | | | Adds the needed target option and drivers needed for correct bringup. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3368: sync down rk3368-lion board devicetree from LinuxHeiko Stuebner2021-03-305-68/+351
| | | | | | | | | | | | | | | | This brings the actual rk3368-lion devicetree files from Linux 5.10 instead of using something separate. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3368: sync main rk3368 dtsi from LinuxHeiko Stuebner2021-03-306-231/+383
| | | | | | | | | | | | | | | | | | | | | | | | This is the state as of v5.10 + the recently added timer0 phandle targetted at the 5.12 merge window. With this the non-mainline nodes like the dmc move to a separate rk3368-u-boot.dtsi that is included from the board-specific -u-boot.dtsi files, similar to how rk3399 does this. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3368: sync clock dt-binding header from LinuxHeiko Stuebner2021-03-301-17/+14
| | | | | | | | | | | | | | This is the state as of v5.10 in Linux. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3368: move STACK_R_ADDR address and into KconfigHeiko Stuebner2021-03-302-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | With the STACK_R_ADDR at 0x600000 (6MB) we're competing with with the loading address of either u-boot or atf parts, so move that away to 0x4000000 (64MB) similar to rk3399. Only lion currently sets that at all but not sheep the second rk3368 board, so just move that to the Kconfig for rk3368 similar to rk3399 as well. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3368: increase SYS_MALLOC_F_LEN to 0x4000Heiko Stuebner2021-03-301-1/+1
| | | | | | | | | | | | | | | | To prevent running out of memory, increase SYS_MALLOC_F_LEN to 0x4000 similar to what rk3399 uses. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3368: set CONFIG_SYS_BOOTM_LEN to 64MBHeiko Stuebner2021-03-301-0/+2
| | | | | | | | | | | | | | | | Mimicing for example the rk3399, set the SYS_BOOTM_LEN to 64MB so that regular kernel images can get loaded without problems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * rockchip: rk3368: adjust CONFIG_SYS_LOAD_ADDRHeiko Stuebner2021-03-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_LOAD_ADDR currently is at 0x00280000 which is only 512KB behind the area where we load u-boot to, which depending on u-boot size may overlap at some point. So for safety just pick the same value rk3399 has and set CONFIG_SYS_LOAD_ADDR to 0x00800800 on rk3368 as well. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * odroid-go2: remove setting SYS_MMCSD_RAW_MODE_U_BOOT_SECTORRoger Pau Monné2021-03-301-1/+0
| | | | | | | | | | | | | | | | | | | | Using a non-default SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR setting makes the resulting u-boot-rockchip.bin unbootable, as it gets stuck after SPL. Removing the setting from the defconfig allows U-Boot to load successfully. Signed-off-by: Roger Pau Monné <royger@FreeBSD.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | Merge branch 'next'Tom Rini2021-04-05659-4548/+22451
|\ \
| * \ Merge tag 'xilinx-for-v2021.07' of ↵WIP/31Mar2021-nextTom Rini2021-03-3135-434/+4637
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.07 net: - Fix gem PCS support spi: - Small trivial fixes zynq: - Enable time/timer commands - Update bitmain platform - Several DT changes zynqmp: - Update clock driver - mini config alignments - Add/update psu_init for zcu208/zcu216/zc1275 - Several DT changes - Enable efi debug command (also for Versal)
| | * | xilinx: Enable efi debug commandMichal Simek2021-03-302-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable EFI debug command to be able to setup various efi variables to avoid software like grub. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | ARM: bitmain: Enable saving variables to SD cardMichal Simek2021-03-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Board has NAND and SD interfaces which can be used for saving variables too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | ARM: bitmain: Enable legacy u-boot formatMichal Simek2021-03-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Still legacy formats are used that's why enable them by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | ARM: bitmain: Enable nand and smcc driversMichal Simek2021-03-301-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Enable nand and smcc via DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | spi: xilinx_spi: Trivial fixes in axi qspi driverT Karthik Reddy2021-03-301-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use __func__ instead for function name in debug. Use Linux style u32 instead of uint32_t. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | xilinx: Sync DTs with Linux kernelMichal Simek2021-03-3019-255/+498
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are several changes which happen in mainline kernel which should get also to U-Boot. Here is the list of patches from the kernel: - ARM: zynq: Fix leds subnode name for zc702/zybo-z7 - arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 - arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111 - arm64: dts: zynqmp: Wire up the DisplayPort subsystem - arm64: dts: zynqmp: Add DisplayPort subsystem - arm64: dts: zynqmp: Add DPDMA node - arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 - arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111 - arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106 - arm64: dts: zynqmp-zcu100-revC: correct interrupt flags - arm64: dts: xilinx: align GPIO hog names with dtschema - arm64: zynqmp: Add Xilinx AES node - dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA but also some other changes have been done. - Using only one compatible string for adxl345 on zturn - Remove Xilinx internal DP bindings - Remove USB3.0 serdes configurations - Remove SATA serdes configuration for zc1232 - Resort nvmem_firmware - Update nand compatible string - Aling power-domains property for sd0/1 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | clk: zynqmp: Fix clk dump valuesT Karthik Reddy2021-03-301-81/+170
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With "clk dump" command, few clocks are showing up incorrect values and some clocks are displayed as "unknown". Add missing clocks to zynqmp clock driver to display proper clocks rates. Implement a simple way to get clock source, instead of calling functions. Change existing functions to this simple mechanism. Fix gem clock name "gem_rx" to "gem_tx" which was incorrect. Change dbf_fpd & dbf_lpd clk names to dbg_fpd & dbg_lpd. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
| | * | arm64: zynqmp: Rename clocks as per the Arasan NAND driverAmit Kumar Mahapatra2021-03-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In zynqmp.dtsi file renamed "clk_sys" clock to "controller" and "clk_flash" clock to "bus" as per upstreamed Arasan NAND driver. This fixes NAND driver probe failure. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Update device tree properties for nand flashAmit Kumar Mahapatra2021-03-301-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the following device tree properties for nand flash - Set software ecc mode. - Set bch as ecc algo. - Set read block to 0. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Update psu_init for zcu1275Michal Simek2021-03-301-82/+148
| | | | | | | | | | | | | | | | | | | | | | | | Update clock/pll setup, ddr, MIOs based on 2020.2 hw design. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Add idt 8a34001 chip to zcu208/zcu216Michal Simek2021-03-302-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | There is Linux driver for these chips that's why add it to device tree. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Add missing psu inits for zcu208/216Michal Simek2021-03-302-0/+3762
| | | | | | | | | | | | | | | | | | | | | | | | Add missing configurations file for zcu208 and zcu216. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Add emmc specific parametersAshok Reddy Soma2021-03-302-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | EMMC will have bus-width 8 and it is non-removable in general. These are missing from dt node. Add bus-width and non-removable parameters to emmc node. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: zynqmp: Increase size of malloc poolAshok Reddy Soma2021-03-302-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | size of malloc() pool for use before relocation is not sufficient for ZynqMP mini u-boot with emmc configuration. Increase it to 4K. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | xilinx: zynq: Enable time and timer commandsAshok Reddy Soma2021-03-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable time command to get the elapsed time and timer commands. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | net: gem: Fix setting PCS auto-negotiation stateRobert Hancock2021-03-301-8/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code was trying to disable PCS auto-negotiation when a fixed-link node is present and enable it otherwise. However, the PCS registers were being written before the PCSSEL bit was set in the network configuration register, and it appears that in this state, PCS register writes are ignored. The result is that the intended change only took effect on the second network operation that was performed, since at that time PCSSEL is already enabled. Fix the order of register writes so that PCS registers are only written to after the PCS is enabled. Fixes: 26e62cc971 ("net: gem: Disable PCS autonegotiation in case of fixed-link") Signed-off-by: Robert Hancock <robert.hancock@calian.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | Merge tag 'u-boot-atmel-2021.07-a' of ↵WIP/30Mar2021-nextTom Rini2021-03-304-14/+36
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-atmel into next First set of u-boot-atmel features for 2021.07 cycle: This small feature set includes the implementation of the slew rate for the PIO4 pin controller device, and a fix for arm926ejs-based microprocessors that avoids a crash.
| | * | | ARM: mach-at91: arm926ejs: fix data abort in startup returning from ↵Martin Townsend2021-03-221-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | lowlevel_init The startup code in arm/cpu/arm926ejs preserves the link register across the call to lowlevel_init by using r4: mov r4, lr /* perserve link reg across call */ bl lowlevel_init /* go setup pll,mux,memory */ mov lr, r4 /* restore link */ The lowlevel_init function for at91 machines based on the same CPU uses r4 and hence corrupts it causing a data abort when it returns to the startup code. This patch fixes this by using r6 instead of r4 in the lowlevel_init function. Discovered and the fix was tested on a AT91SAM9261 based board. Signed-off-by: Martin Townsend <martin@rufilla.com> Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
| | * | | pinctrl: at91-pio4: add support for slew-rateClaudiu Beznea2021-03-022-3/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SAMA7G5 supports slew rate configuration. Adapt the driver for this. For switching frequencies lower than 50MHz the slew rate needs to be enabled. Since most of the pins on SAMA7G5 fall into this category enabled the slew rate by default. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
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