diff options
Diffstat (limited to 'include')
71 files changed, 1627 insertions, 248 deletions
diff --git a/include/_exports.h b/include/_exports.h index 5416041243..c15050e30b 100644 --- a/include/_exports.h +++ b/include/_exports.h @@ -50,11 +50,9 @@ #endif #if !defined(CONFIG_CMD_SPI) || defined(CONFIG_DM_SPI) - EXPORT_FUNC(dummy, void, spi_init, void) EXPORT_FUNC(dummy, void, spi_setup_slave, void) EXPORT_FUNC(dummy, void, spi_free_slave, void) #else - EXPORT_FUNC(spi_init, void, spi_init, void) EXPORT_FUNC(spi_setup_slave, struct spi_slave *, spi_setup_slave, unsigned int, unsigned int, unsigned int, unsigned int) EXPORT_FUNC(spi_free_slave, void, spi_free_slave, struct spi_slave *) diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index dffd6b2602..78dcf40bff 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -77,6 +77,10 @@ typedef struct global_data { #ifdef CONFIG_OF_LIVE struct device_node *of_root; #endif + +#if CONFIG_IS_ENABLED(MULTI_DTB_FIT) + const void *multi_dtb_fit; /* uncompressed multi-dtb FIT image */ +#endif struct jt_funcs *jt; /* jump table */ char env_buf[32]; /* buffer for env_get() before reloc. */ #ifdef CONFIG_TRACE diff --git a/include/axp209.h b/include/axp209.h index b7de6ed73c..f4f1b2fe56 100644 --- a/include/axp209.h +++ b/include/axp209.h @@ -3,11 +3,14 @@ * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net> */ +#include <linux/bitops.h> + enum axp209_reg { AXP209_POWER_STATUS = 0x00, AXP209_CHIP_VERSION = 0x03, AXP209_OUTPUT_CTRL = 0x12, AXP209_DCDC2_VOLTAGE = 0x23, + AXP209_VRC_DCDC2_LDO3 = 0x25, AXP209_DCDC3_VOLTAGE = 0x27, AXP209_LDO24_VOLTAGE = 0x28, AXP209_LDO3_VOLTAGE = 0x29, @@ -20,29 +23,64 @@ enum axp209_reg { AXP209_SHUTDOWN = 0x32, }; -#define AXP209_POWER_STATUS_ON_BY_DC (1 << 0) -#define AXP209_POWER_STATUS_VBUS_USABLE (1 << 4) +#define AXP209_POWER_STATUS_ON_BY_DC BIT(0) +#define AXP209_POWER_STATUS_VBUS_USABLE BIT(4) + +#define AXP209_CHIP_VERSION_MASK 0x0f + +#define AXP209_OUTPUT_CTRL_EXTEN BIT(0) +#define AXP209_OUTPUT_CTRL_DCDC3 BIT(1) +#define AXP209_OUTPUT_CTRL_LDO2 BIT(2) +#define AXP209_OUTPUT_CTRL_LDO4 BIT(3) +#define AXP209_OUTPUT_CTRL_DCDC2 BIT(4) +#define AXP209_OUTPUT_CTRL_LDO3 BIT(6) + +/* + * AXP209 datasheet contains wrong information about LDO3 VRC: + * - VRC is actually enabled when BIT(1) is True + * - VRC is actually not enabled by default (BIT(3) = 0 after reset) + */ +#define AXP209_VRC_LDO3_EN BIT(3) +#define AXP209_VRC_DCDC2_EN BIT(2) +#define AXP209_VRC_LDO3_800uV_uS (BIT(1) | AXP209_VRC_LDO3_EN) +#define AXP209_VRC_LDO3_1600uV_uS AXP209_VRC_LDO3_EN +#define AXP209_VRC_DCDC2_800uV_uS (BIT(0) | AXP209_VRC_DCDC2_EN) +#define AXP209_VRC_DCDC2_1600uV_uS AXP209_VRC_DCDC2_EN +#define AXP209_VRC_LDO3_MASK 0xa +#define AXP209_VRC_DCDC2_MASK 0x5 +#define AXP209_VRC_DCDC2_SLOPE_SET(reg, cfg) \ + (((reg) & ~AXP209_VRC_DCDC2_MASK) | \ + ((cfg) & AXP209_VRC_DCDC2_MASK)) +#define AXP209_VRC_LDO3_SLOPE_SET(reg, cfg) \ + (((reg) & ~AXP209_VRC_LDO3_MASK) | \ + ((cfg) & AXP209_VRC_LDO3_MASK)) + +#define AXP209_LDO24_LDO2_MASK 0xf0 +#define AXP209_LDO24_LDO4_MASK 0x0f +#define AXP209_LDO24_LDO2_SET(reg, cfg) \ + (((reg) & ~AXP209_LDO24_LDO2_MASK) | \ + (((cfg) << 4) & AXP209_LDO24_LDO2_MASK)) +#define AXP209_LDO24_LDO4_SET(reg, cfg) \ + (((reg) & ~AXP209_LDO24_LDO4_MASK) | \ + (((cfg) << 0) & AXP209_LDO24_LDO4_MASK)) -#define AXP209_OUTPUT_CTRL_EXTEN (1 << 0) -#define AXP209_OUTPUT_CTRL_DCDC3 (1 << 1) -#define AXP209_OUTPUT_CTRL_LDO2 (1 << 2) -#define AXP209_OUTPUT_CTRL_LDO4 (1 << 3) -#define AXP209_OUTPUT_CTRL_DCDC2 (1 << 4) -#define AXP209_OUTPUT_CTRL_LDO3 (1 << 6) +#define AXP209_LDO3_VOLTAGE_FROM_LDO3IN BIT(7) +#define AXP209_LDO3_VOLTAGE_MASK 0x7f +#define AXP209_LDO3_VOLTAGE_SET(x) ((x) & AXP209_LDO3_VOLTAGE_MASK) -#define AXP209_IRQ5_PEK_UP (1 << 6) -#define AXP209_IRQ5_PEK_DOWN (1 << 5) +#define AXP209_IRQ5_PEK_UP BIT(6) +#define AXP209_IRQ5_PEK_DOWN BIT(5) -#define AXP209_POWEROFF (1 << 7) +#define AXP209_POWEROFF BIT(7) /* For axp_gpio.c */ #define AXP_POWER_STATUS 0x00 -#define AXP_POWER_STATUS_VBUS_PRESENT (1 << 5) +#define AXP_POWER_STATUS_VBUS_PRESENT BIT(5) #define AXP_GPIO0_CTRL 0x90 #define AXP_GPIO1_CTRL 0x92 #define AXP_GPIO2_CTRL 0x93 -#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ -#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ -#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ +#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ +#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ +#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ #define AXP_GPIO_STATE 0x94 -#define AXP_GPIO_STATE_OFFSET 4 +#define AXP_GPIO_STATE_OFFSET 4 diff --git a/include/bootcount.h b/include/bootcount.h index 671adcc410..daee84316c 100644 --- a/include/bootcount.h +++ b/include/bootcount.h @@ -10,6 +10,54 @@ #include <asm/io.h> #include <asm/byteorder.h> +#ifdef CONFIG_DM_BOOTCOUNT + +struct bootcount_ops { + /** + * get() - get the current bootcount value + * + * Returns the current counter value of the bootcount backing + * store. + * + * @dev: Device to read from + * @bootcount: Address to put the current bootcount value + */ + int (*get)(struct udevice *dev, u32 *bootcount); + + /** + * set() - set a bootcount value (e.g. to reset or increment) + * + * Sets the value in the bootcount backing store. + * + * @dev: Device to read from + * @bootcount: New bootcount value to store + */ + int (*set)(struct udevice *dev, const u32 bootcount); +}; + +/* Access the operations for a bootcount device */ +#define bootcount_get_ops(dev) ((struct bootcount_ops *)(dev)->driver->ops) + +/** + * dm_bootcount_get() - Read the current value from a bootcount storage + * + * @dev: Device to read from + * @bootcount: Place to put the current bootcount + * @return 0 if OK, -ve on error + */ +int dm_bootcount_get(struct udevice *dev, u32 *bootcount); + +/** + * dm_bootcount_set() - Write a value to a bootcount storage + * + * @dev: Device to read from + * @bootcount: Value to be written to the backing storage + * @return 0 if OK, -ve on error + */ +int dm_bootcount_set(struct udevice *dev, u32 bootcount); + +#endif + #if defined(CONFIG_SPL_BOOTCOUNT_LIMIT) || defined(CONFIG_BOOTCOUNT_LIMIT) #if !defined(CONFIG_SYS_BOOTCOUNT_LE) && !defined(CONFIG_SYS_BOOTCOUNT_BE) diff --git a/include/common.h b/include/common.h index a8e879e1b9..657cc404cf 100644 --- a/include/common.h +++ b/include/common.h @@ -287,13 +287,6 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned c # define CONFIG_SYS_DEF_EEPROM_ADDR CONFIG_SYS_I2C_EEPROM_ADDR #endif -#if defined(CONFIG_MPC8XX_SPI) -extern void spi_init_f (void); -extern void spi_init_r (void); -extern ssize_t spi_read (uchar *, int, uchar *, int); -extern ssize_t spi_write (uchar *, int, uchar *, int); -#endif - /* $(BOARD)/$(BOARD).c */ int board_early_init_f (void); int board_fix_fdt (void *rw_fdt_blob); /* manipulate the U-Boot fdt before its relocation */ @@ -357,6 +350,8 @@ void smp_set_core_boot_addr(unsigned long addr, int corenr); void smp_kick_all_cpus(void); /* $(CPU)/serial.c */ +struct serial_device_info; + int serial_init (void); void serial_setbrg (void); void serial_putc (const char); @@ -364,7 +359,9 @@ void serial_putc_raw(const char); void serial_puts (const char *); int serial_getc (void); int serial_tstc (void); +int serial_getconfig(uint *config); int serial_setconfig(uint config); +int serial_getinfo(struct serial_device_info *info); /* $(CPU)/speed.c */ int get_clocks (void); diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index 11cb3955da..83d774527a 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -102,7 +102,6 @@ /* DSPI and Serial Flash */ #define CONFIG_CF_DSPI -#define CONFIG_HARD_SPI #define CONFIG_SYS_SBFHDR_SIZE 0x7 #ifdef CONFIG_CMD_SPI # define CONFIG_SYS_DSPI_CS2 diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index f08896ef0a..4b8ef38c0b 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -151,7 +151,6 @@ /* DSPI and Serial Flash */ #define CONFIG_CF_DSPI #define CONFIG_SERIAL_FLASH -#define CONFIG_HARD_SPI #define CONFIG_SYS_SBFHDR_SIZE 0x7 #ifdef CONFIG_CMD_SPI diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h index 16becbdbed..87cdbae1db 100644 --- a/include/configs/M54451EVB.h +++ b/include/configs/M54451EVB.h @@ -116,7 +116,6 @@ /* DSPI and Serial Flash */ #define CONFIG_CF_DSPI #define CONFIG_SERIAL_FLASH -#define CONFIG_HARD_SPI #define CONFIG_SYS_SBFHDR_SIZE 0x7 #ifdef CONFIG_CMD_SPI diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 99b60d5d82..d41b7c4492 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -142,7 +142,6 @@ /* DSPI and Serial Flash */ #define CONFIG_CF_DSPI -#define CONFIG_HARD_SPI #define CONFIG_SYS_SBFHDR_SIZE 0x13 #ifdef CONFIG_CMD_SPI diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 524a10fc95..86a1233e32 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -370,11 +370,6 @@ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_EEPROM_BUS_NUM 1 -/* - * eSPI - Enhanced SPI - */ -#define CONFIG_HARD_SPI - #if defined(CONFIG_SPI_FLASH) #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0 diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index c9ed70ca4c..eeb19a9fa6 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -386,12 +386,6 @@ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_EEPROM_BUS_NUM 1 -/* - * eSPI - Enhanced SPI - */ - -#define CONFIG_HARD_SPI - #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0 diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index 423ecd71c2..1bbe9d9b37 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -287,11 +287,6 @@ #define CONFIG_SYS_I2C_NCT72_ADDR 0x4C #define CONFIG_SYS_I2C_IDT6V49205B 0x69 -/* - * eSPI - Enhanced SPI - */ -#define CONFIG_HARD_SPI - #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 diff --git a/include/configs/alt.h b/include/configs/alt.h index cc6a7bf638..3f7f379e06 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -39,8 +39,7 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" + "bootm_size=0x10000000\0" /* SPL support */ #define CONFIG_SPL_TEXT_BASE 0xe6300000 diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 9d0d342478..ed71f4ce56 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -27,8 +27,10 @@ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Power */ +#ifndef CONFIG_DM_I2C #define CONFIG_POWER #define CONFIG_POWER_I2C +#endif #define CONFIG_POWER_TPS65218 #define CONFIG_POWER_TPS62362 diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index 4adcd956ef..1908d35bcc 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -182,10 +182,6 @@ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 #ifndef CONFIG_TRAILBLAZER -/* - * eSPI - Enhanced SPI - */ -#define CONFIG_HARD_SPI #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0 diff --git a/include/configs/gose.h b/include/configs/gose.h index 36ac88a20d..8f0e378488 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -35,8 +35,7 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" + "bootm_size=0x10000000\0" /* SPL support */ #define CONFIG_SPL_TEXT_BASE 0xe6300000 diff --git a/include/configs/helios4.h b/include/configs/helios4.h index ce912ea324..3157225f06 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -6,6 +6,8 @@ #ifndef _CONFIG_HELIOS4_H #define _CONFIG_HELIOS4_H +#include <linux/sizes.h> + /* * High Level Configuration Options (easy to change) */ @@ -23,6 +25,9 @@ /* SPI NOR flash default params, used by sf commands */ #define CONFIG_SF_DEFAULT_BUS 1 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 104000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 /* * SDIO/MMC Card Configuration @@ -43,28 +48,33 @@ #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) +#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI +/* + * SPI Flash configuration for the environment access + */ +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED + +/* Environment in SPI NOR flash */ +#define CONFIG_ENV_SECT_SIZE SZ_64K +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#define CONFIG_ENV_OFFSET SZ_1M +#endif + +#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC /* Environment in MMC */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SECT_SIZE 0x200 -#define CONFIG_ENV_SIZE 0x10000 -/* - * For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC - * boot image starts @ LBA-0. - * As result in MMC/eMMC case it will be a 1 sector gap between u-boot - * image and environment - */ -#define CONFIG_ENV_OFFSET 0xf0000 +#define CONFIG_ENV_SIZE 0x2000 +/* stay within first 1M */ +#define CONFIG_ENV_OFFSET (SZ_1M - CONFIG_ENV_SIZE) #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET +#endif #define CONFIG_PHY_MARVELL /* there is a marvell phy */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ -/* PCIe support */ -#ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI_MVEBU -#define CONFIG_PCI_SCAN_SHOW -#endif - /* Keep device tree and initrd in lower memory so the kernel can access them */ #define RELOCATION_LIMITS_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ @@ -80,7 +90,13 @@ */ #define SPL_BOOT_SPI_NOR_FLASH 1 #define SPL_BOOT_SDIO_MMC_CARD 2 + +#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI +#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH +#endif +#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SDIO_MMC_CARD +#endif /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) @@ -99,12 +115,16 @@ #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH /* SPL related SPI defines */ +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS #endif #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD /* SPL related MMC defines */ +#define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10) #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 28124dd4b1..7e4c497fe0 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -159,7 +159,6 @@ */ #define CONFIG_TSEC1 #define CONFIG_TSEC2 -#define CONFIG_HARD_SPI /* * NOR FLASH setup @@ -274,15 +273,6 @@ #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* - * SPI setup - */ -#ifdef CONFIG_HARD_SPI -#define CONFIG_SYS_GPIO1_PRELIM -#define CONFIG_SYS_GPIO1_DIR 0x00000001 -#define CONFIG_SYS_GPIO1_DAT 0x00000001 -#endif - -/* * Ethernet setup */ #ifdef CONFIG_TSEC1 diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index ef26a144a9..33c8bd4149 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -35,8 +35,7 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" + "bootm_size=0x10000000\0" /* SPL support */ #define CONFIG_SPL_TEXT_BASE 0xe6300000 diff --git a/include/configs/lager.h b/include/configs/lager.h index 08498c6d81..89c5d01d3c 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -36,8 +36,7 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" + "bootm_size=0x10000000\0" /* SPL support */ #define CONFIG_SPL_TEXT_BASE 0xe6300000 diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 7d84d160b4..4765764f83 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -43,7 +43,6 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_HARD_SPI #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 9e59e7a4dc..4bb3621a42 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -143,7 +143,6 @@ /* SPI */ #ifdef CONFIG_CMD_SPI -#define CONFIG_HARD_SPI #define CONFIG_SPI_HALF_DUPLEX #endif diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 9465fb4702..459ecf328f 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -576,11 +576,6 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 -/* - * eSPI - Enhanced SPI - */ -#define CONFIG_HARD_SPI - #if defined(CONFIG_SPI_FLASH) #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0 diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index d018c22afd..4f48370648 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -214,11 +214,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 -/* - * eSPI - Enhanced SPI - */ -#define CONFIG_HARD_SPI - #if defined(CONFIG_PCI) /* * General PCI diff --git a/include/configs/pdu001.h b/include/configs/pdu001.h index 7b809e2329..e4c2872fe9 100644 --- a/include/configs/pdu001.h +++ b/include/configs/pdu001.h @@ -12,12 +12,6 @@ #include <configs/ti_am335x_common.h> -/* No more need for I2C legacy compatibility for this board. - * CONFIG_DM_I2C_COMPAT is defined in ti_armv7_common.h. See the comment there - * for the right moment to delete the following line. - */ -#undef CONFIG_DM_I2C_COMPAT - /* Using 32K of volatile storage for environment */ #define CONFIG_ENV_SIZE 0x4000 diff --git a/include/configs/porter.h b/include/configs/porter.h index e56dc3f1ec..9950f80afd 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -40,8 +40,7 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" + "bootm_size=0x10000000\0" /* SPL support */ #define CONFIG_SPL_TEXT_BASE 0xe6300000 diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 435d108628..6c2fa6a63c 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -59,8 +59,7 @@ #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffffffffffff\0" \ - "initrd_high=0xffffffffffffffff\0" + "bootm_size=0x10000000\0" #define CONFIG_BOOTCOMMAND \ "tftp 0x48080000 Image; " \ diff --git a/include/configs/rock960_rk3399.h b/include/configs/rock960_rk3399.h new file mode 100644 index 0000000000..746d24cbff --- /dev/null +++ b/include/configs/rock960_rk3399.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + */ + +#ifndef __ROCK960_RK3399_H +#define __ROCK960_RK3399_H + +#include <configs/rk3399_common.h> + +#define CONFIG_SYS_MMC_ENV_DEV 1 + +#define SDRAM_BANK_SIZE (2UL << 30) + +#endif diff --git a/include/configs/silk.h b/include/configs/silk.h index a94928bd16..112806c342 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -40,8 +40,7 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" + "bootm_size=0x10000000\0" /* SPL support */ #define CONFIG_SPL_TEXT_BASE 0xe6300000 diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index c408db865e..33ddc67bf4 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -66,7 +66,6 @@ #define CONFIG_CF_DSPI #define CONFIG_SF_DEFAULT_SPEED 50000000 #define CONFIG_SERIAL_FLASH -#define CONFIG_HARD_SPI #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 1 diff --git a/include/configs/stout.h b/include/configs/stout.h index b72b565c33..93d980569c 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -44,8 +44,7 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" + "bootm_size=0x10000000\0" /* SPL support */ #define CONFIG_SPL_TEXT_BASE 0xe6300000 diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 0f892e51d1..1e2a62dd6f 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -74,24 +74,10 @@ /* Timer information. */ #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ -/* - * Disable DM_* for SPL build and can be re-enabled after adding - * DM support in SPL - */ -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_DM_I2C -#endif - -/* I2C IP block */ +/* If DM_I2C, enable non-DM I2C support */ +#if !defined(CONFIG_DM_I2C) #define CONFIG_I2C -#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#else -/* - * Enable CONFIG_DM_I2C_COMPAT temporarily until all the i2c client - * devices are adopted to DM - */ -#define CONFIG_DM_I2C_COMPAT #endif /* diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h index 956f7795f1..4e274bd414 100644 --- a/include/configs/ts4800.h +++ b/include/configs/ts4800.h @@ -43,11 +43,6 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* - * SPI Configs - * */ -#define CONFIG_HARD_SPI /* puts SPI: ready */ - -/* * MMC Configs * */ #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR diff --git a/include/crc.h b/include/crc.h deleted file mode 100644 index 2a00af5be4..0000000000 --- a/include/crc.h +++ /dev/null @@ -1,43 +0,0 @@ -/* SPDX-License-Identifier: eCos-2.0 */ -/* - *========================================================================== - * - * crc.h - * - * Interface for the CRC algorithms. - * - *========================================================================== - *========================================================================== - *#####DESCRIPTIONBEGIN#### - * - * Author(s): Andrew Lunn - * Contributors: Andrew Lunn - * Date: 2002-08-06 - * Purpose: - * Description: - * - * This code is part of eCos (tm). - * - *####DESCRIPTIONEND#### - * - *========================================================================== - */ - -#ifndef _SERVICES_CRC_CRC_H_ -#define _SERVICES_CRC_CRC_H_ - -#include <linux/types.h> - -#ifndef __externC -# ifdef __cplusplus -# define __externC extern "C" -# else -# define __externC extern -# endif -#endif - -/* 16 bit CRC with polynomial x^16+x^12+x^5+1 (CRC-CCITT) */ - -uint16_t crc16_ccitt(uint16_t crc_start, unsigned char *s, int len); - -#endif /* _SERVICES_CRC_CRC_H_ */ diff --git a/include/dm/fdtaddr.h b/include/dm/fdtaddr.h index 49a6ffd5f8..c171d9bc2f 100644 --- a/include/dm/fdtaddr.h +++ b/include/dm/fdtaddr.h @@ -56,6 +56,19 @@ void *devfdt_remap_addr(struct udevice *dev); void *devfdt_remap_addr_index(struct udevice *dev, int index); /** + * devfdt_remap_addr_name() - Get the reg property of a device, indexed by + * name, as a memory-mapped I/O pointer + * @name: the 'reg' property can hold a list of <addr, size> pairs, with the + * 'reg-names' property providing named-based identification. @index + * indicates the value to search for in 'reg-names'. + * + * @dev: Pointer to a device + * + * @return Pointer to addr, or NULL if there is no such property + */ +void *devfdt_remap_addr_name(struct udevice *dev, const char *name); + +/** * devfdt_map_physmem() - Read device address from reg property of the * device node and map the address into CPU address * space. diff --git a/include/dm/platform_data/pl022_spi.h b/include/dm/platform_data/spi_pl022.h index 77fe6da3cb..63a58ee453 100644 --- a/include/dm/platform_data/pl022_spi.h +++ b/include/dm/platform_data/spi_pl022.h @@ -7,22 +7,15 @@ * in ofdata_to_platdata. */ -#ifndef __PL022_SPI_H__ -#define __PL022_SPI_H__ +#ifndef __spi_pl022_h +#define __spi_pl022_h -#if !CONFIG_IS_ENABLED(OF_PLATDATA) -#include <clk.h> -#endif #include <fdtdec.h> struct pl022_spi_pdata { fdt_addr_t addr; fdt_size_t size; -#if !CONFIG_IS_ENABLED(OF_PLATDATA) - struct clk clk; -#else unsigned int freq; -#endif }; -#endif +#endif /* __spi_pl022_h */ diff --git a/include/dm/read.h b/include/dm/read.h index a27b8554fb..efcbee15ec 100644 --- a/include/dm/read.h +++ b/include/dm/read.h @@ -125,6 +125,31 @@ fdt_addr_t dev_read_addr_index(struct udevice *dev, int index); void *dev_remap_addr_index(struct udevice *dev, int index); /** + * dev_read_addr_name() - Get the reg property of a device, indexed by name + * + * @dev: Device to read from + * @name: the 'reg' property can hold a list of <addr, size> pairs, with the + * 'reg-names' property providing named-based identification. @index + * indicates the value to search for in 'reg-names'. + * + * @return address or FDT_ADDR_T_NONE if not found + */ +fdt_addr_t dev_read_addr_name(struct udevice *dev, const char* name); + +/** + * dev_remap_addr_name() - Get the reg property of a device, indexed by name, + * as a memory-mapped I/O pointer + * + * @dev: Device to read from + * @name: the 'reg' property can hold a list of <addr, size> pairs, with the + * 'reg-names' property providing named-based identification. @index + * indicates the value to search for in 'reg-names'. + * + * @return pointer or NULL if not found + */ +void *dev_remap_addr_name(struct udevice *dev, const char* name); + +/** * dev_read_addr() - Get the reg property of a device * * @dev: Device to read from @@ -494,6 +519,12 @@ static inline fdt_addr_t dev_read_addr_index(struct udevice *dev, int index) return devfdt_get_addr_index(dev, index); } +static inline fdt_addr_t dev_read_addr_name(struct udevice *dev, + const char *name) +{ + return devfdt_get_addr_name(dev, name); +} + static inline fdt_addr_t dev_read_addr(struct udevice *dev) { return devfdt_get_addr(dev); @@ -514,6 +545,11 @@ static inline void *dev_remap_addr_index(struct udevice *dev, int index) return devfdt_remap_addr_index(dev, index); } +static inline void *dev_remap_addr_name(struct udevice *dev, const char *name) +{ + return devfdt_remap_addr_name(dev, name); +} + static inline fdt_addr_t dev_read_addr_size(struct udevice *dev, const char *propname, fdt_size_t *sizep) diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index a5fcb69dba..e960e48b85 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -29,8 +29,10 @@ enum uclass_id { /* U-Boot uclasses start here - in alphabetical order */ UCLASS_ADC, /* Analog-to-digital converter */ UCLASS_AHCI, /* SATA disk controller */ + UCLASS_AXI, /* AXI bus */ UCLASS_BLK, /* Block device */ UCLASS_BOARD, /* Device information from hardware */ + UCLASS_BOOTCOUNT, /* Bootcount backing store */ UCLASS_CLK, /* Clock source, e.g. used by peripherals */ UCLASS_CPU, /* CPU, typically part of an SoC */ UCLASS_CROS_EC, /* Chrome OS EC */ @@ -38,15 +40,15 @@ enum uclass_id { UCLASS_DMA, /* Direct Memory Access */ UCLASS_EFI, /* EFI managed devices */ UCLASS_ETH, /* Ethernet device */ + UCLASS_FIRMWARE, /* Firmware */ UCLASS_FS_FIRMWARE_LOADER, /* Generic loader */ UCLASS_GPIO, /* Bank of general-purpose I/O pins */ - UCLASS_FIRMWARE, /* Firmware */ + UCLASS_HWSPINLOCK, /* Hardware semaphores */ UCLASS_I2C, /* I2C bus */ UCLASS_I2C_EEPROM, /* I2C EEPROM device */ UCLASS_I2C_GENERIC, /* Generic I2C device */ UCLASS_I2C_MUX, /* I2C multiplexer */ UCLASS_IDE, /* IDE device */ - UCLASS_AXI, /* AXI bus */ UCLASS_IRQ, /* Interrupt controller */ UCLASS_KEYBOARD, /* Keyboard input device */ UCLASS_LED, /* Light-emitting diode (LED) */ @@ -68,8 +70,8 @@ enum uclass_id { UCLASS_PINCONFIG, /* Pin configuration node device */ UCLASS_PINCTRL, /* Pinctrl (pin muxing/configuration) device */ UCLASS_PMIC, /* PMIC I/O device */ - UCLASS_PWM, /* Pulse-width modulator */ UCLASS_POWER_DOMAIN, /* (SoC) Power domains */ + UCLASS_PWM, /* Pulse-width modulator */ UCLASS_PWRSEQ, /* Power sequence device */ UCLASS_RAM, /* RAM controller */ UCLASS_REGULATOR, /* Regulator device */ @@ -81,9 +83,9 @@ enum uclass_id { UCLASS_SIMPLE_BUS, /* Bus with child devices */ UCLASS_SMEM, /* Shared memory interface */ UCLASS_SPI, /* SPI bus */ - UCLASS_SPMI, /* System Power Management Interface bus */ UCLASS_SPI_FLASH, /* SPI flash */ UCLASS_SPI_GENERIC, /* Generic SPI flash target */ + UCLASS_SPMI, /* System Power Management Interface bus */ UCLASS_SYSCON, /* System configuration device */ UCLASS_SYSRESET, /* System reset device */ UCLASS_TEE, /* Trusted Execution Environment device */ @@ -93,6 +95,7 @@ enum uclass_id { UCLASS_USB, /* USB bus */ UCLASS_USB_DEV_GENERIC, /* USB generic device */ UCLASS_USB_HUB, /* USB hub */ + UCLASS_USB_GADGET_GENERIC, /* USB generic device */ UCLASS_VIDEO, /* Video or LCD device */ UCLASS_VIDEO_BRIDGE, /* Video bridge, e.g. DisplayPort to LVDS */ UCLASS_VIDEO_CONSOLE, /* Text console driver for video device */ diff --git a/include/dm/uclass-internal.h b/include/dm/uclass-internal.h index 8a4839ee88..6977995246 100644 --- a/include/dm/uclass-internal.h +++ b/include/dm/uclass-internal.h @@ -12,6 +12,19 @@ #include <dm/ofnode.h> /** + * uclass_find_next_free_req_seq() - Get the next free req_seq number + * + * This returns the next free req_seq number. This is useful only if + * OF_CONTROL is not used. The next free req_seq number is simply the + * maximum req_seq of the uclass + 1. + * This allows assiging req_seq number in the binding order. + * + * @id: Id number of the uclass + * @return The next free req_seq number + */ +int uclass_find_next_free_req_seq(enum uclass_id id); + +/** * uclass_get_device_tail() - handle the end of a get_device call * * This handles returning an error or probing a device as needed. diff --git a/include/dma-uclass.h b/include/dma-uclass.h new file mode 100644 index 0000000000..31b43fb4b9 --- /dev/null +++ b/include/dma-uclass.h @@ -0,0 +1,128 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> + * Copyright (C) 2015 - 2018 Texas Instruments Incorporated <www.ti.com> + * Written by Mugunthan V N <mugunthanvnm@ti.com> + * + */ + +#ifndef _DMA_UCLASS_H +#define _DMA_UCLASS_H + +/* See dma.h for background documentation. */ + +#include <dma.h> + +struct ofnode_phandle_args; + +/* + * struct dma_ops - Driver model DMA operations + * + * The uclass interface is implemented by all DMA devices which use + * driver model. + */ +struct dma_ops { +#ifdef CONFIG_DMA_CHANNELS + /** + * of_xlate - Translate a client's device-tree (OF) DMA specifier. + * + * The DMA core calls this function as the first step in implementing + * a client's dma_get_by_*() call. + * + * If this function pointer is set to NULL, the DMA core will use a + * default implementation, which assumes #dma-cells = <1>, and that + * the DT cell contains a simple integer DMA Channel. + * + * At present, the DMA API solely supports device-tree. If this + * changes, other xxx_xlate() functions may be added to support those + * other mechanisms. + * + * @dma: The dma struct to hold the translation result. + * @args: The dma specifier values from device tree. + * @return 0 if OK, or a negative error code. + */ + int (*of_xlate)(struct dma *dma, + struct ofnode_phandle_args *args); + /** + * request - Request a translated DMA. + * + * The DMA core calls this function as the second step in + * implementing a client's dma_get_by_*() call, following a successful + * xxx_xlate() call, or as the only step in implementing a client's + * dma_request() call. + * + * @dma: The DMA struct to request; this has been filled in by + * a previoux xxx_xlate() function call, or by the caller of + * dma_request(). + * @return 0 if OK, or a negative error code. + */ + int (*request)(struct dma *dma); + /** + * free - Free a previously requested dma. + * + * This is the implementation of the client dma_free() API. + * + * @dma: The DMA to free. + * @return 0 if OK, or a negative error code. + */ + int (*free)(struct dma *dma); + /** + * enable() - Enable a DMA Channel. + * + * @dma: The DMA Channel to manipulate. + * @return zero on success, or -ve error code. + */ + int (*enable)(struct dma *dma); + /** + * disable() - Disable a DMA Channel. + * + * @dma: The DMA Channel to manipulate. + * @return zero on success, or -ve error code. + */ + int (*disable)(struct dma *dma); + /** + * prepare_rcv_buf() - Prepare/Add receive DMA buffer. + * + * @dma: The DMA Channel to manipulate. + * @dst: The receive buffer pointer. + * @size: The receive buffer size + * @return zero on success, or -ve error code. + */ + int (*prepare_rcv_buf)(struct dma *dma, void *dst, size_t size); + /** + * receive() - Receive a DMA transfer. + * + * @dma: The DMA Channel to manipulate. + * @dst: The destination pointer. + * @metadata: DMA driver's specific data + * @return zero on success, or -ve error code. + */ + int (*receive)(struct dma *dma, void **dst, void *metadata); + /** + * send() - Send a DMA transfer. + * + * @dma: The DMA Channel to manipulate. + * @src: The source pointer. + * @len: Length of the data to be sent (number of bytes). + * @metadata: DMA driver's specific data + * @return zero on success, or -ve error code. + */ + int (*send)(struct dma *dma, void *src, size_t len, void *metadata); +#endif /* CONFIG_DMA_CHANNELS */ + /** + * transfer() - Issue a DMA transfer. The implementation must + * wait until the transfer is done. + * + * @dev: The DMA device + * @direction: direction of data transfer (should be one from + * enum dma_direction) + * @dst: The destination pointer. + * @src: The source pointer. + * @len: Length of the data to be copied (number of bytes). + * @return zero on success, or -ve error code. + */ + int (*transfer)(struct udevice *dev, int direction, void *dst, + void *src, size_t len); +}; + +#endif /* _DMA_UCLASS_H */ diff --git a/include/dma.h b/include/dma.h index 50e965241c..d1c3d0df7d 100644 --- a/include/dma.h +++ b/include/dma.h @@ -1,12 +1,17 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * (C) Copyright 2015 - * Texas Instruments Incorporated, <www.ti.com> + * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> + * Copyright (C) 2015 - 2018 Texas Instruments Incorporated <www.ti.com> + * Written by Mugunthan V N <mugunthanvnm@ti.com> + * */ #ifndef _DMA_H_ #define _DMA_H_ +#include <linux/errno.h> +#include <linux/types.h> + /* * enum dma_direction - dma transfer direction indicator * @DMA_MEM_TO_MEM: Memcpy mode @@ -27,28 +32,6 @@ enum dma_direction { #define DMA_SUPPORTS_DEV_TO_DEV BIT(3) /* - * struct dma_ops - Driver model DMA operations - * - * The uclass interface is implemented by all DMA devices which use - * driver model. - */ -struct dma_ops { - /* - * Get the current timer count - * - * @dev: The DMA device - * @direction: direction of data transfer should be one from - enum dma_direction - * @dst: Destination pointer - * @src: Source pointer - * @len: Length of the data to be copied. - * @return: 0 if OK, -ve on error - */ - int (*transfer)(struct udevice *dev, int direction, void *dst, - void *src, size_t len); -}; - -/* * struct dma_dev_priv - information about a device used by the uclass * * @supported: mode of transfers that DMA can support, should be @@ -58,6 +41,257 @@ struct dma_dev_priv { u32 supported; }; +#ifdef CONFIG_DMA_CHANNELS +/** + * A DMA is a feature of computer systems that allows certain hardware + * subsystems to access main system memory, independent of the CPU. + * DMA channels are typically generated externally to the HW module + * consuming them, by an entity this API calls a DMA provider. This API + * provides a standard means for drivers to enable and disable DMAs, and to + * copy, send and receive data using DMA. + * + * A driver that implements UCLASS_DMA is a DMA provider. A provider will + * often implement multiple separate DMAs, since the hardware it manages + * often has this capability. dma_uclass.h describes the interface which + * DMA providers must implement. + * + * DMA consumers/clients are the HW modules driven by the DMA channels. This + * header file describes the API used by drivers for those HW modules. + * + * DMA consumer DMA_MEM_TO_DEV (transmit) usage example (based on networking). + * Note. dma_send() is sync operation always - it'll start transfer and will + * poll for it to complete: + * - get/request dma channel + * struct dma dma_tx; + * ret = dma_get_by_name(common->dev, "tx0", &dma_tx); + * if (ret) ... + * + * - enable dma channel + * ret = dma_enable(&dma_tx); + * if (ret) ... + * + * - dma transmit DMA_MEM_TO_DEV. + * struct ti_drv_packet_data packet_data; + * + * packet_data.opt1 = val1; + * packet_data.opt2 = val2; + * ret = dma_send(&dma_tx, packet, length, &packet_data); + * if (ret) .. + * + * DMA consumer DMA_DEV_TO_MEM (receive) usage example (based on networking). + * Note. dma_receive() is sync operation always - it'll start transfer + * (if required) and will poll for it to complete (or for any previously + * configured dev2mem transfer to complete): + * - get/request dma channel + * struct dma dma_rx; + * ret = dma_get_by_name(common->dev, "rx0", &dma_rx); + * if (ret) ... + * + * - enable dma channel + * ret = dma_enable(&dma_rx); + * if (ret) ... + * + * - dma receive DMA_DEV_TO_MEM. + * struct ti_drv_packet_data packet_data; + * + * len = dma_receive(&dma_rx, (void **)packet, &packet_data); + * if (ret < 0) ... + * + * DMA consumer DMA_DEV_TO_MEM (receive) zero-copy usage example (based on + * networking). Networking subsystem allows to configure and use few receive + * buffers (dev2mem), as Networking RX DMA channels usually implemented + * as streaming interface + * - get/request dma channel + * struct dma dma_rx; + * ret = dma_get_by_name(common->dev, "rx0", &dma_rx); + * if (ret) ... + * + * for (i = 0; i < RX_DESC_NUM; i++) { + * ret = dma_prepare_rcv_buf(&dma_rx, + * net_rx_packets[i], + * RX_BUF_SIZE); + * if (ret) ... + * } + * + * - enable dma channel + * ret = dma_enable(&dma_rx); + * if (ret) ... + * + * - dma receive DMA_DEV_TO_MEM. + * struct ti_drv_packet_data packet_data; + * + * len = dma_receive(&dma_rx, (void **)packet, &packet_data); + * if (ret < 0) .. + * + * -- process packet -- + * + * - return buffer back to DAM channel + * ret = dma_prepare_rcv_buf(&dma_rx, + * net_rx_packets[rx_next], + * RX_BUF_SIZE); + */ + +struct udevice; + +/** + * struct dma - A handle to (allowing control of) a single DMA. + * + * Clients provide storage for DMA handles. The content of the structure is + * managed solely by the DMA API and DMA drivers. A DMA struct is + * initialized by "get"ing the DMA struct. The DMA struct is passed to all + * other DMA APIs to identify which DMA channel to operate upon. + * + * @dev: The device which implements the DMA channel. + * @id: The DMA channel ID within the provider. + * + * Currently, the DMA API assumes that a single integer ID is enough to + * identify and configure any DMA channel for any DMA provider. If this + * assumption becomes invalid in the future, the struct could be expanded to + * either (a) add more fields to allow DMA providers to store additional + * information, or (b) replace the id field with an opaque pointer, which the + * provider would dynamically allocated during its .of_xlate op, and process + * during is .request op. This may require the addition of an extra op to clean + * up the allocation. + */ +struct dma { + struct udevice *dev; + /* + * Written by of_xlate. We assume a single id is enough for now. In the + * future, we might add more fields here. + */ + unsigned long id; +}; + +# if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(DMA) +/** + * dma_get_by_index - Get/request a DMA by integer index. + * + * This looks up and requests a DMA. The index is relative to the client + * device; each device is assumed to have n DMAs associated with it somehow, + * and this function finds and requests one of them. The mapping of client + * device DMA indices to provider DMAs may be via device-tree properties, + * board-provided mapping tables, or some other mechanism. + * + * @dev: The client device. + * @index: The index of the DMA to request, within the client's list of + * DMA channels. + * @dma: A pointer to a DMA struct to initialize. + * @return 0 if OK, or a negative error code. + */ +int dma_get_by_index(struct udevice *dev, int index, struct dma *dma); + +/** + * dma_get_by_name - Get/request a DMA by name. + * + * This looks up and requests a DMA. The name is relative to the client + * device; each device is assumed to have n DMAs associated with it somehow, + * and this function finds and requests one of them. The mapping of client + * device DMA names to provider DMAs may be via device-tree properties, + * board-provided mapping tables, or some other mechanism. + * + * @dev: The client device. + * @name: The name of the DMA to request, within the client's list of + * DMA channels. + * @dma: A pointer to a DMA struct to initialize. + * @return 0 if OK, or a negative error code. + */ +int dma_get_by_name(struct udevice *dev, const char *name, struct dma *dma); +# else +static inline int dma_get_by_index(struct udevice *dev, int index, + struct dma *dma) +{ + return -ENOSYS; +} + +static inline int dma_get_by_name(struct udevice *dev, const char *name, + struct dma *dma) +{ + return -ENOSYS; +} +# endif + +/** + * dma_request - Request a DMA by provider-specific ID. + * + * This requests a DMA using a provider-specific ID. Generally, this function + * should not be used, since dma_get_by_index/name() provide an interface that + * better separates clients from intimate knowledge of DMA providers. + * However, this function may be useful in core SoC-specific code. + * + * @dev: The DMA provider device. + * @dma: A pointer to a DMA struct to initialize. The caller must + * have already initialized any field in this struct which the + * DMA provider uses to identify the DMA channel. + * @return 0 if OK, or a negative error code. + */ +int dma_request(struct udevice *dev, struct dma *dma); + +/** + * dma_free - Free a previously requested DMA. + * + * @dma: A DMA struct that was previously successfully requested by + * dma_request/get_by_*(). + * @return 0 if OK, or a negative error code. + */ +int dma_free(struct dma *dma); + +/** + * dma_enable() - Enable (turn on) a DMA channel. + * + * @dma: A DMA struct that was previously successfully requested by + * dma_request/get_by_*(). + * @return zero on success, or -ve error code. + */ +int dma_enable(struct dma *dma); + +/** + * dma_disable() - Disable (turn off) a DMA channel. + * + * @dma: A DMA struct that was previously successfully requested by + * dma_request/get_by_*(). + * @return zero on success, or -ve error code. + */ +int dma_disable(struct dma *dma); + +/** + * dma_prepare_rcv_buf() - Prepare/add receive DMA buffer. + * + * It allows to implement zero-copy async DMA_DEV_TO_MEM (receive) transactions + * if supported by DMA providers. + * + * @dma: A DMA struct that was previously successfully requested by + * dma_request/get_by_*(). + * @dst: The receive buffer pointer. + * @size: The receive buffer size + * @return zero on success, or -ve error code. + */ +int dma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size); + +/** + * dma_receive() - Receive a DMA transfer. + * + * @dma: A DMA struct that was previously successfully requested by + * dma_request/get_by_*(). + * @dst: The destination pointer. + * @metadata: DMA driver's channel specific data + * @return length of received data on success, or zero - no data, + * or -ve error code. + */ +int dma_receive(struct dma *dma, void **dst, void *metadata); + +/** + * dma_send() - Send a DMA transfer. + * + * @dma: A DMA struct that was previously successfully requested by + * dma_request/get_by_*(). + * @src: The source pointer. + * @len: Length of the data to be sent (number of bytes). + * @metadata: DMA driver's channel specific data + * @return zero on success, or -ve error code. + */ +int dma_send(struct dma *dma, void *src, size_t len, void *metadata); +#endif /* CONFIG_DMA_CHANNELS */ + /* * dma_get_device - get a DMA device which supports transfer * type of transfer_type diff --git a/include/dt-bindings/clock/am3.h b/include/dt-bindings/clock/am3.h new file mode 100644 index 0000000000..86a8806e21 --- /dev/null +++ b/include/dt-bindings/clock/am3.h @@ -0,0 +1,227 @@ +/* + * Copyright 2017 Texas Instruments, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __DT_BINDINGS_CLK_AM3_H +#define __DT_BINDINGS_CLK_AM3_H + +#define AM3_CLKCTRL_OFFSET 0x0 +#define AM3_CLKCTRL_INDEX(offset) ((offset) - AM3_CLKCTRL_OFFSET) + +/* XXX: Compatibility part begin, remove this once compatibility support is no longer needed */ + +/* l4_per clocks */ +#define AM3_L4_PER_CLKCTRL_OFFSET 0x14 +#define AM3_L4_PER_CLKCTRL_INDEX(offset) ((offset) - AM3_L4_PER_CLKCTRL_OFFSET) +#define AM3_CPGMAC0_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x14) +#define AM3_LCDC_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x18) +#define AM3_USB_OTG_HS_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x1c) +#define AM3_TPTC0_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x24) +#define AM3_EMIF_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x28) +#define AM3_OCMCRAM_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x2c) +#define AM3_GPMC_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x30) +#define AM3_MCASP0_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x34) +#define AM3_UART6_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x38) +#define AM3_MMC1_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x3c) +#define AM3_ELM_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x40) +#define AM3_I2C3_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x44) +#define AM3_I2C2_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x48) +#define AM3_SPI0_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x4c) +#define AM3_SPI1_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x50) +#define AM3_L4_LS_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x60) +#define AM3_MCASP1_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x68) +#define AM3_UART2_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x6c) +#define AM3_UART3_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x70) +#define AM3_UART4_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x74) +#define AM3_UART5_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x78) +#define AM3_TIMER7_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x7c) +#define AM3_TIMER2_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x80) +#define AM3_TIMER3_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x84) +#define AM3_TIMER4_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x88) +#define AM3_RNG_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x90) +#define AM3_AES_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x94) +#define AM3_SHAM_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xa0) +#define AM3_GPIO2_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xac) +#define AM3_GPIO3_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xb0) +#define AM3_GPIO4_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xb4) +#define AM3_TPCC_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xbc) +#define AM3_D_CAN0_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xc0) +#define AM3_D_CAN1_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xc4) +#define AM3_EPWMSS1_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xcc) +#define AM3_EPWMSS0_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xd4) +#define AM3_EPWMSS2_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xd8) +#define AM3_L3_INSTR_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xdc) +#define AM3_L3_MAIN_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xe0) +#define AM3_PRUSS_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xe8) +#define AM3_TIMER5_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xec) +#define AM3_TIMER6_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xf0) +#define AM3_MMC2_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xf4) +#define AM3_MMC3_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xf8) +#define AM3_TPTC1_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0xfc) +#define AM3_TPTC2_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x100) +#define AM3_SPINLOCK_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x10c) +#define AM3_MAILBOX_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x110) +#define AM3_L4_HS_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x120) +#define AM3_OCPWP_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x130) +#define AM3_CLKDIV32K_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x14c) + +/* l4_wkup clocks */ +#define AM3_L4_WKUP_CLKCTRL_OFFSET 0x4 +#define AM3_L4_WKUP_CLKCTRL_INDEX(offset) ((offset) - AM3_L4_WKUP_CLKCTRL_OFFSET) +#define AM3_CONTROL_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0x4) +#define AM3_GPIO1_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0x8) +#define AM3_L4_WKUP_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xc) +#define AM3_DEBUGSS_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0x14) +#define AM3_WKUP_M3_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xb0) +#define AM3_UART1_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xb4) +#define AM3_I2C1_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xb8) +#define AM3_ADC_TSC_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xbc) +#define AM3_SMARTREFLEX0_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xc0) +#define AM3_TIMER1_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xc4) +#define AM3_SMARTREFLEX1_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xc8) +#define AM3_WD_TIMER2_CLKCTRL AM3_L4_WKUP_CLKCTRL_INDEX(0xd4) + +/* mpu clocks */ +#define AM3_MPU_CLKCTRL_OFFSET 0x4 +#define AM3_MPU_CLKCTRL_INDEX(offset) ((offset) - AM3_MPU_CLKCTRL_OFFSET) +#define AM3_MPU_CLKCTRL AM3_MPU_CLKCTRL_INDEX(0x4) + +/* l4_rtc clocks */ +#define AM3_RTC_CLKCTRL AM3_CLKCTRL_INDEX(0x0) + +/* gfx_l3 clocks */ +#define AM3_GFX_L3_CLKCTRL_OFFSET 0x4 +#define AM3_GFX_L3_CLKCTRL_INDEX(offset) ((offset) - AM3_GFX_L3_CLKCTRL_OFFSET) +#define AM3_GFX_CLKCTRL AM3_GFX_L3_CLKCTRL_INDEX(0x4) + +/* l4_cefuse clocks */ +#define AM3_L4_CEFUSE_CLKCTRL_OFFSET 0x20 +#define AM3_L4_CEFUSE_CLKCTRL_INDEX(offset) ((offset) - AM3_L4_CEFUSE_CLKCTRL_OFFSET) +#define AM3_CEFUSE_CLKCTRL AM3_L4_CEFUSE_CLKCTRL_INDEX(0x20) + +/* XXX: Compatibility part end */ + +/* l4ls clocks */ +#define AM3_L4LS_CLKCTRL_OFFSET 0x38 +#define AM3_L4LS_CLKCTRL_INDEX(offset) ((offset) - AM3_L4LS_CLKCTRL_OFFSET) +#define AM3_L4LS_UART6_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x38) +#define AM3_L4LS_MMC1_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x3c) +#define AM3_L4LS_ELM_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x40) +#define AM3_L4LS_I2C3_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x44) +#define AM3_L4LS_I2C2_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x48) +#define AM3_L4LS_SPI0_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x4c) +#define AM3_L4LS_SPI1_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x50) +#define AM3_L4LS_L4_LS_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x60) +#define AM3_L4LS_UART2_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x6c) +#define AM3_L4LS_UART3_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x70) +#define AM3_L4LS_UART4_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x74) +#define AM3_L4LS_UART5_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x78) +#define AM3_L4LS_TIMER7_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x7c) +#define AM3_L4LS_TIMER2_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x80) +#define AM3_L4LS_TIMER3_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x84) +#define AM3_L4LS_TIMER4_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x88) +#define AM3_L4LS_RNG_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x90) +#define AM3_L4LS_GPIO2_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0xac) +#define AM3_L4LS_GPIO3_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0xb0) +#define AM3_L4LS_GPIO4_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0xb4) +#define AM3_L4LS_D_CAN0_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0xc0) +#define AM3_L4LS_D_CAN1_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0xc4) +#define AM3_L4LS_EPWMSS1_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0xcc) +#define AM3_L4LS_EPWMSS0_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0xd4) +#define AM3_L4LS_EPWMSS2_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0xd8) +#define AM3_L4LS_TIMER5_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0xec) +#define AM3_L4LS_TIMER6_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0xf0) +#define AM3_L4LS_MMC2_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0xf4) +#define AM3_L4LS_SPINLOCK_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x10c) +#define AM3_L4LS_MAILBOX_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x110) +#define AM3_L4LS_OCPWP_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x130) + +/* l3s clocks */ +#define AM3_L3S_CLKCTRL_OFFSET 0x1c +#define AM3_L3S_CLKCTRL_INDEX(offset) ((offset) - AM3_L3S_CLKCTRL_OFFSET) +#define AM3_L3S_USB_OTG_HS_CLKCTRL AM3_L3S_CLKCTRL_INDEX(0x1c) +#define AM3_L3S_GPMC_CLKCTRL AM3_L3S_CLKCTRL_INDEX(0x30) +#define AM3_L3S_MCASP0_CLKCTRL AM3_L3S_CLKCTRL_INDEX(0x34) +#define AM3_L3S_MCASP1_CLKCTRL AM3_L3S_CLKCTRL_INDEX(0x68) +#define AM3_L3S_MMC3_CLKCTRL AM3_L3S_CLKCTRL_INDEX(0xf8) + +/* l3 clocks */ +#define AM3_L3_CLKCTRL_OFFSET 0x24 +#define AM3_L3_CLKCTRL_INDEX(offset) ((offset) - AM3_L3_CLKCTRL_OFFSET) +#define AM3_L3_TPTC0_CLKCTRL AM3_L3_CLKCTRL_INDEX(0x24) +#define AM3_L3_EMIF_CLKCTRL AM3_L3_CLKCTRL_INDEX(0x28) +#define AM3_L3_OCMCRAM_CLKCTRL AM3_L3_CLKCTRL_INDEX(0x2c) +#define AM3_L3_AES_CLKCTRL AM3_L3_CLKCTRL_INDEX(0x94) +#define AM3_L3_SHAM_CLKCTRL AM3_L3_CLKCTRL_INDEX(0xa0) +#define AM3_L3_TPCC_CLKCTRL AM3_L3_CLKCTRL_INDEX(0xbc) +#define AM3_L3_L3_INSTR_CLKCTRL AM3_L3_CLKCTRL_INDEX(0xdc) +#define AM3_L3_L3_MAIN_CLKCTRL AM3_L3_CLKCTRL_INDEX(0xe0) +#define AM3_L3_TPTC1_CLKCTRL AM3_L3_CLKCTRL_INDEX(0xfc) +#define AM3_L3_TPTC2_CLKCTRL AM3_L3_CLKCTRL_INDEX(0x100) + +/* l4hs clocks */ +#define AM3_L4HS_CLKCTRL_OFFSET 0x120 +#define AM3_L4HS_CLKCTRL_INDEX(offset) ((offset) - AM3_L4HS_CLKCTRL_OFFSET) +#define AM3_L4HS_L4_HS_CLKCTRL AM3_L4HS_CLKCTRL_INDEX(0x120) + +/* pruss_ocp clocks */ +#define AM3_PRUSS_OCP_CLKCTRL_OFFSET 0xe8 +#define AM3_PRUSS_OCP_CLKCTRL_INDEX(offset) ((offset) - AM3_PRUSS_OCP_CLKCTRL_OFFSET) +#define AM3_PRUSS_OCP_PRUSS_CLKCTRL AM3_PRUSS_OCP_CLKCTRL_INDEX(0xe8) + +/* cpsw_125mhz clocks */ +#define AM3_CPSW_125MHZ_CPGMAC0_CLKCTRL AM3_CLKCTRL_INDEX(0x14) + +/* lcdc clocks */ +#define AM3_LCDC_CLKCTRL_OFFSET 0x18 +#define AM3_LCDC_CLKCTRL_INDEX(offset) ((offset) - AM3_LCDC_CLKCTRL_OFFSET) +#define AM3_LCDC_LCDC_CLKCTRL AM3_LCDC_CLKCTRL_INDEX(0x18) + +/* clk_24mhz clocks */ +#define AM3_CLK_24MHZ_CLKCTRL_OFFSET 0x14c +#define AM3_CLK_24MHZ_CLKCTRL_INDEX(offset) ((offset) - AM3_CLK_24MHZ_CLKCTRL_OFFSET) +#define AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL AM3_CLK_24MHZ_CLKCTRL_INDEX(0x14c) + +/* l4_wkup clocks */ +#define AM3_L4_WKUP_CONTROL_CLKCTRL AM3_CLKCTRL_INDEX(0x4) +#define AM3_L4_WKUP_GPIO1_CLKCTRL AM3_CLKCTRL_INDEX(0x8) +#define AM3_L4_WKUP_L4_WKUP_CLKCTRL AM3_CLKCTRL_INDEX(0xc) +#define AM3_L4_WKUP_UART1_CLKCTRL AM3_CLKCTRL_INDEX(0xb4) +#define AM3_L4_WKUP_I2C1_CLKCTRL AM3_CLKCTRL_INDEX(0xb8) +#define AM3_L4_WKUP_ADC_TSC_CLKCTRL AM3_CLKCTRL_INDEX(0xbc) +#define AM3_L4_WKUP_SMARTREFLEX0_CLKCTRL AM3_CLKCTRL_INDEX(0xc0) +#define AM3_L4_WKUP_TIMER1_CLKCTRL AM3_CLKCTRL_INDEX(0xc4) +#define AM3_L4_WKUP_SMARTREFLEX1_CLKCTRL AM3_CLKCTRL_INDEX(0xc8) +#define AM3_L4_WKUP_WD_TIMER2_CLKCTRL AM3_CLKCTRL_INDEX(0xd4) + +/* l3_aon clocks */ +#define AM3_L3_AON_CLKCTRL_OFFSET 0x14 +#define AM3_L3_AON_CLKCTRL_INDEX(offset) ((offset) - AM3_L3_AON_CLKCTRL_OFFSET) +#define AM3_L3_AON_DEBUGSS_CLKCTRL AM3_L3_AON_CLKCTRL_INDEX(0x14) + +/* l4_wkup_aon clocks */ +#define AM3_L4_WKUP_AON_CLKCTRL_OFFSET 0xb0 +#define AM3_L4_WKUP_AON_CLKCTRL_INDEX(offset) ((offset) - AM3_L4_WKUP_AON_CLKCTRL_OFFSET) +#define AM3_L4_WKUP_AON_WKUP_M3_CLKCTRL AM3_L4_WKUP_AON_CLKCTRL_INDEX(0xb0) + +/* mpu clocks */ +#define AM3_MPU_MPU_CLKCTRL AM3_CLKCTRL_INDEX(0x4) + +/* l4_rtc clocks */ +#define AM3_L4_RTC_RTC_CLKCTRL AM3_CLKCTRL_INDEX(0x0) + +/* gfx_l3 clocks */ +#define AM3_GFX_L3_GFX_CLKCTRL AM3_CLKCTRL_INDEX(0x4) + +/* l4_cefuse clocks */ +#define AM3_L4_CEFUSE_CEFUSE_CLKCTRL AM3_CLKCTRL_INDEX(0x20) + +#endif diff --git a/include/dt-bindings/clock/r8a77965-cpg-mssr.h b/include/dt-bindings/clock/r8a77965-cpg-mssr.h new file mode 100644 index 0000000000..6d3b5a9a60 --- /dev/null +++ b/include/dt-bindings/clock/r8a77965-cpg-mssr.h @@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> + */ +#ifndef __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__ + +#include <dt-bindings/clock/renesas-cpg-mssr.h> + +/* r8a77965 CPG Core Clocks */ +#define R8A77965_CLK_Z 0 +#define R8A77965_CLK_ZR 1 +#define R8A77965_CLK_ZG 2 +#define R8A77965_CLK_ZTR 3 +#define R8A77965_CLK_ZTRD2 4 +#define R8A77965_CLK_ZT 5 +#define R8A77965_CLK_ZX 6 +#define R8A77965_CLK_S0D1 7 +#define R8A77965_CLK_S0D2 8 +#define R8A77965_CLK_S0D3 9 +#define R8A77965_CLK_S0D4 10 +#define R8A77965_CLK_S0D6 11 +#define R8A77965_CLK_S0D8 12 +#define R8A77965_CLK_S0D12 13 +#define R8A77965_CLK_S1D1 14 +#define R8A77965_CLK_S1D2 15 +#define R8A77965_CLK_S1D4 16 +#define R8A77965_CLK_S2D1 17 +#define R8A77965_CLK_S2D2 18 +#define R8A77965_CLK_S2D4 19 +#define R8A77965_CLK_S3D1 20 +#define R8A77965_CLK_S3D2 21 +#define R8A77965_CLK_S3D4 22 +#define R8A77965_CLK_LB 23 +#define R8A77965_CLK_CL 24 +#define R8A77965_CLK_ZB3 25 +#define R8A77965_CLK_ZB3D2 26 +#define R8A77965_CLK_CR 27 +#define R8A77965_CLK_CRD2 28 +#define R8A77965_CLK_SD0H 29 +#define R8A77965_CLK_SD0 30 +#define R8A77965_CLK_SD1H 31 +#define R8A77965_CLK_SD1 32 +#define R8A77965_CLK_SD2H 33 +#define R8A77965_CLK_SD2 34 +#define R8A77965_CLK_SD3H 35 +#define R8A77965_CLK_SD3 36 +#define R8A77965_CLK_SSP2 37 +#define R8A77965_CLK_SSP1 38 +#define R8A77965_CLK_SSPRS 39 +#define R8A77965_CLK_RPC 40 +#define R8A77965_CLK_RPCD2 41 +#define R8A77965_CLK_MSO 42 +#define R8A77965_CLK_CANFD 43 +#define R8A77965_CLK_HDMI 44 +#define R8A77965_CLK_CSI0 45 +#define R8A77965_CLK_CP 46 +#define R8A77965_CLK_CPEX 47 +#define R8A77965_CLK_R 48 +#define R8A77965_CLK_OSC 49 + +#endif /* __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__ */ diff --git a/include/dt-bindings/clock/r8a77990-cpg-mssr.h b/include/dt-bindings/clock/r8a77990-cpg-mssr.h index c806fce449..a596a482f3 100644 --- a/include/dt-bindings/clock/r8a77990-cpg-mssr.h +++ b/include/dt-bindings/clock/r8a77990-cpg-mssr.h @@ -56,8 +56,7 @@ #define R8A77990_CLK_LV0 45 #define R8A77990_CLK_LV1 46 #define R8A77990_CLK_CSI0 47 -#define R8A77990_CLK_POST3 48 -#define R8A77990_CLK_CP 49 -#define R8A77990_CLK_CPEX 50 +#define R8A77990_CLK_CP 48 +#define R8A77990_CLK_CPEX 49 #endif /* __DT_BINDINGS_CLOCK_R8A77990_CPG_MSSR_H__ */ diff --git a/include/dt-bindings/power/r8a77990-sysc.h b/include/dt-bindings/power/r8a77990-sysc.h index 1409c73a57..944d85beec 100644 --- a/include/dt-bindings/power/r8a77990-sysc.h +++ b/include/dt-bindings/power/r8a77990-sysc.h @@ -11,8 +11,14 @@ * (e.g. SYSCISR, Interrupt Status Register) */ -#define R8A77990_PD_CA53_CPU0 5 +#define R8A77990_PD_CA53_CPU0 5 +#define R8A77990_PD_CA53_CPU1 6 +#define R8A77990_PD_CR7 13 +#define R8A77990_PD_A3VC 14 +#define R8A77990_PD_3DG_A 17 +#define R8A77990_PD_3DG_B 18 #define R8A77990_PD_CA53_SCU 21 +#define R8A77990_PD_A2VC1 26 /* Always-on power area */ #define R8A77990_PD_ALWAYS_ON 32 diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h index 228ab3b102..9941cc37a3 100644 --- a/include/dwc3-uboot.h +++ b/include/dwc3-uboot.h @@ -38,4 +38,23 @@ struct dwc3_device { int dwc3_uboot_init(struct dwc3_device *dev); void dwc3_uboot_exit(int index); void dwc3_uboot_handle_interrupt(int index); + +struct phy; +#if CONFIG_IS_ENABLED(PHY) && CONFIG_IS_ENABLED(DM_USB) +int dwc3_setup_phy(struct udevice *dev, struct phy **array, int *num_phys); +int dwc3_shutdown_phy(struct udevice *dev, struct phy *usb_phys, int num_phys); +#else +static inline int dwc3_setup_phy(struct udevice *dev, struct phy **array, + int *num_phys) +{ + return -ENOTSUPP; +} + +static inline int dwc3_shutdown_phy(struct udevice *dev, struct phy *usb_phys, + int num_phys) +{ + return -ENOTSUPP; +} +#endif + #endif /* __DWC3_UBOOT_H_ */ diff --git a/include/fdtdec.h b/include/fdtdec.h index b15da00fb2..f1bcbf837f 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -951,6 +951,27 @@ int fdtdec_setup_memory_banksize(void); */ int fdtdec_setup(void); +#if CONFIG_IS_ENABLED(MULTI_DTB_FIT) +/** + * fdtdec_resetup() - Set up the device tree again + * + * The main difference with fdtdec_setup() is that it returns if the fdt has + * changed because a better match has been found. + * This is typically used for boards that rely on a DM driver to detect the + * board type. This function sould be called by the board code after the stuff + * needed by board_fit_config_name_match() to operate porperly is available. + * If this functions signals that a rescan is necessary, the board code must + * unbind all the drivers using dm_uninit() and then rescan the DT with + * dm_init_and_scan(). + * + * @param rescan Returns a flag indicating that fdt has changed and rescanning + * the fdt is required + * + * @return 0 if OK, -ve on error + */ +int fdtdec_resetup(int *rescan); +#endif + /** * Board-specific FDT initialization. Returns the address to a device tree blob. * Called when CONFIG_OF_BOARD is defined, or if CONFIG_OF_SEPARATE is defined diff --git a/include/hwspinlock.h b/include/hwspinlock.h new file mode 100644 index 0000000000..99389c13c2 --- /dev/null +++ b/include/hwspinlock.h @@ -0,0 +1,140 @@ +/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ +/* + * Copyright (C) 2018, STMicroelectronics - All Rights Reserved + */ + +#ifndef _HWSPINLOCK_H_ +#define _HWSPINLOCK_H_ + +/** + * Implement a hwspinlock uclass. + * Hardware spinlocks are used to perform hardware protection of + * critical sections and synchronisation between multiprocessors. + */ + +struct udevice; + +/** + * struct hwspinlock - A handle to (allowing control of) a single hardware + * spinlock. + * + * @dev: The device which implements the hardware spinlock. + * @id: The hardware spinlock ID within the provider. + */ +struct hwspinlock { + struct udevice *dev; + unsigned long id; +}; + +#if CONFIG_IS_ENABLED(DM_HWSPINLOCK) + +/** + * hwspinlock_get_by_index - Get a hardware spinlock by integer index + * + * This looks up and request a hardware spinlock. The index is relative to the + * client device; each device is assumed to have n hardware spinlock associated + * with it somehow, and this function finds and requests one of them. + * + * @dev: The client device. + * @index: The index of the hardware spinlock to request, within the + * client's list of hardware spinlock. + * @hws: A pointer to a hardware spinlock struct to initialize. + * @return 0 if OK, or a negative error code. + */ +int hwspinlock_get_by_index(struct udevice *dev, + int index, struct hwspinlock *hws); + +/** + * Lock the hardware spinlock + * + * @hws: A hardware spinlock struct that previously requested by + * hwspinlock_get_by_index + * @timeout: Timeout value in msecs + * @return: 0 if OK, -ETIMEDOUT if timeout, -ve on other errors + */ +int hwspinlock_lock_timeout(struct hwspinlock *hws, unsigned int timeout); + +/** + * Unlock the hardware spinlock + * + * @hws: A hardware spinlock struct that previously requested by + * hwspinlock_get_by_index + * @return: 0 if OK, -ve on error + */ +int hwspinlock_unlock(struct hwspinlock *hws); + +#else + +static inline int hwspinlock_get_by_index(struct udevice *dev, + int index, + struct hwspinlock *hws) +{ + return -ENOSYS; +} + +static inline int hwspinlock_lock_timeout(struct hwspinlock *hws, + int timeout) +{ + return -ENOSYS; +} + +static inline int hwspinlock_unlock(struct hwspinlock *hws) +{ + return -ENOSYS; +} + +#endif /* CONFIG_DM_HWSPINLOCK */ + +struct ofnode_phandle_args; + +/** + * struct hwspinlock_ops - Driver model hwspinlock operations + * + * The uclass interface is implemented by all hwspinlock devices which use + * driver model. + */ +struct hwspinlock_ops { + /** + * of_xlate - Translate a client's device-tree (OF) hardware specifier. + * + * The hardware core calls this function as the first step in + * implementing a client's hwspinlock_get_by_*() call. + * + * @hws: The hardware spinlock struct to hold the translation + * result. + * @args: The hardware spinlock specifier values from device tree. + * @return 0 if OK, or a negative error code. + */ + int (*of_xlate)(struct hwspinlock *hws, + struct ofnode_phandle_args *args); + + /** + * Lock the hardware spinlock + * + * @dev: hwspinlock Device + * @index: index of the lock to be used + * @return 0 if OK, -ve on error + */ + int (*lock)(struct udevice *dev, int index); + + /** + * Unlock the hardware spinlock + * + * @dev: hwspinlock Device + * @index: index of the lock to be unlocked + * @return 0 if OK, -ve on error + */ + int (*unlock)(struct udevice *dev, int index); + + /** + * Relax - optional + * Platform-specific relax method, called by hwspinlock core + * while spinning on a lock, between two successive call to + * lock + * + * @dev: hwspinlock Device + */ + void (*relax)(struct udevice *dev); +}; + +#endif /* _HWSPINLOCK_H_ */ diff --git a/include/i8042.h b/include/i8042.h index 2b9e5c4d37..8d69fa13bc 100644 --- a/include/i8042.h +++ b/include/i8042.h @@ -72,19 +72,4 @@ #define BRK 0x0100 /* make break flag for keyboard */ #define ALT 0x0200 /* right alt */ -/* exports */ - -/** - * Flush all buffer from keyboard controller to host. - */ -void i8042_flush(void); - -/** - * Disables the keyboard so that key strokes no longer generate scancodes to - * the host. - * - * @return 0 if ok, -1 if keyboard input was found while disabling - */ -int i8042_disable(void); - #endif /* _I8042_H_ */ diff --git a/include/inttypes.h b/include/inttypes.h new file mode 100644 index 0000000000..dcb6785228 --- /dev/null +++ b/include/inttypes.h @@ -0,0 +1,271 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 1997-2001, 2004, 2007 Free Software Foundation, Inc. + * + * This file is taken from the GNU C Library v2.15, with the unimplemented + * functions removed and a few style fixes. + */ + +/* + * ISO C99: 7.8 Format conversion of integer types <inttypes.h> + */ + +#ifndef _INTTYPES_H +#define _INTTYPES_H 1 + +#include <linux/compiler.h> + +/* Get a definition for wchar_t. But we must not define wchar_t itself. */ +#ifndef ____gwchar_t_defined +# ifdef __cplusplus +# define __gwchar_t wchar_t +# elif defined __WCHAR_TYPE__ +typedef __WCHAR_TYPE__ __gwchar_t; +# else +# define __need_wchar_t +# include <linux/stddef.h> +typedef wchar_t __gwchar_t; +# endif +# define ____gwchar_t_defined 1 +#endif + +/* + * The ISO C99 standard specifies that these macros must only be defined if + * explicitly requested + */ +#if !defined __cplusplus || defined __STDC_FORMAT_MACROS + +/* linux/types.h always uses long long for 64-bit and long for uintptr_t */ +# define __PRI64_PREFIX "ll" +# define __PRIPTR_PREFIX "l" + +/* Macros for printing format specifiers. */ + +/* Decimal notation. */ +# define PRId8 "d" +# define PRId16 "d" +# define PRId32 "d" +# define PRId64 __PRI64_PREFIX "d" + +# define PRIdLEAST8 "d" +# define PRIdLEAST16 "d" +# define PRIdLEAST32 "d" +# define PRIdLEAST64 __PRI64_PREFIX "d" + +# define PRIdFAST8 "d" +# define PRIdFAST16 __PRIPTR_PREFIX "d" +# define PRIdFAST32 __PRIPTR_PREFIX "d" +# define PRIdFAST64 __PRI64_PREFIX "d" + +# define PRIi8 "i" +# define PRIi16 "i" +# define PRIi32 "i" +# define PRIi64 __PRI64_PREFIX "i" + +# define PRIiLEAST8 "i" +# define PRIiLEAST16 "i" +# define PRIiLEAST32 "i" +# define PRIiLEAST64 __PRI64_PREFIX "i" + +# define PRIiFAST8 "i" +# define PRIiFAST16 __PRIPTR_PREFIX "i" +# define PRIiFAST32 __PRIPTR_PREFIX "i" +# define PRIiFAST64 __PRI64_PREFIX "i" + +/* Octal notation. */ +# define PRIo8 "o" +# define PRIo16 "o" +# define PRIo32 "o" +# define PRIo64 __PRI64_PREFIX "o" + +# define PRIoLEAST8 "o" +# define PRIoLEAST16 "o" +# define PRIoLEAST32 "o" +# define PRIoLEAST64 __PRI64_PREFIX "o" + +# define PRIoFAST8 "o" +# define PRIoFAST16 __PRIPTR_PREFIX "o" +# define PRIoFAST32 __PRIPTR_PREFIX "o" +# define PRIoFAST64 __PRI64_PREFIX "o" + +/* Unsigned integers. */ +# define PRIu8 "u" +# define PRIu16 "u" +# define PRIu32 "u" +# define PRIu64 __PRI64_PREFIX "u" + +# define PRIuLEAST8 "u" +# define PRIuLEAST16 "u" +# define PRIuLEAST32 "u" +# define PRIuLEAST64 __PRI64_PREFIX "u" + +# define PRIuFAST8 "u" +# define PRIuFAST16 __PRIPTR_PREFIX "u" +# define PRIuFAST32 __PRIPTR_PREFIX "u" +# define PRIuFAST64 __PRI64_PREFIX "u" + +/* lowercase hexadecimal notation. */ +# define PRIx8 "x" +# define PRIx16 "x" +# define PRIx32 "x" +# define PRIx64 __PRI64_PREFIX "x" + +# define PRIxLEAST8 "x" +# define PRIxLEAST16 "x" +# define PRIxLEAST32 "x" +# define PRIxLEAST64 __PRI64_PREFIX "x" + +# define PRIxFAST8 "x" +# define PRIxFAST16 __PRIPTR_PREFIX "x" +# define PRIxFAST32 __PRIPTR_PREFIX "x" +# define PRIxFAST64 __PRI64_PREFIX "x" + +/* UPPERCASE hexadecimal notation. */ +# define PRIX8 "X" +# define PRIX16 "X" +# define PRIX32 "X" +# define PRIX64 __PRI64_PREFIX "X" + +# define PRIXLEAST8 "X" +# define PRIXLEAST16 "X" +# define PRIXLEAST32 "X" +# define PRIXLEAST64 __PRI64_PREFIX "X" + +# define PRIXFAST8 "X" +# define PRIXFAST16 __PRIPTR_PREFIX "X" +# define PRIXFAST32 __PRIPTR_PREFIX "X" +# define PRIXFAST64 __PRI64_PREFIX "X" + +/* Macros for printing `intmax_t' and `uintmax_t'. */ +# define PRIdMAX __PRI64_PREFIX "d" +# define PRIiMAX __PRI64_PREFIX "i" +# define PRIoMAX __PRI64_PREFIX "o" +# define PRIuMAX __PRI64_PREFIX "u" +# define PRIxMAX __PRI64_PREFIX "x" +# define PRIXMAX __PRI64_PREFIX "X" + +/* Macros for printing `intptr_t' and `uintptr_t'. */ +# define PRIdPTR __PRIPTR_PREFIX "d" +# define PRIiPTR __PRIPTR_PREFIX "i" +# define PRIoPTR __PRIPTR_PREFIX "o" +# define PRIuPTR __PRIPTR_PREFIX "u" +# define PRIxPTR __PRIPTR_PREFIX "x" +# define PRIXPTR __PRIPTR_PREFIX "X" + +/* Macros for scanning format specifiers. */ + +/* Signed decimal notation. */ +# define SCNd8 "hhd" +# define SCNd16 "hd" +# define SCNd32 "d" +# define SCNd64 __PRI64_PREFIX "d" + +# define SCNdLEAST8 "hhd" +# define SCNdLEAST16 "hd" +# define SCNdLEAST32 "d" +# define SCNdLEAST64 __PRI64_PREFIX "d" + +# define SCNdFAST8 "hhd" +# define SCNdFAST16 __PRIPTR_PREFIX "d" +# define SCNdFAST32 __PRIPTR_PREFIX "d" +# define SCNdFAST64 __PRI64_PREFIX "d" + +/* Signed decimal notation. */ +# define SCNi8 "hhi" +# define SCNi16 "hi" +# define SCNi32 "i" +# define SCNi64 __PRI64_PREFIX "i" + +# define SCNiLEAST8 "hhi" +# define SCNiLEAST16 "hi" +# define SCNiLEAST32 "i" +# define SCNiLEAST64 __PRI64_PREFIX "i" + +# define SCNiFAST8 "hhi" +# define SCNiFAST16 __PRIPTR_PREFIX "i" +# define SCNiFAST32 __PRIPTR_PREFIX "i" +# define SCNiFAST64 __PRI64_PREFIX "i" + +/* Unsigned decimal notation. */ +# define SCNu8 "hhu" +# define SCNu16 "hu" +# define SCNu32 "u" +# define SCNu64 __PRI64_PREFIX "u" + +# define SCNuLEAST8 "hhu" +# define SCNuLEAST16 "hu" +# define SCNuLEAST32 "u" +# define SCNuLEAST64 __PRI64_PREFIX "u" + +# define SCNuFAST8 "hhu" +# define SCNuFAST16 __PRIPTR_PREFIX "u" +# define SCNuFAST32 __PRIPTR_PREFIX "u" +# define SCNuFAST64 __PRI64_PREFIX "u" + +/* Octal notation. */ +# define SCNo8 "hho" +# define SCNo16 "ho" +# define SCNo32 "o" +# define SCNo64 __PRI64_PREFIX "o" + +# define SCNoLEAST8 "hho" +# define SCNoLEAST16 "ho" +# define SCNoLEAST32 "o" +# define SCNoLEAST64 __PRI64_PREFIX "o" + +# define SCNoFAST8 "hho" +# define SCNoFAST16 __PRIPTR_PREFIX "o" +# define SCNoFAST32 __PRIPTR_PREFIX "o" +# define SCNoFAST64 __PRI64_PREFIX "o" + +/* Hexadecimal notation. */ +# define SCNx8 "hhx" +# define SCNx16 "hx" +# define SCNx32 "x" +# define SCNx64 __PRI64_PREFIX "x" + +# define SCNxLEAST8 "hhx" +# define SCNxLEAST16 "hx" +# define SCNxLEAST32 "x" +# define SCNxLEAST64 __PRI64_PREFIX "x" + +# define SCNxFAST8 "hhx" +# define SCNxFAST16 __PRIPTR_PREFIX "x" +# define SCNxFAST32 __PRIPTR_PREFIX "x" +# define SCNxFAST64 __PRI64_PREFIX "x" + +/* Macros for scanning `intmax_t' and `uintmax_t'. */ +# define SCNdMAX __PRI64_PREFIX "d" +# define SCNiMAX __PRI64_PREFIX "i" +# define SCNoMAX __PRI64_PREFIX "o" +# define SCNuMAX __PRI64_PREFIX "u" +# define SCNxMAX __PRI64_PREFIX "x" + +/* Macros for scanning `intptr_t' and `uintptr_t'. */ +# define SCNdPTR __PRIPTR_PREFIX "d" +# define SCNiPTR __PRIPTR_PREFIX "i" +# define SCNoPTR __PRIPTR_PREFIX "o" +# define SCNuPTR __PRIPTR_PREFIX "u" +# define SCNxPTR __PRIPTR_PREFIX "x" + +#endif /* C++ && format macros */ + +#if __WORDSIZE == 64 + +/* We have to define the `uintmax_t' type using `ldiv_t'. */ +typedef struct { + long int quot; /* Quotient. */ + long int rem; /* Remainder. */ +} imaxdiv_t; + +#else + +/* We have to define the `uintmax_t' type using `lldiv_t'. */ +typedef struct { + long long int quot; /* Quotient. */ + long long int rem; /* Remainder. */ +} imaxdiv_t; + +#endif + +#endif /* inttypes.h */ diff --git a/include/linux/delay.h b/include/linux/delay.h index 193603451a..71a38e15fb 100644 --- a/include/linux/delay.h +++ b/include/linux/delay.h @@ -10,8 +10,7 @@ void udelay(unsigned long usec); static inline void mdelay(unsigned long msec) { - while (msec--) - udelay(1000); + udelay(1000 * msec); } static inline void ndelay(unsigned long nsec) diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 04a09eb4f6..bd88483b9f 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -33,6 +33,10 @@ #define S64_MAX ((s64)(U64_MAX>>1)) #define S64_MIN ((s64)(-S64_MAX - 1)) +/* Aliases defined by stdint.h */ +#define UINT32_MAX U32_MAX +#define UINT64_MAX U64_MAX + #define STACK_MAGIC 0xdeadbeef #define REPEAT_BYTE(x) ((~0ul / 0xff) * (x)) diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 68e5915324..cd1f557a2f 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -366,6 +366,8 @@ static inline bool mtd_has_partitions(const struct mtd_info *mtd) return !list_empty(&mtd->partitions); } +bool mtd_partitions_used(struct mtd_info *master); + int mtd_ooblayout_ecc(struct mtd_info *mtd, int section, struct mtd_oob_region *oobecc); int mtd_ooblayout_find_eccregion(struct mtd_info *mtd, int eccbyte, @@ -562,8 +564,23 @@ unsigned mtd_mmap_capabilities(struct mtd_info *mtd); /* drivers/mtd/mtdcore.h */ int add_mtd_device(struct mtd_info *mtd); int del_mtd_device(struct mtd_info *mtd); + +#ifdef CONFIG_MTD_PARTITIONS int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int); int del_mtd_partitions(struct mtd_info *); +#else +static inline int add_mtd_partitions(struct mtd_info *mtd, + const struct mtd_partition *parts, + int nparts) +{ + return 0; +} + +static inline int del_mtd_partitions(struct mtd_info *mtd) +{ + return 0; +} +#endif struct mtd_info *__mtd_next_device(int i); #define mtd_for_each_device(mtd) \ @@ -581,6 +598,7 @@ int mtd_arg_off_size(int argc, char *const argv[], int *idx, loff_t *off, void mtd_get_len_incl_bad(struct mtd_info *mtd, uint64_t offset, const uint64_t length, uint64_t *len_incl_bad, int *truncated); +bool mtd_dev_list_updated(void); /* drivers/mtd/mtd_uboot.c */ int mtd_search_alternate_name(const char *mtdname, char *altname, diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h index b824f13477..497798a32a 100644 --- a/include/linux/usb/gadget.h +++ b/include/linux/usb/gadget.h @@ -19,6 +19,7 @@ #define __LINUX_USB_GADGET_H #include <errno.h> +#include <usb.h> #include <linux/compat.h> #include <linux/list.h> @@ -926,4 +927,21 @@ extern void usb_ep_autoconfig_reset(struct usb_gadget *); extern int usb_gadget_handle_interrupts(int index); +#if CONFIG_IS_ENABLED(DM_USB_GADGET) +int usb_gadget_initialize(int index); +int usb_gadget_release(int index); +int dm_usb_gadget_handle_interrupts(struct udevice *dev); +#else +#include <usb.h> +static inline int usb_gadget_initialize(int index) +{ + return board_usb_init(index, USB_INIT_DEVICE); +} + +static inline int usb_gadget_release(int index) +{ + return board_usb_cleanup(index, USB_INIT_DEVICE); +} +#endif + #endif /* __LINUX_USB_GADGET_H */ diff --git a/include/ns16550.h b/include/ns16550.h index 5fcbcd2e74..22b89e4d6d 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -49,14 +49,16 @@ * struct ns16550_platdata - information about a NS16550 port * * @base: Base register address + * @reg_width: IO accesses size of registers (in bytes) * @reg_shift: Shift size of registers (0=byte, 1=16bit, 2=32bit...) * @clock: UART base clock speed in Hz */ struct ns16550_platdata { unsigned long base; + int reg_width; int reg_shift; - int clock; int reg_offset; + int clock; u32 fcr; }; diff --git a/include/palmas.h b/include/palmas.h index 229de53715..20c7e489c1 100644 --- a/include/palmas.h +++ b/include/palmas.h @@ -117,6 +117,7 @@ #define BB_VSEL_VBAT (3 << 1) #define BB_CHRG_EN (1 << 0) +#ifndef CONFIG_DM_I2C /* * Functions to read and write from TPS659038/TWL6035/TWL6037 * or other Palmas family of TI PMICs @@ -130,6 +131,10 @@ static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val) { return i2c_read(chip_no, reg, 1, val, 1); } +#else +int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val); +int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val); +#endif void palmas_init_settings(void); int palmas_mmc1_poweron_ldo(uint ldo_volt, uint ldo_ctrl, uint voltage); diff --git a/include/power/tps65217.h b/include/power/tps65217.h index 00fbab80cb..669a94a6c8 100644 --- a/include/power/tps65217.h +++ b/include/power/tps65217.h @@ -80,6 +80,8 @@ enum { #define TPS65217_PWR_SRC_USB_BITMASK 0x4 #define TPS65217_PWR_SRC_AC_BITMASK 0x8 +int power_tps65217_init(unsigned char bus); + int tps65217_reg_read(uchar src_reg, uchar *src_val); int tps65217_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val, uchar mask); diff --git a/include/power/tps65910.h b/include/power/tps65910.h index 48e0b2c5ab..21b2a21ee0 100644 --- a/include/power/tps65910.h +++ b/include/power/tps65910.h @@ -72,6 +72,7 @@ enum { #define TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_SR_I2C (0x0 << 4) #define TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C (0x1 << 4) +int power_tps65910_init(unsigned char bus); int tps65910_set_i2c_control(void); int tps65910_voltage_update(unsigned int module, unsigned char vddx_op_vol_sel); #endif /* __POWER_TPS65910_H__ */ diff --git a/include/regmap.h b/include/regmap.h index b2b733fda6..a3afb72df5 100644 --- a/include/regmap.h +++ b/include/regmap.h @@ -240,6 +240,44 @@ int regmap_raw_read_range(struct regmap *map, uint range_num, uint offset, regmap_range_get(map, 0, type, member, valp) /** + * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs + * + * @map: Regmap to read from + * @addr: Offset to poll + * @val: Unsigned integer variable to read the value into + * @cond: Break condition (usually involving @val) + * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). + * @timeout_ms: Timeout in ms, 0 means never timeout + * + * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read + * error return value in case of a error read. In the two former cases, + * the last read value at @addr is stored in @val. Must not be called + * from atomic context if sleep_us or timeout_us are used. + * + * This is modelled after the regmap_read_poll_timeout macros in linux but + * with millisecond timeout. + */ +#define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_ms) \ +({ \ + unsigned long __start = get_timer(0); \ + int __ret; \ + for (;;) { \ + __ret = regmap_read((map), (addr), &(val)); \ + if (__ret) \ + break; \ + if (cond) \ + break; \ + if ((timeout_ms) && get_timer(__start) > (timeout_ms)) { \ + __ret = regmap_read((map), (addr), &(val)); \ + break; \ + } \ + if ((sleep_us)) \ + udelay((sleep_us)); \ + } \ + __ret ?: ((cond) ? 0 : -ETIMEDOUT); \ +}) + +/** * regmap_update_bits() - Perform a read/modify/write using a mask * * @map: The map returned by regmap_init_mem*() diff --git a/include/rtc.h b/include/rtc.h index 0d964d56d5..2c3a5743e3 100644 --- a/include/rtc.h +++ b/include/rtc.h @@ -86,7 +86,7 @@ struct rtc_ops { int dm_rtc_get(struct udevice *dev, struct rtc_time *time); /** - * dm_rtc_put() - Write a time to an RTC + * dm_rtc_set() - Write a time to an RTC * * @dev: Device to read from * @time: Time to write into the RTC diff --git a/include/serial.h b/include/serial.h index 9133d07fd5..c1a9fee250 100644 --- a/include/serial.h +++ b/include/serial.h @@ -75,6 +75,8 @@ enum serial_par { #define SERIAL_PAR_SHIFT 0 #define SERIAL_PAR_MASK (0x03 << SERIAL_PAR_SHIFT) +#define SERIAL_SET_PARITY(parity) \ + ((parity << SERIAL_PAR_SHIFT) & SERIAL_PAR_MASK) #define SERIAL_GET_PARITY(config) \ ((config & SERIAL_PAR_MASK) >> SERIAL_PAR_SHIFT) @@ -87,6 +89,8 @@ enum serial_bits { #define SERIAL_BITS_SHIFT 2 #define SERIAL_BITS_MASK (0x3 << SERIAL_BITS_SHIFT) +#define SERIAL_SET_BITS(bits) \ + ((bits << SERIAL_BITS_SHIFT) & SERIAL_BITS_MASK) #define SERIAL_GET_BITS(config) \ ((config & SERIAL_BITS_MASK) >> SERIAL_BITS_SHIFT) @@ -99,6 +103,8 @@ enum serial_stop { #define SERIAL_STOP_SHIFT 4 #define SERIAL_STOP_MASK (0x3 << SERIAL_STOP_SHIFT) +#define SERIAL_SET_STOP(stop) \ + ((stop << SERIAL_STOP_SHIFT) & SERIAL_STOP_MASK) #define SERIAL_GET_STOP(config) \ ((config & SERIAL_STOP_MASK) >> SERIAL_STOP_SHIFT) @@ -107,9 +113,43 @@ enum serial_stop { bits << SERIAL_BITS_SHIFT | \ stop << SERIAL_STOP_SHIFT) -#define SERIAL_DEFAULT_CONFIG SERIAL_PAR_NONE << SERIAL_PAR_SHIFT | \ - SERIAL_8_BITS << SERIAL_BITS_SHIFT | \ - SERIAL_ONE_STOP << SERIAL_STOP_SHIFT +#define SERIAL_DEFAULT_CONFIG \ + (SERIAL_PAR_NONE << SERIAL_PAR_SHIFT | \ + SERIAL_8_BITS << SERIAL_BITS_SHIFT | \ + SERIAL_ONE_STOP << SERIAL_STOP_SHIFT) + +enum serial_chip_type { + SERIAL_CHIP_UNKNOWN = -1, + SERIAL_CHIP_16550_COMPATIBLE, +}; + +enum adr_space_type { + SERIAL_ADDRESS_SPACE_MEMORY = 0, + SERIAL_ADDRESS_SPACE_IO, +}; + +/** + * struct serial_device_info - structure to hold serial device info + * + * @type: type of the UART chip + * @addr_space: address space to access the registers + * @addr: physical address of the registers + * @reg_width: size (in bytes) of the IO accesses to the registers + * @reg_offset: offset to apply to the @addr from the start of the registers + * @reg_shift: quantity to shift the register offsets by + * @baudrate: baud rate + */ +struct serial_device_info { + enum serial_chip_type type; + enum adr_space_type addr_space; + ulong addr; + u8 reg_width; + u8 reg_offset; + u8 reg_shift; + unsigned int baudrate; +}; + +#define SERIAL_DEFAULT_ADDRESS 0xBADACCE5 /** * struct struct dm_serial_ops - Driver model serial operations @@ -189,6 +229,19 @@ struct dm_serial_ops { #endif /** + * getconfig() - Get the uart configuration + * (parity, 5/6/7/8 bits word length, stop bits) + * + * Get a current config for this device. + * + * @dev: Device pointer + * @parity: parity to use + * @bits: bits number to use + * @stop: stop bits number to use + * @return 0 if OK, -ve on error + */ + int (*getconfig)(struct udevice *dev, uint *serial_config); + /** * setconfig() - Set up the uart configuration * (parity, 5/6/7/8 bits word length, stop bits) * @@ -199,6 +252,13 @@ struct dm_serial_ops { * @return 0 if OK, -ve on error */ int (*setconfig)(struct udevice *dev, uint serial_config); + /** + * getinfo() - Get serial device information + * + * @dev: Device pointer + * @info: struct serial_device_info to fill + */ + int (*getinfo)(struct udevice *dev, struct serial_device_info *info); }; /** diff --git a/include/spi.h b/include/spi.h index 938627bc01..92427e5f32 100644 --- a/include/spi.h +++ b/include/spi.h @@ -118,13 +118,6 @@ struct spi_slave { }; /** - * Initialization, must be called once on start up. - * - * TODO: I don't think we really need this. - */ -void spi_init(void); - -/** * spi_do_alloc_slave - Allocate a new SPI slave (internal) * * Allocate and zero all fields in the spi slave, and set the bus/chip diff --git a/include/spl.h b/include/spl.h index ee92832f0a..ff4e6277d3 100644 --- a/include/spl.h +++ b/include/spl.h @@ -52,9 +52,9 @@ static inline bool u_boot_first_phase(void) /* A string name for SPL or TPL */ #ifdef CONFIG_SPL_BUILD # ifdef CONFIG_TPL_BUILD -# define SPL_TPL_NAME "tpl" +# define SPL_TPL_NAME "TPL" # else -# define SPL_TPL_NAME "spl" +# define SPL_TPL_NAME "SPL" # endif # define SPL_TPL_PROMPT SPL_TPL_NAME ": " #else diff --git a/include/syscon.h b/include/syscon.h index 2aa73e520a..3df96e3276 100644 --- a/include/syscon.h +++ b/include/syscon.h @@ -74,6 +74,19 @@ int syscon_get_by_driver_data(ulong driver_data, struct udevice **devp); struct regmap *syscon_get_regmap_by_driver_data(ulong driver_data); /** + * syscon_regmap_lookup_by_phandle() - Look up a controller by a phandle + * + * This operates by looking up the given name in the device (device + * tree property) of the device using the system controller. + * + * @dev: Device using the system controller + * @name: Name of property referring to the system controller + * @return A pointer to the regmap if found, ERR_PTR(-ve) on error + */ +struct regmap *syscon_regmap_lookup_by_phandle(struct udevice *dev, + const char *name); + +/** * syscon_get_first_range() - get the first memory range from a syscon regmap * * @driver_data: Driver data value to look up diff --git a/include/tpm-common.h b/include/tpm-common.h index 3d88b44db7..f9c2ca2053 100644 --- a/include/tpm-common.h +++ b/include/tpm-common.h @@ -210,6 +210,14 @@ int tpm_open(struct udevice *dev); int tpm_close(struct udevice *dev); /** + * tpm_clear_and_reenable() - Force clear the TPM and reenable it + * + * @dev: TPM device + * @return 0 on success, -ve on failure + */ +u32 tpm_clear_and_reenable(struct udevice *dev); + +/** * tpm_get_desc() - Get a text description of the TPM * * @dev: Device to check @@ -274,4 +282,15 @@ static inline cmd_tbl_t *get_tpm2_commands(unsigned int *size) } #endif +/** + * tpm_get_version() - Find the version of a TPM + * + * This checks the uclass data for a TPM device and returns the version number + * it supports. + * + * @dev: TPM device + * @return version number (TPM_V1 or TPMV2) + */ +enum tpm_version tpm_get_version(struct udevice *dev); + #endif /* __TPM_COMMON_H */ diff --git a/include/tpm-v2.h b/include/tpm-v2.h index 2f2e66de19..ae00803f6d 100644 --- a/include/tpm-v2.h +++ b/include/tpm-v2.h @@ -128,6 +128,39 @@ enum tpm2_algorithms { TPM2_ALG_NULL = 0x10, }; +/* NV index attributes */ +enum tpm_index_attrs { + TPMA_NV_PPWRITE = 1UL << 0, + TPMA_NV_OWNERWRITE = 1UL << 1, + TPMA_NV_AUTHWRITE = 1UL << 2, + TPMA_NV_POLICYWRITE = 1UL << 3, + TPMA_NV_COUNTER = 1UL << 4, + TPMA_NV_BITS = 1UL << 5, + TPMA_NV_EXTEND = 1UL << 6, + TPMA_NV_POLICY_DELETE = 1UL << 10, + TPMA_NV_WRITELOCKED = 1UL << 11, + TPMA_NV_WRITEALL = 1UL << 12, + TPMA_NV_WRITEDEFINE = 1UL << 13, + TPMA_NV_WRITE_STCLEAR = 1UL << 14, + TPMA_NV_GLOBALLOCK = 1UL << 15, + TPMA_NV_PPREAD = 1UL << 16, + TPMA_NV_OWNERREAD = 1UL << 17, + TPMA_NV_AUTHREAD = 1UL << 18, + TPMA_NV_POLICYREAD = 1UL << 19, + TPMA_NV_NO_DA = 1UL << 25, + TPMA_NV_ORDERLY = 1UL << 26, + TPMA_NV_CLEAR_STCLEAR = 1UL << 27, + TPMA_NV_READLOCKED = 1UL << 28, + TPMA_NV_WRITTEN = 1UL << 29, + TPMA_NV_PLATFORMCREATE = 1UL << 30, + TPMA_NV_READ_STCLEAR = 1UL << 31, + + TPMA_NV_MASK_READ = TPMA_NV_PPREAD | TPMA_NV_OWNERREAD | + TPMA_NV_AUTHREAD | TPMA_NV_POLICYREAD, + TPMA_NV_MASK_WRITE = TPMA_NV_PPWRITE | TPMA_NV_OWNERWRITE | + TPMA_NV_AUTHWRITE | TPMA_NV_POLICYWRITE, +}; + /** * Issue a TPM2_Startup command. * diff --git a/include/twl4030.h b/include/twl4030.h index 46a9306246..c27ad615ee 100644 --- a/include/twl4030.h +++ b/include/twl4030.h @@ -648,6 +648,7 @@ * examples are TWL4030_PM_RECEIVER_VMMC1_DEV_GRP and * TWL4030_LED_LEDEN. */ +#ifndef CONFIG_DM_I2C static inline int twl4030_i2c_write_u8(u8 chip_no, u8 reg, u8 val) { return i2c_write(chip_no, reg, 1, &val, 1); @@ -657,7 +658,10 @@ static inline int twl4030_i2c_read_u8(u8 chip_no, u8 reg, u8 *val) { return i2c_read(chip_no, reg, 1, val, 1); } - +#else +int twl4030_i2c_write_u8(u8 chip_no, u8 reg, u8 val); +int twl4030_i2c_read_u8(u8 chip_no, u8 reg, u8 *val); +#endif /* * Power */ diff --git a/include/twl6030.h b/include/twl6030.h index 66853439ed..41f17de3ab 100644 --- a/include/twl6030.h +++ b/include/twl6030.h @@ -186,6 +186,7 @@ struct twl6030_data{ }; /* Functions to read and write from TWL6030 */ +#ifndef CONFIG_DM_I2C static inline int twl6030_i2c_write_u8(u8 chip_no, u8 reg, u8 val) { return i2c_write(chip_no, reg, 1, &val, 1); @@ -195,6 +196,10 @@ static inline int twl6030_i2c_read_u8(u8 chip_no, u8 reg, u8 *val) { return i2c_read(chip_no, reg, 1, val, 1); } +#else +int twl6030_i2c_write_u8(u8 chip_no, u8 reg, u8 val); +int twl6030_i2c_read_u8(u8 chip_no, u8 reg, u8 *val); +#endif /* * Power diff --git a/include/u-boot/crc.h b/include/u-boot/crc.h index e98cb46c90..788ef29a17 100644 --- a/include/u-boot/crc.h +++ b/include/u-boot/crc.h @@ -11,6 +11,20 @@ /* lib/crc8.c */ unsigned int crc8(unsigned int crc_start, const unsigned char *vptr, int len); +/* lib/crc16.c - 16 bit CRC with polynomial x^16+x^12+x^5+1 (CRC-CCITT) */ +uint16_t crc16_ccitt(uint16_t crc_start, const unsigned char *s, int len); +/** + * crc16_ccitt_wd_buf - Perform CRC16-CCIT on an input buffer and return the + * 16-bit result (network byte-order) in an output buffer + * + * @in: input buffer + * @len: input buffer length + * @out: output buffer (at least 2 bytes) + * @chunk_sz: ignored + */ +void crc16_ccitt_wd_buf(const uint8_t *in, uint len, + uint8_t *out, uint chunk_sz); + /* lib/crc32.c */ uint32_t crc32 (uint32_t, const unsigned char *, uint); uint32_t crc32_wd (uint32_t, const unsigned char *, uint, uint); diff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h index 62e32365e2..4068de045d 100644 --- a/include/usb/dwc2_udc.h +++ b/include/usb/dwc2_udc.h @@ -14,7 +14,7 @@ struct dwc2_plat_otg_data { void *priv; int phy_of_node; int (*phy_control)(int on); - unsigned int regs_phy; + uintptr_t regs_phy; uintptr_t regs_otg; unsigned int usb_phy_ctrl; unsigned int usb_flags; diff --git a/include/video.h b/include/video.h index 3f9139eea4..1d57b48b17 100644 --- a/include/video.h +++ b/include/video.h @@ -61,7 +61,9 @@ enum video_log2_bpp { * @font_size: Font size in pixels (0 to use a default value) * @fb: Frame buffer * @fb_size: Frame buffer size - * @line_length: Length of each frame buffer line, in bytes + * @line_length: Length of each frame buffer line, in bytes. This can be + * set by the driver, but if not, the uclass will set it after + * probing * @colour_fg: Foreground colour (pixel value) * @colour_bg: Background colour (pixel value) * @flush_dcache: true to enable flushing of the data cache after |