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-rw-r--r--include/configs/minnowmax.h2
-rw-r--r--include/configs/sama5d2_ptc.h155
-rw-r--r--include/configs/x86-common.h9
-rw-r--r--include/qfw.h176
4 files changed, 339 insertions, 3 deletions
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index 674d1f602b..95ad1287f6 100644
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -40,6 +40,6 @@
#define CONFIG_X86EMU_RAW_IO
#define CONFIG_ENV_SECT_SIZE 0x1000
-#define CONFIG_ENV_OFFSET 0x007fe000
+#define CONFIG_ENV_OFFSET 0x006ef000
#endif /* __CONFIG_H */
diff --git a/include/configs/sama5d2_ptc.h b/include/configs/sama5d2_ptc.h
new file mode 100644
index 0000000000..d91d75eb40
--- /dev/null
+++ b/include/configs/sama5d2_ptc.h
@@ -0,0 +1,155 @@
+/*
+ * Configuration settings for the SAMA5D2 PTC Engineering board.
+ *
+ * Copyright (C) 2016 Atmel
+ * Wenyou Yang <wenyou.yang@atmel.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* No NOR flash, this definition should put before common header */
+#define CONFIG_SYS_NO_FLASH
+
+#include "at91-sama5_common.h"
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE ATMEL_BASE_UART0
+#define CONFIG_USART_ID ATMEL_ID_UART0
+
+#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_SIZE 0x20000000
+
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_INIT_SP_ADDR 0x210000
+#else
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
+#endif
+
+#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
+
+#undef CONFIG_AT91_GPIO
+#define CONFIG_ATMEL_PIO4
+
+/* SDRAM */
+#define CONFIG_NR_DRAM_BANKS 1
+
+/* SerialFlash */
+#ifdef CONFIG_CMD_SF
+#define CONFIG_ATMEL_SPI
+#define CONFIG_SPI_FLASH_ATMEL
+#define CONFIG_SF_DEFAULT_BUS 0
+#define CONFIG_SF_DEFAULT_CS 0
+#define CONFIG_SF_DEFAULT_SPEED 30000000
+#endif
+
+/* NAND flash */
+#define CONFIG_CMD_NAND
+
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_ATMEL
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+/* our ALE is AD21 */
+#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
+/* our CLE is AD22 */
+#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+/* PMECC & PMERRLOC */
+#define CONFIG_ATMEL_NAND_HWECC
+#define CONFIG_ATMEL_NAND_HW_PMECC
+#define CONFIG_CMD_NAND_TRIMFFS
+#endif
+
+/* USB */
+#define CONFIG_CMD_USB
+
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_ATMEL
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
+#define CONFIG_USB_STORAGE
+#endif
+
+/* USB device */
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_ATMEL_USBA
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETH_RNDIS
+#define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D2_PTC"
+
+#if defined(CONFIG_CMD_USB)
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+#endif
+
+/* Ethernet Hardware */
+#define CONFIG_MACB
+#define CONFIG_RMII
+#define CONFIG_NET_RETRY_COUNT 20
+#define CONFIG_MACB_SEARCH_PHY
+
+#ifdef CONFIG_SYS_USE_NANDFLASH
+#undef CONFIG_ENV_OFFSET
+#undef CONFIG_ENV_OFFSET_REDUND
+#undef CONFIG_BOOTCOMMAND
+/* u-boot env in nand flash */
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET 0x200000
+#define CONFIG_ENV_OFFSET_REDUND 0x400000
+#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0xb80000 0x80000;" \
+ "nand read 0x22000000 0x600000 0x600000;" \
+ "bootz 0x22000000 - 0x21000000"
+#endif
+
+#undef CONFIG_BOOTARGS
+#define CONFIG_BOOTARGS \
+ "console=ttyS0,57600 earlyprintk " \
+ "mtdparts=atmel_nand:6M(bootstrap)ro, 6M(kernel)ro,-(rootfs) " \
+ "rootfstype=ubifs ubi.mtd=2 root=ubi0:rootfs"
+
+/* SPL */
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_TEXT_BASE 0x200000
+#define CONFIG_SPL_MAX_SIZE 0x10000
+#define CONFIG_SPL_BSS_START_ADDR 0x20000000
+#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
+#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SYS_MONITOR_LEN (512 << 10)
+
+#ifdef CONFIG_SYS_USE_SERIALFLASH
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
+
+#elif CONFIG_SYS_USE_NANDFLASH
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_PMECC_CAP 8
+#define CONFIG_PMECC_SECTOR_SIZE 512
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_OOBSIZE 224
+#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
+#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
+#endif
+
+#endif
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index b79f47baf3..b4aad6cd24 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -193,14 +193,19 @@
#define CONFIG_HOSTNAME x86
#define CONFIG_BOOTFILE "bzImage"
#define CONFIG_LOADADDR 0x1000000
-#define CONFIG_RAMDISK_ADDR 0x4000000
+#define CONFIG_RAMDISK_ADDR 0x4000000
+#ifdef CONFIG_GENERATE_ACPI_TABLE
+#define CONFIG_OTHBOOTARGS "othbootargs=\0"
+#else
+#define CONFIG_OTHBOOTARGS "othbootargs=acpi=off\0"
+#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_STD_DEVICES_SETTINGS \
"pciconfighost=1\0" \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
- "othbootargs=acpi=off\0" \
+ CONFIG_OTHBOOTARGS \
"ramdiskaddr=0x4000000\0" \
"ramdiskfile=initramfs.gz\0"
diff --git a/include/qfw.h b/include/qfw.h
new file mode 100644
index 0000000000..b0b3b5945e
--- /dev/null
+++ b/include/qfw.h
@@ -0,0 +1,176 @@
+/*
+ * (C) Copyright 2015 Miao Yan <yanmiaobest@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __FW_CFG__
+#define __FW_CFG__
+
+#include <linux/list.h>
+
+enum qemu_fwcfg_items {
+ FW_CFG_SIGNATURE = 0x00,
+ FW_CFG_ID = 0x01,
+ FW_CFG_UUID = 0x02,
+ FW_CFG_RAM_SIZE = 0x03,
+ FW_CFG_NOGRAPHIC = 0x04,
+ FW_CFG_NB_CPUS = 0x05,
+ FW_CFG_MACHINE_ID = 0x06,
+ FW_CFG_KERNEL_ADDR = 0x07,
+ FW_CFG_KERNEL_SIZE = 0x08,
+ FW_CFG_KERNEL_CMDLINE = 0x09,
+ FW_CFG_INITRD_ADDR = 0x0a,
+ FW_CFG_INITRD_SIZE = 0x0b,
+ FW_CFG_BOOT_DEVICE = 0x0c,
+ FW_CFG_NUMA = 0x0d,
+ FW_CFG_BOOT_MENU = 0x0e,
+ FW_CFG_MAX_CPUS = 0x0f,
+ FW_CFG_KERNEL_ENTRY = 0x10,
+ FW_CFG_KERNEL_DATA = 0x11,
+ FW_CFG_INITRD_DATA = 0x12,
+ FW_CFG_CMDLINE_ADDR = 0x13,
+ FW_CFG_CMDLINE_SIZE = 0x14,
+ FW_CFG_CMDLINE_DATA = 0x15,
+ FW_CFG_SETUP_ADDR = 0x16,
+ FW_CFG_SETUP_SIZE = 0x17,
+ FW_CFG_SETUP_DATA = 0x18,
+ FW_CFG_FILE_DIR = 0x19,
+ FW_CFG_FILE_FIRST = 0x20,
+ FW_CFG_WRITE_CHANNEL = 0x4000,
+ FW_CFG_ARCH_LOCAL = 0x8000,
+ FW_CFG_INVALID = 0xffff,
+};
+
+enum {
+ BIOS_LINKER_LOADER_COMMAND_ALLOCATE = 0x1,
+ BIOS_LINKER_LOADER_COMMAND_ADD_POINTER = 0x2,
+ BIOS_LINKER_LOADER_COMMAND_ADD_CHECKSUM = 0x3,
+};
+
+enum {
+ BIOS_LINKER_LOADER_ALLOC_ZONE_HIGH = 0x1,
+ BIOS_LINKER_LOADER_ALLOC_ZONE_FSEG = 0x2,
+};
+
+#define FW_CFG_FILE_SLOTS 0x10
+#define FW_CFG_MAX_ENTRY (FW_CFG_FILE_FIRST + FW_CFG_FILE_SLOTS)
+#define FW_CFG_ENTRY_MASK ~(FW_CFG_WRITE_CHANNEL | FW_CFG_ARCH_LOCAL)
+
+#define FW_CFG_MAX_FILE_PATH 56
+#define BIOS_LINKER_LOADER_FILESZ FW_CFG_MAX_FILE_PATH
+
+#define QEMU_FW_CFG_SIGNATURE (('Q' << 24) | ('E' << 16) | ('M' << 8) | 'U')
+
+#define FW_CFG_DMA_ERROR (1 << 0)
+#define FW_CFG_DMA_READ (1 << 1)
+#define FW_CFG_DMA_SKIP (1 << 2)
+#define FW_CFG_DMA_SELECT (1 << 3)
+
+#define FW_CFG_DMA_ENABLED (1 << 1)
+
+struct fw_cfg_file {
+ __be32 size;
+ __be16 select;
+ __be16 reserved;
+ char name[FW_CFG_MAX_FILE_PATH];
+};
+
+struct fw_file {
+ struct fw_cfg_file cfg; /* firmware file information */
+ unsigned long addr; /* firmware file in-memory address */
+ struct list_head list; /* list node to link to fw_list */
+};
+
+struct fw_cfg_file_iter {
+ struct list_head *entry; /* structure to iterate file list */
+};
+
+struct fw_cfg_dma_access {
+ __be32 control;
+ __be32 length;
+ __be64 address;
+};
+
+struct fw_cfg_arch_ops {
+ void (*arch_read_pio)(uint16_t selector, uint32_t size,
+ void *address);
+ void (*arch_read_dma)(struct fw_cfg_dma_access *dma);
+};
+
+struct bios_linker_entry {
+ __le32 command;
+ union {
+ /*
+ * COMMAND_ALLOCATE - allocate a table from @alloc.file
+ * subject to @alloc.align alignment (must be power of 2)
+ * and @alloc.zone (can be HIGH or FSEG) requirements.
+ *
+ * Must appear exactly once for each file, and before
+ * this file is referenced by any other command.
+ */
+ struct {
+ char file[BIOS_LINKER_LOADER_FILESZ];
+ __le32 align;
+ uint8_t zone;
+ } alloc;
+
+ /*
+ * COMMAND_ADD_POINTER - patch the table (originating from
+ * @dest_file) at @pointer.offset, by adding a pointer to the
+ * table originating from @src_file. 1,2,4 or 8 byte unsigned
+ * addition is used depending on @pointer.size.
+ */
+ struct {
+ char dest_file[BIOS_LINKER_LOADER_FILESZ];
+ char src_file[BIOS_LINKER_LOADER_FILESZ];
+ __le32 offset;
+ uint8_t size;
+ } pointer;
+
+ /*
+ * COMMAND_ADD_CHECKSUM - calculate checksum of the range
+ * specified by @cksum_start and @cksum_length fields,
+ * and then add the value at @cksum.offset.
+ * Checksum simply sums -X for each byte X in the range
+ * using 8-bit math.
+ */
+ struct {
+ char file[BIOS_LINKER_LOADER_FILESZ];
+ __le32 offset;
+ __le32 start;
+ __le32 length;
+ } cksum;
+
+ /* padding */
+ char pad[124];
+ };
+} __packed;
+
+/**
+ * Initialize QEMU fw_cfg interface
+ *
+ * @ops: arch specific read operations
+ */
+void qemu_fwcfg_init(struct fw_cfg_arch_ops *ops);
+
+void qemu_fwcfg_read_entry(uint16_t entry, uint32_t length, void *address);
+int qemu_fwcfg_read_firmware_list(void);
+struct fw_file *qemu_fwcfg_find_file(const char *name);
+
+/**
+ * Get system cpu number
+ *
+ * @return: cpu number in system
+ */
+int qemu_fwcfg_online_cpus(void);
+
+/* helper functions to iterate firmware file list */
+struct fw_file *qemu_fwcfg_file_iter_init(struct fw_cfg_file_iter *iter);
+struct fw_file *qemu_fwcfg_file_iter_next(struct fw_cfg_file_iter *iter);
+bool qemu_fwcfg_file_iter_end(struct fw_cfg_file_iter *iter);
+
+bool qemu_fwcfg_present(void);
+bool qemu_fwcfg_dma_present(void);
+
+#endif