diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/clearfog.h | 6 | ||||
-rw-r--r-- | include/configs/db-88f6820-gp.h | 6 | ||||
-rw-r--r-- | include/configs/db-mv784mp-gp.h | 2 | ||||
-rw-r--r-- | include/configs/maxbcm.h | 2 |
4 files changed, 0 insertions, 16 deletions
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index c74415d82b..6c5356b35d 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -10,8 +10,6 @@ /* * High Level Configuration Options (easy to change) */ -#define CONFIG_ARMADA_XP /* SOC Family Name */ -#define CONFIG_ARMADA_38X #define CONFIG_DB_88F6820_GP /* Board target name for DDR training */ #define CONFIG_DISPLAY_BOARDINFO_LATE @@ -170,10 +168,6 @@ #endif #endif -/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_MVEBU_DDR_A38X -#define CONFIG_DDR3 - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index d76ceb72b0..03a3d316f2 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -10,8 +10,6 @@ /* * High Level Configuration Options (easy to change) */ -#define CONFIG_ARMADA_XP /* SOC Family Name */ -#define CONFIG_ARMADA_38X #define CONFIG_DB_88F6820_GP /* Board target name for DDR training */ #define CONFIG_DISPLAY_BOARDINFO_LATE @@ -170,10 +168,6 @@ #endif #endif -/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_MVEBU_DDR_A38X -#define CONFIG_DDR3 - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index c354e6f0d8..c8b0344185 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -10,7 +10,6 @@ /* * High Level Configuration Options (easy to change) */ -#define CONFIG_ARMADA_XP /* SOC Family Name */ #define CONFIG_DB_784MP_GP /* Board target name for DDR training */ #define CONFIG_DISPLAY_BOARDINFO_LATE @@ -144,7 +143,6 @@ #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_MVEBU_DDR_AXP #define CONFIG_SPD_EEPROM 0x4e #define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 23e552646d..43d7fd03a3 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -10,7 +10,6 @@ /* * High Level Configuration Options (easy to change) */ -#define CONFIG_ARMADA_XP /* SOC Family Name */ #define CONFIG_DISPLAY_BOARDINFO_LATE /* @@ -106,7 +105,6 @@ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_MVEBU_DDR_AXP #define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */ #define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ |