3 files changed, 41 insertions, 0 deletions
diff --git a/include/u-boot/rsa-mod-exp.h b/include/u-boot/rsa-mod-exp.h
index 3253614ede..8a428c4b6a 100644
--- a/include/u-boot/rsa-mod-exp.h
+++ b/include/u-boot/rsa-mod-exp.h
@@ -42,6 +42,10 @@ int rsa_mod_exp_sw(const uint8_t *sig, uint32_t sig_len,
 int rsa_mod_exp(struct udevice *dev, const uint8_t *sig, uint32_t sig_len,
 		struct key_prop *node, uint8_t *out);
 
+#if defined(CONFIG_CMD_ZYNQ_RSA)
+int zynq_pow_mod(u32 *keyptr, u32 *inout);
+#endif
+
 /**
  * struct struct mod_exp_ops - Driver model for RSA Modular Exponentiation
  *				operations
diff --git a/include/zynq_bootimg.h b/include/zynq_bootimg.h
new file mode 100644
index 0000000000..c39c0bf459
--- /dev/null
+++ b/include/zynq_bootimg.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Xilinx, Inc.
+ */
+
+#ifndef _ZYNQ_BOOTIMG_H_
+#define _ZYNQ_BOOTIMG_H_
+
+#define ZYNQ_MAX_PARTITION_NUMBER	0xE
+
+struct partition_hdr {
+	u32 imagewordlen;	/* 0x0 */
+	u32 datawordlen;	/* 0x4 */
+	u32 partitionwordlen;	/* 0x8 */
+	u32 loadaddr;		/* 0xC */
+	u32 execaddr;		/* 0x10 */
+	u32 partitionstart;	/* 0x14 */
+	u32 partitionattr;	/* 0x18 */
+	u32 sectioncount;	/* 0x1C */
+	u32 checksumoffset;	/* 0x20 */
+	u32 pads1[1];
+	u32 acoffset;	/* 0x28 */
+	u32 pads2[4];
+	u32 checksum;		/* 0x3C */
+};
+
+int zynq_get_part_count(struct partition_hdr *part_hdr_info);
+int zynq_get_partition_info(u32 image_base_addr, u32 *fsbl_len,
+			    struct partition_hdr *part_hdr);
+int zynq_validate_hdr(struct partition_hdr *header);
+int zynq_validate_partition(u32 start_addr, u32 len, u32 chksum_off);
+
+#endif /* _ZYNQ_BOOTIMG_H_ */
diff --git a/include/zynqpl.h b/include/zynqpl.h
index cdfd8a205a..766e6918cd 100644
--- a/include/zynqpl.h
+++ b/include/zynqpl.h
@@ -11,6 +11,10 @@
 
 #include <xilinx.h>
 
+#ifdef CONFIG_CMD_ZYNQ_AES
+int zynq_decrypt_load(u32 srcaddr, u32 dstaddr, u32 srclen, u32 dstlen);
+#endif
+
 extern struct xilinx_fpga_op zynq_op;
 
 #define XILINX_ZYNQ_XC7Z007S	0x3