diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/apalis-imx8.h | 1 | ||||
| -rw-r--r-- | include/configs/imx8mq_phanbell.h | 216 | ||||
| -rw-r--r-- | include/configs/mx6sxsabreauto.h | 6 | ||||
| -rw-r--r-- | include/configs/mx6sxsabresd.h | 11 | ||||
| -rw-r--r-- | include/configs/mx6ul_14x14_evk.h | 6 | ||||
| -rw-r--r-- | include/configs/mx6ullevk.h | 6 | ||||
| -rw-r--r-- | include/configs/mx7dsabresd.h | 8 | ||||
| -rw-r--r-- | include/configs/pcm052.h | 7 | ||||
| -rw-r--r-- | include/configs/vf610twr.h | 8 | ||||
| -rw-r--r-- | include/dt-bindings/pinctrl/pins-imxrt1020.h | 2 | ||||
| -rw-r--r-- | include/imx_sip.h | 5 | ||||
| -rw-r--r-- | include/micrel.h | 11 |
12 files changed, 232 insertions, 55 deletions
diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index bea035c3e2..4003715733 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -24,6 +24,7 @@ /* Networking */ #define FEC_QUIRK_ENET_MAC +#define FEC_ENET_ENABLE_TXC_DELAY #define CONFIG_TFTP_TSIZE diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h new file mode 100644 index 0000000000..4fa48c0578 --- /dev/null +++ b/include/configs/imx8mq_phanbell.h @@ -0,0 +1,216 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 NXP + */ + +#ifndef __IMX8M_PHANBELL_H +#define __IMX8M_PHANBELL_H + +#include <linux/sizes.h> +#include <asm/arch/imx-regs.h> + +#define CONFIG_SPL_MAX_SIZE (172 * 1024) +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 + +#ifdef CONFIG_SPL_BUILD +/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ +#define CONFIG_SPL_WATCHDOG_SUPPORT +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +#define CONFIG_SPL_POWER_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x187FF0 +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_BSS_START_ADDR 0x00180000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ +#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 + +/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ +#define CONFIG_MALLOC_F_ADDR 0x182000 +/* For RAW image gives a error info not panic */ +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE + +#undef CONFIG_DM_MMC +#undef CONFIG_DM_PMIC +#undef CONFIG_DM_PMIC_PFUZE100 + +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ + +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#endif + +#define CONFIG_REMAKE_ELF + +#define CONFIG_BOARD_EARLY_INIT_F + +#undef CONFIG_CMD_EXPORTENV +#undef CONFIG_CMD_IMPORTENV +#undef CONFIG_CMD_IMLS + +#undef CONFIG_CMD_CRC32 + +/* ENET Config */ +/* ENET1 */ +#if defined(CONFIG_CMD_NET) +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_MII +#define CONFIG_ETHPRIME "FEC" + +#define CONFIG_FEC_MXC +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_FEC_MXC_PHYADDR 0 +#define FEC_QUIRK_ENET_MAC + +#define CONFIG_PHY_GIGE +#define IMX_FEC_BASE 0x30BE0000 + +#define CONFIG_PHYLIB +#endif + +#define CONFIG_MFG_ENV_SETTINGS \ + "initrd_addr=0x43800000\0" \ + "initrd_high=0xffffffff\0" \ + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_MFG_ENV_SETTINGS \ + "script=boot.scr\0" \ + "image=Image\0" \ + "console=ttymxc0,115200\0" \ + "fdt_addr=0x43000000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "boot_fdt=try\0" \ + "fdt_file=imx8mq-phanbell.dtb\0" \ + "initrd_addr=0x43800000\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcautodetect=yes\0" \ + "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ + "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "else " \ + "echo wait for boot; " \ + "fi;\0" \ + "netargs=setenv bootargs console=${console} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${loadaddr} ${image}; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "else " \ + "booti; " \ + "fi;\0" + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "fi; " \ + "else booti ${loadaddr} - ${fdt_addr}; fi" + +/* Link Definitions */ +#define CONFIG_LOADADDR 0x40480000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_ENV_OVERWRITE +#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ +#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024) + +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM 0x40000000 +#define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */ + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ + (PHYS_SDRAM_SIZE >> 1)) + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR + +/* Monitor Command Prompt */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +#define CONFIG_IMX_BOOTAUX + +#define CONFIG_CMD_MMC + +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +#define CONFIG_MXC_GPIO + +#define CONFIG_CMD_FUSE + +/* I2C Configs */ +#define CONFIG_SYS_I2C_SPEED 100000 + +#define CONFIG_OF_SYSTEM_SETUP + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_DM_PMIC +#endif + +#endif diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 984cf611f4..dc5e818443 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -143,12 +143,6 @@ #define CONFIG_IMX_THERMAL -#ifdef CONFIG_FSL_QSPI -#define CONFIG_SYS_FSL_QSPI_AHB -#define FSL_QSPI_FLASH_SIZE SZ_32M -#define FSL_QSPI_FLASH_NUM 2 -#endif - #define CONFIG_SYS_FSL_USDHC_NUM 2 #if defined(CONFIG_ENV_IS_IN_MMC) #define CONFIG_SYS_MMC_ENV_DEV 0 /*USDHC3*/ diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 86007a2d36..3bff496bad 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -173,17 +173,6 @@ #define CONFIG_IMX_THERMAL -#ifdef CONFIG_FSL_QSPI -#define CONFIG_SYS_FSL_QSPI_LE -#define CONFIG_SYS_FSL_QSPI_AHB -#ifdef CONFIG_MX6SX_SABRESD_REVA -#define FSL_QSPI_FLASH_SIZE SZ_16M -#else -#define FSL_QSPI_FLASH_SIZE SZ_32M -#endif -#define FSL_QSPI_FLASH_NUM 2 -#endif - #ifndef CONFIG_SPL_BUILD #ifdef CONFIG_VIDEO #define CONFIG_VIDEO_MXS diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index a30d2c0879..1bdd577940 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -157,12 +157,6 @@ #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ -#ifdef CONFIG_FSL_QSPI -#define CONFIG_SYS_FSL_QSPI_AHB -#define FSL_QSPI_FLASH_NUM 1 -#define FSL_QSPI_FLASH_SIZE SZ_32M -#endif - /* USB Configs */ #ifdef CONFIG_CMD_USB #define CONFIG_EHCI_HCD_INIT_AFTER_RESET diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index af335bcfff..3d42d26aa4 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -160,12 +160,6 @@ #define CONFIG_SOFT_SPI -#ifdef CONFIG_FSL_QSPI -#define CONFIG_SYS_FSL_QSPI_AHB -#define FSL_QSPI_FLASH_NUM 1 -#define FSL_QSPI_FLASH_SIZE SZ_32M -#endif - #ifdef CONFIG_CMD_NET #define CONFIG_FEC_ENET_DEV 1 #if (CONFIG_FEC_ENET_DEV == 0) diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index e7d35ed648..fa59748776 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -154,12 +154,4 @@ #define CONFIG_VIDEO_BMP_LOGO #endif -#ifdef CONFIG_FSL_QSPI -#define CONFIG_SYS_FSL_QSPI_AHB -#define FSL_QSPI_FLASH_NUM 1 -#define FSL_QSPI_FLASH_SIZE SZ_64M -#define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR -#define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index 72f8d08a66..d4d6ad2143 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -26,13 +26,6 @@ #define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_MAX_NAND_DEVICE 1 -/* QSPI Configs*/ -#ifdef CONFIG_FSL_QSPI -#define FSL_QSPI_FLASH_SIZE (SZ_16M) -#define FSL_QSPI_FLASH_NUM 2 -#define CONFIG_SYS_FSL_QSPI_LE -#endif - #define CONFIG_LOADADDR 0x82000000 diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 3ab3231943..d52a5a7e83 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -43,14 +43,6 @@ #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_FEC_MXC_PHYADDR 0 -/* QSPI Configs*/ - -#ifdef CONFIG_FSL_QSPI -#define FSL_QSPI_FLASH_SIZE (1 << 24) -#define FSL_QSPI_FLASH_NUM 2 -#define CONFIG_SYS_FSL_QSPI_LE -#endif - /* I2C Configs */ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC diff --git a/include/dt-bindings/pinctrl/pins-imxrt1020.h b/include/dt-bindings/pinctrl/pins-imxrt1020.h index c6bacb7378..b3a833bde2 100644 --- a/include/dt-bindings/pinctrl/pins-imxrt1020.h +++ b/include/dt-bindings/pinctrl/pins-imxrt1020.h @@ -7,8 +7,6 @@ #ifndef _DT_BINDINGS_PINCTRL_IMXRT1020_PINFUNC_H #define _DT_BINDINGS_PINCTRL_IMXRT1020_PINFUNC_H -/* TODO: continue from LPI2C4_SDA_SELECT_INPUT */ - #define IMX_PAD_SION 0x40000000 /* diff --git a/include/imx_sip.h b/include/imx_sip.h index 139ff61b8a..26dbe0421a 100644 --- a/include/imx_sip.h +++ b/include/imx_sip.h @@ -7,7 +7,10 @@ #define _IMX_SIP_H_ #define IMX_SIP_GPC 0xC2000000 -#define IMX_SIP_GPC_PM_DOMAIN 0x03 +#define IMX_SIP_GPC_PM_DOMAIN 0x03 + +#define IMX_SIP_BUILDINFO 0xC2000003 +#define IMX_SIP_BUILDINFO_GET_COMMITHASH 0x00 #define IMX_SIP_SRC 0xC2000005 #define IMX_SIP_SRC_M4_START 0x00 diff --git a/include/micrel.h b/include/micrel.h index 3e6b5312d8..a2593c5b10 100644 --- a/include/micrel.h +++ b/include/micrel.h @@ -23,6 +23,16 @@ #define MII_KSZ9031_FLP_BURST_TX_LO 0x3 #define MII_KSZ9031_FLP_BURST_TX_HI 0x4 +#define MII_KSZ9x31_SILICON_REV_MASK 0xfffff0 + +#define MII_KSZ9131_RXTXDLL_BYPASS BIT(12) +#define MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL 0x4c +#define MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL 0x4d + +#define PHY_ID_KSZ9031 0x00221620 +#define PHY_ID_KSZ9131 0x00221640 + + /* Registers */ #define MMD_ACCESS_CONTROL 0xd #define MMD_ACCESS_REG_DATA 0xe @@ -35,5 +45,6 @@ int ksz9031_phy_extended_write(struct phy_device *phydev, int devaddr, int regnum, u16 mode, u16 val); int ksz9031_phy_extended_read(struct phy_device *phydev, int devaddr, int regnum, u16 mode); +int ksz9xx1_phy_get_id(struct phy_device *phydev); #endif |