diff options
Diffstat (limited to 'drivers/phy/marvell/utmi_phy.h')
| -rw-r--r-- | drivers/phy/marvell/utmi_phy.h | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/drivers/phy/marvell/utmi_phy.h b/drivers/phy/marvell/utmi_phy.h index 682a3acc40..8a570bae73 100644 --- a/drivers/phy/marvell/utmi_phy.h +++ b/drivers/phy/marvell/utmi_phy.h @@ -38,6 +38,12 @@ #define UTMI_CALIB_CTRL_IMPCAL_VTH_OFFSET 8 #define UTMI_CALIB_CTRL_IMPCAL_VTH_MASK \ (0x7 << UTMI_CALIB_CTRL_IMPCAL_VTH_OFFSET) +#define UTMI_CALIB_CTRL_IMPCAL_START_OFFSET 13 +#define UTMI_CALIB_CTRL_IMPCAL_START_MASK \ + (0x1 << UTMI_CALIB_CTRL_IMPCAL_START_OFFSET) +#define UTMI_CALIB_CTRL_PLLCAL_START_OFFSET 22 +#define UTMI_CALIB_CTRL_PLLCAL_START_MASK \ + (0x1 << UTMI_CALIB_CTRL_PLLCAL_START_OFFSET) #define UTMI_CALIB_CTRL_IMPCAL_DONE_OFFSET 23 #define UTMI_CALIB_CTRL_IMPCAL_DONE_MASK \ (0x1 << UTMI_CALIB_CTRL_IMPCAL_DONE_OFFSET) @@ -45,15 +51,21 @@ #define UTMI_CALIB_CTRL_PLLCAL_DONE_MASK \ (0x1 << UTMI_CALIB_CTRL_PLLCAL_DONE_OFFSET) -#define UTMI_TX_CH_CTRL_REG 0xC +#define UTMI_TX_CH_CTRL_REG 0x0 #define UTMI_TX_CH_CTRL_DRV_EN_LS_OFFSET 12 #define UTMI_TX_CH_CTRL_DRV_EN_LS_MASK \ (0xf << UTMI_TX_CH_CTRL_DRV_EN_LS_OFFSET) #define UTMI_TX_CH_CTRL_IMP_SEL_LS_OFFSET 16 #define UTMI_TX_CH_CTRL_IMP_SEL_LS_MASK \ (0xf << UTMI_TX_CH_CTRL_IMP_SEL_LS_OFFSET) +#define UTMI_TX_CH_CTRL_AMP_OFFSET 20 +#define UTMI_TX_CH_CTRL_AMP_MASK \ + (0x7 << UTMI_TX_CH_CTRL_AMP_OFFSET) -#define UTMI_RX_CH_CTRL0_REG 0x14 +#define UTMI_RX_CH_CTRL0_REG 0x8 +#define UTMI_RX_CH_CTRL0_DISCON_THRESH_OFFSET 8 +#define UTMI_RX_CH_CTRL0_DISCON_THRESH_MASK \ + (0x3 << UTMI_RX_CH_CTRL0_DISCON_THRESH_OFFSET) #define UTMI_RX_CH_CTRL0_SQ_DET_OFFSET 15 #define UTMI_RX_CH_CTRL0_SQ_DET_MASK \ (0x1 << UTMI_RX_CH_CTRL0_SQ_DET_OFFSET) @@ -61,15 +73,15 @@ #define UTMI_RX_CH_CTRL0_SQ_ANA_DTC_MASK \ (0x1 << UTMI_RX_CH_CTRL0_SQ_ANA_DTC_OFFSET) -#define UTMI_RX_CH_CTRL1_REG 0x18 +#define UTMI_RX_CH_CTRL1_REG 0xc #define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_OFFSET 0 #define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_MASK \ - (0x3 << UTMI_RX_CH_CTRL1_SQ_AMP_CAL_OFFSET) + (0x7 << UTMI_RX_CH_CTRL1_SQ_AMP_CAL_OFFSET) #define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_EN_OFFSET 3 #define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_EN_MASK \ (0x1 << UTMI_RX_CH_CTRL1_SQ_AMP_CAL_EN_OFFSET) -#define UTMI_CTRL_STATUS0_REG 0x24 +#define UTMI_CTRL_STATUS0_REG 0x18 #define UTMI_CTRL_STATUS0_SUSPENDM_OFFSET 22 #define UTMI_CTRL_STATUS0_SUSPENDM_MASK \ (0x1 << UTMI_CTRL_STATUS0_SUSPENDM_OFFSET) @@ -77,7 +89,7 @@ #define UTMI_CTRL_STATUS0_TEST_SEL_MASK \ (0x1 << UTMI_CTRL_STATUS0_TEST_SEL_OFFSET) -#define UTMI_CHGDTC_CTRL_REG 0x38 +#define UTMI_CHGDTC_CTRL_REG 0x2c #define UTMI_CHGDTC_CTRL_VDAT_OFFSET 8 #define UTMI_CHGDTC_CTRL_VDAT_MASK \ (0x3 << UTMI_CHGDTC_CTRL_VDAT_OFFSET) |