15 files changed, 0 insertions, 30 deletions
diff --git a/drivers/clk/at91/clk-plladiv.c b/drivers/clk/at91/clk-plladiv.c
index 0599d2893b..520fd13f63 100644
--- a/drivers/clk/at91/clk-plladiv.c
+++ b/drivers/clk/at91/clk-plladiv.c
@@ -12,8 +12,6 @@
 #include <mach/at91_pmc.h>
 #include "pmc.h"
 
-DECLARE_GLOBAL_DATA_PTR;
-
 static int at91_plladiv_clk_enable(struct clk *clk)
 {
 	return 0;
diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c
index 875bf293f9..54970b949f 100644
--- a/drivers/clk/at91/clk-utmi.c
+++ b/drivers/clk/at91/clk-utmi.c
@@ -14,8 +14,6 @@
 #include <mach/sama5_sfr.h>
 #include "pmc.h"
 
-DECLARE_GLOBAL_DATA_PTR;
-
 /*
  * The purpose of this clock is to generate a 480 MHz signal. A different
  * rate can't be configured.
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index 0c0881237c..de8013e40a 100644
--- a/drivers/clk/at91/sckc.c
+++ b/drivers/clk/at91/sckc.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <dm.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 static const struct udevice_id at91_sckc_match[] = {
 	{ .compatible = "atmel,at91sam9x5-sckc" },
 	{}
diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c
index 4362d583cb..56ef08c032 100644
--- a/drivers/clk/clk-hsdk-cgu.c
+++ b/drivers/clk/clk-hsdk-cgu.c
@@ -59,8 +59,6 @@
  *                     |---------------------------->
  */
 
-DECLARE_GLOBAL_DATA_PTR;
-
 #define CGU_ARC_IDIV		0x080
 #define CGU_TUN_IDIV_TUN	0x380
 #define CGU_TUN_IDIV_ROM	0x390
diff --git a/drivers/clk/clk_stm32h7.c b/drivers/clk/clk_stm32h7.c
index 9ee2e2e999..5516b48600 100644
--- a/drivers/clk/clk_stm32h7.c
+++ b/drivers/clk/clk_stm32h7.c
@@ -15,8 +15,6 @@
 
 #include <dt-bindings/clock/stm32h7-clks.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 /* RCC CR specific definitions */
 #define RCC_CR_HSION			BIT(0)
 #define RCC_CR_HSIRDY			BIT(2)
diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c
index d0d6c898bc..3f249752fb 100644
--- a/drivers/clk/clk_zynqmp.c
+++ b/drivers/clk/clk_zynqmp.c
@@ -13,8 +13,6 @@
 #include <asm/arch/sys_proto.h>
 #include <dm.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 static const resource_size_t zynqmp_crf_apb_clkc_base = 0xfd1a0020;
 static const resource_size_t zynqmp_crl_apb_clkc_base = 0xff5e0020;
 
diff --git a/drivers/clk/exynos/clk-exynos7420.c b/drivers/clk/exynos/clk-exynos7420.c
index e34945dbbc..832b2d8765 100644
--- a/drivers/clk/exynos/clk-exynos7420.c
+++ b/drivers/clk/exynos/clk-exynos7420.c
@@ -14,8 +14,6 @@
 #include <dt-bindings/clock/exynos7420-clk.h>
 #include "clk-pll.h"
 
-DECLARE_GLOBAL_DATA_PTR;
-
 #define DIVIDER(reg, shift, mask)	\
 	(((readl(reg) >> shift) & mask) + 1)
 
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 5e11318042..c8aab7bb7d 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -17,8 +17,6 @@
 #include <dt-bindings/clock/rk3036-cru.h>
 #include <linux/log2.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 enum {
 	VCO_MAX_HZ	= 2400U * 1000000,
 	VCO_MIN_HZ	= 600 * 1000000,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 7b479e79bb..b4dd8d261a 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -18,8 +18,6 @@
 #include <dt-bindings/clock/rk3128-cru.h>
 #include <linux/log2.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 enum {
 	VCO_MAX_HZ	= 2400U * 1000000,
 	VCO_MIN_HZ	= 600 * 1000000,
diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index cfe6abe470..e6bf044236 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -23,8 +23,6 @@
 #include <dm/uclass-internal.h>
 #include <linux/log2.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 enum rk3188_clk_type {
 	RK3188_CRU,
 	RK3188A_CRU,
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index ebcab73002..91f5208aa4 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -17,8 +17,6 @@
 #include <dt-bindings/clock/rk3228-cru.h>
 #include <linux/log2.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 enum {
 	VCO_MAX_HZ	= 3200U * 1000000,
 	VCO_MIN_HZ	= 800 * 1000000,
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 046b4e4c2f..f9a1e969a8 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -18,8 +18,6 @@
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3328-cru.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 struct pll_div {
 	u32 refdiv;
 	u32 fbdiv;
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index ea00f1fc9c..e5a14ba472 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -20,8 +20,6 @@
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3368-cru.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 struct rk3368_clk_plat {
 	struct dtd_rockchip_rk3368_cru dtd;
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index fb74c441ff..86d8ca55bf 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -20,8 +20,6 @@
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3399-cru.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 struct rk3399_clk_plat {
 	struct dtd_rockchip_rk3399_cru dtd;
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index 42341a8566..1cd8ab5d58 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -17,8 +17,6 @@
 #include <dm/lists.h>
 #include <dt-bindings/clock/rv1108-cru.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 enum {
 	VCO_MAX_HZ	= 2400U * 1000000,
 	VCO_MIN_HZ	= 600 * 1000000,