diff options
Diffstat (limited to 'configs/P1010RDB-PB_SPIFLASH_defconfig')
| -rw-r--r-- | configs/P1010RDB-PB_SPIFLASH_defconfig | 25 |
1 files changed, 22 insertions, 3 deletions
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 9b05f48468..a630e961ee 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -1,6 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_IMMR=0xFFE00000 -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -8,7 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" -CONFIG_SPL_TEXT_BASE=0xD0001000 +CONFIG_SPL_TEXT_BASE=0xD0000000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -16,6 +15,11 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_PCIE1=y +CONFIG_PCIE2=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -29,11 +33,22 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_ID_EEPROM=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MAX_SIZE=0x18000 CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y +CONFIG_SPL_FLUSH_IMAGE=y +CONFIG_SPL_GD_ADDR=0xd0018000 +CONFIG_SPL_RELOC_TEXT_BASE=0xd0000000 +CONFIG_SPL_RELOC_STACK=0xd001c000 +CONFIG_SPL_RELOC_MALLOC=y +CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 +CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y +CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y +CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 @@ -55,10 +70,14 @@ CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y +CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y |