diff options
Diffstat (limited to 'board')
31 files changed, 388 insertions, 161 deletions
diff --git a/board/broadcom/bcm968360bg/Kconfig b/board/broadcom/bcm968360bg/Kconfig new file mode 100644 index 0000000000..dd372f126a --- /dev/null +++ b/board/broadcom/bcm968360bg/Kconfig @@ -0,0 +1,17 @@ +if ARCH_BCM68360 + +config SYS_VENDOR + default "broadcom" + +config SYS_BOARD + default "bcm968360bg" + +config SYS_CONFIG_NAME + default "broadcom_bcm968360bg" + +endif + +config TARGET_BCM968360BG + bool "Support Broadcom bcm968360bg" + depends on ARCH_BCM68360 + select ARM64 diff --git a/board/broadcom/bcm968360bg/MAINTAINERS b/board/broadcom/bcm968360bg/MAINTAINERS new file mode 100644 index 0000000000..cfcbbc51f8 --- /dev/null +++ b/board/broadcom/bcm968360bg/MAINTAINERS @@ -0,0 +1,6 @@ +BCM968360BG BOARD +M: Philippe Reynes <philippe.reynes@softathome.com> +S: Maintained +F: board/broadcom/bcm968360bg +F: include/configs/broadcom_bcm968360bg.h +F: configs/bcm968360bg_ram_defconfig diff --git a/board/broadcom/bcm968360bg/Makefile b/board/broadcom/bcm968360bg/Makefile new file mode 100644 index 0000000000..d099c1cf35 --- /dev/null +++ b/board/broadcom/bcm968360bg/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += bcm968360bg.o diff --git a/board/broadcom/bcm968360bg/bcm968360bg.c b/board/broadcom/bcm968360bg/bcm968360bg.c new file mode 100644 index 0000000000..a5fbc1d297 --- /dev/null +++ b/board/broadcom/bcm968360bg/bcm968360bg.c @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Philippe Reynes <philippe.reynes@softathome.com> + */ + +#include <common.h> +#include <fdtdec.h> +#include <linux/io.h> + +#ifdef CONFIG_ARM64 +#include <asm/armv8/mmu.h> + +static struct mm_region broadcom_bcm968360bg_mem_map[] = { + { + /* RAM */ + .virt = 0x00000000UL, + .phys = 0x00000000UL, + .size = 8UL * SZ_1G, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + /* SoC */ + .virt = 0x80000000UL, + .phys = 0x80000000UL, + .size = 0xff80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = broadcom_bcm968360bg_mem_map; +#endif + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + if (fdtdec_setup_mem_size_base() != 0) + printf("fdtdec_setup_mem_size_base() has failed\n"); + + return 0; +} + +int dram_init_banksize(void) +{ + fdtdec_setup_memory_banksize(); + + return 0; +} + +int print_cpuinfo(void) +{ + return 0; +} diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c index 1151e77531..aa93534ac6 100644 --- a/board/freescale/ls1028a/ls1028a.c +++ b/board/freescale/ls1028a/ls1028a.c @@ -25,6 +25,7 @@ #include <fdtdec.h> #include <miiphy.h> #include "../common/qixis.h" +#include "../drivers/net/fsl_enetc.h" DECLARE_GLOBAL_DATA_PTR; @@ -108,8 +109,8 @@ int board_eth_init(bd_t *bis) return pci_eth_init(bis); } -#if defined(CONFIG_ARCH_MISC_INIT) -int arch_misc_init(void) +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) { config_board_mux(); @@ -162,6 +163,10 @@ int ft_board_setup(void *blob, bd_t *bd) fdt_fixup_icid(blob); +#ifdef CONFIG_FSL_ENETC + fdt_fixup_enetc_mac(blob); +#endif + return 0; } #endif diff --git a/board/freescale/ls1046afrwy/eth.c b/board/freescale/ls1046afrwy/eth.c index 9f8bd92850..d38e4d7ac7 100644 --- a/board/freescale/ls1046afrwy/eth.c +++ b/board/freescale/ls1046afrwy/eth.c @@ -53,6 +53,8 @@ int board_eth_init(bd_t *bis) fm_info_set_mdio(FM1_DTSEC10, dev); fm_info_set_mdio(FM1_DTSEC1, dev); + fm_disable_port(FM1_DTSEC9); + cpu_eth_init(bis); #endif diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index 4ecf6dce68..0bd397a0be 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -811,13 +811,6 @@ void detail_board_ddr_info(void) print_ddr_info(0); } -#if defined(CONFIG_ARCH_MISC_INIT) -int arch_misc_init(void) -{ - return 0; -} -#endif - #ifdef CONFIG_FSL_MC_ENET void board_quiesce_devices(void) { diff --git a/board/freescale/ls2080a/ls2080a.c b/board/freescale/ls2080a/ls2080a.c index 949b57c24e..f144bf6b37 100644 --- a/board/freescale/ls2080a/ls2080a.c +++ b/board/freescale/ls2080a/ls2080a.c @@ -49,13 +49,6 @@ void detail_board_ddr_info(void) #endif } -#if defined(CONFIG_ARCH_MISC_INIT) -int arch_misc_init(void) -{ - return 0; -} -#endif - int board_eth_init(bd_t *bis) { int error = 0; diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index 5792a564bc..4034bdee28 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -289,13 +289,6 @@ void detail_board_ddr_info(void) #endif } -#if defined(CONFIG_ARCH_MISC_INIT) -int arch_misc_init(void) -{ - return 0; -} -#endif - #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) void fdt_fixup_board_enet(void *fdt) { diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 6a1b8e3f53..282aaf47fb 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -318,13 +318,6 @@ void detail_board_ddr_info(void) #endif } -#if defined(CONFIG_ARCH_MISC_INIT) -int arch_misc_init(void) -{ - return 0; -} -#endif - #ifdef CONFIG_FSL_MC_ENET void fdt_fixup_board_enet(void *fdt) { diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 7536153433..6555b5ad3a 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2018-2019 NXP + * Copyright 2018-2020 NXP */ #include <common.h> @@ -132,7 +132,7 @@ int board_fix_fdt(void *fdt) { "ccsr", "dbi" }, { "pf_ctrl", "ctrl" } }; - int off = -1, i; + int off = -1, i = 0; if (IS_SVR_REV(get_svr(), 1, 0)) return 0; @@ -149,7 +149,7 @@ int board_fix_fdt(void *fdt) reg_name = reg_names; remaining_names_len = names_len - (reg_name - reg_names); - for (i = 0; (i < ARRAY_SIZE(reg_names_map)) && names_len; i++) { + while ((i < ARRAY_SIZE(reg_names_map)) && remaining_names_len) { old_name_len = strlen(reg_names_map[i].old_str); new_name_len = strlen(reg_names_map[i].new_str); if (memcmp(reg_name, reg_names_map[i].old_str, @@ -165,6 +165,7 @@ int board_fix_fdt(void *fdt) new_name_len); names_len -= old_name_len; names_len += new_name_len; + i++; } reg_name = memchr(reg_name, '\0', remaining_names_len); @@ -191,9 +192,9 @@ void esdhc_dspi_status_fixup(void *blob) { const char esdhc0_path[] = "/soc/esdhc@2140000"; const char esdhc1_path[] = "/soc/esdhc@2150000"; - const char dspi0_path[] = "/soc/dspi@2100000"; - const char dspi1_path[] = "/soc/dspi@2110000"; - const char dspi2_path[] = "/soc/dspi@2120000"; + const char dspi0_path[] = "/soc/spi@2100000"; + const char dspi1_path[] = "/soc/spi@2110000"; + const char dspi2_path[] = "/soc/spi@2120000"; struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); u32 sdhc1_base_pmux; @@ -243,10 +244,12 @@ void esdhc_dspi_status_fixup(void *blob) & FSL_CHASSIS3_IIC5_PMUX_MASK; iic5_pmux >>= FSL_CHASSIS3_IIC5_PMUX_SHIFT; - if (iic5_pmux == IIC5_PMUX_SPI3) { + if (iic5_pmux == IIC5_PMUX_SPI3) do_fixup_by_path(blob, dspi2_path, "status", "okay", sizeof("okay"), 1); - } + else + do_fixup_by_path(blob, dspi2_path, "status", "disabled", + sizeof("disabled"), 1); } #endif @@ -580,8 +583,8 @@ void detail_board_ddr_info(void) print_ddr_info(0); } -#if defined(CONFIG_ARCH_MISC_INIT) -int arch_misc_init(void) +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) { config_board_mux(); diff --git a/board/keymile/kmp204x/qrio.c b/board/keymile/common/qrio.c index 03026a277b..0cb33663aa 100644 --- a/board/keymile/kmp204x/qrio.c +++ b/board/keymile/common/qrio.c @@ -6,8 +6,8 @@ #include <common.h> -#include "../common/common.h" -#include "kmp204x.h" +#include "common.h" +#include "qrio.h" /* QRIO GPIO register offsets */ #define DIRECT_OFF 0x18 @@ -135,10 +135,10 @@ void qrio_prstcfg(u8 bit, u8 mode) prstcfg = in_be32(qrio_base + PRSTCFG_OFF); for (i = 0; i < 2; i++) { - if (mode & (1<<i)) - set_bit(2*bit+i, &prstcfg); + if (mode & (1 << i)) + set_bit(2 * bit + i, &prstcfg); else - clear_bit(2*bit+i, &prstcfg); + clear_bit(2 * bit + i, &prstcfg); } out_be32(qrio_base + PRSTCFG_OFF, prstcfg); @@ -180,6 +180,7 @@ void qrio_cpuwd_flag(bool flag) { u8 reason1; void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + reason1 = in_8(qrio_base + REASON1_OFF); if (flag) reason1 |= REASON1_CPUWD; @@ -188,6 +189,30 @@ void qrio_cpuwd_flag(bool flag) out_8(qrio_base + REASON1_OFF, reason1); } +#define REASON0_OFF 0x13 +#define REASON0_SWURST 0x80 +#define REASON0_CPURST 0x40 +#define REASON0_BPRST 0x20 +#define REASON0_COPRST 0x10 +#define REASON0_SWCRST 0x08 +#define REASON0_WDRST 0x04 +#define REASON0_KBRST 0x02 +#define REASON0_POWUP 0x01 +#define UNIT_RESET\ + (REASON0_POWUP | REASON0_COPRST | REASON0_KBRST |\ + REASON0_BPRST | REASON0_SWURST | REASON0_WDRST) +#define CORE_RESET ((REASON1_CPUWD << 8) | REASON0_SWCRST) + +bool qrio_reason_unitrst(void) +{ + u16 reason; + void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + + reason = in_be16(qrio_base + REASON1_OFF); + + return (reason & UNIT_RESET) > 0; +} + #define RSTCFG_OFF 0x11 void qrio_uprstreq(u8 mode) @@ -204,3 +229,51 @@ void qrio_uprstreq(u8 mode) out_8(qrio_base + RSTCFG_OFF, rstcfg); } + +/* I2C deblocking uses the algorithm defined in board/keymile/common/common.c + * 2 dedicated QRIO GPIOs externally pull the SCL and SDA lines + * For I2C only the low state is activly driven and high state is pulled-up + * by a resistor. Therefore the deblock GPIOs are used + * -> as an active output to drive a low state + * -> as an open-drain input to have a pulled-up high state + */ + +/* By default deblock GPIOs are floating */ +void i2c_deblock_gpio_cfg(void) +{ + /* set I2C bus 1 deblocking GPIOs input, but 0 value for open drain */ + qrio_gpio_direction_input(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SCL); + qrio_gpio_direction_input(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SDA); + + qrio_set_gpio(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SCL, 0); + qrio_set_gpio(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SDA, 0); +} + +void set_sda(int state) +{ + qrio_set_opendrain_gpio(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SDA, state); +} + +void set_scl(int state) +{ + qrio_set_opendrain_gpio(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SCL, state); +} + +int get_sda(void) +{ + return qrio_get_gpio(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SDA); +} + +int get_scl(void) +{ + return qrio_get_gpio(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SCL); +} + diff --git a/board/keymile/common/qrio.h b/board/keymile/common/qrio.h new file mode 100644 index 0000000000..a6cfd8165d --- /dev/null +++ b/board/keymile/common/qrio.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2018 ABB + * Valentin Longchamp <valentin.longchamp@ch.abb.com> + */ + +#ifndef __QRIO_H +#define __QRIO_H + +/* QRIO GPIO ports */ +#define QRIO_GPIO_A 0x40 +#define QRIO_GPIO_B 0x60 + +int qrio_get_gpio(u8 port_off, u8 gpio_nr); +void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val); +void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value); +void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value); +void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr); + +/* QRIO Periphery reset configurations */ +#define PRSTCFG_POWUP_UNIT_CORE_RST 0x0 +#define PRSTCFG_POWUP_UNIT_RST 0x1 +#define PRSTCFG_POWUP_RST 0x3 + +void qrio_prst(u8 bit, bool en, bool wden); +void qrio_wdmask(u8 bit, bool wden); +void qrio_prstcfg(u8 bit, u8 mode); +void qrio_set_leds(void); +void qrio_enable_app_buffer(void); +void qrio_cpuwd_flag(bool flag); +bool qrio_reason_unitrst(void); + +/* QRIO uP reset request configurations */ +#define UPREQ_UNIT_RST 0x0 +#define UPREQ_CORE_RST 0x1 + +void qrio_uprstreq(u8 mode); + +void i2c_deblock_gpio_cfg(void); +#endif /* __QRIO_H */ diff --git a/board/keymile/km_arm/Kconfig b/board/keymile/km_arm/Kconfig index be6b162815..4b21db8573 100644 --- a/board/keymile/km_arm/Kconfig +++ b/board/keymile/km_arm/Kconfig @@ -7,6 +7,18 @@ config KM_FPGA_CONFIG help Include capability to change FPGA configuration. +config KM_FPGA_FORCE_CONFIG + bool "FPGA reconfiguration" + default n + help + If yes we force to reconfigure the FPGA always + +config KM_FPGA_NO_RESET + bool "FPGA skip reset" + default n + help + If yes we skip triggering a reset of the FPGA + config KM_ENV_IS_IN_SPI_NOR bool "Environment in SPI NOR" default n diff --git a/board/keymile/km_arm/MAINTAINERS b/board/keymile/km_arm/MAINTAINERS index 17926017c3..3eeb509060 100644 --- a/board/keymile/km_arm/MAINTAINERS +++ b/board/keymile/km_arm/MAINTAINERS @@ -8,5 +8,4 @@ F: configs/km_kirkwood_128m16_defconfig F: configs/km_kirkwood_pci_defconfig F: configs/kmcoge5un_defconfig F: configs/kmnusa_defconfig -F: configs/kmsugp1_defconfig -F: configs/kmsuv31_defconfig +F: configs/kmsuse2_defconfig diff --git a/board/keymile/km_arm/fpga_config.c b/board/keymile/km_arm/fpga_config.c index 051e167fd5..8bb0470bc3 100644 --- a/board/keymile/km_arm/fpga_config.c +++ b/board/keymile/km_arm/fpga_config.c @@ -82,6 +82,7 @@ static int boco_set_bits(u8 reg, u8 flags) #define FPGA_INIT_B 0x10 #define FPGA_DONE 0x20 +#ifndef CONFIG_KM_FPGA_FORCE_CONFIG static int fpga_done(void) { int ret = 0; @@ -100,13 +101,16 @@ static int fpga_done(void) return regval & FPGA_DONE ? 1 : 0; } +#endif /* CONFIG_KM_FPGA_FORCE_CONFIG */ -int skip; +static int skip; int trigger_fpga_config(void) { int ret = 0; + skip = 0; +#ifndef CONFIG_KM_FPGA_FORCE_CONFIG /* if the FPGA is already configured, we do not want to * reconfigure it */ skip = 0; @@ -115,6 +119,7 @@ int trigger_fpga_config(void) skip = 1; return 0; } +#endif /* CONFIG_KM_FPGA_FORCE_CONFIG */ if (check_boco2()) { /* we have a BOCO2, this has to be triggered here */ @@ -188,29 +193,12 @@ int wait_for_fpga_config(void) return 0; } -#if defined(KM_PCIE_RESET_MPP7) - -#define KM_PEX_RST_GPIO_PIN 7 +#if defined(CONFIG_KM_FPGA_NO_RESET) int fpga_reset(void) { - if (!check_boco2()) { - /* we do not have BOCO2, this is not really used */ - return 0; - } - - printf("PCIe reset through GPIO7: "); - /* apply PCIe reset via GPIO */ - kw_gpio_set_valid(KM_PEX_RST_GPIO_PIN, 1); - kw_gpio_direction_output(KM_PEX_RST_GPIO_PIN, 1); - kw_gpio_set_value(KM_PEX_RST_GPIO_PIN, 0); - udelay(1000*10); - kw_gpio_set_value(KM_PEX_RST_GPIO_PIN, 1); - - printf(" done\n"); - + /* no dedicated reset pin for FPGA */ return 0; } - #else #define PRST1 0x4 diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c index 473acfca68..7d191ab860 100644 --- a/board/keymile/km_arm/km_arm.c +++ b/board/keymile/km_arm/km_arm.c @@ -69,11 +69,7 @@ static const u32 kwmpp_config[] = { MPP4_NF_IO6, MPP5_NF_IO7, MPP6_SYSRST_OUTn, -#if defined(KM_PCIE_RESET_MPP7) - MPP7_GPO, -#else MPP7_PEX_RST_OUTn, -#endif #if defined(CONFIG_SYS_I2C_SOFT) MPP8_GPIO, /* SDA */ MPP9_GPIO, /* SCL */ diff --git a/board/keymile/kmp204x/Makefile b/board/keymile/kmp204x/Makefile index 626c627be7..5523ee99aa 100644 --- a/board/keymile/kmp204x/Makefile +++ b/board/keymile/kmp204x/Makefile @@ -6,5 +6,5 @@ # See file CREDITS for list of people who contributed to this # project. -obj-y := kmp204x.o ddr.o eth.o tlb.o pci.o law.o qrio.o \ - ../common/common.o ../common/ivm.o +obj-y := kmp204x.o ddr.o eth.o tlb.o pci.o law.o ../common/common.o\ + ../common/ivm.o ../common/qrio.o diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index cfb23a53f7..0a6cf1fd29 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -24,6 +24,7 @@ #include <fm_eth.h> #include "../common/common.h" +#include "../common/qrio.h" #include "kmp204x.h" static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; @@ -35,51 +36,6 @@ int checkboard(void) return 0; } -/* I2C deblocking uses the algorithm defined in board/keymile/common/common.c - * 2 dedicated QRIO GPIOs externally pull the SCL and SDA lines - * For I2C only the low state is activly driven and high state is pulled-up - * by a resistor. Therefore the deblock GPIOs are used - * -> as an active output to drive a low state - * -> as an open-drain input to have a pulled-up high state - */ - -/* QRIO GPIOs used for deblocking */ -#define DEBLOCK_PORT1 GPIO_A -#define DEBLOCK_SCL1 20 -#define DEBLOCK_SDA1 21 - -/* By default deblock GPIOs are floating */ -static void i2c_deblock_gpio_cfg(void) -{ - /* set I2C bus 1 deblocking GPIOs input, but 0 value for open drain */ - qrio_gpio_direction_input(DEBLOCK_PORT1, DEBLOCK_SCL1); - qrio_gpio_direction_input(DEBLOCK_PORT1, DEBLOCK_SDA1); - - qrio_set_gpio(DEBLOCK_PORT1, DEBLOCK_SCL1, 0); - qrio_set_gpio(DEBLOCK_PORT1, DEBLOCK_SDA1, 0); -} - -void set_sda(int state) -{ - qrio_set_opendrain_gpio(DEBLOCK_PORT1, DEBLOCK_SDA1, state); -} - -void set_scl(int state) -{ - qrio_set_opendrain_gpio(DEBLOCK_PORT1, DEBLOCK_SCL1, state); -} - -int get_sda(void) -{ - return qrio_get_gpio(DEBLOCK_PORT1, DEBLOCK_SDA1); -} - -int get_scl(void) -{ - return qrio_get_gpio(DEBLOCK_PORT1, DEBLOCK_SCL1); -} - - #define ZL30158_RST 8 #define BFTIC4_RST 0 #define RSTRQSR1_WDT_RR 0x00200000 @@ -138,7 +94,7 @@ int board_early_init_r(void) /* enable Application Buffer */ qrio_enable_app_buffer(); - return ret; + return 0; } unsigned long get_board_sys_clk(unsigned long dummy) @@ -297,7 +253,7 @@ int ft_board_setup(void *blob, bd_t *bd) #if defined(CONFIG_POST) /* DIC26_SELFTEST GPIO used to start factory test sw */ -#define SELFTEST_PORT GPIO_A +#define SELFTEST_PORT QRIO_GPIO_A #define SELFTEST_PIN 31 int post_hotkeys_pressed(void) diff --git a/board/keymile/kmp204x/kmp204x.h b/board/keymile/kmp204x/kmp204x.h index 4d14c44617..00e1a06662 100644 --- a/board/keymile/kmp204x/kmp204x.h +++ b/board/keymile/kmp204x/kmp204x.h @@ -4,31 +4,5 @@ * Valentin Longchamp <valentin.longchamp@keymile.com> */ -/* QRIO GPIO ports */ -#define GPIO_A 0x40 -#define GPIO_B 0x60 - -int qrio_get_gpio(u8 port_off, u8 gpio_nr); -void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val); -void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value); -void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value); -void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr); - -#define PRSTCFG_POWUP_UNIT_CORE_RST 0x0 -#define PRSTCFG_POWUP_UNIT_RST 0x1 -#define PRSTCFG_POWUP_RST 0x3 - -void qrio_prst(u8 bit, bool en, bool wden); -void qrio_wdmask(u8 bit, bool wden); -void qrio_prstcfg(u8 bit, u8 mode); -void qrio_set_leds(void); -void qrio_enable_app_buffer(void); -void qrio_cpuwd_flag(bool flag); -int qrio_reset_reason(void); - -#define UPREQ_UNIT_RST 0x0 -#define UPREQ_CORE_RST 0x1 - -void qrio_uprstreq(u8 mode); void pci_of_setup(void *blob, bd_t *bd); diff --git a/board/keymile/kmp204x/pci.c b/board/keymile/kmp204x/pci.c index a8047457f2..15bbc810a1 100644 --- a/board/keymile/kmp204x/pci.c +++ b/board/keymile/kmp204x/pci.c @@ -16,13 +16,14 @@ #include <asm/fsl_serdes.h> #include <linux/errno.h> +#include "../common/qrio.h" #include "kmp204x.h" #define PROM_SEL_L 11 /* control the PROM_SEL_L signal*/ static void toggle_fpga_eeprom_bus(bool cpu_own) { - qrio_gpio_direction_output(GPIO_A, PROM_SEL_L, !cpu_own); + qrio_gpio_direction_output(QRIO_GPIO_A, PROM_SEL_L, !cpu_own); } #define CONF_SEL_L 10 @@ -40,17 +41,17 @@ int trigger_fpga_config(void) toggle_fpga_eeprom_bus(false); /* assert CONF_SEL_L to be able to drive FPGA_PROG_L */ - qrio_gpio_direction_output(GPIO_A, CONF_SEL_L, 0); + qrio_gpio_direction_output(QRIO_GPIO_A, CONF_SEL_L, 0); /* trigger the config start */ - qrio_gpio_direction_output(GPIO_A, FPGA_PROG_L, 0); + qrio_gpio_direction_output(QRIO_GPIO_A, FPGA_PROG_L, 0); /* small delay for INIT_L line */ udelay(10); /* wait for FPGA_INIT to be asserted */ do { - init_l = qrio_get_gpio(GPIO_A, FPGA_INIT_L); + init_l = qrio_get_gpio(QRIO_GPIO_A, FPGA_INIT_L); if (timeout-- == 0) { printf("FPGA_INIT timeout\n"); ret = -EFAULT; @@ -60,7 +61,7 @@ int trigger_fpga_config(void) } while (init_l); /* deassert FPGA_PROG, config should start */ - qrio_set_gpio(GPIO_A, FPGA_PROG_L, 1); + qrio_set_gpio(QRIO_GPIO_A, FPGA_PROG_L, 1); return ret; } @@ -74,7 +75,7 @@ static int wait_for_fpga_config(void) printf("PCIe FPGA config:"); do { - done = qrio_get_gpio(GPIO_A, FPGA_DONE); + done = qrio_get_gpio(QRIO_GPIO_A, FPGA_DONE); if (timeout-- == 0) { printf(" FPGA_DONE timeout\n"); ret = -EFAULT; @@ -87,7 +88,7 @@ static int wait_for_fpga_config(void) err_out: /* deactive CONF_SEL and give the CPU conf EEPROM access */ - qrio_set_gpio(GPIO_A, CONF_SEL_L, 1); + qrio_set_gpio(QRIO_GPIO_A, CONF_SEL_L, 1); toggle_fpga_eeprom_bus(true); return ret; diff --git a/board/keymile/scripts/develop-common.txt b/board/keymile/scripts/develop-common.txt index 265f02f4ec..f77a26abe8 100644 --- a/board/keymile/scripts/develop-common.txt +++ b/board/keymile/scripts/develop-common.txt @@ -1,6 +1,6 @@ altbootcmd=run ${subbootcmds} bootcmd=run ${subbootcmds} -configure=run set_uimage; setenv tftppath ${IVM_Symbol} ; km_setboardid && saveenv && reset +configure=run set_uimage; run set_tftppath; km_setboardid && run try_import_nfs_path && saveenv && reset subbootcmds=tftpfdt tftpkernel nfsargs add_default boot nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${toolchain}/${arch} tftpfdt=if run set_fdthigh || test ${arch} != arm; then if tftpboot ${fdt_addr_r} ${tftppath}/fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb; then; else tftpboot ${fdt_addr_r} ${tftppath}/${hostname}.dtb; fi; else true; fi @@ -8,3 +8,5 @@ tftpkernel=tftpboot ${load_addr_r} ${tftppath}/${uimage} toolchain=/opt/eldk rootfssize=0 set_uimage=printenv uimage || setenv uimage uImage +set_tftppath=if test ${hostname} = kmcoge5un; then setenv tftppath CI5UN; else if test ${hostname} = kmcoge5ne; then setenv tftppath CI5NE; else setenv tftppath ${IVM_Symbol}; fi; fi +try_import_nfs_path=if tftpboot 0x200000 ${tftppath}/nfs-path.txt; then env import -t 0x200000 ${filesize}; else echo no auto nfs path imported; echo you can set nfsargs in /tftpboot/${tftppath}/nfs-path.txt and rerun develop; fi diff --git a/board/keymile/scripts/ramfs-common.txt b/board/keymile/scripts/ramfs-common.txt index d79ad2e21b..290c602aab 100644 --- a/board/keymile/scripts/ramfs-common.txt +++ b/board/keymile/scripts/ramfs-common.txt @@ -2,12 +2,14 @@ addramfs=setenv bootargs "${bootargs} phram.phram=rootfs${boot_bank},${rootfsadd boot_bank=-1 altbootcmd=run ${subbootcmds} bootcmd=run ${subbootcmds} -subbootcmds=tftpfdt tftpkernel setrootfsaddr tftpramfs flashargs add_default addpanic addramfs boot +subbootcmds=save_and_reset_once tftpfdt tftpkernel setrootfsaddr tftpramfs flashargs add_default addpanic addramfs boot +save_and_reset_once=setenv save_and_reset_once true && save && reset nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} -configure=run set_uimage; km_setboardid && saveenv && reset -rootfsfile=${hostname}/rootfsImage +configure=run set_uimage; run set_tftppath; km_setboardid && run try_import_rootfssize && saveenv && reset setrootfsaddr=setexpr value ${pnvramaddr} - ${rootfssize} && setenv rootfsaddr 0x${value} -tftpfdt=if run set_fdthigh || test ${arch} != arm; then tftpboot ${fdt_addr_r} ${hostname}/${hostname}.dtb; else true; fi -tftpkernel=tftpboot ${load_addr_r} ${hostname}/${uimage} -tftpramfs=tftpboot ${rootfsaddr} ${hostname}/rootfsImage +tftpfdt=if run set_fdthigh || test ${arch} != arm; then if tftpboot ${fdt_addr_r} ${tftppath}/fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb; then; else tftpboot ${fdt_addr_r} ${tftppath}/${hostname}.dtb; fi; else true; fi +tftpkernel=tftpboot ${load_addr_r} ${tftppath}/${uimage} +tftpramfs=tftpboot ${rootfsaddr} ${tftppath}/rootfsImage set_uimage=printenv uimage || setenv uimage uImage +set_tftppath=if test ${hostname} = kmcoge5un; then setenv tftppath CI5UN; else if test ${hostname} = kmcoge5ne; then setenv tftppath CI5NE; else setenv tftppath ${IVM_Symbol}; fi; fi +try_import_rootfssize=if tftpboot 0x200000 ${tftppath}/rootfssize.txt; then env import -t 0x200000 ${filesize}; else echo no auto rootfs size; echo you can set rootfssize in /tftpboot/${tftppath}/rootfssize.txt and rerun ramfs; fi diff --git a/board/mediatek/mt8518/mt8518_ap1.c b/board/mediatek/mt8518/mt8518_ap1.c index 9710907fe2..2ac7c6cd18 100644 --- a/board/mediatek/mt8518/mt8518_ap1.c +++ b/board/mediatek/mt8518/mt8518_ap1.c @@ -16,3 +16,21 @@ int board_init(void) debug("gd->fdt_blob is %p\n", gd->fdt_blob); return 0; } + +int board_late_init(void) +{ +#ifdef CONFIG_USB_GADGET + struct udevice *dev; + int ret; +#endif + +#ifdef CONFIG_USB_GADGET + ret = uclass_get_device(UCLASS_USB_GADGET_GENERIC, 0, &dev); + if (ret) { + pr_err("%s: Cannot find USB device\n", __func__); + return ret; + } +#endif + + return 0; +} diff --git a/board/novtech/meerkat96/MAINTAINERS b/board/novtech/meerkat96/MAINTAINERS index 0eca2940d5..2a53b63099 100644 --- a/board/novtech/meerkat96/MAINTAINERS +++ b/board/novtech/meerkat96/MAINTAINERS @@ -1,5 +1,5 @@ MEERKAT96 BOARD -M: Shawn Guo <shawn.guo@kernel.org> +M: Shawn Guo <shawnguo@kernel.org> S: Maintained F: board/novtech/meerkat96 F: include/configs/meerkat96.h diff --git a/board/ste/stemmy/Kconfig b/board/ste/stemmy/Kconfig new file mode 100644 index 0000000000..b890ba51cb --- /dev/null +++ b/board/ste/stemmy/Kconfig @@ -0,0 +1,12 @@ +if TARGET_STEMMY + +config SYS_BOARD + default "stemmy" + +config SYS_VENDOR + default "ste" + +config SYS_CONFIG_NAME + default "stemmy" + +endif diff --git a/board/ste/stemmy/MAINTAINERS b/board/ste/stemmy/MAINTAINERS new file mode 100644 index 0000000000..37daabea9c --- /dev/null +++ b/board/ste/stemmy/MAINTAINERS @@ -0,0 +1,6 @@ +STEMMY BOARD +M: Stephan Gerhold <stephan@gerhold.net> +S: Maintained +F: board/ste/stemmy/ +F: include/configs/stemmy.h +F: configs/stemmy_defconfig diff --git a/board/ste/stemmy/Makefile b/board/ste/stemmy/Makefile new file mode 100644 index 0000000000..1245099bc9 --- /dev/null +++ b/board/ste/stemmy/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +obj-y := stemmy.o diff --git a/board/ste/stemmy/README b/board/ste/stemmy/README new file mode 100644 index 0000000000..81f72426f2 --- /dev/null +++ b/board/ste/stemmy/README @@ -0,0 +1,49 @@ +ST-Ericsson U8500 Samsung "stemmy" board +======================================== + +The "stemmy" board supports Samsung smartphones released with +the ST-Ericsson NovaThor U8500 SoC, e.g. + + - Samsung Galaxy S III mini (GT-I8190) "golden" + - Samsung Galaxy S Advance (GT-I9070) "janice" + - Samsung Galaxy Xcover 2 (GT-S7710) "skomer" + +and likely others as well (untested). + +At the moment, U-Boot is intended to be chain-loaded from +the original Samsung bootloader, not replacing it entirely. + +Installation +------------ + +1. Setup cross compiler, e.g. export CROSS_COMPILE=arm-none-eabi- +2. make stemmy_defconfig +3. make + +For newer devices (golden and skomer), the U-Boot binary has to be packed into +an Android boot image. janice boots the raw U-Boot binary from the boot partition. + +4. Obtain mkbootimg, e.g. https://android.googlesource.com/platform/system/core/+/refs/tags/android-7.1.2_r37/mkbootimg/mkbootimg +5. mkbootimg \ + --kernel=u-boot.bin \ + --base=0x00000000 \ + --kernel_offset=0x00100000 \ + --ramdisk_offset=0x02000000 \ + --tags_offset=0x00000100 \ + --output=u-boot.img + +6. Enter Samsung download mode (press Power + Home + Volume Down) +7. Flash U-Boot image to Android boot partition using Heimdall: + https://gitlab.com/BenjaminDobell/Heimdall + + heimdall flash --Kernel u-boot.(bin|img) + +8. After reboot U-Boot prompt should appear via UART. + +UART +---- + +UART is available through the micro USB port, similar to the Carkit standard. +With a ~619kOhm resistor between ID and GND, 1.8V RX/TX is available at D+/D-. + +Make sure to connect the UART cable *before* turning on the phone. diff --git a/board/ste/stemmy/stemmy.c b/board/ste/stemmy/stemmy.c new file mode 100644 index 0000000000..8cf6f18755 --- /dev/null +++ b/board/ste/stemmy/stemmy.c @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2019 Stephan Gerhold <stephan@gerhold.net> + */ +#include <common.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE); + return 0; +} + +int board_init(void) +{ + return 0; +} diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 4a89bb0e7b..1180b86db3 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -318,6 +318,16 @@ F: configs/libretech_all_h3_cc_h2_plus_defconfig F: configs/libretech_all_h3_cc_h3_defconfig F: configs/libretech_all_h3_cc_h5_defconfig +LIBRETECH ALL-H3-IT BOARDS +M: Chen-Yu Tsai <wens@csie.org> +S: Maintained +F: configs/libretech_all_h3_it_h5_defconfig + +LIBRETECH ALL-H5-CC BOARDS +M: Chen-Yu Tsai <wens@csie.org> +S: Maintained +F: configs/libretech_all_h5_cc_h5_defconfig + NANOPI-M1 BOARD M: Mylène Josserand <mylene.josserand@free-electrons.com> S: Maintained |