diff options
Diffstat (limited to 'board')
| -rw-r--r-- | board/samsung/common/board.c | 28 | ||||
| -rw-r--r-- | board/samsung/common/exynos5-dt-types.c | 8 | ||||
| -rw-r--r-- | board/samsung/common/exynos5-dt.c | 6 |
3 files changed, 35 insertions, 7 deletions
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index 5d4646d14c..390060e51f 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -25,6 +25,8 @@ #include <asm/arch/sromc.h> #include <lcd.h> #include <i2c.h> +#include <mmc.h> +#include <stdio_dev.h> #include <usb.h> #include <dwc3-uboot.h> #include <samsung/misc.h> @@ -43,6 +45,20 @@ __weak int exynos_power_init(void) return 0; } +/** + * get_boot_mmc_dev() - read boot MMC device id from XOM[7:5] pins. + */ +static int get_boot_mmc_dev(void) +{ + u32 mode = readl(EXYNOS4_OP_MODE) & 0x1C; + + if (mode == 0x04) + return 2; /* MMC2: SD */ + + /* MMC0: eMMC or unknown */ + return 0; +} + #if defined CONFIG_EXYNOS_TMU /* Boot Time Thermal Analysis for SoC temperature threshold breach */ static void boot_temp_check(void) @@ -281,6 +297,8 @@ int board_late_init(void) { struct udevice *dev; int ret; + int mmcbootdev = get_boot_mmc_dev(); + char mmcbootdev_str[16]; stdio_print_current_devices(); ret = uclass_first_device_err(UCLASS_CROS_EC, &dev); @@ -293,6 +311,11 @@ int board_late_init(void) panic("Cannot init cros-ec device"); return -1; } + + printf("Boot device: MMC(%u)\n", mmcbootdev); + sprintf(mmcbootdev_str, "%u", mmcbootdev); + env_set("mmcbootdev", mmcbootdev_str); + return 0; } #endif @@ -360,3 +383,8 @@ int board_usb_cleanup(int index, enum usb_init_type init) #endif return 0; } + +int mmc_get_env_dev(void) +{ + return get_boot_mmc_dev(); +} diff --git a/board/samsung/common/exynos5-dt-types.c b/board/samsung/common/exynos5-dt-types.c index 516c32923e..1413dc8978 100644 --- a/board/samsung/common/exynos5-dt-types.c +++ b/board/samsung/common/exynos5-dt-types.c @@ -67,7 +67,7 @@ static int odroid_get_adc_val(unsigned int *adcval) unsigned int adcval_prev = 0; int ret, retries = 20; - ret = adc_channel_single_shot("adc", CONFIG_ODROID_REV_AIN, + ret = adc_channel_single_shot("adc@12D10000", CONFIG_ODROID_REV_AIN, &adcval_prev); if (ret) return ret; @@ -75,8 +75,8 @@ static int odroid_get_adc_val(unsigned int *adcval) while (retries--) { mdelay(5); - ret = adc_channel_single_shot("adc", CONFIG_ODROID_REV_AIN, - adcval); + ret = adc_channel_single_shot("adc@12D10000", + CONFIG_ODROID_REV_AIN, adcval); if (ret) return ret; @@ -129,7 +129,7 @@ static const char *odroid_get_type_str(void) if (gd->board_type != EXYNOS5_BOARD_ODROID_XU3_REV02) goto exit; - ret = pmic_get("s2mps11", &dev); + ret = pmic_get("s2mps11_pmic@66", &dev); if (ret) goto exit; diff --git a/board/samsung/common/exynos5-dt.c b/board/samsung/common/exynos5-dt.c index 387d1b9180..eef46b0dc4 100644 --- a/board/samsung/common/exynos5-dt.c +++ b/board/samsung/common/exynos5-dt.c @@ -65,9 +65,9 @@ int exynos_power_init(void) int ret; #ifdef CONFIG_PMIC_S2MPS11 - ret = pmic_get("s2mps11_pmic", &dev); + ret = pmic_get("s2mps11_pmic@66", &dev); #else - ret = pmic_get("max77686", &dev); + ret = pmic_get("max77686_pmic@09", &dev); if (!ret) { /* TODO(sjg@chromium.org): Move into the clock/pmic API */ ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_32KHZ, 0, @@ -79,7 +79,7 @@ int exynos_power_init(void) if (ret) return ret; } else { - ret = pmic_get("s5m8767-pmic", &dev); + ret = pmic_get("s5m8767_pmic@66", &dev); /* TODO(sjg@chromium.org): Use driver model to access clock */ #ifdef CONFIG_PMIC_S5M8767 if (!ret) |