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-rw-r--r--board/hisilicon/poplar/poplar.c28
-rw-r--r--board/isee/igep00x0/Kconfig2
-rw-r--r--board/isee/igep00x0/MAINTAINERS1
-rw-r--r--board/mediatek/mt7623/mt7623_rfb.c19
-rw-r--r--board/mscc/common/Makefile4
-rw-r--r--board/mscc/common/spi.c31
-rw-r--r--board/mscc/jr2/Kconfig15
-rw-r--r--board/mscc/jr2/Makefile4
-rw-r--r--board/mscc/jr2/jr2.c115
-rw-r--r--board/mscc/luton/luton.c52
-rw-r--r--board/mscc/ocelot/ocelot.c76
-rw-r--r--board/ti/am335x/MAINTAINERS3
-rw-r--r--board/ti/am43xx/MAINTAINERS1
-rw-r--r--board/work-microwave/work_92105/Kconfig2
14 files changed, 317 insertions, 36 deletions
diff --git a/board/hisilicon/poplar/poplar.c b/board/hisilicon/poplar/poplar.c
index 8adc750962..155dfbb401 100644
--- a/board/hisilicon/poplar/poplar.c
+++ b/board/hisilicon/poplar/poplar.c
@@ -166,6 +166,34 @@ int board_mmc_init(bd_t *bis)
return ret;
}
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+#include <g_dnl.h>
+
+static struct dwc2_plat_otg_data poplar_otg_data = {
+ .regs_otg = HIOTG_BASE_ADDR
+};
+
+static void set_usb_to_device(void)
+{
+ setbits_le32(PERI_CTRL_USB3, USB2_2P_CHIPID);
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+ set_usb_to_device();
+ return dwc2_udc_probe(&poplar_otg_data);
+}
+
+int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
+{
+ if (!env_get("serial#"))
+ g_dnl_set_serialnumber("0123456789POPLAR");
+ return 0;
+}
+#endif
+
int board_init(void)
{
usb2_phy_init();
diff --git a/board/isee/igep00x0/Kconfig b/board/isee/igep00x0/Kconfig
index aa46882b05..597d6d92cf 100644
--- a/board/isee/igep00x0/Kconfig
+++ b/board/isee/igep00x0/Kconfig
@@ -9,4 +9,6 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "omap3_igep00x0"
+source "board/ti/common/Kconfig"
+
endif
diff --git a/board/isee/igep00x0/MAINTAINERS b/board/isee/igep00x0/MAINTAINERS
index d75d400eed..a07c9f49a8 100644
--- a/board/isee/igep00x0/MAINTAINERS
+++ b/board/isee/igep00x0/MAINTAINERS
@@ -4,4 +4,3 @@ S: Maintained
F: board/isee/igep00x0/
F: include/configs/omap3_igep00x0.h
F: configs/igep00x0_defconfig
-F: configs/igep0032_defconfig
diff --git a/board/mediatek/mt7623/mt7623_rfb.c b/board/mediatek/mt7623/mt7623_rfb.c
index 08468b50ea..4ec2764976 100644
--- a/board/mediatek/mt7623/mt7623_rfb.c
+++ b/board/mediatek/mt7623/mt7623_rfb.c
@@ -14,3 +14,22 @@ int board_init(void)
return 0;
}
+
+int mmc_get_boot_dev(void)
+{
+ int g_mmc_devid = -1;
+ char *uflag = (char *)0x81DFFFF0;
+ if (strncmp(uflag,"eMMC",4)==0) {
+ g_mmc_devid = 0;
+ printf("Boot From Emmc(id:%d)\n\n", g_mmc_devid);
+ } else {
+ g_mmc_devid = 1;
+ printf("Boot From SD(id:%d)\n\n", g_mmc_devid);
+ }
+ return g_mmc_devid;
+}
+
+int mmc_get_env_dev(void)
+{
+ return mmc_get_boot_dev();
+}
diff --git a/board/mscc/common/Makefile b/board/mscc/common/Makefile
new file mode 100644
index 0000000000..4f0eded85a
--- /dev/null
+++ b/board/mscc/common/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+obj-$(CONFIG_SOC_JR2) := spi.o
+obj-$(CONFIG_SOC_OCELOT) := spi.o
diff --git a/board/mscc/common/spi.c b/board/mscc/common/spi.c
new file mode 100644
index 0000000000..0566fcba5c
--- /dev/null
+++ b/board/mscc/common/spi.c
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Microsemi Coprporation
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <spi.h>
+
+void external_cs_manage(struct udevice *dev, bool enable)
+{
+ u32 cs = spi_chip_select(dev);
+ /* IF_SI0_OWNER, select the owner of the SI interface
+ * Encoding: 0: SI Slave
+ * 1: SI Boot Master
+ * 2: SI Master Controller
+ */
+ if (!enable) {
+ writel(ICPU_SW_MODE_SW_PIN_CTRL_MODE |
+ ICPU_SW_MODE_SW_SPI_CS(BIT(cs)),
+ BASE_CFG + ICPU_SW_MODE);
+ clrsetbits_le32(BASE_CFG + ICPU_GENERAL_CTRL,
+ ICPU_GENERAL_CTRL_IF_SI_OWNER_M,
+ ICPU_GENERAL_CTRL_IF_SI_OWNER(2));
+ } else {
+ writel(0, BASE_CFG + ICPU_SW_MODE);
+ clrsetbits_le32(BASE_CFG + ICPU_GENERAL_CTRL,
+ ICPU_GENERAL_CTRL_IF_SI_OWNER_M,
+ ICPU_GENERAL_CTRL_IF_SI_OWNER(1));
+ }
+}
diff --git a/board/mscc/jr2/Kconfig b/board/mscc/jr2/Kconfig
new file mode 100644
index 0000000000..68a2de8ca7
--- /dev/null
+++ b/board/mscc/jr2/Kconfig
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+config SYS_VENDOR
+ default "mscc"
+
+if SOC_JR2
+
+config SYS_BOARD
+ default "jr2"
+
+config SYS_CONFIG_NAME
+ default "jr2"
+
+endif
+
diff --git a/board/mscc/jr2/Makefile b/board/mscc/jr2/Makefile
new file mode 100644
index 0000000000..c1db2a9045
--- /dev/null
+++ b/board/mscc/jr2/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+obj-$(CONFIG_SOC_JR2) := jr2.o
+
diff --git a/board/mscc/jr2/jr2.c b/board/mscc/jr2/jr2.c
new file mode 100644
index 0000000000..eac4dcaa10
--- /dev/null
+++ b/board/mscc/jr2/jr2.c
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Microsemi Corporation
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <led.h>
+
+enum {
+ BOARD_TYPE_PCB110 = 0xAABBCE00,
+ BOARD_TYPE_PCB111,
+ BOARD_TYPE_PCB112,
+};
+
+int board_early_init_r(void)
+{
+ /* Prepare SPI controller to be used in master mode */
+ writel(0, BASE_CFG + ICPU_SW_MODE);
+ clrsetbits_le32(BASE_CFG + ICPU_GENERAL_CTRL,
+ ICPU_GENERAL_CTRL_IF_SI_OWNER_M,
+ ICPU_GENERAL_CTRL_IF_SI_OWNER(2));
+
+ /* Address of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE;
+
+ /* LED setup */
+ if (IS_ENABLED(CONFIG_LED))
+ led_default_state();
+
+ return 0;
+}
+
+static void vcoreiii_gpio_set_alternate(int gpio, int mode)
+{
+ u32 mask;
+ u32 val0, val1;
+ void __iomem *reg0, *reg1;
+
+ if (gpio < 32) {
+ mask = BIT(gpio);
+ reg0 = BASE_DEVCPU_GCB + GPIO_GPIO_ALT(0);
+ reg1 = BASE_DEVCPU_GCB + GPIO_GPIO_ALT(1);
+ } else {
+ gpio -= 32;
+ mask = BIT(gpio);
+ reg0 = BASE_DEVCPU_GCB + GPIO_GPIO_ALT1(0);
+ reg1 = BASE_DEVCPU_GCB + GPIO_GPIO_ALT1(1);
+ }
+ val0 = readl(reg0);
+ val1 = readl(reg1);
+ if (mode == 1) {
+ writel(val0 | mask, reg0);
+ writel(val1 & ~mask, reg1);
+ } else if (mode == 2) {
+ writel(val0 & ~mask, reg0);
+ writel(val1 | mask, reg1);
+ } else if (mode == 3) {
+ writel(val0 | mask, reg0);
+ writel(val1 | mask, reg1);
+ } else {
+ writel(val0 & ~mask, reg0);
+ writel(val1 & ~mask, reg1);
+ }
+}
+
+static void do_board_detect(void)
+{
+ int i;
+ u16 pval;
+
+ /* MIIM 1 + 2 MDC/MDIO */
+ for (i = 56; i < 60; i++)
+ vcoreiii_gpio_set_alternate(i, 1);
+
+ if (mscc_phy_rd(0, 0x10, 0x3, &pval) == 0 &&
+ ((pval >> 4) & 0x3F) == 0x3c) {
+ gd->board_type = BOARD_TYPE_PCB112; /* Serval2-NID */
+ } else if (mscc_phy_rd(1, 0x0, 0x3, &pval) == 0 &&
+ ((pval >> 4) & 0x3F) == 0x3c) {
+ gd->board_type = BOARD_TYPE_PCB110; /* Jr2-24 */
+ } else {
+ /* Fall-back */
+ gd->board_type = BOARD_TYPE_PCB111; /* Jr2-48 */
+ }
+}
+
+#if defined(CONFIG_MULTI_DTB_FIT)
+int board_fit_config_name_match(const char *name)
+{
+ if (gd->board_type == BOARD_TYPE_PCB110 &&
+ strcmp(name, "jr2_pcb110") == 0)
+ return 0;
+
+ if (gd->board_type == BOARD_TYPE_PCB111 &&
+ strcmp(name, "jr2_pcb111") == 0)
+ return 0;
+
+ if (gd->board_type == BOARD_TYPE_PCB112 &&
+ strcmp(name, "serval2_pcb112") == 0)
+ return 0;
+
+ return -1;
+}
+#endif
+
+#if defined(CONFIG_DTB_RESELECT)
+int embedded_dtb_select(void)
+{
+ do_board_detect();
+ fdtdec_setup();
+
+ return 0;
+}
+#endif
diff --git a/board/mscc/luton/luton.c b/board/mscc/luton/luton.c
index 41fc6d56a7..807c717e33 100644
--- a/board/mscc/luton/luton.c
+++ b/board/mscc/luton/luton.c
@@ -5,16 +5,20 @@
#include <common.h>
#include <asm/io.h>
-
-#define MSCC_GPIO_ALT0 0x88
-#define MSCC_GPIO_ALT1 0x8C
+#include <led.h>
DECLARE_GLOBAL_DATA_PTR;
+enum {
+ BOARD_TYPE_PCB090 = 0xAABBCD00,
+ BOARD_TYPE_PCB091,
+};
+
void board_debug_uart_init(void)
{
/* too early for the pinctrl driver, so configure the UART pins here */
- setbits_le32(BASE_DEVCPU_GCB + MSCC_GPIO_ALT0, BIT(30) | BIT(31));
+ mscc_gpio_set_alternate(30, 1);
+ mscc_gpio_set_alternate(31, 1);
}
int board_early_init_r(void)
@@ -24,5 +28,45 @@ int board_early_init_r(void)
/* Address of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE;
+
+ /* LED setup */
+ if (IS_ENABLED(CONFIG_LED))
+ led_default_state();
+
+ return 0;
+}
+
+static void do_board_detect(void)
+{
+ u32 chipid = (readl(BASE_DEVCPU_GCB + CHIP_ID) >> 12) & 0xFFFF;
+
+ if (chipid == 0x7428 || chipid == 0x7424)
+ gd->board_type = BOARD_TYPE_PCB091; // Lu10
+ else
+ gd->board_type = BOARD_TYPE_PCB090; // Lu26
+}
+
+#if defined(CONFIG_MULTI_DTB_FIT)
+int board_fit_config_name_match(const char *name)
+{
+ if (gd->board_type == BOARD_TYPE_PCB090 &&
+ strcmp(name, "luton_pcb090") == 0)
+ return 0;
+
+ if (gd->board_type == BOARD_TYPE_PCB091 &&
+ strcmp(name, "luton_pcb091") == 0)
+ return 0;
+
+ return -1;
+}
+#endif
+
+#if defined(CONFIG_DTB_RESELECT)
+int embedded_dtb_select(void)
+{
+ do_board_detect();
+ fdtdec_setup();
+
return 0;
}
+#endif
diff --git a/board/mscc/ocelot/ocelot.c b/board/mscc/ocelot/ocelot.c
index d521a61957..0f7a532158 100644
--- a/board/mscc/ocelot/ocelot.c
+++ b/board/mscc/ocelot/ocelot.c
@@ -9,39 +9,20 @@
#include <asm/types.h>
#include <environment.h>
#include <spi.h>
+#include <led.h>
DECLARE_GLOBAL_DATA_PTR;
-#define MSCC_GPIO_ALT0 0x54
-#define MSCC_GPIO_ALT1 0x58
-
-void external_cs_manage(struct udevice *dev, bool enable)
-{
- u32 cs = spi_chip_select(dev);
- /* IF_SI0_OWNER, select the owner of the SI interface
- * Encoding: 0: SI Slave
- * 1: SI Boot Master
- * 2: SI Master Controller
- */
- if (!enable) {
- writel(ICPU_SW_MODE_SW_PIN_CTRL_MODE |
- ICPU_SW_MODE_SW_SPI_CS(BIT(cs)), BASE_CFG + ICPU_SW_MODE);
- clrsetbits_le32(BASE_CFG + ICPU_GENERAL_CTRL,
- ICPU_GENERAL_CTRL_IF_SI_OWNER_M,
- ICPU_GENERAL_CTRL_IF_SI_OWNER(2));
- } else {
- writel(0, BASE_CFG + ICPU_SW_MODE);
- clrsetbits_le32(BASE_CFG + ICPU_GENERAL_CTRL,
- ICPU_GENERAL_CTRL_IF_SI_OWNER_M,
- ICPU_GENERAL_CTRL_IF_SI_OWNER(1));
- }
-}
+enum {
+ BOARD_TYPE_PCB120 = 0xAABBCC00,
+ BOARD_TYPE_PCB123,
+};
void board_debug_uart_init(void)
{
/* too early for the pinctrl driver, so configure the UART pins here */
- setbits_le32(BASE_DEVCPU_GCB + MSCC_GPIO_ALT0, BIT(6) | BIT(7));
- clrbits_le32(BASE_DEVCPU_GCB + MSCC_GPIO_ALT1, BIT(6) | BIT(7));
+ mscc_gpio_set_alternate(6, 1);
+ mscc_gpio_set_alternate(7, 1);
}
int board_early_init_r(void)
@@ -54,5 +35,48 @@ int board_early_init_r(void)
/* Address of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE;
+
+ /* LED setup */
+ if (IS_ENABLED(CONFIG_LED))
+ led_default_state();
+
+ return 0;
+}
+
+static void do_board_detect(void)
+{
+ u16 dummy = 0;
+
+ /* Enable MIIM */
+ mscc_gpio_set_alternate(14, 1);
+ mscc_gpio_set_alternate(15, 1);
+ if (mscc_phy_rd(1, 0, 0, &dummy) == 0)
+ gd->board_type = BOARD_TYPE_PCB120;
+ else
+ gd->board_type = BOARD_TYPE_PCB123;
+}
+
+#if defined(CONFIG_MULTI_DTB_FIT)
+int board_fit_config_name_match(const char *name)
+{
+ if (gd->board_type == BOARD_TYPE_PCB120 &&
+ strcmp(name, "ocelot_pcb120") == 0)
+ return 0;
+
+ if (gd->board_type == BOARD_TYPE_PCB123 &&
+ strcmp(name, "ocelot_pcb123") == 0)
+ return 0;
+
+ return -1;
+}
+#endif
+
+#if defined(CONFIG_DTB_RESELECT)
+int embedded_dtb_select(void)
+{
+ do_board_detect();
+ fdtdec_setup();
+
return 0;
}
+#endif
diff --git a/board/ti/am335x/MAINTAINERS b/board/ti/am335x/MAINTAINERS
index c99e06dc10..565f7055cd 100644
--- a/board/ti/am335x/MAINTAINERS
+++ b/board/ti/am335x/MAINTAINERS
@@ -6,7 +6,4 @@ F: include/configs/am335x_evm.h
F: configs/am335x_boneblack_defconfig
F: configs/am335x_boneblack_vboot_defconfig
F: configs/am335x_evm_defconfig
-F: configs/am335x_evm_nor_defconfig
-F: configs/am335x_evm_norboot_defconfig
-F: configs/am335x_evm_spiboot_defconfig
F: configs/am335x_evm_usbspl_defconfig
diff --git a/board/ti/am43xx/MAINTAINERS b/board/ti/am43xx/MAINTAINERS
index bf098064bd..ab9da22c64 100644
--- a/board/ti/am43xx/MAINTAINERS
+++ b/board/ti/am43xx/MAINTAINERS
@@ -4,7 +4,6 @@ S: Maintained
F: board/ti/am43xx/
F: include/configs/am43xx_evm.h
F: configs/am43xx_evm_defconfig
-F: configs/am43xx_evm_ethboot_defconfig
F: configs/am43xx_evm_qspiboot_defconfig
F: configs/am43xx_evm_usbhost_boot_defconfig
F: configs/am43xx_evm_rtconly_defconfig
diff --git a/board/work-microwave/work_92105/Kconfig b/board/work-microwave/work_92105/Kconfig
index 32632f5ab5..380e2dfc24 100644
--- a/board/work-microwave/work_92105/Kconfig
+++ b/board/work-microwave/work_92105/Kconfig
@@ -10,7 +10,7 @@ config SYS_CONFIG_NAME
default "work_92105"
config CMD_HD44760
- bool "Enable 'hd44780' LCD-control comand"
+ bool "Enable 'hd44780' LCD-control command"
help
This controls the LCD driver.
View Lorry Controller Status