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-rw-r--r--board/imgtec/boston/ddr.c2
-rw-r--r--board/imgtec/malta/malta.c2
-rw-r--r--board/imgtec/xilfpga/xilfpga.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/board/imgtec/boston/ddr.c b/board/imgtec/boston/ddr.c
index ceffef61ef..c841bf02a3 100644
--- a/board/imgtec/boston/ddr.c
+++ b/board/imgtec/boston/ddr.c
@@ -10,7 +10,7 @@
#include "boston-regs.h"
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
{
u32 ddrconf0 = __raw_readl((uint32_t *)BOSTON_PLAT_DDRCONF0);
diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c
index 495504372a..c269d0a5a3 100644
--- a/board/imgtec/malta/malta.c
+++ b/board/imgtec/malta/malta.c
@@ -83,7 +83,7 @@ static enum sys_con malta_sys_con(void)
}
}
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
{
return CONFIG_SYS_MEM_SIZE;
}
diff --git a/board/imgtec/xilfpga/xilfpga.c b/board/imgtec/xilfpga/xilfpga.c
index 77a1952c93..dc0a088ecb 100644
--- a/board/imgtec/xilfpga/xilfpga.c
+++ b/board/imgtec/xilfpga/xilfpga.c
@@ -12,7 +12,7 @@
#include <common.h>
/* initialize the DDR Controller and PHY */
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
{
/* MIG IP block is smart and doesn't need SW
* to do any init */