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-rw-r--r--arch/arm/cpu/tegra-common/clock.c2
-rw-r--r--arch/arm/cpu/tegra20-common/clock.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/cpu/tegra-common/clock.c b/arch/arm/cpu/tegra-common/clock.c
index d9f2c767d5..96b705f2f6 100644
--- a/arch/arm/cpu/tegra-common/clock.c
+++ b/arch/arm/cpu/tegra-common/clock.c
@@ -304,7 +304,7 @@ static int adjust_periph_pll(enum periph_id periph_id, int source,
/* work out the source clock and set it */
if (source < 0)
return -1;
- if (mux_bits == 4) {
+ if (mux_bits == MASK_BITS_31_28) {
clrsetbits_le32(reg, OUT_CLK_SOURCE_31_28_MASK,
source << OUT_CLK_SOURCE_31_28_SHIFT);
} else {
diff --git a/arch/arm/cpu/tegra20-common/clock.c b/arch/arm/cpu/tegra20-common/clock.c
index 34124f9bba..0c4f5fb288 100644
--- a/arch/arm/cpu/tegra20-common/clock.c
+++ b/arch/arm/cpu/tegra20-common/clock.c
@@ -412,9 +412,9 @@ int get_periph_clock_source(enum periph_id periph_id,
* with its 16-bit divisor
*/
if (type == CLOCK_TYPE_PCXTS)
- *mux_bits = 4;
+ *mux_bits = MASK_BITS_31_28;
else
- *mux_bits = 2;
+ *mux_bits = MASK_BITS_31_30;
if (type == CLOCK_TYPE_PCMT16)
*divider_bits = 16;
else