diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/psci.c | 16 | ||||
| -rw-r--r-- | arch/arm/dts/rv1108-elgin-r1.dts | 11 | ||||
| -rw-r--r-- | arch/arm/dts/rv1108-u-boot.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/mach-stm32mp/Kconfig | 2 | ||||
| -rw-r--r-- | arch/riscv/Kconfig | 13 | ||||
| -rw-r--r-- | arch/riscv/include/asm/sbi.h | 163 | ||||
| -rw-r--r-- | arch/riscv/lib/Makefile | 1 | ||||
| -rw-r--r-- | arch/riscv/lib/sbi.c | 187 | ||||
| -rw-r--r-- | arch/riscv/lib/sbi_ipi.c | 3 |
9 files changed, 322 insertions, 80 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c index 5b689004e8..2c5d99e9ac 100644 --- a/arch/arm/cpu/armv7/sunxi/psci.c +++ b/arch/arm/cpu/armv7/sunxi/psci.c @@ -75,7 +75,7 @@ static void __secure __mdelay(u32 ms) isb(); } -static void __secure clamp_release(void __maybe_unused *clamp) +static void __secure clamp_release(u32 __maybe_unused *clamp) { #if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \ defined(CONFIG_MACH_SUN8I_H3) || \ @@ -90,7 +90,7 @@ static void __secure clamp_release(void __maybe_unused *clamp) #endif } -static void __secure clamp_set(void __maybe_unused *clamp) +static void __secure clamp_set(u32 __maybe_unused *clamp) { #if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \ defined(CONFIG_MACH_SUN8I_H3) || \ @@ -99,28 +99,22 @@ static void __secure clamp_set(void __maybe_unused *clamp) #endif } -static void __secure sunxi_power_switch(void *clamp, void *pwroff_ptr, bool on, +static void __secure sunxi_power_switch(u32 *clamp, u32 *pwroff, bool on, int cpu) { - u32 pwroff; - - memcpy(&pwroff, pwroff_ptr, sizeof(u32)); - if (on) { /* Release power clamp */ clamp_release(clamp); /* Clear power gating */ - clrbits_le32(&pwroff, BIT(cpu)); + clrbits_le32(pwroff, BIT(cpu)); } else { /* Set power gating */ - setbits_le32(&pwroff, BIT(cpu)); + setbits_le32(pwroff, BIT(cpu)); /* Activate power clamp */ clamp_set(clamp); } - - memcpy(pwroff_ptr, &pwroff, sizeof(u32)); } #ifdef CONFIG_MACH_SUN8I_R40 diff --git a/arch/arm/dts/rv1108-elgin-r1.dts b/arch/arm/dts/rv1108-elgin-r1.dts index 32b95940b0..83e8b31838 100644 --- a/arch/arm/dts/rv1108-elgin-r1.dts +++ b/arch/arm/dts/rv1108-elgin-r1.dts @@ -40,9 +40,20 @@ }; &uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2m0_xfer_pullup>; status = "okay"; }; &usb20_otg { status = "okay"; }; + +&pinctrl { + uart2m0 { + uart2m0_xfer_pullup: uart2m0-xfer-pullup { + rockchip,pins = <2 RK_PD2 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, + <2 RK_PD1 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; + }; + }; +}; diff --git a/arch/arm/dts/rv1108-u-boot.dtsi b/arch/arm/dts/rv1108-u-boot.dtsi new file mode 100644 index 0000000000..41ac054b81 --- /dev/null +++ b/arch/arm/dts/rv1108-u-boot.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com> + */ + +#include "rockchip-u-boot.dtsi" diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index e4d621dee8..96153693a7 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -119,7 +119,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 config STM32_ETZPC bool "STM32 Extended TrustZone Protection" - depends on TARGET_STM32MP1 + depends on STM32MP15x default y help Say y to enable STM32 Extended TrustZone Protection diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index f49618d24d..3061bf8863 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -210,8 +210,21 @@ config NR_CPUS Stack memory is pre-allocated. U-Boot must therefore know the maximum number of CPUs that may be present. +config SBI + bool + default y if RISCV_SMODE || SPL_RISCV_SMODE + +config SBI_V01 + bool "SBI v0.1 support" + default y + depends on SBI + help + This config allows kernel to use SBI v0.1 APIs. This will be + deprecated in future once legacy M-mode software are no longer in use. + config SBI_IPI bool + depends on SBI default y if RISCV_SMODE || SPL_RISCV_SMODE depends on SMP diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index ced57defdd..3595ee8bf7 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2015 Regents of the University of California + * Copyright (c) 2020 Western Digital Corporation or its affiliates. * * Taken from Linux arch/riscv/include/asm/sbi.h */ @@ -10,85 +11,113 @@ #include <linux/types.h> -#define SBI_SET_TIMER 0 -#define SBI_CONSOLE_PUTCHAR 1 -#define SBI_CONSOLE_GETCHAR 2 -#define SBI_CLEAR_IPI 3 -#define SBI_SEND_IPI 4 -#define SBI_REMOTE_FENCE_I 5 -#define SBI_REMOTE_SFENCE_VMA 6 -#define SBI_REMOTE_SFENCE_VMA_ASID 7 -#define SBI_SHUTDOWN 8 +enum sbi_ext_id { +#ifdef CONFIG_SBI_V01 + SBI_EXT_0_1_SET_TIMER = 0x0, + SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1, + SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2, + SBI_EXT_0_1_CLEAR_IPI = 0x3, + SBI_EXT_0_1_SEND_IPI = 0x4, + SBI_EXT_0_1_REMOTE_FENCE_I = 0x5, + SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6, + SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7, + SBI_EXT_0_1_SHUTDOWN = 0x8, +#endif + SBI_EXT_BASE = 0x10, + SBI_EXT_TIME = 0x54494D45, + SBI_EXT_IPI = 0x735049, + SBI_EXT_RFENCE = 0x52464E43, +}; -#define SBI_CALL(which, arg0, arg1, arg2) ({ \ - register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \ - register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \ - register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \ - register uintptr_t a7 asm ("a7") = (uintptr_t)(which); \ - asm volatile ("ecall" \ - : "+r" (a0) \ - : "r" (a1), "r" (a2), "r" (a7) \ - : "memory"); \ - a0; \ -}) +enum sbi_ext_base_fid { + SBI_EXT_BASE_GET_SPEC_VERSION = 0, + SBI_EXT_BASE_GET_IMP_ID, + SBI_EXT_BASE_GET_IMP_VERSION, + SBI_EXT_BASE_PROBE_EXT, + SBI_EXT_BASE_GET_MVENDORID, + SBI_EXT_BASE_GET_MARCHID, + SBI_EXT_BASE_GET_MIMPID, +}; -/* Lazy implementations until SBI is finalized */ -#define SBI_CALL_0(which) SBI_CALL(which, 0, 0, 0) -#define SBI_CALL_1(which, arg0) SBI_CALL(which, arg0, 0, 0) -#define SBI_CALL_2(which, arg0, arg1) SBI_CALL(which, arg0, arg1, 0) +enum sbi_ext_time_fid { + SBI_EXT_TIME_SET_TIMER = 0, +}; -static inline void sbi_console_putchar(int ch) -{ - SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch); -} +enum sbi_ext_ipi_fid { + SBI_EXT_IPI_SEND_IPI = 0, +}; -static inline int sbi_console_getchar(void) -{ - return SBI_CALL_0(SBI_CONSOLE_GETCHAR); -} +enum sbi_ext_rfence_fid { + SBI_EXT_RFENCE_REMOTE_FENCE_I = 0, + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA, + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID, +}; -static inline void sbi_set_timer(uint64_t stime_value) -{ -#if __riscv_xlen == 32 - SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32); +#ifdef CONFIG_SBI_V01 +#define SBI_EXT_SET_TIMER SBI_EXT_0_1_SET_TIMER +#define SBI_FID_SET_TIMER 0 +#define SBI_EXT_SEND_IPI SBI_EXT_0_1_SEND_IPI +#define SBI_FID_SEND_IPI 0 +#define SBI_EXT_REMOTE_FENCE_I SBI_EXT_0_1_REMOTE_FENCE_I +#define SBI_FID_REMOTE_FENCE_I 0 +#define SBI_EXT_REMOTE_SFENCE_VMA SBI_EXT_0_1_REMOTE_SFENCE_VMA +#define SBI_FID_REMOTE_SFENCE_VMA 0 +#define SBI_EXT_REMOTE_SFENCE_VMA_ASID SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID +#define SBI_FID_REMOTE_SFENCE_VMA_ASID 0 #else - SBI_CALL_1(SBI_SET_TIMER, stime_value); +#define SBI_EXT_SET_TIMER SBI_EXT_TIME +#define SBI_FID_SET_TIMER SBI_EXT_TIME_SET_TIMER +#define SBI_EXT_SEND_IPI SBI_EXT_IPI +#define SBI_FID_SEND_IPI SBI_EXT_IPI_SEND_IPI +#define SBI_EXT_REMOTE_FENCE_I SBI_EXT_RFENCE +#define SBI_FID_REMOTE_FENCE_I SBI_EXT_RFENCE_REMOTE_FENCE_I +#define SBI_EXT_REMOTE_SFENCE_VMA SBI_EXT_RFENCE +#define SBI_FID_REMOTE_SFENCE_VMA SBI_EXT_RFENCE_REMOTE_SFENCE_VMA +#define SBI_EXT_REMOTE_SFENCE_VMA_ASID SBI_EXT_RFENCE +#define SBI_FID_REMOTE_SFENCE_VMA_ASID SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID #endif -} -static inline void sbi_shutdown(void) -{ - SBI_CALL_0(SBI_SHUTDOWN); -} +#define SBI_SPEC_VERSION_DEFAULT 0x1 +#define SBI_SPEC_VERSION_MAJOR_SHIFT 24 +#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f +#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff -static inline void sbi_clear_ipi(void) -{ - SBI_CALL_0(SBI_CLEAR_IPI); -} +/* SBI return error codes */ +#define SBI_SUCCESS 0 +#define SBI_ERR_FAILURE -1 +#define SBI_ERR_NOT_SUPPORTED -2 +#define SBI_ERR_INVALID_PARAM -3 +#define SBI_ERR_DENIED -4 +#define SBI_ERR_INVALID_ADDRESS -5 -static inline void sbi_send_ipi(const unsigned long *hart_mask) -{ - SBI_CALL_1(SBI_SEND_IPI, hart_mask); -} +extern unsigned long sbi_spec_version; +struct sbiret { + long error; + long value; +}; -static inline void sbi_remote_fence_i(const unsigned long *hart_mask) -{ - SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask); -} +struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, + unsigned long arg1, unsigned long arg2, + unsigned long arg3, unsigned long arg4, + unsigned long arg5); -static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask, - unsigned long start, - unsigned long size) -{ - SBI_CALL_1(SBI_REMOTE_SFENCE_VMA, hart_mask); -} +#ifdef CONFIG_SBI_V01 +void sbi_console_putchar(int ch); +int sbi_console_getchar(void); +void sbi_clear_ipi(void); +void sbi_shutdown(void); +#endif +void sbi_set_timer(uint64_t stime_value); +void sbi_send_ipi(const unsigned long *hart_mask); +void sbi_remote_fence_i(const unsigned long *hart_mask); +void sbi_remote_sfence_vma(const unsigned long *hart_mask, + unsigned long start, + unsigned long size); +void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, + unsigned long start, + unsigned long size, + unsigned long asid); -static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, - unsigned long start, - unsigned long size, - unsigned long asid) -{ - SBI_CALL_1(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask); -} +int sbi_probe_extension(int ext); #endif diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index c9179a5ff8..adadbf4bcb 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_ANDES_PLIC) += andes_plic.o obj-$(CONFIG_ANDES_PLMT) += andes_plmt.o else obj-$(CONFIG_RISCV_RDTIME) += rdtime.o +obj-$(CONFIG_SBI) += sbi.o obj-$(CONFIG_SBI_IPI) += sbi_ipi.o endif obj-y += interrupts.o diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c new file mode 100644 index 0000000000..7bdf071dbb --- /dev/null +++ b/arch/riscv/lib/sbi.c @@ -0,0 +1,187 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * SBI initialilization and all extension implementation. + * + * Copyright (c) 2020 Western Digital Corporation or its affiliates. + * + * Taken from Linux arch/riscv/kernel/sbi.c + */ + +#include <common.h> +#include <asm/encoding.h> +#include <asm/sbi.h> + +/* default SBI version is 0.1 */ +unsigned long sbi_spec_version = SBI_SPEC_VERSION_DEFAULT; + +struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, + unsigned long arg1, unsigned long arg2, + unsigned long arg3, unsigned long arg4, + unsigned long arg5) +{ + struct sbiret ret; + + register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); + register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); + register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); + register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); + register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4); + register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5); + register uintptr_t a6 asm ("a6") = (uintptr_t)(fid); + register uintptr_t a7 asm ("a7") = (uintptr_t)(ext); + asm volatile ("ecall" + : "+r" (a0), "+r" (a1) + : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7) + : "memory"); + ret.error = a0; + ret.value = a1; + + return ret; +} + +#ifdef CONFIG_SBI_V01 + +/** + * sbi_console_putchar() - Writes given character to the console device. + * @ch: The data to be written to the console. + * + * Return: None + */ +void sbi_console_putchar(int ch) +{ + sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, ch, 0, 0, 0, 0, 0); +} + +/** + * sbi_console_getchar() - Reads a byte from console device. + * + * Returns the value read from console. + */ +int sbi_console_getchar(void) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_0_1_CONSOLE_GETCHAR, 0, 0, 0, 0, 0, 0, 0); + + return ret.error; +} + +/** + * sbi_clear_ipi() - Clear any pending IPIs for the calling hart. + * + * Return: None + */ +void sbi_clear_ipi(void) +{ + sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0); +} + +/** + * sbi_shutdown() - Remove all the harts from executing supervisor code. + * + * Return: None + */ +void sbi_shutdown(void) +{ + sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0); +} + +#endif /* CONFIG_SBI_V01 */ + +/** + * sbi_set_timer() - Program the timer for next timer event. + * @stime_value: The value after which next timer event should fire. + * + * Return: None + */ +void sbi_set_timer(uint64_t stime_value) +{ +#if __riscv_xlen == 32 + sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value, + stime_value >> 32, 0, 0, 0, 0); +#else + sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value, + 0, 0, 0, 0, 0); +#endif +} + +/** + * sbi_send_ipi() - Send an IPI to any hart. + * @hart_mask: A cpu mask containing all the target harts. + * + * Return: None + */ +void sbi_send_ipi(const unsigned long *hart_mask) +{ + sbi_ecall(SBI_EXT_SEND_IPI, SBI_FID_SEND_IPI, (unsigned long)hart_mask, + 0, 0, 0, 0, 0); +} + +/** + * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts. + * @hart_mask: A cpu mask containing all the target harts. + * + * Return: None + */ +void sbi_remote_fence_i(const unsigned long *hart_mask) +{ + sbi_ecall(SBI_EXT_REMOTE_FENCE_I, SBI_FID_REMOTE_FENCE_I, + (unsigned long)hart_mask, 0, 0, 0, 0, 0); +} + +/** + * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote + * harts for the specified virtual address range. + * @hart_mask: A cpu mask containing all the target harts. + * @start: Start of the virtual address + * @size: Total size of the virtual address range. + * + * Return: None + */ +void sbi_remote_sfence_vma(const unsigned long *hart_mask, + unsigned long start, + unsigned long size) +{ + sbi_ecall(SBI_EXT_REMOTE_SFENCE_VMA, SBI_FID_REMOTE_SFENCE_VMA, + (unsigned long)hart_mask, start, size, 0, 0, 0); +} + +/** + * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given + * remote harts for a virtual address range belonging to a specific ASID. + * + * @hart_mask: A cpu mask containing all the target harts. + * @start: Start of the virtual address + * @size: Total size of the virtual address range. + * @asid: The value of address space identifier (ASID). + * + * Return: None + */ +void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, + unsigned long start, + unsigned long size, + unsigned long asid) +{ + sbi_ecall(SBI_EXT_REMOTE_SFENCE_VMA_ASID, + SBI_FID_REMOTE_SFENCE_VMA_ASID, + (unsigned long)hart_mask, start, size, asid, 0, 0); +} + +/** + * sbi_probe_extension() - Check if an SBI extension ID is supported or not. + * @extid: The extension ID to be probed. + * + * Return: Extension specific nonzero value f yes, -ENOTSUPP otherwise. + */ +int sbi_probe_extension(int extid) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_PROBE_EXT, extid, + 0, 0, 0, 0, 0); + if (!ret.error) + if (ret.value) + return ret.value; + + return -ENOTSUPP; +} diff --git a/arch/riscv/lib/sbi_ipi.c b/arch/riscv/lib/sbi_ipi.c index 9a698ce74e..abafca9e5c 100644 --- a/arch/riscv/lib/sbi_ipi.c +++ b/arch/riscv/lib/sbi_ipi.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <asm/encoding.h> #include <asm/sbi.h> int riscv_send_ipi(int hart) @@ -19,7 +20,7 @@ int riscv_send_ipi(int hart) int riscv_clear_ipi(int hart) { - sbi_clear_ipi(); + csr_clear(CSR_SIP, SIP_SSIP); return 0; } |