diff options
Diffstat (limited to 'arch')
30 files changed, 118 insertions, 140 deletions
diff --git a/arch/Kconfig b/arch/Kconfig index bb1a818e10..76c690f667 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -12,6 +12,7 @@ config ARC bool "ARC architecture" select HAVE_PRIVATE_LIBGCC select SUPPORT_OF_CONTROL + select ARCH_EARLY_INIT_R config ARM bool "ARM architecture" @@ -25,6 +26,7 @@ config AVR32 config BLACKFIN bool "Blackfin architecture" + select ARCH_MISC_INIT config M68K bool "M68000 architecture" diff --git a/arch/arc/include/asm/config.h b/arch/arc/include/asm/config.h index d2d791988e..7aaa5c2912 100644 --- a/arch/arc/include/asm/config.h +++ b/arch/arc/include/asm/config.h @@ -8,7 +8,6 @@ #define __ASM_ARC_CONFIG_H_ #define CONFIG_SYS_BOOT_RAMDISK_HIGH -#define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_LMB diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 30f0925308..c04adfbe50 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -201,6 +201,8 @@ config ARCH_DAVINCI config KIRKWOOD bool "Marvell Kirkwood" select CPU_ARM926EJS + select BOARD_EARLY_INIT_F + select ARCH_MISC_INIT config ARCH_MVEBU bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)" @@ -226,6 +228,7 @@ config TARGET_MX25PDK bool "Support mx25pdk" select BOARD_LATE_INIT select CPU_ARM926EJS + select BOARD_EARLY_INIT_F config TARGET_ZMX25 bool "Support zmx25" @@ -256,16 +259,19 @@ config TARGET_MX23EVK bool "Support mx23evk" select CPU_ARM926EJS select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_MX28EVK bool "Support mx28evk" select CPU_ARM926EJS select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_MX23_OLINUXINO bool "Support mx23_olinuxino" select CPU_ARM926EJS select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_BG0900 bool "Support bg0900" @@ -289,18 +295,22 @@ config ORION5X config TARGET_SPEAR300 bool "Support spear300" select CPU_ARM926EJS + select BOARD_EARLY_INIT_F config TARGET_SPEAR310 bool "Support spear310" select CPU_ARM926EJS + select BOARD_EARLY_INIT_F config TARGET_SPEAR320 bool "Support spear320" select CPU_ARM926EJS + select BOARD_EARLY_INIT_F config TARGET_SPEAR600 bool "Support spear600" select CPU_ARM926EJS + select BOARD_EARLY_INIT_F config TARGET_STV0991 bool "Support stv0991" @@ -320,21 +330,25 @@ config TARGET_X600 config TARGET_IMX31_PHYCORE bool "Support imx31_phycore_eet" select CPU_ARM1136 + select BOARD_EARLY_INIT_F config TARGET_IMX31_PHYCORE_EET bool "Support imx31_phycore_eet" select BOARD_LATE_INIT select CPU_ARM1136 + select BOARD_EARLY_INIT_F config TARGET_MX31ADS bool "Support mx31ads" select CPU_ARM1136 + select BOARD_EARLY_INIT_F config TARGET_MX31PDK bool "Support mx31pdk" select BOARD_LATE_INIT select CPU_ARM1136 select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_WOODBURN bool "Support woodburn" @@ -503,6 +517,8 @@ config ARCH_MX7 select SYS_FSL_HAS_SEC if SECURE_BOOT select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_LE + select BOARD_EARLY_INIT_F + select ARCH_MISC_INIT config ARCH_MX6 bool "Freescale MX6" @@ -514,34 +530,41 @@ config ARCH_MX6 config ARCH_MX5 bool "Freescale MX5" select CPU_V7 + select BOARD_EARLY_INIT_F config TARGET_M53EVK bool "Support m53evk" select CPU_V7 select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_MX51EVK bool "Support mx51evk" select BOARD_LATE_INIT select CPU_V7 + select BOARD_EARLY_INIT_F config TARGET_MX53ARD bool "Support mx53ard" select CPU_V7 + select BOARD_EARLY_INIT_F config TARGET_MX53EVK bool "Support mx53evk" select BOARD_LATE_INIT select CPU_V7 + select BOARD_EARLY_INIT_F config TARGET_MX53LOCO bool "Support mx53loco" select BOARD_LATE_INIT select CPU_V7 + select BOARD_EARLY_INIT_F config TARGET_MX53SMD bool "Support mx53smd" select CPU_V7 + select BOARD_EARLY_INIT_F config OMAP34XX bool "OMAP34XX SoC" @@ -581,6 +604,7 @@ config ARCH_RMOBILE bool "Renesas ARM SoCs" select DM select DM_SERIAL + select BOARD_EARLY_INIT_F config TARGET_S32V234EVB bool "Support s32v234evb" @@ -607,6 +631,8 @@ config ARCH_SOCFPGA select DM_SPI_FLASH select DM_SPI select ENABLE_ARM_SOC_BOOT0_HOOK + select ARCH_EARLY_INIT_R + select ARCH_MISC_INIT config TARGET_CM_T43 bool "Support cm_t43" @@ -731,6 +757,7 @@ config TARGET_LS2080A_EMU select ARCH_LS2080A select ARM64 select ARMV8_MULTIENTRY + select ARCH_MISC_INIT help Support for Freescale LS2080A_EMU platform The LS2080A Development System (EMULATOR) is a pre silicon @@ -742,6 +769,7 @@ config TARGET_LS2080A_SIMU select ARCH_LS2080A select ARM64 select ARMV8_MULTIENTRY + select ARCH_MISC_INIT help Support for Freescale LS2080A_SIMU platform The LS2080A Development System (QDS) is a pre silicon @@ -755,6 +783,7 @@ config TARGET_LS2080AQDS select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL + select ARCH_MISC_INIT help Support for Freescale LS2080AQDS platform The LS2080A Development System (QDS) is a high-performance @@ -768,6 +797,7 @@ config TARGET_LS2080ARDB select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL + select ARCH_MISC_INIT help Support for Freescale LS2080ARDB platform. The LS2080A Reference design board (RDB) is a high-performance @@ -828,6 +858,7 @@ config TARGET_LS1021AQDS select ARCH_SUPPORT_PSCI select LS1_DEEP_SLEEP select SYS_FSL_DDR + select BOARD_EARLY_INIT_F config TARGET_LS1021ATWR bool "Support ls1021atwr" @@ -839,6 +870,7 @@ config TARGET_LS1021ATWR select ARCH_LS1021A select ARCH_SUPPORT_PSCI select LS1_DEEP_SLEEP + select BOARD_EARLY_INIT_F config TARGET_LS1021AIOT bool "Support ls1021aiot" @@ -862,6 +894,7 @@ config TARGET_LS1043AQDS select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL + select BOARD_EARLY_INIT_F help Support for Freescale LS1043AQDS platform. @@ -872,6 +905,7 @@ config TARGET_LS1043ARDB select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL + select BOARD_EARLY_INIT_F help Support for Freescale LS1043ARDB platform. @@ -883,6 +917,7 @@ config TARGET_LS1046AQDS select BOARD_LATE_INIT select SUPPORT_SPL select DM_SPI_FLASH if DM_SPI + select BOARD_EARLY_INIT_F help Support for Freescale LS1046AQDS platform. The LS1046A Development System (QDS) is a high-performance @@ -898,6 +933,7 @@ config TARGET_LS1046ARDB select SUPPORT_SPL select DM_SPI_FLASH if DM_SPI select POWER_MC34VR500 + select BOARD_EARLY_INIT_F help Support for Freescale LS1046ARDB platform. The LS1046A Reference Design Board (RDB) is a high-performance diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index b8dc5c8df6..3b0409122e 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -162,6 +162,7 @@ config TARGET_MX6QSABREAUTO select BOARD_LATE_INIT select DM select DM_THERMAL + select BOARD_EARLY_INIT_F config TARGET_MX6SABRESD bool "mx6sabresd" @@ -169,6 +170,7 @@ config TARGET_MX6SABRESD select SUPPORT_SPL select DM select DM_THERMAL + select BOARD_EARLY_INIT_F config TARGET_MX6SLEVK bool "mx6slevk" @@ -187,6 +189,7 @@ config TARGET_MX6SXSABRESD select SUPPORT_SPL select DM select DM_THERMAL + select BOARD_EARLY_INIT_F config TARGET_MX6SXSABREAUTO bool "mx6sxsabreauto" @@ -194,6 +197,7 @@ config TARGET_MX6SXSABREAUTO select MX6SX select DM select DM_THERMAL + select BOARD_EARLY_INIT_F config TARGET_MX6UL_9X9_EVK bool "mx6ul_9x9_evk" diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index ba411e2af8..47897f4c90 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -5,6 +5,8 @@ config ARCH_LS1012A select SYS_FSL_DDR_BE select SYS_FSL_MMDC select SYS_FSL_ERRATUM_A010315 + select ARCH_EARLY_INIT_R + select BOARD_EARLY_INIT_F config ARCH_LS1043A bool @@ -22,6 +24,8 @@ config ARCH_LS1043A select SYS_FSL_ERRATUM_A010539 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_DDR4 + select ARCH_EARLY_INIT_R + select BOARD_EARLY_INIT_F config ARCH_LS1046A bool @@ -38,6 +42,8 @@ config ARCH_LS1046A select SYS_FSL_ERRATUM_A010539 select SYS_FSL_HAS_DDR4 select SYS_FSL_SRDS_2 + select ARCH_EARLY_INIT_R + select BOARD_EARLY_INIT_F config ARCH_LS2080A bool @@ -62,6 +68,8 @@ config ARCH_LS2080A select SYS_FSL_ERRATUM_A009803 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_A010165 + select ARCH_EARLY_INIT_R + select BOARD_EARLY_INIT_F config FSL_LSCH2 bool diff --git a/arch/arm/include/asm/imx-common/dma.h b/arch/arm/include/asm/imx-common/dma.h index 1aec4f9d5a..0244947b6e 100644 --- a/arch/arm/include/asm/imx-common/dma.h +++ b/arch/arm/include/asm/imx-common/dma.h @@ -16,12 +16,7 @@ #include <linux/list.h> #include <linux/compiler.h> -#ifndef CONFIG_ARCH_DMA_PIO_WORDS -#define DMA_PIO_WORDS 15 -#else -#define DMA_PIO_WORDS CONFIG_ARCH_DMA_PIO_WORDS -#endif - +#define DMA_PIO_WORDS 15 #define MXS_DMA_ALIGNMENT ARCH_DMA_MINALIGN /* diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 642936b93f..99b88d1785 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -11,6 +11,7 @@ config TARGET_AT91RM9200EK config TARGET_AT91SAM9260EK bool "Atmel at91sam9260 reference board" select CPU_ARM926EJS + select BOARD_EARLY_INIT_F config TARGET_ETHERNUT5 bool "Ethernut5 board" @@ -43,6 +44,7 @@ config TARGET_PM9261 config TARGET_AT91SAM9263EK bool "Atmel at91sam9263 reference board" select CPU_ARM926EJS + select BOARD_EARLY_INIT_F config TARGET_USB_A9263 bool "Caloa USB A9260 board" @@ -56,6 +58,7 @@ config TARGET_AT91SAM9M10G45EK bool "Atmel AT91SAM9M10G45-EK board" select CPU_ARM926EJS select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_PM9G45 bool "Ronetix pm9g45 board" @@ -70,46 +73,55 @@ config TARGET_AT91SAM9N12EK bool "Atmel AT91SAM9N12-EK board" select CPU_ARM926EJS select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_AT91SAM9RLEK bool "Atmel at91sam9rl reference board" select CPU_ARM926EJS + select BOARD_EARLY_INIT_F config TARGET_AT91SAM9X5EK bool "Atmel AT91SAM9X5-EK board" select CPU_ARM926EJS select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_SAMA5D2_PTC bool "SAMA5D2 PTC board" select CPU_V7 select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_SAMA5D2_XPLAINED bool "SAMA5D2 Xplained board" select CPU_V7 select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_SAMA5D3_XPLAINED bool "SAMA5D3 Xplained board" select CPU_V7 select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_SAMA5D3XEK bool "SAMA5D3X-EK board" select BOARD_LATE_INIT select CPU_V7 select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_SAMA5D4_XPLAINED bool "SAMA5D4 Xplained board" select CPU_V7 select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_SAMA5D4EK bool "SAMA5D4 Evaluation Kit" select CPU_V7 select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_MA5D4EVK bool "DENX MA5D4EVK Evaluation Kit" diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 07118fc3df..9bd8ba5eea 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -7,6 +7,7 @@ choice config ARCH_EXYNOS4 bool "Exynos4 SoC family" select CPU_V7 + select BOARD_EARLY_INIT_F help Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU. There are multiple SoCs in this family including Exynos4210, Exynos4412, @@ -15,6 +16,7 @@ config ARCH_EXYNOS4 config ARCH_EXYNOS5 bool "Exynos5 SoC family" select CPU_V7 + select BOARD_EARLY_INIT_F help Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU (and Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs @@ -23,6 +25,7 @@ config ARCH_EXYNOS5 config ARCH_EXYNOS7 bool "Exynos7 SoC family" select ARM64 + select BOARD_EARLY_INIT_F help Samsung Exynos7 SoC family are based on ARM Cortex-A57 CPU or Cortex-A53 CPU (and some in a big.LITTLE configuration). There are diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index f005277228..53117c4296 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -8,6 +8,8 @@ config ARMADA_32BIT select SPL_DM_SEQ_ALIAS select SPL_OF_CONTROL select SPL_SIMPLE_BUS + select BOARD_EARLY_INIT_F + select ARCH_MISC_INIT config ARMADA_64BIT bool diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 5bdbc700a4..c9f2380f4d 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -37,6 +37,7 @@ config TEGRA_COMMON select MISC select OF_CONTROL select VIDCONSOLE_AS_LCD if DM_VIDEO + select BOARD_EARLY_INIT_F config TEGRA_NO_BPMP bool "Tegra common options for SoCs without BPMP" diff --git a/arch/blackfin/include/asm/config.h b/arch/blackfin/include/asm/config.h index de3c97931d..4e8313d811 100644 --- a/arch/blackfin/include/asm/config.h +++ b/arch/blackfin/include/asm/config.h @@ -171,8 +171,6 @@ } #endif -#define CONFIG_ARCH_MISC_INIT - #define CONFIG_CPU CONFIG_BFIN_CPU #endif diff --git a/arch/powerpc/cpu/mpc5xxx/speed.c b/arch/powerpc/cpu/mpc5xxx/speed.c index 30a0a358dd..b37c4a5208 100644 --- a/arch/powerpc/cpu/mpc5xxx/speed.c +++ b/arch/powerpc/cpu/mpc5xxx/speed.c @@ -69,7 +69,7 @@ int get_clocks (void) return (0); } -int prt_mpc5xxx_clks (void) +int print_cpuinfo(void) { char buf1[32], buf2[32], buf3[32]; diff --git a/arch/powerpc/cpu/mpc8260/spi.c b/arch/powerpc/cpu/mpc8260/spi.c index 8c91a713bb..c7fb4e9a6c 100644 --- a/arch/powerpc/cpu/mpc8260/spi.c +++ b/arch/powerpc/cpu/mpc8260/spi.c @@ -181,14 +181,7 @@ void spi_init_f (void) spi->spi_tbc = 0; spi->spi_txtmp = 0; - /* Allocate space for one transmit and one receive buffer - * descriptor in the DP ram - */ -#ifdef CONFIG_SYS_ALLOC_DPRAM - dpaddr = m8260_cpm_dpalloc (sizeof(cbd_t)*2, 8); -#else dpaddr = CPM_SPI_BASE; -#endif /* 3 */ /* Set up the SPI parameters in the parameter ram */ diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig index 184063c40b..bf3be50c48 100644 --- a/arch/powerpc/cpu/mpc83xx/Kconfig +++ b/arch/powerpc/cpu/mpc83xx/Kconfig @@ -27,30 +27,36 @@ config TARGET_MPC8308RDB config TARGET_MPC8313ERDB bool "Support MPC8313ERDB" select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_MPC8315ERDB bool "Support MPC8315ERDB" + select BOARD_EARLY_INIT_F config TARGET_MPC8323ERDB bool "Support MPC8323ERDB" config TARGET_MPC832XEMDS bool "Support MPC832XEMDS" + select BOARD_EARLY_INIT_F config TARGET_MPC8349EMDS bool "Support MPC8349EMDS" select SYS_FSL_DDR select SYS_FSL_HAS_DDR2 select SYS_FSL_DDR_BE + select BOARD_EARLY_INIT_F config TARGET_MPC8349ITX bool "Support MPC8349ITX" config TARGET_MPC837XEMDS bool "Support MPC837XEMDS" + select BOARD_EARLY_INIT_F config TARGET_MPC837XERDB bool "Support MPC837XERDB" + select BOARD_EARLY_INIT_F config TARGET_IDS8313 bool "Support ids8313" diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 00dd3c1319..38ea4c1440 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -33,12 +33,14 @@ config TARGET_BSC9131RDB bool "Support BSC9131RDB" select ARCH_BSC9131 select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_BSC9132QDS bool "Support BSC9132QDS" select ARCH_BSC9132 select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL + select BOARD_EARLY_INIT_F config TARGET_C29XPCIE bool "Support C29XPCIE" @@ -388,6 +390,7 @@ config ARCH_B4860 select SYS_FSL_ERRATUM_A007075 select SYS_FSL_ERRATUM_A007186 select SYS_FSL_ERRATUM_A007212 + select SYS_FSL_ERRATUM_A007907 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC @@ -853,6 +856,8 @@ config ARCH_T2080 select SYS_FSL_ERRATUM_A006593 select SYS_FSL_ERRATUM_A007186 select SYS_FSL_ERRATUM_A007212 + select SYS_FSL_ERRATUM_A007815 + select SYS_FSL_ERRATUM_A007907 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_ESDHC111 select SYS_FSL_HAS_DDR3 @@ -914,6 +919,8 @@ config ARCH_T4240 select SYS_FSL_ERRATUM_A006593 select SYS_FSL_ERRATUM_A007186 select SYS_FSL_ERRATUM_A007798 + select SYS_FSL_ERRATUM_A007815 + select SYS_FSL_ERRATUM_A007907 select SYS_FSL_ERRATUM_A009942 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC @@ -1101,9 +1108,15 @@ config SYS_FSL_ERRATUM_A007186 config SYS_FSL_ERRATUM_A007212 bool +config SYS_FSL_ERRATUM_A007815 + bool + config SYS_FSL_ERRATUM_A007798 bool +config SYS_FSL_ERRATUM_A007907 + bool + config SYS_FSL_ERRATUM_A008044 bool diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 54b5b33222..b8be59659e 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -330,6 +330,12 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_A009663 puts("Work-around for Erratum A009663 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A007907 + puts("Work-around for Erratum A007907 enabled\n"); +#endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A007815 + puts("Work-around for Erratum A007815 enabled\n"); +#endif return 0; } diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 822844dfa9..f5bf67c990 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -777,6 +777,13 @@ int cpu_init_r(void) sync(); } #endif + +#ifdef CONFIG_SYS_FSL_ERRATUM_A007907 + flush_dcache(); + mtspr(L1CSR2, (mfspr(L1CSR2) & ~L1CSR2_DCSTASHID)); + sync(); +#endif + #ifdef CONFIG_SYS_FSL_ERRATUM_A005812 /* * A-005812 workaround sets bit 32 of SPR 976 for SoCs running diff --git a/arch/powerpc/cpu/mpc86xx/Kconfig b/arch/powerpc/cpu/mpc86xx/Kconfig index ff21c4823b..fcac6584e8 100644 --- a/arch/powerpc/cpu/mpc86xx/Kconfig +++ b/arch/powerpc/cpu/mpc86xx/Kconfig @@ -11,10 +11,12 @@ choice config TARGET_SBC8641D bool "Support sbc8641d" select ARCH_MPC8641 + select BOARD_EARLY_INIT_F config TARGET_MPC8610HPCD bool "Support MPC8610HPCD" select ARCH_MPC8610 + select BOARD_EARLY_INIT_F config TARGET_MPC8641HPCN bool "Support MPC8641HPCN" diff --git a/arch/powerpc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile index f83fd5ecf4..6f81fee571 100644 --- a/arch/powerpc/cpu/mpc8xx/Makefile +++ b/arch/powerpc/cpu/mpc8xx/Makefile @@ -10,7 +10,6 @@ extra-y += start.o extra-y += traps.o obj-y += bedbug_860.o -obj-y += commproc.o obj-y += cpu.o obj-y += cpu_init.o obj-y += fec.o diff --git a/arch/powerpc/cpu/mpc8xx/commproc.c b/arch/powerpc/cpu/mpc8xx/commproc.c deleted file mode 100644 index f8581d130d..0000000000 --- a/arch/powerpc/cpu/mpc8xx/commproc.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * (C) Copyright 2000-2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <commproc.h> - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_SYS_ALLOC_DPRAM - -int dpram_init (void) -{ - /* Reclaim the DP memory for our use. */ - gd->arch.dp_alloc_base = CPM_DATAONLY_BASE; - gd->arch.dp_alloc_top = CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE; - - return (0); -} - -/* Allocate some memory from the dual ported ram. We may want to - * enforce alignment restrictions, but right now everyone is a good - * citizen. - */ -uint dpram_alloc (uint size) -{ - uint addr = gd->arch.dp_alloc_base; - - if ((gd->arch.dp_alloc_base + size) >= gd->arch.dp_alloc_top) - return (CPM_DP_NOSPACE); - - gd->arch.dp_alloc_base += size; - - return addr; -} - -uint dpram_base (void) -{ - return gd->arch.dp_alloc_base; -} - -/* Allocate some memory from the dual ported ram. We may want to - * enforce alignment restrictions, but right now everyone is a good - * citizen. - */ -uint dpram_alloc_align (uint size, uint align) -{ - uint addr, mask = align - 1; - - addr = (gd->arch.dp_alloc_base + mask) & ~mask; - - if ((addr + size) >= gd->arch.dp_alloc_top) - return (CPM_DP_NOSPACE); - - gd->arch.dp_alloc_base = addr + size; - - return addr; -} - -uint dpram_base_align (uint align) -{ - uint mask = align - 1; - - return (gd->arch.dp_alloc_base + mask) & ~mask; -} -#endif /* CONFIG_SYS_ALLOC_DPRAM */ diff --git a/arch/powerpc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c index 0940906b1d..b27310fffb 100644 --- a/arch/powerpc/cpu/mpc8xx/fec.c +++ b/arch/powerpc/cpu/mpc8xx/fec.c @@ -570,14 +570,8 @@ static int fec_init (struct eth_device *dev, bd_t * bd) rxIdx = 0; txIdx = 0; - if (!rtx) { -#ifdef CONFIG_SYS_ALLOC_DPRAM - rtx = (RTXBD *) (immr->im_cpm.cp_dpmem + - dpram_alloc_align (sizeof (RTXBD), 8)); -#else - rtx = (RTXBD *) (immr->im_cpm.cp_dpmem + CPM_FEC_BASE); -#endif - } + if (!rtx) + rtx = (RTXBD *)(immr->im_cpm.cp_dpmem + CPM_FEC_BASE); /* * Setup Receiver Buffer Descriptors (13.14.24.18) * Settings: diff --git a/arch/powerpc/cpu/mpc8xx/i2c.c b/arch/powerpc/cpu/mpc8xx/i2c.c index 3dff4ab4ac..54d5cb5130 100644 --- a/arch/powerpc/cpu/mpc8xx/i2c.c +++ b/arch/powerpc/cpu/mpc8xx/i2c.c @@ -190,17 +190,7 @@ void i2c_init(int speed, int slaveaddr) iip->iic_rpbase = 0; #endif -#ifdef CONFIG_SYS_ALLOC_DPRAM - dpaddr = iip->iic_rbase; - if (dpaddr == 0) { - /* need to allocate dual port ram */ - dpaddr = dpram_alloc_align((NUM_RX_BDS * sizeof(I2C_BD)) + - (NUM_TX_BDS * sizeof(I2C_BD)) + - MAX_TX_SPACE, 8); - } -#else dpaddr = CPM_I2C_BASE; -#endif /* * initialise data in dual port ram: diff --git a/arch/powerpc/cpu/mpc8xx/scc.c b/arch/powerpc/cpu/mpc8xx/scc.c index 3474637fac..17bcc2fe0a 100644 --- a/arch/powerpc/cpu/mpc8xx/scc.c +++ b/arch/powerpc/cpu/mpc8xx/scc.c @@ -199,14 +199,8 @@ static int scc_init (struct eth_device *dev, bd_t * bis) rxIdx = 0; txIdx = 0; - if (!rtx) { -#ifdef CONFIG_SYS_ALLOC_DPRAM - rtx = (RTXBD *) (immr->im_cpm.cp_dpmem + - dpram_alloc_align (sizeof (RTXBD), 8)); -#else - rtx = (RTXBD *) (immr->im_cpm.cp_dpmem + CPM_SCC_BASE); -#endif - } + if (!rtx) + rtx = (RTXBD *)(immr->im_cpm.cp_dpmem + CPM_SCC_BASE); #if (defined(PA_ENET_RXD) && defined(PA_ENET_TXD)) /* Configure port A pins for Txd and Rxd. diff --git a/arch/powerpc/cpu/mpc8xx/serial.c b/arch/powerpc/cpu/mpc8xx/serial.c index 94c785f611..b6e12d0d85 100644 --- a/arch/powerpc/cpu/mpc8xx/serial.c +++ b/arch/powerpc/cpu/mpc8xx/serial.c @@ -176,15 +176,7 @@ static int smc_init (void) /* Set the physical address of the host memory buffers in * the buffer descriptors. */ - -#ifdef CONFIG_SYS_ALLOC_DPRAM - /* allocate - * size of struct serialbuffer with bd rx/tx, buffer rx/tx and rx index - */ - dpaddr = dpram_alloc_align((sizeof(serialbuffer_t)), 8); -#else - dpaddr = CPM_SERIAL_BASE ; -#endif + dpaddr = CPM_SERIAL_BASE; rtx = (serialbuffer_t *)&cp->cp_dpmem[dpaddr]; /* Allocate space for two buffer descriptors in the DP ram. @@ -421,12 +413,7 @@ static int scc_init (void) #endif /* Allocate space for two buffer descriptors in the DP ram. */ - -#ifdef CONFIG_SYS_ALLOC_DPRAM - dpaddr = dpram_alloc_align (sizeof(cbd_t)*2 + 2, 8) ; -#else - dpaddr = CPM_SERIAL2_BASE ; -#endif + dpaddr = dpram_alloc_align(sizeof(cbd_t)*2 + 2, 8); /* Enable SDMA. */ im->im_siu_conf.sc_sdcr = 0x0001; diff --git a/arch/powerpc/cpu/mpc8xx/spi.c b/arch/powerpc/cpu/mpc8xx/spi.c index 6267c0e204..35b425e7c1 100644 --- a/arch/powerpc/cpu/mpc8xx/spi.c +++ b/arch/powerpc/cpu/mpc8xx/spi.c @@ -187,14 +187,7 @@ void spi_init_f (void) spi->spi_tbc = 0; spi->spi_txtmp = 0; - /* Allocate space for one transmit and one receive buffer - * descriptor in the DP ram - */ -#ifdef CONFIG_SYS_ALLOC_DPRAM - dpaddr = dpram_alloc_align (sizeof(cbd_t)*2, 8); -#else dpaddr = CPM_SPI_BASE; -#endif /* 3 */ /* Set up the SPI parameters in the parameter ram */ diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c index 584f3b8d61..afb5b512ba 100644 --- a/arch/powerpc/cpu/mpc8xxx/cpu.c +++ b/arch/powerpc/cpu/mpc8xxx/cpu.c @@ -308,7 +308,7 @@ int is_core_valid(unsigned int core) return !!((1 << core) & cpu_mask()); } -int probecpu (void) +int arch_cpu_init(void) { uint svr; uint ver; diff --git a/arch/powerpc/include/asm/fsl_pci.h b/arch/powerpc/include/asm/fsl_pci.h index 8bee8ca998..cad341e72c 100644 --- a/arch/powerpc/include/asm/fsl_pci.h +++ b/arch/powerpc/include/asm/fsl_pci.h @@ -79,7 +79,9 @@ typedef struct ccsr_pci { u32 pme_msg_dis; /* 0x024 - PCIE PME & message disable register */ u32 pme_msg_int_en; /* 0x028 - PCIE PME & message interrupt enable register */ u32 pm_command; /* 0x02c - PCIE PM Command register */ - char res4[3016]; /* (- #xbf8 #x30)3016 */ + char res3[2188]; /* (0x8bc - 0x30 = 2188) */ + u32 dbi_ro_wr_en; /* 0x8bc - DBI read only write enable reg */ + char res4[824]; /* (0xbf8 - 0x8c0 = 824) */ u32 block_rev1; /* 0xbf8 - PCIE Block Revision register 1 */ u32 block_rev2; /* 0xbfc - PCIE Block Revision register 2 */ diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h index 4090975bf5..3943d0e92b 100644 --- a/arch/powerpc/include/asm/global_data.h +++ b/arch/powerpc/include/asm/global_data.h @@ -96,7 +96,7 @@ struct arch_global_data { unsigned long arbiter_event_attributes; unsigned long arbiter_event_address; #endif -#if defined(CONFIG_SYS_ALLOC_DPRAM) || defined(CONFIG_CPM2) +#if defined(CONFIG_CPM2) unsigned int dp_alloc_base; unsigned int dp_alloc_top; #endif diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index fbf72bb7c6..81bae6f008 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -501,6 +501,7 @@ #define L1CSR1_ICE 0x00000001 /* Instruction Cache Enable */ #define SPRN_L1CSR2 0x25e /* L1 Data Cache Control and Status Register 2 */ #define L1CSR2_DCWS 0x40000000 /* Data Cache Write Shadow */ +#define L1CSR2_DCSTASHID 0x000003ff /* Data Cache Stash ID */ #define SPRN_L2CSR0 0x3f9 /* L2 Data Cache Control and Status Register 0 */ #define L2CSR0_L2E 0x80000000 /* L2 Cache Enable */ #define L2CSR0_L2PE 0x40000000 /* L2 Cache Parity/ECC Enable */ diff --git a/arch/powerpc/lib/ppccache.S b/arch/powerpc/lib/ppccache.S index 66cf02dbd0..ad28c7c369 100644 --- a/arch/powerpc/lib/ppccache.S +++ b/arch/powerpc/lib/ppccache.S @@ -65,7 +65,7 @@ ppcSync: * flush_dcache_range(unsigned long start, unsigned long stop) */ _GLOBAL(flush_dcache_range) -#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx) +#if defined(CONFIG_4xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) li r5,L1_CACHE_BYTES-1 andc r3,r3,r5 subf r4,r3,r4 @@ -89,7 +89,7 @@ _GLOBAL(flush_dcache_range) * invalidate_dcache_range(unsigned long start, unsigned long stop) */ _GLOBAL(invalidate_dcache_range) -#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx) +#if defined(CONFIG_4xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) li r5,L1_CACHE_BYTES-1 andc r3,r3,r5 subf r4,r3,r4 |