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-rw-r--r--arch/mips/cpu/cpu.c3
-rw-r--r--arch/mips/include/asm/cacheops.h2
-rw-r--r--arch/mips/include/asm/cm.h1
-rw-r--r--arch/mips/include/asm/mipsregs.h1
-rw-r--r--arch/mips/lib/bootm.c7
-rw-r--r--arch/mips/lib/cache.c2
-rw-r--r--arch/mips/lib/reloc.c1
-rw-r--r--arch/mips/lib/spl.c1
-rw-r--r--arch/mips/lib/stack.c2
-rw-r--r--arch/mips/lib/traps.c2
-rw-r--r--arch/mips/mach-ath79/ar933x/ddr.c1
-rw-r--r--arch/mips/mach-ath79/ar934x/clk.c6
-rw-r--r--arch/mips/mach-ath79/ar934x/ddr.c2
-rw-r--r--arch/mips/mach-ath79/cpu.c1
-rw-r--r--arch/mips/mach-ath79/qca953x/ddr.c2
-rw-r--r--arch/mips/mach-ath79/qca956x/clk.c1
-rw-r--r--arch/mips/mach-ath79/qca956x/ddr.c1
-rw-r--r--arch/mips/mach-ath79/reset.c2
-rw-r--r--arch/mips/mach-bmips/dram.c2
-rw-r--r--arch/mips/mach-jz47xx/include/mach/jz4780_dram.h1
-rw-r--r--arch/mips/mach-jz47xx/jz4780/gpio.c1
-rw-r--r--arch/mips/mach-jz47xx/jz4780/jz4780.c1
-rw-r--r--arch/mips/mach-jz47xx/jz4780/pll.c2
-rw-r--r--arch/mips/mach-jz47xx/jz4780/reset.c1
-rw-r--r--arch/mips/mach-jz47xx/jz4780/sdram.c3
-rw-r--r--arch/mips/mach-jz47xx/jz4780/timer.c3
-rw-r--r--arch/mips/mach-mscc/cpu.c2
-rw-r--r--arch/mips/mach-mscc/dram.c1
-rw-r--r--arch/mips/mach-mscc/gpio.c1
-rw-r--r--arch/mips/mach-mscc/include/mach/ddr.h1
-rw-r--r--arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h2
-rw-r--r--arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h2
-rw-r--r--arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h2
-rw-r--r--arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h1
-rw-r--r--arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h1
-rw-r--r--arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h1
-rw-r--r--arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h1
-rw-r--r--arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h1
-rw-r--r--arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h1
-rw-r--r--arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h1
-rw-r--r--arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h1
-rw-r--r--arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h1
-rw-r--r--arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h1
-rw-r--r--arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h1
-rw-r--r--arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h1
-rw-r--r--arch/mips/mach-mscc/include/mach/tlb.h1
-rw-r--r--arch/mips/mach-mscc/phy.c1
-rw-r--r--arch/mips/mach-mtmips/cpu.c2
-rw-r--r--arch/mips/mach-mtmips/ddr_init.c1
-rw-r--r--arch/mips/mach-mtmips/mt7628/ddr.c1
-rw-r--r--arch/mips/mach-mtmips/spl.c1
-rw-r--r--arch/mips/mach-pic32/cpu.c1
52 files changed, 79 insertions, 4 deletions
diff --git a/arch/mips/cpu/cpu.c b/arch/mips/cpu/cpu.c
index a403ff729b..7d5c9fd83a 100644
--- a/arch/mips/cpu/cpu.c
+++ b/arch/mips/cpu/cpu.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <command.h>
+#include <init.h>
#include <linux/compiler.h>
#include <asm/cache.h>
#include <asm/mipsregs.h>
@@ -20,7 +21,7 @@ void __weak _machine_restart(void)
/* NOP */;
}
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
_machine_restart();
diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h
index 98b67ccc8e..641e2ad58d 100644
--- a/arch/mips/include/asm/cacheops.h
+++ b/arch/mips/include/asm/cacheops.h
@@ -8,6 +8,8 @@
#ifndef __ASM_CACHEOPS_H
#define __ASM_CACHEOPS_H
+#include <asm/cache.h>
+
#ifndef __ASSEMBLY__
static inline void mips_cache(int op, const volatile void *addr)
diff --git a/arch/mips/include/asm/cm.h b/arch/mips/include/asm/cm.h
index 8f37471f81..3878171607 100644
--- a/arch/mips/include/asm/cm.h
+++ b/arch/mips/include/asm/cm.h
@@ -39,6 +39,7 @@
#ifndef __ASSEMBLY__
#include <asm/io.h>
+#include <linux/bitops.h>
static inline void *mips_cm_base(void)
{
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index f80311e64e..7538e6b2e0 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -27,6 +27,7 @@
#ifdef __ASSEMBLY__
#define _ULCAST_
#else
+#include <linux/bitops.h>
#define _ULCAST_ (unsigned long)
#endif
diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index f1db6d23b8..82f986cb81 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -5,9 +5,12 @@
*/
#include <common.h>
+#include <bootstage.h>
#include <env.h>
#include <image.h>
#include <fdt_support.h>
+#include <lmb.h>
+#include <log.h>
#include <asm/addrspace.h>
#include <asm/io.h>
@@ -304,8 +307,8 @@ static void boot_jump_linux(bootm_headers_t *images)
linux_extra);
}
-int do_bootm_linux(int flag, int argc, char * const argv[],
- bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char *const argv[],
+ bootm_headers_t *images)
{
/* No need for those on MIPS */
if (flag & BOOTM_STATE_OS_BD_T)
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index 1a8c87d094..24f115ebc9 100644
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <cpu_func.h>
+#include <asm/cache.h>
#include <asm/cacheops.h>
#ifdef CONFIG_MIPS_L2_CACHE
#include <asm/cm.h>
@@ -13,6 +14,7 @@
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
+#include <linux/bug.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/mips/lib/reloc.c b/arch/mips/lib/reloc.c
index 1e3cfadd2d..ffc8c7a1b7 100644
--- a/arch/mips/lib/reloc.c
+++ b/arch/mips/lib/reloc.c
@@ -31,6 +31,7 @@
#include <init.h>
#include <asm/relocs.h>
#include <asm/sections.h>
+#include <linux/bitops.h>
/**
* read_uint() - Read an unsigned integer from the buffer
diff --git a/arch/mips/lib/spl.c b/arch/mips/lib/spl.c
index 7ba3e53f6d..f96fda5b2d 100644
--- a/arch/mips/lib/spl.c
+++ b/arch/mips/lib/spl.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <cpu_func.h>
+#include <log.h>
#include <spl.h>
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
diff --git a/arch/mips/lib/stack.c b/arch/mips/lib/stack.c
index 99fd056905..8f523fd6fb 100644
--- a/arch/mips/lib/stack.c
+++ b/arch/mips/lib/stack.c
@@ -1,6 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
#include <common.h>
+#include <init.h>
+#include <log.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c
index 8fff7541e3..b1ae02fcab 100644
--- a/arch/mips/lib/traps.c
+++ b/arch/mips/lib/traps.c
@@ -11,9 +11,11 @@
*/
#include <common.h>
+#include <asm/ptrace.h>
#include <cpu_func.h>
#include <hang.h>
#include <init.h>
+#include <log.h>
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
#include <asm/system.h>
diff --git a/arch/mips/mach-ath79/ar933x/ddr.c b/arch/mips/mach-ath79/ar933x/ddr.c
index 2cf0b2cb1f..09166ecf8f 100644
--- a/arch/mips/mach-ath79/ar933x/ddr.c
+++ b/arch/mips/mach-ath79/ar933x/ddr.c
@@ -8,6 +8,7 @@
#include <asm/io.h>
#include <asm/addrspace.h>
#include <asm/types.h>
+#include <linux/bitops.h>
#include <mach/ar71xx_regs.h>
#include <mach/ath79.h>
diff --git a/arch/mips/mach-ath79/ar934x/clk.c b/arch/mips/mach-ath79/ar934x/clk.c
index 09bdc253ae..9fa2225ed2 100644
--- a/arch/mips/mach-ath79/ar934x/clk.c
+++ b/arch/mips/mach-ath79/ar934x/clk.c
@@ -5,10 +5,13 @@
#include <common.h>
#include <clock_legacy.h>
+#include <command.h>
#include <hang.h>
#include <asm/io.h>
#include <asm/addrspace.h>
#include <asm/types.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
#include <mach/ar71xx_regs.h>
#include <mach/ath79.h>
#include <wait_bit.h>
@@ -319,7 +322,8 @@ ulong get_ddr_freq(ulong dummy)
return gd->mem_clk;
}
-int do_ar934x_showclk(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ar934x_showclk(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
{
ar934x_update_clock();
printf("CPU: %8ld MHz\n", gd->cpu_clk / 1000000);
diff --git a/arch/mips/mach-ath79/ar934x/ddr.c b/arch/mips/mach-ath79/ar934x/ddr.c
index 289973ec95..218f60a96c 100644
--- a/arch/mips/mach-ath79/ar934x/ddr.c
+++ b/arch/mips/mach-ath79/ar934x/ddr.c
@@ -9,6 +9,8 @@
#include <asm/io.h>
#include <asm/addrspace.h>
#include <asm/types.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
#include <mach/ar71xx_regs.h>
#include <mach/ath79.h>
diff --git a/arch/mips/mach-ath79/cpu.c b/arch/mips/mach-ath79/cpu.c
index 9afc672602..31e87d6206 100644
--- a/arch/mips/mach-ath79/cpu.c
+++ b/arch/mips/mach-ath79/cpu.c
@@ -4,6 +4,7 @@
*/
#include <common.h>
+#include <init.h>
#include <asm/io.h>
#include <asm/addrspace.h>
#include <asm/types.h>
diff --git a/arch/mips/mach-ath79/qca953x/ddr.c b/arch/mips/mach-ath79/qca953x/ddr.c
index 268da7336b..78f2370e09 100644
--- a/arch/mips/mach-ath79/qca953x/ddr.c
+++ b/arch/mips/mach-ath79/qca953x/ddr.c
@@ -8,6 +8,8 @@
#include <asm/io.h>
#include <asm/addrspace.h>
#include <asm/types.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
#include <mach/ar71xx_regs.h>
#include <mach/ath79.h>
diff --git a/arch/mips/mach-ath79/qca956x/clk.c b/arch/mips/mach-ath79/qca956x/clk.c
index d71c94e171..5adf6cd815 100644
--- a/arch/mips/mach-ath79/qca956x/clk.c
+++ b/arch/mips/mach-ath79/qca956x/clk.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <clock_legacy.h>
+#include <log.h>
#include <asm/io.h>
#include <asm/addrspace.h>
#include <asm/types.h>
diff --git a/arch/mips/mach-ath79/qca956x/ddr.c b/arch/mips/mach-ath79/qca956x/ddr.c
index fb2230430c..e61a368141 100644
--- a/arch/mips/mach-ath79/qca956x/ddr.c
+++ b/arch/mips/mach-ath79/qca956x/ddr.c
@@ -9,6 +9,7 @@
#include <asm/io.h>
#include <asm/addrspace.h>
#include <asm/types.h>
+#include <linux/delay.h>
#include <mach/ar71xx_regs.h>
#include <mach/ath79.h>
diff --git a/arch/mips/mach-ath79/reset.c b/arch/mips/mach-ath79/reset.c
index 0ab3ab6383..6cd5e77fd1 100644
--- a/arch/mips/mach-ath79/reset.c
+++ b/arch/mips/mach-ath79/reset.c
@@ -5,6 +5,8 @@
*/
#include <common.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
#include <linux/errno.h>
#include <asm/io.h>
#include <asm/addrspace.h>
diff --git a/arch/mips/mach-bmips/dram.c b/arch/mips/mach-bmips/dram.c
index 87ced7c5d5..a772a655d9 100644
--- a/arch/mips/mach-bmips/dram.c
+++ b/arch/mips/mach-bmips/dram.c
@@ -5,6 +5,8 @@
*/
#include <common.h>
+#include <init.h>
+#include <log.h>
#include <ram.h>
#include <dm.h>
diff --git a/arch/mips/mach-jz47xx/include/mach/jz4780_dram.h b/arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
index 92d431bd04..61cc148988 100644
--- a/arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
+++ b/arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
@@ -12,6 +12,7 @@
/*
* DDR
*/
+#include <linux/bitops.h>
#define DDRC_ST 0x0
#define DDRC_CFG 0x4
#define DDRC_CTRL 0x8
diff --git a/arch/mips/mach-jz47xx/jz4780/gpio.c b/arch/mips/mach-jz47xx/jz4780/gpio.c
index cee2328ab1..d4884e7fa9 100644
--- a/arch/mips/mach-jz47xx/jz4780/gpio.c
+++ b/arch/mips/mach-jz47xx/jz4780/gpio.c
@@ -3,6 +3,7 @@
#include <config.h>
#include <common.h>
#include <asm/io.h>
+#include <linux/bitops.h>
#include <mach/jz4780.h>
int jz47xx_gpio_get_value(unsigned int gpio)
diff --git a/arch/mips/mach-jz47xx/jz4780/jz4780.c b/arch/mips/mach-jz47xx/jz4780/jz4780.c
index 015840de25..26fcfc842c 100644
--- a/arch/mips/mach-jz47xx/jz4780/jz4780.c
+++ b/arch/mips/mach-jz47xx/jz4780/jz4780.c
@@ -10,6 +10,7 @@
#include <common.h>
#include <cpu_func.h>
#include <hang.h>
+#include <image.h>
#include <init.h>
#include <asm/io.h>
#include <asm/sections.h>
diff --git a/arch/mips/mach-jz47xx/jz4780/pll.c b/arch/mips/mach-jz47xx/jz4780/pll.c
index 9a46198f36..323c634fb3 100644
--- a/arch/mips/mach-jz47xx/jz4780/pll.c
+++ b/arch/mips/mach-jz47xx/jz4780/pll.c
@@ -9,6 +9,8 @@
#include <config.h>
#include <common.h>
#include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
#include <mach/jz4780.h>
#define CPM_CPCCR 0x00
diff --git a/arch/mips/mach-jz47xx/jz4780/reset.c b/arch/mips/mach-jz47xx/jz4780/reset.c
index 73af34721f..bf6addccb5 100644
--- a/arch/mips/mach-jz47xx/jz4780/reset.c
+++ b/arch/mips/mach-jz47xx/jz4780/reset.c
@@ -9,6 +9,7 @@
#include <config.h>
#include <common.h>
#include <asm/io.h>
+#include <linux/bitops.h>
#include <mach/jz4780.h>
/* WDT */
diff --git a/arch/mips/mach-jz47xx/jz4780/sdram.c b/arch/mips/mach-jz47xx/jz4780/sdram.c
index 65afefe53e..690f3c5601 100644
--- a/arch/mips/mach-jz47xx/jz4780/sdram.c
+++ b/arch/mips/mach-jz47xx/jz4780/sdram.c
@@ -11,7 +11,10 @@
#include <common.h>
#include <hang.h>
+#include <init.h>
#include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
#include <mach/jz4780.h>
#include <mach/jz4780_dram.h>
diff --git a/arch/mips/mach-jz47xx/jz4780/timer.c b/arch/mips/mach-jz47xx/jz4780/timer.c
index b32a2f5643..82bb9e8c3b 100644
--- a/arch/mips/mach-jz47xx/jz4780/timer.c
+++ b/arch/mips/mach-jz47xx/jz4780/timer.c
@@ -9,10 +9,13 @@
#include <config.h>
#include <common.h>
#include <div64.h>
+#include <init.h>
#include <irq_func.h>
#include <time.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
#include <mach/jz4780.h>
#define TCU_TSR 0x1C /* Timer Stop Register */
diff --git a/arch/mips/mach-mscc/cpu.c b/arch/mips/mach-mscc/cpu.c
index 3ee589891b..b4ffd44ea4 100644
--- a/arch/mips/mach-mscc/cpu.c
+++ b/arch/mips/mach-mscc/cpu.c
@@ -4,6 +4,8 @@
*/
#include <common.h>
+#include <init.h>
+#include <linux/bitops.h>
#include <asm/io.h>
#include <asm/types.h>
diff --git a/arch/mips/mach-mscc/dram.c b/arch/mips/mach-mscc/dram.c
index 72c70c9e84..b12bac63c2 100644
--- a/arch/mips/mach-mscc/dram.c
+++ b/arch/mips/mach-mscc/dram.c
@@ -4,6 +4,7 @@
*/
#include <common.h>
+#include <init.h>
#include <asm/io.h>
#include <asm/types.h>
diff --git a/arch/mips/mach-mscc/gpio.c b/arch/mips/mach-mscc/gpio.c
index 5e3a53372d..d6b4c5d768 100644
--- a/arch/mips/mach-mscc/gpio.c
+++ b/arch/mips/mach-mscc/gpio.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <asm/io.h>
+#include <linux/bitops.h>
void mscc_gpio_set_alternate(int gpio, int mode)
{
diff --git a/arch/mips/mach-mscc/include/mach/ddr.h b/arch/mips/mach-mscc/include/mach/ddr.h
index bf75e52ec3..d52eabbd2b 100644
--- a/arch/mips/mach-mscc/include/mach/ddr.h
+++ b/arch/mips/mach-mscc/include/mach/ddr.h
@@ -9,6 +9,7 @@
#include <asm/cacheops.h>
#include <asm/io.h>
#include <asm/reboot.h>
+#include <linux/bitops.h>
#include <mach/common.h>
#define MIPS_VCOREIII_MEMORY_DDR3
diff --git a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h
index 4a1228d29f..8d1d21b9b1 100644
--- a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h
@@ -6,6 +6,8 @@
#ifndef _MSCC_JR2_DEVCPU_GCB_H_
#define _MSCC_JR2_DEVCPU_GCB_H_
+#include <linux/bitops.h>
+
#define PERF_GPR 0x4
#define PERF_SOFT_RST 0x8
diff --git a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h
index 3c84edc18a..e11ad8788f 100644
--- a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h
@@ -6,6 +6,8 @@
#ifndef _MSCC_JR2_DEVCPU_GCB_MIIM_REGS_H_
#define _MSCC_JR2_DEVCPU_GCB_MIIM_REGS_H_
+#include <linux/bitops.h>
+
#define MIIM_MII_STATUS(gi) (0xc8 + (gi * 36))
#define MIIM_MII_CMD(gi) (0xd0 + (gi * 36))
#define MIIM_MII_DATA(gi) (0xd4 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h
index 6e0bbe2746..151bb3e6d4 100644
--- a/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h
@@ -6,6 +6,8 @@
#ifndef _MSCC_JR2_ICPU_CFG_H_
#define _MSCC_JR2_ICPU_CFG_H_
+#include <linux/bitops.h>
+
#define ICPU_GPR(x) (0x4 * (x))
#define ICPU_GPR_RSZ 0x4
diff --git a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h
index a74a68593d..750a8013d1 100644
--- a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_OCELOT_DEVCPU_GCB_H_
#define _MSCC_OCELOT_DEVCPU_GCB_H_
+#include <linux/bitops.h>
#define PERF_SOFT_RST 0x90
#define PERF_SOFT_RST_SOFT_SWC_RST BIT(1)
diff --git a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h
index 2303734894..07c4f9aeb6 100644
--- a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h
@@ -8,6 +8,7 @@
#ifndef _MSCC_LUTON_MIIM_REGS_H_
#define _MSCC_LUTON_MIIM_REGS_H_
+#include <linux/bitops.h>
#define MIIM_MII_STATUS(gi) (0xa0 + (gi * 36))
#define MIIM_MII_CMD(gi) (0xa8 + (gi * 36))
#define MIIM_MII_DATA(gi) (0xac + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h
index 9233f037bb..ded7c5fa77 100644
--- a/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_OCELOT_ICPU_CFG_H_
#define _MSCC_OCELOT_ICPU_CFG_H_
+#include <linux/bitops.h>
#define ICPU_GPR(x) (0x4 * (x))
#define ICPU_GPR_RSZ 0x4
diff --git a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
index b2a4203644..5715ec164c 100644
--- a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_OCELOT_DEVCPU_GCB_H_
#define _MSCC_OCELOT_DEVCPU_GCB_H_
+#include <linux/bitops.h>
#define PERF_SOFT_RST 0x8
#define PERF_SOFT_RST_SOFT_NON_CFG_RST BIT(2)
diff --git a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h
index 4ad92214a3..50cf073eab 100644
--- a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_OCELOT_DEVCPU_GCB_MIIM_REGS_H_
#define _MSCC_OCELOT_DEVCPU_GCB_MIIM_REGS_H_
+#include <linux/bitops.h>
#define MIIM_MII_STATUS(gi) (0x9c + (gi * 36))
#define MIIM_MII_CMD(gi) (0xa4 + (gi * 36))
#define MIIM_MII_DATA(gi) (0xa8 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h
index 04cf70bec3..fb10bf2c26 100644
--- a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_OCELOT_ICPU_CFG_H_
#define _MSCC_OCELOT_ICPU_CFG_H_
+#include <linux/bitops.h>
#define ICPU_GPR(x) (0x4 * (x))
#define ICPU_GPR_RSZ 0x4
diff --git a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h
index 9b80fdb574..43d40be716 100644
--- a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVAL_DEVCPU_GCB_H_
#define _MSCC_SERVAL_DEVCPU_GCB_H_
+#include <linux/bitops.h>
#define CHIP_ID 0x0
#define PERF_GPR 0x4
diff --git a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h
index a3abbc4015..e8cb1dcf9a 100644
--- a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVAL_DEVCPU_GCB_MIIM_REGS_H_
#define _MSCC_SERVAL_DEVCPU_GCB_MIIM_REGS_H_
+#include <linux/bitops.h>
#define MIIM_MII_STATUS(gi) (0x5c + (gi * 36))
#define MIIM_MII_CMD(gi) (0x64 + (gi * 36))
#define MIIM_MII_DATA(gi) (0x68 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h
index b8c9d5ca49..4d4151b3d5 100644
--- a/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVAL_ICPU_CFG_H_
#define _MSCC_SERVAL_ICPU_CFG_H_
+#include <linux/bitops.h>
#define ICPU_GPR(x) (0x4 * (x))
#define ICPU_GPR_RSZ 0x8
diff --git a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h
index 493eaad1df..7d6c64f316 100644
--- a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVALT_DEVCPU_GCB_H_
#define _MSCC_SERVALT_DEVCPU_GCB_H_
+#include <linux/bitops.h>
#define PERF_GPR 0x4
#define PERF_SOFT_RST 0x8
diff --git a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h
index 8c67190ecb..72d7c4d08d 100644
--- a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVALT_DEVCPU_GCB_MIIM_REGS_H_
#define _MSCC_SERVALT_DEVCPU_GCB_MIIM_REGS_H_
+#include <linux/bitops.h>
#define MIIM_MII_STATUS(gi) (0xc4 + (gi * 36))
#define MIIM_MII_CMD(gi) (0xcc + (gi * 36))
#define MIIM_MII_DATA(gi) (0xd0 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h
index 491ead169f..13967f66b0 100644
--- a/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVALT_ICPU_CFG_H_
#define _MSCC_SERVALT_ICPU_CFG_H_
+#include <linux/bitops.h>
#define ICPU_GPR(x) (0x4 * (x))
#define ICPU_GPR_RSZ 0x8
diff --git a/arch/mips/mach-mscc/include/mach/tlb.h b/arch/mips/mach-mscc/include/mach/tlb.h
index fdb554f551..ebd8ad0dc1 100644
--- a/arch/mips/mach-mscc/include/mach/tlb.h
+++ b/arch/mips/mach-mscc/include/mach/tlb.h
@@ -7,6 +7,7 @@
#define __ASM_MACH_TLB_H
#include <asm/mipsregs.h>
+#include <linux/bitops.h>
#include <mach/common.h>
#include <linux/sizes.h>
diff --git a/arch/mips/mach-mscc/phy.c b/arch/mips/mach-mscc/phy.c
index add6280e38..83d3e5bdd2 100644
--- a/arch/mips/mach-mscc/phy.c
+++ b/arch/mips/mach-mscc/phy.c
@@ -4,6 +4,7 @@
*/
#include <common.h>
+#include <log.h>
#include <asm/io.h>
int mscc_phy_rd_wr(u8 read,
diff --git a/arch/mips/mach-mtmips/cpu.c b/arch/mips/mach-mtmips/cpu.c
index 459a9673eb..2ddf8cb096 100644
--- a/arch/mips/mach-mtmips/cpu.c
+++ b/arch/mips/mach-mtmips/cpu.c
@@ -4,7 +4,9 @@
*/
#include <common.h>
+#include <init.h>
#include <malloc.h>
+#include <linux/bitops.h>
#include <linux/io.h>
#include <linux/sizes.h>
diff --git a/arch/mips/mach-mtmips/ddr_init.c b/arch/mips/mach-mtmips/ddr_init.c
index cd355cc840..6c6d0933f2 100644
--- a/arch/mips/mach-mtmips/ddr_init.c
+++ b/arch/mips/mach-mtmips/ddr_init.c
@@ -7,6 +7,7 @@
#include <common.h>
#include <linux/bitops.h>
+#include <linux/delay.h>
#include <linux/io.h>
#include <linux/sizes.h>
#include <mach/ddr.h>
diff --git a/arch/mips/mach-mtmips/mt7628/ddr.c b/arch/mips/mach-mtmips/mt7628/ddr.c
index 06c0ca6854..3df85cd144 100644
--- a/arch/mips/mach-mtmips/mt7628/ddr.c
+++ b/arch/mips/mach-mtmips/mt7628/ddr.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <asm/addrspace.h>
#include <linux/bitops.h>
+#include <linux/delay.h>
#include <linux/sizes.h>
#include <linux/io.h>
#include <mach/ddr.h>
diff --git a/arch/mips/mach-mtmips/spl.c b/arch/mips/mach-mtmips/spl.c
index 2a24af70c3..38d9e9160d 100644
--- a/arch/mips/mach-mtmips/spl.c
+++ b/arch/mips/mach-mtmips/spl.c
@@ -7,6 +7,7 @@
#include <common.h>
#include <fdt.h>
+#include <init.h>
#include <spl.h>
#include <asm/sections.h>
#include <linux/sizes.h>
diff --git a/arch/mips/mach-pic32/cpu.c b/arch/mips/mach-pic32/cpu.c
index 8075d93d41..1d8c397144 100644
--- a/arch/mips/mach-pic32/cpu.c
+++ b/arch/mips/mach-pic32/cpu.c
@@ -7,6 +7,7 @@
#include <common.h>
#include <clk.h>
#include <dm.h>
+#include <init.h>
#include <malloc.h>
#include <mach/pic32.h>
#include <mach/ddr.h>