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-rw-r--r--arch/arm/mach-socfpga/Makefile4
-rw-r--r--arch/arm/mach-socfpga/board.c3
-rw-r--r--arch/arm/mach-socfpga/clock_manager.c3
-rw-r--r--arch/arm/mach-socfpga/clock_manager_arria10.c3
-rw-r--r--arch/arm/mach-socfpga/clock_manager_gen5.c3
-rw-r--r--arch/arm/mach-socfpga/fpga_manager.c3
-rw-r--r--arch/arm/mach-socfpga/freeze_controller.c3
-rw-r--r--arch/arm/mach-socfpga/include/mach/base_addr_a10.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/base_addr_ac5.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/base_addr_s10.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/boot0.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/clock_manager.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/fpga_manager.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/freeze_controller.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/gpio.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/misc.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/nic301.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/pinmux.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/reset_manager.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/scan_manager.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/scu.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/sdram.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/sdram_arria10.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/system_manager.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/system_manager_arria10.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/system_manager_gen5.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/timer.h3
-rw-r--r--arch/arm/mach-socfpga/misc.c3
-rw-r--r--arch/arm/mach-socfpga/misc_arria10.c3
-rw-r--r--arch/arm/mach-socfpga/misc_gen5.c3
-rw-r--r--arch/arm/mach-socfpga/pinmux_arria10.c3
-rwxr-xr-xarch/arm/mach-socfpga/qts-filter.sh9
-rw-r--r--arch/arm/mach-socfpga/reset_manager.c3
-rw-r--r--arch/arm/mach-socfpga/reset_manager_arria10.c3
-rw-r--r--arch/arm/mach-socfpga/reset_manager_gen5.c3
-rw-r--r--arch/arm/mach-socfpga/scan_manager.c3
-rw-r--r--arch/arm/mach-socfpga/spl.c3
-rw-r--r--arch/arm/mach-socfpga/system_manager_gen5.c3
-rw-r--r--arch/arm/mach-socfpga/timer.c3
-rw-r--r--arch/arm/mach-socfpga/wrap_iocsr_config.c3
-rw-r--r--arch/arm/mach-socfpga/wrap_pinmux_config.c3
-rw-r--r--arch/arm/mach-socfpga/wrap_pll_config.c3
-rw-r--r--arch/arm/mach-socfpga/wrap_sdram_config.c3
49 files changed, 51 insertions, 103 deletions
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 286bfef8ca..89b4fdf0f7 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -1,11 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000-2003
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
obj-y += board.o
obj-y += clock_manager.o
diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c
index a41d0899d7..c23ac4ead3 100644
--- a/arch/arm/mach-socfpga/board.c
+++ b/arch/arm/mach-socfpga/board.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Altera SoCFPGA common board code
*
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/clock_manager.c b/arch/arm/mach-socfpga/clock_manager.c
index 43e72a8b55..bc2c0f8854 100644
--- a/arch/arm/mach-socfpga/clock_manager.c
+++ b/arch/arm/mach-socfpga/clock_manager.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/clock_manager_arria10.c b/arch/arm/mach-socfpga/clock_manager_arria10.c
index 4bc4acb9bf..4ee6a82b5f 100644
--- a/arch/arm/mach-socfpga/clock_manager_arria10.c
+++ b/arch/arm/mach-socfpga/clock_manager_arria10.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2016-2017 Intel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/clock_manager_gen5.c b/arch/arm/mach-socfpga/clock_manager_gen5.c
index 1b3914ba7d..3a64600861 100644
--- a/arch/arm/mach-socfpga/clock_manager_gen5.c
+++ b/arch/arm/mach-socfpga/clock_manager_gen5.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/fpga_manager.c b/arch/arm/mach-socfpga/fpga_manager.c
index 16e4a7821b..18d692c631 100644
--- a/arch/arm/mach-socfpga/fpga_manager.c
+++ b/arch/arm/mach-socfpga/fpga_manager.c
@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (C) 2012 Altera Corporation <www.altera.com>
* All rights reserved.
*
* This file contains only support functions used also by the SoCFPGA
* platform code, the real meat is located in drivers/fpga/socfpga.c .
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/freeze_controller.c b/arch/arm/mach-socfpga/freeze_controller.c
index 62fa854082..d48aeec374 100644
--- a/arch/arm/mach-socfpga/freeze_controller.c
+++ b/arch/arm/mach-socfpga/freeze_controller.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
index 7818aa5c2d..929c413e03 100644
--- a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SOCFPGA_A10_BASE_HARDWARE_H_
diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h b/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h
index 6534283331..bb9e3faa29 100644
--- a/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2012 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SOCFPGA_BASE_ADDRS_H_
diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
index 7052804921..2c6e412f61 100644
--- a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _SOCFPGA_S10_BASE_HARDWARE_H_
diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h b/arch/arm/mach-socfpga/include/mach/boot0.h
index d6b9435d33..60194231c7 100644
--- a/arch/arm/mach-socfpga/include/mach/boot0.h
+++ b/arch/arm/mach-socfpga/include/mach/boot0.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Specialty padding for the Altera SoCFPGA preloader image
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __BOOT0_H
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h b/arch/arm/mach-socfpga/include/mach/clock_manager.h
index 4c6b1f832b..3ace040d15 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _CLOCK_MANAGER_H_
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
index 1b55bb8ecf..a3289ee2da 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2016-2017 Intel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef CLOCK_MANAGER_ARRIA10
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
index 9227dfb09a..5bedf28cf1 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _CLOCK_MANAGER_GEN5_H_
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager.h b/arch/arm/mach-socfpga/include/mach/fpga_manager.h
index a21c71665c..481b66bbd8 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager.h
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
* All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _FPGA_MANAGER_H_
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
index 9cbf696830..09d13f6fd3 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2017 Intel Corporation <www.intel.com>
* All rights reserved.
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _FPGA_MANAGER_ARRIA10_H_
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
index 2de7a117f9..c8ec5d4c3c 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
* All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _FPGA_MANAGER_GEN5_H_
diff --git a/arch/arm/mach-socfpga/include/mach/freeze_controller.h b/arch/arm/mach-socfpga/include/mach/freeze_controller.h
index f19ad87717..80846a67f1 100644
--- a/arch/arm/mach-socfpga/include/mach/freeze_controller.h
+++ b/arch/arm/mach-socfpga/include/mach/freeze_controller.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _FREEZE_CONTROLLER_H_
diff --git a/arch/arm/mach-socfpga/include/mach/gpio.h b/arch/arm/mach-socfpga/include/mach/gpio.h
index 6c61f188bc..f216b80332 100644
--- a/arch/arm/mach-socfpga/include/mach/gpio.h
+++ b/arch/arm/mach-socfpga/include/mach/gpio.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014 Stefan Roese <sr@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SOCFPGA_GPIO_H
diff --git a/arch/arm/mach-socfpga/include/mach/misc.h b/arch/arm/mach-socfpga/include/mach/misc.h
index 0b65783b05..197f09a57c 100644
--- a/arch/arm/mach-socfpga/include/mach/misc.h
+++ b/arch/arm/mach-socfpga/include/mach/misc.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2016-2017 Intel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _MISC_H_
diff --git a/arch/arm/mach-socfpga/include/mach/nic301.h b/arch/arm/mach-socfpga/include/mach/nic301.h
index 3c8ab31ffb..20bebb8c81 100644
--- a/arch/arm/mach-socfpga/include/mach/nic301.h
+++ b/arch/arm/mach-socfpga/include/mach/nic301.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014 Marek Vasut <marex@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _NIC301_REGISTERS_H_
diff --git a/arch/arm/mach-socfpga/include/mach/pinmux.h b/arch/arm/mach-socfpga/include/mach/pinmux.h
index 563a3db110..2de5033b1c 100644
--- a/arch/arm/mach-socfpga/include/mach/pinmux.h
+++ b/arch/arm/mach-socfpga/include/mach/pinmux.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _PINMUX_H_
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h b/arch/arm/mach-socfpga/include/mach/reset_manager.h
index 65917454f8..7cfed7d001 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _RESET_MANAGER_H_
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
index b6d7f4f6f9..522f714d76 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2016-2017 Intel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _RESET_MANAGER_ARRIA10_H_
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h
index 6d9cffea7b..dd58922cec 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _RESET_MANAGER_GEN5_H_
diff --git a/arch/arm/mach-socfpga/include/mach/scan_manager.h b/arch/arm/mach-socfpga/include/mach/scan_manager.h
index 5ca6843557..4d8d649be0 100644
--- a/arch/arm/mach-socfpga/include/mach/scan_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/scan_manager.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SCAN_MANAGER_H_
diff --git a/arch/arm/mach-socfpga/include/mach/scu.h b/arch/arm/mach-socfpga/include/mach/scu.h
index 7a5b07416d..27224b1a87 100644
--- a/arch/arm/mach-socfpga/include/mach/scu.h
+++ b/arch/arm/mach-socfpga/include/mach/scu.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014 Marek Vasut <marex@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __SOCFPGA_SCU_H__
diff --git a/arch/arm/mach-socfpga/include/mach/sdram.h b/arch/arm/mach-socfpga/include/mach/sdram.h
index b11228fd99..a58872c3d9 100644
--- a/arch/arm/mach-socfpga/include/mach/sdram.h
+++ b/arch/arm/mach-socfpga/include/mach/sdram.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright Altera Corporation (C) 2014-2015
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SDRAM_H_
#define _SDRAM_H_
diff --git a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
index 1d7b7c119a..8ae8d1bc96 100644
--- a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2015-2017 Intel Corporation <www.intel.com>
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _SOCFPGA_SDRAM_ARRIA10_H_
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h b/arch/arm/mach-socfpga/include/mach/system_manager.h
index e6d4280c5b..fbe2a8be28 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SYSTEM_MANAGER_H_
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/system_manager_arria10.h
index f235abab0b..14052b957c 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager_arria10.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _SYSTEM_MANAGER_ARRIA10_H_
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/system_manager_gen5.h
index 285c1a29ad..52e59df513 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager_gen5.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SYSTEM_MANAGER_GEN5_H_
diff --git a/arch/arm/mach-socfpga/include/mach/timer.h b/arch/arm/mach-socfpga/include/mach/timer.h
index ee6969bac8..82596e412e 100644
--- a/arch/arm/mach-socfpga/include/mach/timer.h
+++ b/arch/arm/mach-socfpga/include/mach/timer.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2012 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SOCFPGA_TIMER_H_
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 692466c3e1..5c27f1984e 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c
index 475fd59a45..f909568312 100644
--- a/arch/arm/mach-socfpga/misc_arria10.c
+++ b/arch/arm/mach-socfpga/misc_arria10.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2016-2017 Intel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#include <altera.h>
diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c
index 177b35fc4e..b9db3aef09 100644
--- a/arch/arm/mach-socfpga/misc_gen5.c
+++ b/arch/arm/mach-socfpga/misc_gen5.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/pinmux_arria10.c b/arch/arm/mach-socfpga/pinmux_arria10.c
index 69d6a928a0..163bf278b1 100644
--- a/arch/arm/mach-socfpga/pinmux_arria10.c
+++ b/arch/arm/mach-socfpga/pinmux_arria10.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#include <asm/arch/pinmux.h>
diff --git a/arch/arm/mach-socfpga/qts-filter.sh b/arch/arm/mach-socfpga/qts-filter.sh
index 785a0d5ea2..02c28be2b7 100755
--- a/arch/arm/mach-socfpga/qts-filter.sh
+++ b/arch/arm/mach-socfpga/qts-filter.sh
@@ -23,10 +23,9 @@ process_iocsr_config() {
(
cat << EOF
+/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Altera SoCFPGA IOCSR configuration
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __SOCFPGA_IOCSR_CONFIG_H__
@@ -67,10 +66,9 @@ process_pinmux_config() {
(
cat << EOF
+/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Altera SoCFPGA PinMux configuration
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __SOCFPGA_PINMUX_CONFIG_H__
@@ -104,10 +102,9 @@ process_pll_config() {
(
cat << EOF
+/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Altera SoCFPGA Clock and PLL configuration
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __SOCFPGA_PLL_CONFIG_H__
diff --git a/arch/arm/mach-socfpga/reset_manager.c b/arch/arm/mach-socfpga/reset_manager.c
index 484b295cd3..1389c82169 100644
--- a/arch/arm/mach-socfpga/reset_manager.c
+++ b/arch/arm/mach-socfpga/reset_manager.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c b/arch/arm/mach-socfpga/reset_manager_arria10.c
index 54f0ddb255..99e2b8e6e6 100644
--- a/arch/arm/mach-socfpga/reset_manager_arria10.c
+++ b/arch/arm/mach-socfpga/reset_manager_arria10.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2016-2017 Intel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#include <asm/io.h>
diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c
index c59127456c..b261a94486 100644
--- a/arch/arm/mach-socfpga/reset_manager_gen5.c
+++ b/arch/arm/mach-socfpga/reset_manager_gen5.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
diff --git a/arch/arm/mach-socfpga/scan_manager.c b/arch/arm/mach-socfpga/scan_manager.c
index 8b271b1f45..52175af48b 100644
--- a/arch/arm/mach-socfpga/scan_manager.c
+++ b/arch/arm/mach-socfpga/scan_manager.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
index 9bf3b9a446..4b86eadd81 100644
--- a/arch/arm/mach-socfpga/spl.c
+++ b/arch/arm/mach-socfpga/spl.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2012 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/system_manager_gen5.c b/arch/arm/mach-socfpga/system_manager_gen5.c
index e0af7753b0..9d04aea2a8 100644
--- a/arch/arm/mach-socfpga/system_manager_gen5.c
+++ b/arch/arm/mach-socfpga/system_manager_gen5.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/timer.c b/arch/arm/mach-socfpga/timer.c
index 253cde39d1..f1c0262ae5 100644
--- a/arch/arm/mach-socfpga/timer.c
+++ b/arch/arm/mach-socfpga/timer.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2012 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/wrap_iocsr_config.c b/arch/arm/mach-socfpga/wrap_iocsr_config.c
index 5e3f057355..f810fade92 100644
--- a/arch/arm/mach-socfpga/wrap_iocsr_config.c
+++ b/arch/arm/mach-socfpga/wrap_iocsr_config.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/wrap_pinmux_config.c b/arch/arm/mach-socfpga/wrap_pinmux_config.c
index a12f0b32a4..33ca14c9dc 100644
--- a/arch/arm/mach-socfpga/wrap_pinmux_config.c
+++ b/arch/arm/mach-socfpga/wrap_pinmux_config.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/wrap_pll_config.c b/arch/arm/mach-socfpga/wrap_pll_config.c
index 72b5f92aaf..bd631e0fb5 100644
--- a/arch/arm/mach-socfpga/wrap_pll_config.c
+++ b/arch/arm/mach-socfpga/wrap_pll_config.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/wrap_sdram_config.c b/arch/arm/mach-socfpga/wrap_sdram_config.c
index 8fb808a334..8cfacc7a13 100644
--- a/arch/arm/mach-socfpga/wrap_sdram_config.c
+++ b/arch/arm/mach-socfpga/wrap_sdram_config.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>