diff options
Diffstat (limited to 'arch/arm/mach-socfpga/spl_gen5.c')
| -rw-r--r-- | arch/arm/mach-socfpga/spl_gen5.c | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index bbaa5d3d32..e19f55aa9b 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -24,12 +24,10 @@ DECLARE_GLOBAL_DATA_PTR; -static const struct socfpga_system_manager *sysmgr_regs = - (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; - u32 spl_boot_device(void) { - const u32 bsel = readl(&sysmgr_regs->bootinfo); + const u32 bsel = readl(socfpga_get_sysmgr_addr() + + SYSMGR_GEN5_BOOTINFO); switch (SYSMGR_GET_BOOTINFO_BSEL(bsel)) { case 0x1: /* FPGA (HPS2FPGA Bridge) */ @@ -77,13 +75,13 @@ void board_init_f(ulong dummy) * Clear fake OCRAM ECC first as SBE * and DBE might triggered during power on */ - reg = readl(&sysmgr_regs->eccgrp_ocram); + reg = readl(socfpga_get_sysmgr_addr() + SYSMGR_GEN5_ECCGRP_OCRAM); if (reg & SYSMGR_ECC_OCRAM_SERR) writel(SYSMGR_ECC_OCRAM_SERR | SYSMGR_ECC_OCRAM_EN, - &sysmgr_regs->eccgrp_ocram); + socfpga_get_sysmgr_addr() + SYSMGR_GEN5_ECCGRP_OCRAM); if (reg & SYSMGR_ECC_OCRAM_DERR) writel(SYSMGR_ECC_OCRAM_DERR | SYSMGR_ECC_OCRAM_EN, - &sysmgr_regs->eccgrp_ocram); + socfpga_get_sysmgr_addr() + SYSMGR_GEN5_ECCGRP_OCRAM); socfpga_sdram_remap_zero(); socfpga_pl310_clear(); |