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-rw-r--r--arch/arm/dts/uniphier-ph1-ld11-ref.dts18
-rw-r--r--arch/arm/dts/uniphier-ph1-ld20-ref.dts19
-rw-r--r--arch/arm/dts/uniphier-ph1-ld20.dtsi17
3 files changed, 36 insertions, 18 deletions
diff --git a/arch/arm/dts/uniphier-ph1-ld11-ref.dts b/arch/arm/dts/uniphier-ph1-ld11-ref.dts
index a624a49314..88e7f53ed5 100644
--- a/arch/arm/dts/uniphier-ph1-ld11-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-ld11-ref.dts
@@ -14,15 +14,6 @@
model = "UniPhier PH1-LD11 Reference Board";
compatible = "socionext,ph1-ld11-ref", "socionext,ph1-ld11";
- memory {
- device_type = "memory";
- reg = <0 0x80000000 0 0x40000000>;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
aliases {
serial0 = &serial0;
serial1 = &serial1;
@@ -35,6 +26,15 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
};
+
+ memory {
+ device_type = "memory";
+ reg = <0 0x80000000 0 0x40000000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
};
&ethsc {
diff --git a/arch/arm/dts/uniphier-ph1-ld20-ref.dts b/arch/arm/dts/uniphier-ph1-ld20-ref.dts
index 108adeb1ff..3049016cc7 100644
--- a/arch/arm/dts/uniphier-ph1-ld20-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-ld20-ref.dts
@@ -8,21 +8,13 @@
/dts-v1/;
/include/ "uniphier-ph1-ld20.dtsi"
+/include/ "uniphier-ref-daughter.dtsi"
/include/ "uniphier-support-card.dtsi"
/ {
model = "UniPhier PH1-LD20 Reference Board";
compatible = "socionext,ph1-ld20-ref", "socionext,ph1-ld20";
- memory {
- device_type = "memory";
- reg = <0 0x80000000 0 0xc0000000>;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
aliases {
serial0 = &serial0;
serial1 = &serial1;
@@ -35,6 +27,15 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
};
+
+ memory {
+ device_type = "memory";
+ reg = <0 0x80000000 0 0xc0000000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
};
&ethsc {
diff --git a/arch/arm/dts/uniphier-ph1-ld20.dtsi b/arch/arm/dts/uniphier-ph1-ld20.dtsi
index fc1c6bfe5b..f9cc3c4bdb 100644
--- a/arch/arm/dts/uniphier-ph1-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld20.dtsi
@@ -226,6 +226,23 @@
reg = <0x59801000 0x400>;
};
+ mio: mioctrl@59810000 {
+ compatible = "socionext,ph1-ld20-mioctrl";
+ reg = <0x59810000 0x800>;
+ #clock-cells = <1>;
+ };
+
+ sd: sdhc@5a400000 {
+ compatible = "socionext,uniphier-sdhc";
+ status = "disabled";
+ reg = <0x5a400000 0x800>;
+ interrupts = <0 76 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sd>;
+ clocks = <&mio 0>;
+ bus-width = <4>;
+ };
+
pinctrl: pinctrl@5f801000 {
compatible = "socionext,ph1-ld20-pinctrl", "syscon";
reg = <0x5f801000 0xe00>;