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Diffstat (limited to 'arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi')
-rw-r--r--arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi25
1 files changed, 20 insertions, 5 deletions
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
index 92345b7ba3..6868769c6e 100644
--- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
@@ -72,8 +72,8 @@
&pinctrl {
/* These should bound to FMC2 bus driver, but we do not have one */
- pinctrl-0 = <&fmc_pins_b>;
- pinctrl-1 = <&fmc_sleep_pins_b>;
+ pinctrl-0 = <&fmc_pins_b &mco2_pins_a>;
+ pinctrl-1 = <&fmc_sleep_pins_b &mco2_sleep_pins_a>;
pinctrl-names = "default", "sleep";
fmc_pins_b: fmc-0 {
@@ -130,6 +130,21 @@
<STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */
};
};
+
+ mco2_pins_a: mco2-0 {
+ pins {
+ pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <2>;
+ };
+ };
+
+ mco2_sleep_pins_a: mco2-sleep-0 {
+ pins {
+ pinmux = <STM32_PINMUX('G', 2, ANALOG)>; /* MCO2 */
+ };
+ };
};
&pmic {
@@ -181,7 +196,7 @@
CLK_PLL4_HSE
CLK_RTC_LSE
CLK_MCO1_DISABLED
- CLK_MCO2_DISABLED
+ CLK_MCO2_PLL4P
>;
st,clkdiv = <
@@ -195,7 +210,7 @@
2 /*APB5*/
23 /*RTC*/
0 /*MCO1*/
- 0 /*MCO2*/
+ 1 /*MCO2*/
>;
st,pkcs = <
@@ -258,7 +273,7 @@
pll4: st,pll@3 {
compatible = "st,stm32mp1-pll";
reg = <3>;
- cfg = < 1 49 11 11 11 PQR(1,1,1) >;
+ cfg = < 1 49 5 11 11 PQR(1,1,1) >;
u-boot,dm-pre-reloc;
};
};