diff options
-rw-r--r-- | board/google/gru/gru.c | 23 | ||||
-rw-r--r-- | configs/chromebook_bob_defconfig | 5 |
2 files changed, 28 insertions, 0 deletions
diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c index 7dfbc3ac86..441a1a376a 100644 --- a/board/google/gru/gru.c +++ b/board/google/gru/gru.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <dm.h> #include <init.h> #ifdef CONFIG_SPL_BUILD @@ -31,3 +32,25 @@ int board_early_init_f(void) return 0; } #endif + +#ifndef CONFIG_SPL_BUILD +int board_early_init_r(void) +{ + struct udevice *clk; + int ret; + + /* + * This init is done in SPL, but when chain-loading U-Boot SPL will + * have been skipped. Allow the clock driver to check if it needs + * setting up. + */ + ret = uclass_get_device_by_driver(UCLASS_CLK, + DM_GET_DRIVER(clk_rk3399), &clk); + if (ret) { + debug("%s: CLK init failed: %d\n", __func__, ret); + return ret; + } + + return 0; +} +#endif diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index 4608892fb5..73635f0d13 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -19,6 +19,11 @@ CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_BLOBLIST=y +CONFIG_BLOBLIST_SIZE=0x1000 +CONFIG_BLOBLIST_ADDR=0x100000 +CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 |