diff options
| -rw-r--r-- | Makefile | 5 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/sdram_s10.h | 2 | ||||
| -rw-r--r-- | configs/socfpga_stratix10_defconfig | 1 | ||||
| -rw-r--r-- | drivers/ddr/altera/sdram_s10.c | 4 | ||||
| -rw-r--r-- | drivers/gpio/dwapb_gpio.c | 67 | ||||
| -rw-r--r-- | include/configs/socfpga_stratix10_socdk.h | 3 |
6 files changed, 75 insertions, 7 deletions
@@ -985,6 +985,11 @@ spl/u-boot-spl.srec: spl/u-boot-spl FORCE OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \ $(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) +OBJCOPYFLAGS_u-boot-spl.hex = $(OBJCOPYFLAGS_u-boot.hex) + +spl/u-boot-spl.hex: spl/u-boot-spl FORCE + $(call if_changed,objcopy) + binary_size_check: u-boot-nodtb.bin FORCE @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \ map_size=$(shell cat u-boot.map | \ diff --git a/arch/arm/mach-socfpga/include/mach/sdram_s10.h b/arch/arm/mach-socfpga/include/mach/sdram_s10.h index 91bfc0e5ec..ca68594445 100644 --- a/arch/arm/mach-socfpga/include/mach/sdram_s10.h +++ b/arch/arm/mach-socfpga/include/mach/sdram_s10.h @@ -7,7 +7,7 @@ #ifndef _SDRAM_S10_H_ #define _SDRAM_S10_H_ -unsigned long sdram_calculate_size(void); +phys_size_t sdram_calculate_size(void); int sdram_mmr_init_full(unsigned int sdr_phy_reg); int sdram_calibration_full(void); diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index c27985ad43..5f3d733a8b 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c index 48f4f47b14..a48567c109 100644 --- a/drivers/ddr/altera/sdram_s10.c +++ b/drivers/ddr/altera/sdram_s10.c @@ -371,11 +371,11 @@ int sdram_mmr_init_full(unsigned int unused) * Calculate SDRAM device size based on SDRAM controller parameters. * Size is specified in bytes. */ -unsigned long sdram_calculate_size(void) +phys_size_t sdram_calculate_size(void) { u32 dramaddrw = hmc_readl(DRAMADDRW); - u32 size = 1 << (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) + + phys_size_t size = 1 << (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) + DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) + DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw) + DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) + diff --git a/drivers/gpio/dwapb_gpio.c b/drivers/gpio/dwapb_gpio.c index a118f58b22..0f6574d5da 100644 --- a/drivers/gpio/dwapb_gpio.c +++ b/drivers/gpio/dwapb_gpio.c @@ -15,6 +15,7 @@ #include <dm/lists.h> #include <dm/root.h> #include <errno.h> +#include <reset.h> DECLARE_GLOBAL_DATA_PTR; @@ -29,6 +30,10 @@ DECLARE_GLOBAL_DATA_PTR; #define GPIO_PORTA_EOI 0x4c #define GPIO_EXT_PORT(p) (0x50 + (p) * 4) +struct gpio_dwapb_priv { + struct reset_ctl_bulk resets; +}; + struct gpio_dwapb_platdata { const char *name; int bank; @@ -78,20 +83,63 @@ static int dwapb_gpio_set_value(struct udevice *dev, unsigned pin, int val) return 0; } +static int dwapb_gpio_get_function(struct udevice *dev, unsigned offset) +{ + struct gpio_dwapb_platdata *plat = dev_get_platdata(dev); + u32 gpio; + + gpio = readl(plat->base + GPIO_SWPORT_DDR(plat->bank)); + + if (gpio & BIT(offset)) + return GPIOF_OUTPUT; + else + return GPIOF_INPUT; +} + static const struct dm_gpio_ops gpio_dwapb_ops = { .direction_input = dwapb_gpio_direction_input, .direction_output = dwapb_gpio_direction_output, .get_value = dwapb_gpio_get_value, .set_value = dwapb_gpio_set_value, + .get_function = dwapb_gpio_get_function, }; +static int gpio_dwapb_reset(struct udevice *dev) +{ + int ret; + struct gpio_dwapb_priv *priv = dev_get_priv(dev); + + ret = reset_get_bulk(dev, &priv->resets); + if (ret) { + /* Return 0 if error due to !CONFIG_DM_RESET and reset + * DT property is not present. + */ + if (ret == -ENOENT || ret == -ENOTSUPP) + return 0; + + dev_warn(dev, "Can't get reset: %d\n", ret); + return ret; + } + + ret = reset_deassert_bulk(&priv->resets); + if (ret) { + reset_release_bulk(&priv->resets); + dev_err(dev, "Failed to reset: %d\n", ret); + return ret; + } + + return 0; +} + static int gpio_dwapb_probe(struct udevice *dev) { struct gpio_dev_priv *priv = dev_get_uclass_priv(dev); struct gpio_dwapb_platdata *plat = dev->platdata; - if (!plat) - return 0; + if (!plat) { + /* Reset on parent device only */ + return gpio_dwapb_reset(dev); + } priv->gpio_count = plat->pins; priv->bank_name = plat->name; @@ -111,7 +159,7 @@ static int gpio_dwapb_bind(struct udevice *dev) if (plat) return 0; - base = fdtdec_get_addr(blob, dev_of_offset(dev), "reg"); + base = dev_read_addr(dev); if (base == FDT_ADDR_T_NONE) { debug("Can't get the GPIO register base address\n"); return -ENXIO; @@ -152,6 +200,17 @@ err: return ret; } +static int gpio_dwapb_remove(struct udevice *dev) +{ + struct gpio_dwapb_platdata *plat = dev_get_platdata(dev); + struct gpio_dwapb_priv *priv = dev_get_priv(dev); + + if (!plat && priv) + return reset_release_bulk(&priv->resets); + + return 0; +} + static const struct udevice_id gpio_dwapb_ids[] = { { .compatible = "snps,dw-apb-gpio" }, { } @@ -164,4 +223,6 @@ U_BOOT_DRIVER(gpio_dwapb) = { .ops = &gpio_dwapb_ops, .bind = gpio_dwapb_bind, .probe = gpio_dwapb_probe, + .remove = gpio_dwapb_remove, + .priv_auto_alloc_size = sizeof(struct gpio_dwapb_priv), }; diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h index b58f478004..e190b3d988 100644 --- a/include/configs/socfpga_stratix10_socdk.h +++ b/include/configs/socfpga_stratix10_socdk.h @@ -202,6 +202,7 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); * 0x8000_0000 ...... End of SDRAM_1 (assume 2GB) * */ +#define CONFIG_SPL_TARGET "spl/u-boot-spl.hex" #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR @@ -215,6 +216,6 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); /* SPL SDMMC boot support */ #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #endif /* __CONFIG_H */ |