diff options
1094 files changed, 11478 insertions, 3246 deletions
diff --git a/.travis.yml b/.travis.yml index 2b759c9d68..6ce2ef7fba 100644 --- a/.travis.yml +++ b/.travis.yml @@ -10,6 +10,9 @@ language: c addons: apt: + sources: + - ubuntu-toolchain-r-test + - llvm-toolchain-trusty-7 packages: - cppcheck - sloccount @@ -23,16 +26,14 @@ addons: - libpython-dev - iasl - grub-efi-ia32-bin + - grub-efi-amd64-bin - rpm2cpio - wget - device-tree-compiler - lzop - liblz4-tool - -before_install: - - sudo add-apt-repository ppa:ubuntu-toolchain-r/test -y - - sudo apt-get update -q - - sudo apt-get install libisl15 -y + - libisl15 + - clang-7 install: # Clone uboot-test-hooks @@ -47,7 +48,9 @@ install: - virtualenv /tmp/venv - . /tmp/venv/bin/activate - pip install pytest + - pip install python-subunit - grub-mkimage -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd + - grub-mkimage -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd - mkdir ~/grub2-arm - ( cd ~/grub2-arm; wget -O - http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/suse/armv7hl/grub2-arm-efi-2.02~beta2-87.1.armv7hl.rpm | rpm2cpio | cpio -di ) - mkdir ~/grub2-arm64 @@ -66,11 +69,10 @@ before_script: - if [[ "${TOOLCHAIN}" == *m68k* ]]; then ./tools/buildman/buildman --fetch-arch m68k ; fi - if [[ "${TOOLCHAIN}" == *microblaze* ]]; then ./tools/buildman/buildman --fetch-arch microblaze ; fi - if [[ "${TOOLCHAIN}" == *mips* ]]; then ./tools/buildman/buildman --fetch-arch mips ; fi - - if [[ "${TOOLCHAIN}" == *or32* ]]; then ./tools/buildman/buildman --fetch-arch or32 ; fi - if [[ "${TOOLCHAIN}" == *sh* ]]; then ./tools/buildman/buildman --fetch-arch sh2 ; fi - - if [[ "${TOOLCHAIN}" == *x86_64* ]]; then - ./tools/buildman/buildman --fetch-arch x86_64; - echo -e "\n[toolchain-prefix]\nx86 = ${HOME}/.buildman-toolchains/gcc-7.3.0-nolibc/x86_64-linux/bin/x86_64-linux-" >> ~/.buildman; + - if [[ "${TOOLCHAIN}" == *i386* ]]; then + ./tools/buildman/buildman --fetch-arch i386; + echo -e "\n[toolchain-alias]\nx86 = i386" >> ~/.buildman; fi - if [[ "${TOOLCHAIN}" == arc ]]; then wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2017.09-release/arc_gnu_2017.09_prebuilt_uclibc_le_archs_linux_install.tar.gz && @@ -95,7 +97,7 @@ before_script: git clone git://git.qemu.org/qemu.git /tmp/qemu; pushd /tmp/qemu; git submodule update --init dtc && - git checkout v2.8.0-rc3 && + git checkout v3.0.0 && ./configure --prefix=/tmp/qemu-install --target-list=${QEMU_TARGET} && make -j4 all install; popd; @@ -105,8 +107,16 @@ script: # Comments must be outside the command strings below, or the Travis parser # will get confused. # - # Exit code 129 means warnings only. - - if [[ "${BUILDMAN}" != "" ]]; then + # From buildman, exit code 129 means warnings only. If we've been asked to + # use clang only do one configuration. + - if [[ "${TOOLCHAIN}" == "clang" ]]; then + ret=0; + make O=../.bm-work/${TEST_PY_BD} HOSTCC=clang-7 CC=clang-7 -j$(nproc) + KCFLAGS=-Werror sandbox_config all || ret=$?; + if [[ $ret -ne 0 ]]; then + exit $ret; + fi; + elif [[ "${BUILDMAN}" != "" ]]; then ret=0; tools/buildman/buildman -P -E ${BUILDMAN} || ret=$?; if [[ $ret -ne 0 && $ret -ne 129 ]]; then @@ -120,6 +130,7 @@ script: # value. - export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/${TEST_PY_BD}; cp ~/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/; + cp ~/grub_x64.efi $UBOOT_TRAVIS_BUILD_DIR/; cp ~/grub2-arm/usr/lib/grub2/arm-efi/grub.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm.efi; cp ~/grub2-arm64/usr/lib/grub2/arm64-efi/grub.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm64.efi; if [[ "${TEST_PY_BD}" != "" ]]; then @@ -153,10 +164,10 @@ matrix: - name: "buildman arm11 arm7 arm920t arm946es" env: - BUILDMAN="arm11 arm7 arm920t arm946es" - - name: "buildman arm926ejs (non-mx,siemens,atmel,kirkwood)" + - name: "buildman arm926ejs (non-freescale,siemens,atmel,kirkwood,spear)" env: - JOB="arm926ejs" - BUILDMAN="arm926ejs -x mx,siemens,atmel,kirkwood" + BUILDMAN="arm926ejs -x freescale,siemens,atmel,kirkwood,spear" - name: "buildman atmel" env: - BUILDMAN="atmel" @@ -166,9 +177,12 @@ matrix: - name: "buildman Freescale ARM32" env: - BUILDMAN="freescale -x powerpc,m68k,aarch64" - - name: "buildman Freescale AArch64" + - name: "buildman Freescale AArch64 LS10xx" + env: + - BUILDMAN="freescale&aarch64&&ls1" + - name: "buildman Freescale AArch64 LS20xx" env: - - BUILDMAN="freescale&aarch64" + - BUILDMAN="freescale&aarch64&&ls2" - name: "buildman i.MX6 (non-Freescale)" env: - BUILDMAN="mx6 -x freescale,toradex,boundary,engicam" @@ -181,6 +195,9 @@ matrix: - name: "buildman samsung socfpga" env: - BUILDMAN="samsung socfpga" + - name: "buildman spear" + env: + - BUILDMAN="spear" - name: "buildman sun4i" env: - BUILDMAN="sun4i" @@ -208,7 +225,7 @@ matrix: - name: "buildman sandbox x86" env: - BUILDMAN="sandbox x86" - TOOLCHAIN="x86_64" + TOOLCHAIN="i386" - name: "buildman kirkwood (excluding openrd)" env: - BUILDMAN="kirkwood -x openrd" @@ -275,7 +292,7 @@ matrix: - BUILDMAN="uniphier" - name: "buildman catch-all AArch64" env: - - BUILDMAN="aarch64 -x tegra,freescale,mvebu,uniphier,sunxi,samsung,rockchip,xilinx" + - BUILDMAN="aarch64 -x tegra,ls1,ls2,mvebu,uniphier,sunxi,samsung,rockchip,xilinx" - name: "buildman rockchip" env: - BUILDMAN="rockchip" @@ -321,19 +338,24 @@ matrix: env: - TEST_PY_BD="sandbox" BUILDMAN="^sandbox$" - TOOLCHAIN="x86_64" + TOOLCHAIN="i386" + - name: "test/py sandbox with clang" + env: + - TEST_PY_BD="sandbox" + BUILDMAN="^sandbox$" + TOOLCHAIN="clang" - name: "test/py sandbox_spl" env: - TEST_PY_BD="sandbox_spl" TEST_PY_TEST_SPEC="test_ofplatdata" BUILDMAN="^sandbox$" - TOOLCHAIN="x86_64" + TOOLCHAIN="i386" TEST_PY_TOOLS="yes" - name: "test/py sandbox_flattree" env: - TEST_PY_BD="sandbox_flattree" BUILDMAN="^sandbox_flattree$" - TOOLCHAIN="x86_64" + TOOLCHAIN="i386" - name: "test/py vexpress_ca15_tc2" env: - TEST_PY_BD="vexpress_ca15_tc2" @@ -406,7 +428,15 @@ matrix: TEST_PY_TEST_SPEC="not sleep" QEMU_TARGET="i386-softmmu" BUILDMAN="^qemu-x86$" - TOOLCHAIN="x86_64" + TOOLCHAIN="i386" + BUILD_ROM="yes" + - name: "test/py qemu-x86_64" + env: + - TEST_PY_BD="qemu-x86_64" + TEST_PY_TEST_SPEC="not sleep" + QEMU_TARGET="x86_64-softmmu" + BUILDMAN="^qemu-x86_64$" + TOOLCHAIN="i386" BUILD_ROM="yes" - name: "test/py zynq_zc702" env: @@ -144,7 +144,7 @@ config SYS_MALLOC_F_LEN config SYS_MALLOC_LEN hex "Define memory for Dynamic allocation" - depends on ARCH_ZYNQ + depends on ARCH_ZYNQ || ARCH_VERSAL help This defines memory to be allocated for Dynamic allocation TODO: Use for other architectures diff --git a/MAINTAINERS b/MAINTAINERS index ace7d9a4b6..cf8f73f200 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -287,6 +287,12 @@ F: arch/arm/mach-uniphier/ F: configs/uniphier_*_defconfig N: uniphier +ARM VERSAL +M: Michal Simek <michal.simek@xilinx.com> +S: Maintained +T: git git://git.denx.de/u-boot-microblaze.git +F: arch/arm/mach-versal/ + ARM VERSATILE EXPRESS DRIVERS M: Liviu Dudau <liviu.dudau@foss.arm.com> S: Maintained @@ -453,6 +459,7 @@ M: Liviu Dudau <liviu.dudau@foss.arm.com> S: Supported T: git git://github.com/ARM-software/u-boot.git F: drivers/video/mali_dp.c +F: drivers/i2c/i2c-versatile.c MICROBLAZE M: Michal Simek <monstr@monstr.eu> @@ -3,7 +3,7 @@ VERSION = 2018 PATCHLEVEL = 11 SUBLEVEL = -EXTRAVERSION = -rc1 +EXTRAVERSION = -rc2 NAME = # *DOCUMENTATION* @@ -1139,6 +1139,7 @@ OBJCOPYFLAGS_u-boot-with-spl.bin = -I binary -O binary \ u-boot-with-spl.bin: spl/u-boot-spl.bin $(SPL_PAYLOAD) FORCE $(call if_changed,pad_cat) +ifeq ($(CONFIG_ARCH_LPC32XX)$(CONFIG_SPL),yy) MKIMAGEFLAGS_lpc32xx-spl.img = -T lpc32xximage -a $(CONFIG_SPL_TEXT_BASE) lpc32xx-spl.img: spl/u-boot-spl.bin FORCE @@ -1158,6 +1159,7 @@ lpc32xx-full.bin: lpc32xx-boot-0.bin lpc32xx-boot-1.bin u-boot.img FORCE $(call if_changed,cat) CLEAN_FILES += lpc32xx-* +endif OBJCOPYFLAGS_u-boot-with-tpl.bin = -I binary -O binary \ --pad-to=$(CONFIG_TPL_PAD_TO) @@ -1524,7 +1526,7 @@ $(defaultenv_h): $(CONFIG_DEFAULT_ENV_FILE:"%"=%) FORCE # --------------------------------------------------------------------------- quiet_cmd_cpp_lds = LDS $@ cmd_cpp_lds = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) \ - -D__ASSEMBLY__ -x assembler-with-cpp -P -o $@ $< + -D__ASSEMBLY__ -x assembler-with-cpp -std=c99 -P -o $@ $< u-boot.lds: $(LDSCRIPT) prepare FORCE $(call if_changed_dep,cpp_lds) @@ -1698,6 +1700,10 @@ help: @echo 'Configuration targets:' @$(MAKE) -f $(srctree)/scripts/kconfig/Makefile help @echo '' + @echo 'Test targets:' + @echo '' + @echo ' check - Run all automated tests that use sandbox' + @echo '' @echo 'Other generic targets:' @echo ' all - Build all necessary images depending on configuration' @echo ' tests - Build U-Boot for sandbox and run tests' @@ -1736,7 +1742,7 @@ help: @echo 'Execute "make" or "make all" to build all targets marked with [*] ' @echo 'For further info see the ./README file' -tests: +tests check: $(srctree)/test/run # Documentation targets diff --git a/arch/arc/config.mk b/arch/arc/config.mk index d255c90e35..18005d9993 100644 --- a/arch/arc/config.mk +++ b/arch/arc/config.mk @@ -43,7 +43,7 @@ PLATFORM_CPPFLAGS += -mcpu=archs endif PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2 -mno-sdata -PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections +PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections -fno-common # Needed for relocation LDFLAGS_FINAL += -pie --gc-sections diff --git a/arch/arc/lib/cpu.c b/arch/arc/lib/cpu.c index 50cd7cdb61..a969a16722 100644 --- a/arch/arc/lib/cpu.c +++ b/arch/arc/lib/cpu.c @@ -60,7 +60,7 @@ const char *decode_identity(void) } } -int print_cpuinfo(void) +__weak int print_cpuinfo(void) { printf("CPU: %s\n", decode_identity()); return 0; diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4f597b7ce6..326d5c0daa 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -443,16 +443,6 @@ config ARCH_MVEBU select SPI imply CMD_DM -config TARGET_DEVKIT3250 - bool "Support devkit3250" - select CPU_ARM926EJS - select SUPPORT_SPL - -config TARGET_WORK_92105 - bool "Support work_92105" - select CPU_ARM926EJS - select SUPPORT_SPL - config TARGET_APF27 bool "Support apf27" select CPU_ARM926EJS @@ -668,6 +658,16 @@ config ARCH_MESON targeted at media players and tablet computers. We currently support the S905 (GXBaby) 64-bit SoC. +config ARCH_LPC32XX + bool "NXP LPC32xx platform" + select CPU_ARM926EJS + select DM + select DM_GPIO + select DM_SERIAL + select SPL_DM if SPL + select SUPPORT_SPL + imply CMD_DM + config ARCH_IMX8 bool "NXP i.MX8 platform" select ARM64 @@ -859,6 +859,14 @@ config ARCH_SUNXI imply SPL_SERIAL_SUPPORT imply USB_GADGET +config ARCH_VERSAL + bool "Support Xilinx Versal Platform" + select ARM64 + select CLK + select DM + select DM_SERIAL + select OF_CONTROL + config ARCH_VF610 bool "Freescale Vybrid" select CPU_V7A @@ -917,6 +925,7 @@ config ARCH_ZYNQMP imply BOARD_LATE_INIT imply CMD_DM imply FAT_WRITE + imply MP config TEGRA bool "NVIDIA Tegra" @@ -1397,6 +1406,8 @@ source "arch/arm/mach-keystone/Kconfig" source "arch/arm/mach-kirkwood/Kconfig" +source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig" + source "arch/arm/mach-mvebu/Kconfig" source "arch/arm/cpu/armv7/ls102xa/Kconfig" @@ -1457,6 +1468,8 @@ source "arch/arm/cpu/armv7/vf610/Kconfig" source "arch/arm/mach-zynq/Kconfig" +source "arch/arm/mach-versal/Kconfig" + source "arch/arm/mach-zynqmp-r5/Kconfig" source "arch/arm/cpu/armv7/Kconfig" @@ -1515,11 +1528,9 @@ source "board/st/stv0991/Kconfig" source "board/tcl/sl50/Kconfig" source "board/ucRobotics/bubblegum_96/Kconfig" source "board/birdland/bav335x/Kconfig" -source "board/timll/devkit3250/Kconfig" source "board/toradex/colibri_pxa270/Kconfig" source "board/vscom/baltos/Kconfig" source "board/woodburn/Kconfig" -source "board/work-microwave/work_92105/Kconfig" source "board/xilinx/Kconfig" source "board/xilinx/zynq/Kconfig" source "board/xilinx/zynqmp/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 7285913b41..4b6c5e1935 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -80,6 +80,7 @@ machine-$(CONFIG_ARCH_STM32MP) += stm32mp machine-$(CONFIG_TEGRA) += tegra machine-$(CONFIG_ARCH_UNIPHIER) += uniphier machine-$(CONFIG_ARCH_ZYNQ) += zynq +machine-$(CONFIG_ARCH_VERSAL) += versal machine-$(CONFIG_ARCH_ZYNQMP_R5) += zynqmp-r5 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y)) diff --git a/arch/arm/cpu/arm920t/ep93xx/timer.c b/arch/arm/cpu/arm920t/ep93xx/timer.c index 5f3609aec3..49bf49bbd3 100644 --- a/arch/arm/cpu/arm920t/ep93xx/timer.c +++ b/arch/arm/cpu/arm920t/ep93xx/timer.c @@ -66,14 +66,9 @@ unsigned long long get_ticks(void) return sys_ticks; } -unsigned long get_timer_masked(void) -{ - return get_ticks(); -} - unsigned long get_timer(unsigned long base) { - return get_timer_masked() - base; + return get_ticks() - base; } void __udelay(unsigned long usec) diff --git a/arch/arm/cpu/arm920t/imx/timer.c b/arch/arm/cpu/arm920t/imx/timer.c index cd9b546537..96fff3f683 100644 --- a/arch/arm/cpu/arm920t/imx/timer.c +++ b/arch/arm/cpu/arm920t/imx/timer.c @@ -36,17 +36,17 @@ int timer_init (void) /* * timer without interrupts */ -ulong get_timer (ulong base) +static ulong get_timer_masked (void) { - return get_timer_masked() - base; + return TCN1; } -ulong get_timer_masked (void) +ulong get_timer (ulong base) { - return TCN1; + return get_timer_masked() - base; } -void udelay_masked (unsigned long usec) +void __udelay (unsigned long usec) { ulong endtime = get_timer_masked() + usec; signed long diff; @@ -57,11 +57,6 @@ void udelay_masked (unsigned long usec) } while (diff >= 0); } -void __udelay (unsigned long usec) -{ - udelay_masked(usec); -} - /* * This function is derived from PowerPC code (read timebase as long long). * On ARM it just returns the timer value. diff --git a/arch/arm/cpu/arm926ejs/armada100/timer.c b/arch/arm/cpu/arm926ejs/armada100/timer.c index f10f678720..d2ecbd07e2 100644 --- a/arch/arm/cpu/arm926ejs/armada100/timer.c +++ b/arch/arm/cpu/arm926ejs/armada100/timer.c @@ -61,7 +61,7 @@ ulong read_timer(void) return(readl(&armd1timers->cvwr)); } -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { ulong now = read_timer(); diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/Kconfig b/arch/arm/cpu/arm926ejs/lpc32xx/Kconfig new file mode 100644 index 0000000000..986ad738ac --- /dev/null +++ b/arch/arm/cpu/arm926ejs/lpc32xx/Kconfig @@ -0,0 +1,20 @@ +if ARCH_LPC32XX + +config SYS_SOC + default "lpc32xx" + +choice + prompt "NXP LPC32xx board select" + +config TARGET_DEVKIT3250 + bool "Timll DevKit3250" + +config TARGET_WORK_92105 + bool "Work Microwave Work_92105" + +endchoice + +source "board/timll/devkit3250/Kconfig" +source "board/work-microwave/work_92105/Kconfig" + +endif diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/dram.c b/arch/arm/cpu/arm926ejs/lpc32xx/dram.c index 2dce002343..4f975694fd 100644 --- a/arch/arm/cpu/arm926ejs/lpc32xx/dram.c +++ b/arch/arm/cpu/arm926ejs/lpc32xx/dram.c @@ -8,9 +8,6 @@ * This is called by SPL to gain access to the SDR DRAM. * * This code runs from SRAM. - * - * Actual CONFIG_LPC32XX_SDRAM_* parameters must be provided - * by the board configuration file. */ #include <common.h> diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c b/arch/arm/cpu/arm926ejs/mx27/timer.c index 9399320f6d..94b5d454e9 100644 --- a/arch/arm/cpu/arm926ejs/mx27/timer.c +++ b/arch/arm/cpu/arm926ejs/mx27/timer.c @@ -126,7 +126,7 @@ unsigned long long get_ticks(void) return timestamp; } -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { /* * get_ticks() returns a long long (64 bit), it wraps in diff --git a/arch/arm/cpu/arm926ejs/mxs/timer.c b/arch/arm/cpu/arm926ejs/mxs/timer.c index 517cadb20f..7492ba46dc 100644 --- a/arch/arm/cpu/arm926ejs/mxs/timer.c +++ b/arch/arm/cpu/arm926ejs/mxs/timer.c @@ -110,14 +110,9 @@ unsigned long long get_ticks(void) return timestamp; } -ulong get_timer_masked(void) -{ - return tick_to_time(get_ticks()); -} - ulong get_timer(ulong base) { - return get_timer_masked() - base; + return tick_to_time(get_ticks()) - base; } /* We use the HW_DIGCTL_MICROSECONDS register for sub-millisecond timer. */ diff --git a/arch/arm/cpu/arm926ejs/spear/timer.c b/arch/arm/cpu/arm926ejs/spear/timer.c index e9ba87a460..e7b5bda1bc 100644 --- a/arch/arm/cpu/arm926ejs/spear/timer.c +++ b/arch/arm/cpu/arm926ejs/spear/timer.c @@ -21,6 +21,8 @@ static struct misc_regs *const misc_regs_p = DECLARE_GLOBAL_DATA_PTR; +static ulong get_timer_masked(void); + #define timestamp gd->arch.tbl #define lastdec gd->arch.lastinc @@ -82,7 +84,7 @@ void __udelay(unsigned long usec) ; } -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { ulong now = READ_TIMER(); @@ -98,11 +100,6 @@ ulong get_timer_masked(void) return timestamp; } -void udelay_masked(unsigned long usec) -{ - return udelay(usec); -} - /* * This function is derived from PowerPC code (read timebase as long long). * On ARM it just returns the timer value. diff --git a/arch/arm/cpu/armv7/ls102xa/timer.c b/arch/arm/cpu/armv7/ls102xa/timer.c index 35a557b95c..e79360ada8 100644 --- a/arch/arm/cpu/armv7/ls102xa/timer.c +++ b/arch/arm/cpu/armv7/ls102xa/timer.c @@ -90,14 +90,9 @@ unsigned long long get_ticks(void) return now; } -unsigned long get_timer_masked(void) -{ - return tick_to_time(get_ticks()); -} - unsigned long get_timer(ulong base) { - return get_timer_masked() - base; + return tick_to_time(get_ticks()) - base; } /* delay x useconds and preserve advance timstamp value */ diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index b37892c0a2..0048cd8067 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -19,6 +19,7 @@ DECLARE_GLOBAL_DATA_PTR; unsigned long get_current_tick(void); +static void reset_timer_masked(void); /* macro to read the 16 bit timer */ static inline struct s5p_timer *s5p_get_base_timer(void) @@ -106,7 +107,7 @@ void __udelay(unsigned long usec) ; } -void reset_timer_masked(void) +static void reset_timer_masked(void) { struct s5p_timer *const timer = s5p_get_base_timer(); diff --git a/arch/arm/cpu/armv7/stv0991/timer.c b/arch/arm/cpu/armv7/stv0991/timer.c index 5784b0614b..d1b763df8e 100644 --- a/arch/arm/cpu/armv7/stv0991/timer.c +++ b/arch/arm/cpu/armv7/stv0991/timer.c @@ -21,6 +21,8 @@ DECLARE_GLOBAL_DATA_PTR; #define timestamp gd->arch.tbl #define lastdec gd->arch.lastinc +static ulong get_timer_masked(void); + int timer_init(void) { /* Timer1 clock configuration */ @@ -73,7 +75,7 @@ void __udelay(unsigned long usec) ; } -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { ulong now = READ_TIMER(); @@ -89,11 +91,6 @@ ulong get_timer_masked(void) return timestamp; } -void udelay_masked(unsigned long usec) -{ - return udelay(usec); -} - /* * This function is derived from PowerPC code (read timebase as long long). * On ARM it just returns the timer value. diff --git a/arch/arm/cpu/armv7/sunxi/timer.c b/arch/arm/cpu/armv7/sunxi/timer.c index 0f8ab0e235..304c1ac5f9 100644 --- a/arch/arm/cpu/armv7/sunxi/timer.c +++ b/arch/arm/cpu/armv7/sunxi/timer.c @@ -55,12 +55,7 @@ int timer_init(void) } /* timer without interrupts */ -ulong get_timer(ulong base) -{ - return get_timer_masked() - base; -} - -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { /* current tick value */ ulong now = TICKS_TO_HZ(read_timer()); @@ -77,6 +72,11 @@ ulong get_timer_masked(void) return gd->arch.tbl; } +ulong get_timer(ulong base) +{ + return get_timer_masked() - base; +} + /* delay x useconds */ void __udelay(unsigned long usec) { diff --git a/arch/arm/cpu/armv7/vf610/timer.c b/arch/arm/cpu/armv7/vf610/timer.c index 6e1308eae0..821a279b63 100644 --- a/arch/arm/cpu/armv7/vf610/timer.c +++ b/arch/arm/cpu/armv7/vf610/timer.c @@ -57,14 +57,9 @@ unsigned long long get_ticks(void) return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl; } -ulong get_timer_masked(void) -{ - return tick_to_time(get_ticks()); -} - ulong get_timer(ulong base) { - return get_timer_masked() - base; + return tick_to_time(get_ticks()) - base; } /* delay x useconds AND preserve advance timstamp value */ diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c index 43ba739d2f..4ee8e3f627 100644 --- a/arch/arm/cpu/armv8/zynqmp/cpu.c +++ b/arch/arm/cpu/armv8/zynqmp/cpu.c @@ -104,11 +104,19 @@ u64 get_page_table_size(void) return 0x14000; } +#if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU) || defined(CONFIG_DEFINE_TCM_OCM_MMAP) +void tcm_init(u8 mode) +{ + puts("WARNING: Initializing TCM overwrites TCM content\n"); + initialize_tcm(mode); + memset((void *)ZYNQMP_TCM_BASE_ADDR, 0, ZYNQMP_TCM_SIZE); +} +#endif + #ifdef CONFIG_SYS_MEM_RSVD_FOR_MMU int reserve_mmu(void) { - initialize_tcm(TCM_LOCK); - memset((void *)ZYNQMP_TCM_BASE_ADDR, 0, ZYNQMP_TCM_SIZE); + tcm_init(TCM_LOCK); gd->arch.tlb_size = PGTABLE_SIZE; gd->arch.tlb_addr = ZYNQMP_TCM_BASE_ADDR; diff --git a/arch/arm/cpu/sa1100/timer.c b/arch/arm/cpu/sa1100/timer.c index 12514e4dbc..0fac5c1707 100644 --- a/arch/arm/cpu/sa1100/timer.c +++ b/arch/arm/cpu/sa1100/timer.c @@ -12,22 +12,17 @@ #include <common.h> #include <SA-1100.h> -ulong get_timer (ulong base) -{ - return get_timer_masked (); -} - -void __udelay (unsigned long usec) +static ulong get_timer_masked (void) { - udelay_masked (usec); + return OSCR; } -ulong get_timer_masked (void) +ulong get_timer (ulong base) { - return OSCR; + return get_timer_masked (); } -void udelay_masked (unsigned long usec) +void __udelay (unsigned long usec) { ulong tmo; ulong endtime; diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 61598bdfeb..d36447d18d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -58,7 +58,8 @@ dtb-$(CONFIG_ARCH_MESON) += \ meson-gxbb-nanopi-k2.dtb \ meson-gxl-s905x-p212.dtb \ meson-gxl-s905x-libretech-cc.dtb \ - meson-gxl-s905x-khadas-vim.dtb + meson-gxl-s905x-khadas-vim.dtb \ + meson-gxm-khadas-vim2.dtb dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra20-medcom-wide.dtb \ tegra20-paz00.dtb \ @@ -134,6 +135,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-cse-nand.dtb \ zynq-cse-nor.dtb \ zynq-cse-qspi-single.dtb \ + zynq-dlc20-rev1.0.dtb \ zynq-microzed.dtb \ zynq-minized.dtb \ zynq-picozed.dtb \ @@ -455,14 +457,14 @@ dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb dtb-$(CONFIG_ARCH_IMX8) += fsl-imx8qxp-mek.dtb dtb-$(CONFIG_RCAR_GEN3) += \ - r8a7795-h3ulcb.dtb \ - r8a7795-salvator-x.dtb \ - r8a7796-m3ulcb.dtb \ - r8a7796-salvator-x.dtb \ - r8a77965-salvator-x.dtb \ - r8a77970-eagle.dtb \ - r8a77990-ebisu.dtb \ - r8a77995-draak.dtb + r8a7795-h3ulcb-u-boot.dtb \ + r8a7795-salvator-x-u-boot.dtb \ + r8a7796-m3ulcb-u-boot.dtb \ + r8a7796-salvator-x-u-boot.dtb \ + r8a77965-salvator-x-u-boot.dtb \ + r8a77970-eagle-u-boot.dtb \ + r8a77990-ebisu-u-boot.dtb \ + r8a77995-draak-u-boot.dtb dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \ keystone-k2l-evm.dtb \ diff --git a/arch/arm/dts/meson-gxm-khadas-vim2.dts b/arch/arm/dts/meson-gxm-khadas-vim2.dts new file mode 100644 index 0000000000..0868da476e --- /dev/null +++ b/arch/arm/dts/meson-gxm-khadas-vim2.dts @@ -0,0 +1,412 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>. + * Copyright (c) 2017 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +/dts-v1/; + +#include <dt-bindings/input/input.h> +#include <dt-bindings/thermal/thermal.h> + +#include "meson-gxm.dtsi" + +/ { + compatible = "khadas,vim2", "amlogic,s912", "amlogic,meson-gxm"; + model = "Khadas VIM2"; + + aliases { + serial0 = &uart_AO; + serial1 = &uart_A; + serial2 = &uart_AO_B; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1710000>; + + button-function { + label = "Function"; + linux,code = <KEY_FN>; + press-threshold-microvolt = <10000>; + }; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; + }; + + gpio_fan: gpio-fan { + compatible = "gpio-fan"; + gpios = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH + &gpio GPIODV_15 GPIO_ACTIVE_HIGH>; + /* Dummy RPM values since fan is optional */ + gpio-fan,speed-map = <0 0 + 1 1 + 2 2 + 3 3>; + #cooling-cells = <2>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + button@0 { + label = "power"; + linux,code = <KEY_POWER>; + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; + }; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + + pwmleds { + compatible = "pwm-leds"; + + power { + label = "vim:red:power"; + pwms = <&pwm_AO_ab 1 7812500 0>; + max-brightness = <255>; + linux,default-trigger = "default-on"; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; + clocks = <&wifi32k>; + clock-names = "ext_clock"; + }; + + thermal-zones { + cpu-thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <1000>; /* milliseconds */ + + thermal-sensors = <&scpi_sensors 0>; + + trips { + cpu_alert0: cpu-alert0 { + temperature = <70000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "active"; + }; + + cpu_alert1: cpu-alert1 { + temperature = <80000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "passive"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>; + }; + + map1 { + trip = <&cpu_alert1>; + cooling-device = <&gpio_fan 2 THERMAL_NO_LIMIT>; + }; + + map2 { + trip = <&cpu_alert1>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map3 { + trip = <&cpu_alert1>; + cooling-device = + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + + hdmi_5v: regulator-hdmi-5v { + compatible = "regulator-fixed"; + + regulator-name = "HDMI_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + vcc_3v3: regulator-vcc_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vddio_ao18: regulator-vddio_ao18 { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vddio_boot: regulator-vddio_boot { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_BOOT"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vddao_3v3: regulator-vddao_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + wifi32k: wifi32k { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; +}; + +&cec_AO { + status = "okay"; + pinctrl-0 = <&ao_cec_pins>; + pinctrl-names = "default"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cpu0 { + #cooling-cells = <2>; +}; + +&cpu4 { + #cooling-cells = <2>; +}; + +ðmac { + pinctrl-0 = <ð_pins>; + pinctrl-names = "default"; + + /* Select external PHY by default */ + phy-handle = <&external_phy>; + + amlogic,tx-delay-ns = <2>; + + /* External PHY reset is shared with internal PHY Led signals */ + snps,reset-gpio = <&gpio GPIOZ_14 0>; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-active-low; + + /* External PHY is in RGMII */ + phy-mode = "rgmii"; + + status = "okay"; +}; + +&external_mdio { + external_phy: ethernet-phy@0 { + /* Realtek RTL8211F (0x001cc916) */ + reg = <0>; + interrupt-parent = <&gpio_intc>; + /* MAC_INTR on GPIOZ_15 */ + interrupts = <25 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +&i2c_A { + status = "okay"; + pinctrl-0 = <&i2c_a_pins>; + pinctrl-names = "default"; +}; + +&i2c_B { + status = "okay"; + pinctrl-0 = <&i2c_b_pins>; + pinctrl-names = "default"; + + rtc: rtc@51 { + /* has to be enabled manually when a battery is connected: */ + status = "disabled"; + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "xin32k"; + }; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; + linux,rc-map-name = "rc-geekbox"; +}; + +&pwm_AO_ab { + status = "okay"; + pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; +}; + +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; +}; + +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + max-frequency = <100000000>; + + non-removable; + disable-wp; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_pins>; + pinctrl-names = "default"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <100000000>; + disable-wp; + + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; + cd-inverted; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-names = "default"; + + bus-width = <8>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <200000000>; + non-removable; + disable-wp; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vddio_boot>; +}; + +/* + * EMMC_DS pin is shared between SPI NOR CS and eMMC Data Strobe + * Remove emmc_ds_pins from sd_emmc_c pinctrl-0 then spifc can be enabled + */ +&spifc { + status = "disabled"; + pinctrl-0 = <&nor_pins>; + pinctrl-names = "default"; + + w25q32: spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q16", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <3000000>; + }; +}; + +/* This one is connected to the Bluetooth module */ +&uart_A { + status = "okay"; + pinctrl-0 = <&uart_a_pins>; + pinctrl-names = "default"; +}; + +/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */ +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +/* This is brought out on the UART_RX_AO_B (15) and UART_TX_AO_B (16) pins: */ +&uart_AO_B { + status = "okay"; + pinctrl-0 = <&uart_ao_b_pins>; + pinctrl-names = "default"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vddio_ao18>; +}; + +&usb0 { + status = "okay"; +}; diff --git a/arch/arm/dts/meson-gxm.dtsi b/arch/arm/dts/meson-gxm.dtsi new file mode 100644 index 0000000000..247888d68a --- /dev/null +++ b/arch/arm/dts/meson-gxm.dtsi @@ -0,0 +1,119 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2016 Endless Computers, Inc. + * Author: Carlo Caione <carlo@endlessm.com> + */ + +#include "meson-gxl.dtsi" + +/ { + compatible = "amlogic,meson-gxm"; + + cpus { + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu4>; + }; + core1 { + cpu = <&cpu5>; + }; + core2 { + cpu = <&cpu6>; + }; + core3 { + cpu = <&cpu7>; + }; + }; + }; + + cpu4: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x100>; + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + }; + + cpu5: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x101>; + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + }; + + cpu6: cpu@102 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x102>; + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + }; + + cpu7: cpu@103 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x103>; + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + }; + }; +}; + +&apb { + usb2_phy2: phy@78040 { + compatible = "amlogic,meson-gxl-usb2-phy"; + #phy-cells = <0>; + reg = <0x0 0x78040 0x0 0x20>; + clocks = <&clkc CLKID_USB>; + clock-names = "phy"; + resets = <&reset RESET_USB_OTG>; + reset-names = "phy"; + status = "okay"; + }; +}; + +&clkc_AO { + compatible = "amlogic,meson-gxm-aoclkc", "amlogic,meson-gx-aoclkc"; +}; + +&saradc { + compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc"; +}; + +&scpi_dvfs { + clock-indices = <0 1>; + clock-output-names = "vbig", "vlittle"; +}; + +&vpu { + compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu"; +}; + +&hdmi_tx { + compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi"; +}; + +&dwc3 { + phys = <&usb3_phy>, <&usb2_phy0>, <&usb2_phy1>, <&usb2_phy2>; +}; diff --git a/arch/arm/dts/r8a77990-ebisu.dts b/arch/arm/dts/r8a77990-ebisu.dts index 8b0d24bd29..5e3c195d4c 100644 --- a/arch/arm/dts/r8a77990-ebisu.dts +++ b/arch/arm/dts/r8a77990-ebisu.dts @@ -65,6 +65,10 @@ }; }; +&ehci0 { + status = "okay"; +}; + &extal_clk { clock-frequency = <48000000>; }; @@ -101,6 +105,18 @@ function = "sdhi3"; power-source = <1800>; }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; +}; + +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-name = "default"; + + status = "okay"; }; &sdhi0 { diff --git a/arch/arm/dts/r8a77990.dtsi b/arch/arm/dts/r8a77990.dtsi index 6d2d5e1068..ad20ea14cd 100644 --- a/arch/arm/dts/r8a77990.dtsi +++ b/arch/arm/dts/r8a77990.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/clock/renesas-cpg-mssr.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/power/r8a77990-sysc.h> / { compatible = "renesas,r8a77990"; @@ -165,6 +166,43 @@ resets = <&cpg 906>; }; + ohci0: usb@ee080000 { + compatible = "generic-ohci"; + reg = <0 0xee080000 0 0x100>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 703>; + phys = <&usb2_phy0>; + phy-names = "usb"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 703>; + status = "disabled"; + }; + + ehci0: usb@ee080100 { + compatible = "generic-ehci"; + reg = <0 0xee080100 0 0x100>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 703>; + phys = <&usb2_phy0>; + phy-names = "usb"; + companion = <&ohci0>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 703>; + status = "disabled"; + }; + + usb2_phy0: usb-phy@ee080200 { + compatible = "renesas,usb2-phy-r8a7790", + "renesas,rcar-gen3-usb2-phy"; + reg = <0 0xee080200 0 0x700>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 703>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 703>; + #phy-cells = <0>; + status = "disabled"; + }; + pfc: pin-controller@e6060000 { compatible = "renesas,pfc-r8a77990"; reg = <0 0xe6060000 0 0x508>; diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts index 898deaf410..f8b7701167 100644 --- a/arch/arm/dts/stm32mp157c-ed1.dts +++ b/arch/arm/dts/stm32mp157c-ed1.dts @@ -361,6 +361,10 @@ status = "okay"; }; +&usbotg_hs { + usb33d-supply = <&usb33>; +}; + &usbphyc_port0 { phy-supply = <&vdd_usb>; vdda1v1-supply = <®11>; diff --git a/arch/arm/dts/ulcb.dtsi b/arch/arm/dts/ulcb.dtsi index f66727ca8e..ab886650cd 100644 --- a/arch/arm/dts/ulcb.dtsi +++ b/arch/arm/dts/ulcb.dtsi @@ -24,6 +24,15 @@ stdout-path = "serial0:115200n8"; }; + cpld { + compatible = "renesas,ulcb-cpld"; + status = "okay"; + gpio-sck = <&gpio6 8 0>; + gpio-mosi = <&gpio6 7 0>; + gpio-miso = <&gpio6 10 0>; + gpio-sstbz = <&gpio2 3 0>; + }; + audio_clkout: audio-clkout { /* * This is same as <&rcar_sound 0> diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index 47e8c184ad..286059d56e 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -323,6 +323,11 @@ syscon = <&slcr>; }; + efuse: efuse@f800d000 { + compatible = "xlnx,zynq-efuse"; + reg = <0xf800d000 0x20>; + }; + global_timer: timer@f8f00200 { compatible = "arm,cortex-a9-global-timer"; reg = <0xf8f00200 0x20>; diff --git a/arch/arm/dts/zynq-dlc20-rev1.0.dts b/arch/arm/dts/zynq-dlc20-rev1.0.dts new file mode 100644 index 0000000000..39ebcee9f7 --- /dev/null +++ b/arch/arm/dts/zynq-dlc20-rev1.0.dts @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018 Xilinx, Inc. + * + * Michal Simek <michal.simek@xilinx.com> + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq DLC20 Rev1.0"; + compatible = "xlnx,zynq-dlc20-rev1.0", "xlnx,zynq-dlc20", + "xlnx,zynq-7000"; + + aliases { + ethernet0 = &gem0; + i2c0 = &i2c0; + serial0 = &uart1; + spi0 = &qspi; + mmc0 = &sdhci0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x20000000>; + }; + + chosen { + bootargs = "earlyprintk"; + stdout-path = "serial0:115200n8"; + }; + + usb_phy0: phy0@e0002000 { + compatible = "ulpi-phy"; + #phy-cells = <0>; + reg = <0xe0002000 0x1000>; + view-port = <0x0170>; + drv-vbus; + }; +}; + +&clkc { + ps-clk-frequency = <33333333>; /* U7 */ +}; + +&gem0 { + status = "okay"; /* MIO16-MIO27, MDIO MIO52/53 */ + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy>; + + ethernet_phy: ethernet-phy@7 { /* rtl8211e - U25 */ + reg = <1>; + }; +}; + +&i2c0 { + status = "okay"; /* MIO14/15 */ + clock-frequency = <400000>; + /* U46 - m24c08 */ + eeprom: eeprom@54 { + compatible = "atmel,24c08"; + reg = <0x54>; + }; +}; + +&qspi { + u-boot,dm-pre-reloc; + status = "okay"; + is-dual = <0>; + num-cs = <1>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + flash@0 { + /* Rev1.0 W25Q128FWSIG, RevC N25Q128A */ + compatible = "n25q128a11", "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; + }; +}; + +&sdhci0 { + u-boot,dm-pre-reloc; + status = "okay"; /* EMMC MTFC4GACAJCN - MIO40-MIO45 */ + non-removable; + bus-width = <4>; +}; + +&uart1 { + u-boot,dm-pre-reloc; + status = "okay"; /* MIO8/9 */ +}; + +&usb0 { + status = "okay"; /* MIO28-MIO39 */ + dr_mode = "device"; + usb-phy = <&usb_phy0>; +}; + +&watchdog0 { + reset-on-timeout; +}; diff --git a/arch/arm/include/asm/arch-aspeed/wdt.h b/arch/arm/include/asm/arch-aspeed/wdt.h index 8d6f292c84..fb04d41d3c 100644 --- a/arch/arm/include/asm/arch-aspeed/wdt.h +++ b/arch/arm/include/asm/arch-aspeed/wdt.h @@ -57,6 +57,15 @@ #define WDT_RESET_SPI (1 << 24) #define WDT_RESET_MISC (1 << 25) +#define WDT_RESET_DEFAULT \ + (WDT_RESET_ARM | WDT_RESET_COPROC | WDT_RESET_I2C | \ + WDT_RESET_MAC1 | WDT_RESET_MAC2 | WDT_RESET_GCRT | \ + WDT_RESET_USB20 | WDT_RESET_USB11_HOST | WDT_RESET_USB11_EHCI2 | \ + WDT_RESET_VIDEO | WDT_RESET_HAC | WDT_RESET_LPC | \ + WDT_RESET_SDSDIO | WDT_RESET_MIC | WDT_RESET_CRT2C | \ + WDT_RESET_PWM | WDT_RESET_PECI | WDT_RESET_JTAG | \ + WDT_RESET_ADC | WDT_RESET_GPIO | WDT_RESET_MISC) + #ifndef __ASSEMBLY__ struct ast_wdt { u32 counter_status; diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h index f7a698e72d..471a336f13 100644 --- a/arch/arm/include/asm/arch-lpc32xx/config.h +++ b/arch/arm/include/asm/arch-lpc32xx/config.h @@ -60,10 +60,6 @@ #endif /* CONFIG_NAND_LPC32XX_SLC */ /* NOR Flash */ -#if defined(CONFIG_SYS_FLASH_CFI) -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_PROTECTION -#endif /* USB OHCI */ #if defined(CONFIG_USB_OHCI_LPC32XX) diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h index 9fa44d084c..385c8825f2 100644 --- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h +++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h @@ -68,5 +68,8 @@ int invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3, void initialize_tcm(bool mode); void mem_map_fill(void); int chip_id(unsigned char id); +#if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU) || defined(CONFIG_DEFINE_TCM_OCM_MMAP) +void tcm_init(u8 mode); +#endif #endif /* _ASM_ARCH_SYS_PROTO_H */ diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h index cc828c4504..2e8c8e53d7 100644 --- a/arch/arm/include/asm/u-boot-arm.h +++ b/arch/arm/include/asm/u-boot-arm.h @@ -24,26 +24,17 @@ extern ulong _datarelro_start_ofs; extern ulong IRQ_STACK_START_IN; /* 8 bytes in IRQ stack */ /* cpu/.../cpu.c */ -int cpu_init(void); int cleanup_before_linux(void); /* Set up ARMv7 MMU, caches and TLBs */ void cpu_init_cp15(void); /* cpu/.../arch/cpu.c */ -int arch_cpu_init(void); int arch_misc_init(void); -int arch_early_init_r(void); /* board/.../... */ int board_init(void); -/* cpu/.../interrupt.c */ -int arch_interrupt_init (void); -void reset_timer_masked (void); -ulong get_timer_masked (void); -void udelay_masked (unsigned long usec); - /* calls to c from vectors.S */ struct pt_regs; diff --git a/arch/arm/lib/gic_64.S b/arch/arm/lib/gic_64.S index 745c7858da..155212a419 100644 --- a/arch/arm/lib/gic_64.S +++ b/arch/arm/lib/gic_64.S @@ -107,6 +107,8 @@ ENTRY(gic_init_secure_percpu) mov w11, #0x1 /* Enable SGI 0 */ str w11, [x10, GICR_ISENABLERn] + switch_el x10, 3f, 2f, 1f +3: /* Initialize Cpu Interface */ mrs x10, ICC_SRE_EL3 orr x10, x10, #0xf /* SRE & Disable IRQ/FIQ Bypass & */ @@ -114,19 +116,19 @@ ENTRY(gic_init_secure_percpu) msr ICC_SRE_EL3, x10 isb - mrs x10, ICC_SRE_EL2 - orr x10, x10, #0xf /* SRE & Disable IRQ/FIQ Bypass & */ - /* Allow EL1 access to ICC_SRE_EL1 */ - msr ICC_SRE_EL2, x10 - isb - mov x10, #0x3 /* EnableGrp1NS | EnableGrp1S */ msr ICC_IGRPEN1_EL3, x10 isb msr ICC_CTLR_EL3, xzr isb - +2: + mrs x10, ICC_SRE_EL2 + orr x10, x10, #0xf /* SRE & Disable IRQ/FIQ Bypass & */ + /* Allow EL1 access to ICC_SRE_EL1 */ + msr ICC_SRE_EL2, x10 + isb +1: msr ICC_CTLR_EL1, xzr /* NonSecure ICC_CTLR_EL1 */ isb diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c index 930b25ccb8..ee775ce5d2 100644 --- a/arch/arm/lib/interrupts.c +++ b/arch/arm/lib/interrupts.c @@ -22,7 +22,6 @@ #include <efi_loader.h> #include <asm/proc-armv/ptrace.h> #include <asm/u-boot-arm.h> -#include <efi_loader.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-at91/arm920t/timer.c b/arch/arm/mach-at91/arm920t/timer.c index bbe90ae7ba..6db541a7b3 100644 --- a/arch/arm/mach-at91/arm920t/timer.c +++ b/arch/arm/mach-at91/arm920t/timer.c @@ -53,16 +53,6 @@ int timer_init(void) /* * timer without interrupts */ -ulong get_timer(ulong base) -{ - return get_timer_masked() - base; -} - -void __udelay(unsigned long usec) -{ - udelay_masked(usec); -} - ulong get_timer_raw(void) { at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC; @@ -82,12 +72,17 @@ ulong get_timer_raw(void) return gd->arch.tbl; } -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { return get_timer_raw()/TIMER_LOAD_VAL; } -void udelay_masked(unsigned long usec) +ulong get_timer(ulong base) +{ + return get_timer_masked() - base; +} + +void __udelay(unsigned long usec) { u32 tmo; u32 endtime; diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h index d4b25c3d60..39819788a1 100644 --- a/arch/arm/mach-davinci/include/mach/gpio.h +++ b/arch/arm/mach-davinci/include/mach/gpio.h @@ -21,27 +21,6 @@ #define DAVINCI_GPIO_BANK8 0x01E260B0 #endif /* CONFIG_SOC_DA8XX */ -struct davinci_gpio { - unsigned int dir; - unsigned int out_data; - unsigned int set_data; - unsigned int clr_data; - unsigned int in_data; - unsigned int set_rising; - unsigned int clr_rising; - unsigned int set_falling; - unsigned int clr_falling; - unsigned int intstat; -}; - -struct davinci_gpio_bank { - int num_gpio; - unsigned int irq_num; - unsigned int irq_mask; - unsigned long *in_use; - struct davinci_gpio *base; -}; - #define davinci_gpio_bank01 ((struct davinci_gpio *)DAVINCI_GPIO_BANK01) #define davinci_gpio_bank23 ((struct davinci_gpio *)DAVINCI_GPIO_BANK23) #define davinci_gpio_bank45 ((struct davinci_gpio *)DAVINCI_GPIO_BANK45) @@ -61,18 +40,7 @@ struct davinci_gpio_bank { #define MAX_NUM_GPIOS 144 #endif #define GPIO_BANK(gp) (davinci_gpio_bank01 + ((gp) >> 5)) -#define GPIO_BIT(gp) ((gp) & 0x1F) void gpio_info(void); -#ifdef CONFIG_DM_GPIO - -/* Information about a GPIO bank */ -struct davinci_gpio_platdata { - int bank_index; - ulong base; /* address of registers in physical memory */ - const char *port_name; -}; -#endif - #endif diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c index 2c319681fc..c888a93938 100644 --- a/arch/arm/mach-imx/syscounter.c +++ b/arch/arm/mach-imx/syscounter.c @@ -91,14 +91,9 @@ unsigned long long get_ticks(void) return now; } -ulong get_timer_masked(void) -{ - return tick_to_time(get_ticks()); -} - ulong get_timer(ulong base) { - return get_timer_masked() - base; + return tick_to_time(get_ticks()) - base; } void __udelay(unsigned long usec) diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c index 8a3a99f23a..68f0b8c011 100644 --- a/arch/arm/mach-k3/am6_init.c +++ b/arch/arm/mach-k3/am6_init.c @@ -72,6 +72,29 @@ void board_init_f(ulong dummy) preloader_console_init(); } +u32 spl_boot_mode(const u32 boot_device) +{ +#if defined(CONFIG_SUPPORT_EMMC_BOOT) + u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT); + u32 bootindex = readl(K3_BOOT_PARAM_TABLE_INDEX_VAL); + + u32 bootmode = (devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK) >> + CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT; + + /* eMMC boot0 mode is only supported for primary boot */ + if (bootindex == K3_PRIMARY_BOOTMODE && + bootmode == BOOT_DEVICE_MMC1) + return MMCSD_MODE_EMMCBOOT; +#endif + + /* Everything else use filesystem if available */ +#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) + return MMCSD_MODE_FS; +#else + return MMCSD_MODE_RAW; +#endif +} + static u32 __get_backup_bootmedia(u32 devstat) { u32 bkup_boot = (devstat & CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_MASK) >> @@ -85,7 +108,13 @@ static u32 __get_backup_bootmedia(u32 devstat) case BACKUP_BOOT_DEVICE_ETHERNET: return BOOT_DEVICE_ETHERNET; case BACKUP_BOOT_DEVICE_MMC2: + { + u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_MASK) >> + CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT; + if (port == 0x0) + return BOOT_DEVICE_MMC1; return BOOT_DEVICE_MMC2; + } case BACKUP_BOOT_DEVICE_SPI: return BOOT_DEVICE_SPI; case BACKUP_BOOT_DEVICE_HYPERFLASH: @@ -99,11 +128,24 @@ static u32 __get_backup_bootmedia(u32 devstat) static u32 __get_primary_bootmedia(u32 devstat) { - u32 bootmode = devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK; + u32 bootmode = (devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK) >> + CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT; if (bootmode == BOOT_DEVICE_OSPI || bootmode == BOOT_DEVICE_QSPI) bootmode = BOOT_DEVICE_SPI; + if (bootmode == BOOT_DEVICE_MMC2) { + u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_MMC_PORT_MASK) >> + CTRLMMR_MAIN_DEVSTAT_MMC_PORT_SHIFT; + if (port == 0x0) + bootmode = BOOT_DEVICE_MMC1; + } else if (bootmode == BOOT_DEVICE_MMC1) { + u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_MASK) >> + CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_SHIFT; + if (port == 0x1) + bootmode = BOOT_DEVICE_MMC2; + } + return bootmode; } diff --git a/arch/arm/mach-k3/include/mach/am6_hardware.h b/arch/arm/mach-k3/include/mach/am6_hardware.h index e4b78f8617..b5244609af 100644 --- a/arch/arm/mach-k3/include/mach/am6_hardware.h +++ b/arch/arm/mach-k3/include/mach/am6_hardware.h @@ -16,6 +16,12 @@ #define CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT 0 #define CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_MASK GENMASK(6, 4) #define CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT 4 +#define CTRLMMR_MAIN_DEVSTAT_MMC_PORT_MASK GENMASK(12, 12) +#define CTRLMMR_MAIN_DEVSTAT_MMC_PORT_SHIFT 12 +#define CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_MASK GENMASK(14, 14) +#define CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_SHIFT 14 +#define CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_MASK GENMASK(17, 17) +#define CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT 12 #define WKUP_CTRL_MMR0_BASE 0x43000000 #define MCU_CTRL_MMR0_BASE 0x40f00000 diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig index ee8b1cdcf6..cc943443b3 100644 --- a/arch/arm/mach-meson/Kconfig +++ b/arch/arm/mach-meson/Kconfig @@ -22,6 +22,16 @@ config MESON_GXL The Amlogic Meson GXL (S905X and S905D) is an ARM SoC with a quad-core Cortex-A53 CPU and a Mali-450 GPU. +config MESON_GXM + bool "Support Meson GXM" + select ARM64 + select CLK + select DM + select DM_SERIAL + help + The Amlogic Meson GXM (S912) is an ARM SoC with an + octo-core Cortex-A53 CPU and a Mali-T860 GPU. + if MESON_GXBB config TARGET_ODROID_C2 @@ -64,6 +74,17 @@ config TARGET_KHADAS_VIM endif +if MESON_GXM + +config TARGET_KHADAS_VIM2 + bool "KHADAS-VIM2" + help + Khadas VIM2 is a single board computer based on Meson GXM + with 2/3 GiB of RAM, Ethernet, HDMI, 4 USB, micro-SD slot, + eMMC, IR receiver and a 40-pin GPIO header. + +endif + config SYS_SOC default "meson" @@ -80,4 +101,6 @@ source "board/amlogic/libretech-cc/Kconfig" source "board/amlogic/khadas-vim/Kconfig" +source "board/amlogic/khadas-vim2/Kconfig" + endif diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c index 1ef7e5a6d1..d6c6253152 100644 --- a/arch/arm/mach-meson/board.c +++ b/arch/arm/mach-meson/board.c @@ -111,13 +111,13 @@ static struct mm_region gx_mem_map[] = { { .virt = 0x0UL, .phys = 0x0UL, - .size = 0x80000000UL, + .size = 0xc0000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE }, { - .virt = 0x80000000UL, - .phys = 0x80000000UL, - .size = 0x80000000UL, + .virt = 0xc0000000UL, + .phys = 0xc0000000UL, + .size = 0x30000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 76a19064c9..58e545a45b 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -136,6 +136,7 @@ endchoice config SYS_MPUCLK int "MPU CLK speed" + depends on AM33XX default 500 help Defines the MPU clock speed (in MHz). diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 847f33d47d..87b674e694 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -23,6 +23,7 @@ DECLARE_GLOBAL_DATA_PTR; static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; +static ulong get_timer_masked(void); /* * Nothing really to do with interrupts, just starts up a counter. @@ -67,7 +68,7 @@ void __udelay(unsigned long usec) } } -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { /* current tick value */ ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); diff --git a/arch/arm/mach-orion5x/timer.c b/arch/arm/mach-orion5x/timer.c index 92725d30f3..6aaf94ae08 100644 --- a/arch/arm/mach-orion5x/timer.c +++ b/arch/arm/mach-orion5x/timer.c @@ -78,7 +78,7 @@ DECLARE_GLOBAL_DATA_PTR; #define timestamp gd->arch.tbl #define lastdec gd->arch.lastinc -ulong get_timer_masked(void) +static ulong get_timer_masked(void) { ulong now = read_timer(); diff --git a/arch/arm/mach-rmobile/Kconfig b/arch/arm/mach-rmobile/Kconfig index ac08d6eb12..d82023acf3 100644 --- a/arch/arm/mach-rmobile/Kconfig +++ b/arch/arm/mach-rmobile/Kconfig @@ -12,6 +12,7 @@ config RCAR_GEN3 bool "Renesas ARM SoCs R-Car Gen3 (64bit)" select ARM64 select PHY + select CMD_CACHE endchoice diff --git a/arch/arm/mach-rmobile/cpu_info-rcar.c b/arch/arm/mach-rmobile/cpu_info-rcar.c index ccb7a32ac4..ce9312f9d8 100644 --- a/arch/arm/mach-rmobile/cpu_info-rcar.c +++ b/arch/arm/mach-rmobile/cpu_info-rcar.c @@ -11,7 +11,14 @@ #define R8A7796_REV_1_0 0x5200 #define R8A7796_REV_1_1 0x5210 -static u32 rmobile_get_prr(void); +static u32 rmobile_get_prr(void) +{ +#ifdef CONFIG_RCAR_GEN3 + return readl(0xFFF00044); +#else + return readl(0xFF000044); +#endif +} u32 rmobile_get_cpu_type(void) { @@ -37,55 +44,3 @@ u32 rmobile_get_cpu_rev_fraction(void) else return prr & 0x0000000F; } - -#if !CONFIG_IS_ENABLED(DM) || !CONFIG_IS_ENABLED(SYSCON) -static u32 rmobile_get_prr(void) -{ - /* - * On RCar/RMobile Gen2 and older systems, the PRR is always - * located at the address below. On newer systems, the PRR - * may be located at different address, but that information - * is obtained from DT. This code will be removed when all - * of the older systems get converted to DM and OF control. - */ - return readl(0xFF000044); -} -#else - -#include <dm.h> -#include <syscon.h> -#include <regmap.h> - -struct renesas_prr_priv { - fdt_addr_t regs; -}; - -enum { - PRR_RCAR, -}; - -static u32 rmobile_get_prr(void) -{ - struct regmap *map; - - map = syscon_get_regmap_by_driver_data(PRR_RCAR); - if (!map) { - printf("PRR regmap failed!\n"); - hang(); - } - - return readl(map->ranges[0].start); -} - -static const struct udevice_id renesas_prr_ids[] = { - { .compatible = "renesas,prr", .data = PRR_RCAR }, - { } -}; - -U_BOOT_DRIVER(renesas_prr) = { - .name = "renesas_prr", - .id = UCLASS_SYSCON, - .of_match = renesas_prr_ids, - .flags = DM_FLAG_PRE_RELOC, -}; -#endif diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c b/arch/arm/mach-sunxi/dram_sun50i_h6.c index 6b94cf38c5..5da90a2835 100644 --- a/arch/arm/mach-sunxi/dram_sun50i_h6.c +++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c @@ -299,6 +299,8 @@ static void mctl_sys_init(struct dram_para *para) /* Put all DRAM-related blocks to reset state */ clrbits_le32(&ccm->mbus_cfg, MBUS_ENABLE | MBUS_RESET); + clrbits_le32(&ccm->dram_gate_reset, BIT(0)); + udelay(5); writel(0, &ccm->dram_gate_reset); clrbits_le32(&ccm->pll5_cfg, CCM_PLL5_CTRL_EN); clrbits_le32(&ccm->dram_clk_cfg, DRAM_MOD_RESET); @@ -313,7 +315,9 @@ static void mctl_sys_init(struct dram_para *para) /* Configure DRAM mod clock */ writel(DRAM_CLK_SRC_PLL5, &ccm->dram_clk_cfg); setbits_le32(&ccm->dram_clk_cfg, DRAM_CLK_UPDATE); - writel(BIT(0) | BIT(RESET_SHIFT), &ccm->dram_gate_reset); + writel(BIT(RESET_SHIFT), &ccm->dram_gate_reset); + udelay(5); + setbits_le32(&ccm->dram_gate_reset, BIT(0)); /* Disable all channels */ writel(0, &mctl_com->maer0); diff --git a/arch/arm/mach-versal/Kconfig b/arch/arm/mach-versal/Kconfig new file mode 100644 index 0000000000..9cee97b748 --- /dev/null +++ b/arch/arm/mach-versal/Kconfig @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: GPL-2.0+ + +if ARCH_VERSAL + +config SYS_BOARD + string "Board name" + default "versal" + +config SYS_VENDOR + string "Vendor name" + default "xilinx" + +config SYS_SOC + default "versal" + +config SYS_CONFIG_NAME + string "Board configuration name" + default "xilinx_versal" + help + This option contains information about board configuration name. + Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header + will be used for board configuration. + +config GICV3 + def_bool y + +config SYS_MALLOC_LEN + default 0x2000000 + +config COUNTER_FREQUENCY + int "Timer clock frequency" + default 0 + help + Setup time clock frequency for certain platform + +config ZYNQ_SDHCI_MAX_FREQ + default 200000000 + +config VERSAL_OF_BOARD_DTB_ADDR + hex + default 0x1000 + depends on OF_BOARD + +endif diff --git a/arch/arm/mach-versal/Makefile b/arch/arm/mach-versal/Makefile new file mode 100644 index 0000000000..c230239320 --- /dev/null +++ b/arch/arm/mach-versal/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2016 - 2018 Xilinx, Inc. +# Michal Simek <michal.simek@xilinx.com> +# + +obj-y += clk.o +obj-y += cpu.o diff --git a/arch/arm/mach-versal/clk.c b/arch/arm/mach-versal/clk.c new file mode 100644 index 0000000000..b82cea4ccb --- /dev/null +++ b/arch/arm/mach-versal/clk.c @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2016 - 2018 Xilinx, Inc. + * Michal Simek <michal.simek@xilinx.com> + */ + +#include <common.h> + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_CLOCKS +/** + * set_cpu_clk_info - Initialize clock framework + * + * Return: 0 always. + * + * This function is called from common code after relocation and sets up the + * clock framework. The framework must not be used before this function had been + * called. + */ +int set_cpu_clk_info(void) +{ + gd->cpu_clk = get_tbclk(); + + gd->bd->bi_arm_freq = gd->cpu_clk / 1000000; + gd->bd->bi_dsp_freq = 0; + + return 0; +} +#endif diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c new file mode 100644 index 0000000000..1fd3c246c1 --- /dev/null +++ b/arch/arm/mach-versal/cpu.c @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2016 - 2018 Xilinx, Inc. + * Michal Simek <michal.simek@xilinx.com> + */ + +#include <common.h> +#include <asm/armv8/mmu.h> +#include <asm/io.h> + +static struct mm_region versal_mem_map[] = { + { + .virt = 0x0UL, + .phys = 0x0UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = 0x80000000UL, + .phys = 0x80000000UL, + .size = 0x70000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + .virt = 0xf0000000UL, + .phys = 0xf0000000UL, + .size = 0x0fe00000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + .virt = 0xffe00000UL, + .phys = 0xffe00000UL, + .size = 0x00200000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = 0x400000000UL, + .phys = 0x400000000UL, + .size = 0x200000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + .virt = 0x600000000UL, + .phys = 0x600000000UL, + .size = 0x800000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = 0xe00000000UL, + .phys = 0xe00000000UL, + .size = 0xf200000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = versal_mem_map; + +u64 get_page_table_size(void) +{ + return 0x14000; +} + +#if defined(CONFIG_OF_BOARD) +void *board_fdt_blob_setup(void) +{ + static void *fw_dtb = (void *)CONFIG_VERSAL_OF_BOARD_DTB_ADDR; + + if (fdt_magic(fw_dtb) != FDT_MAGIC) { + printf("DTB is not passed via %llx\n", (u64)fw_dtb); + return NULL; + } + + return fw_dtb; +} +#endif diff --git a/arch/arm/mach-versal/include/mach/gpio.h b/arch/arm/mach-versal/include/mach/gpio.h new file mode 100644 index 0000000000..677facba5e --- /dev/null +++ b/arch/arm/mach-versal/include/mach/gpio.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2016 - 2018 Xilinx, Inc. + */ + +/* Empty file - for compilation */ diff --git a/arch/arm/mach-versal/include/mach/hardware.h b/arch/arm/mach-versal/include/mach/hardware.h new file mode 100644 index 0000000000..aad742625b --- /dev/null +++ b/arch/arm/mach-versal/include/mach/hardware.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2016 - 2018 Xilinx, Inc. + */ + +#define VERSAL_CRL_APB_BASEADDR 0xFF5E0000 + +#define CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT BIT(25) + +#define IOU_SWITCH_CTRL_CLKACT_BIT BIT(25) +#define IOU_SWITCH_CTRL_DIVISOR0_SHIFT 8 + +struct crlapb_regs { + u32 reserved0[69]; + u32 iou_switch_ctrl; /* 0x114 */ + u32 reserved1[13]; + u32 timestamp_ref_ctrl; /* 0x14c */ + u32 reserved2[126]; + u32 rst_timestamp; /* 0x348 */ +}; + +#define crlapb_base ((struct crlapb_regs *)VERSAL_CRL_APB_BASEADDR) + +#define VERSAL_IOU_SCNTR_SECURE 0xFF140000 + +#define IOU_SCNTRS_CONTROL_EN 1 + +struct iou_scntrs_regs { + u32 counter_control_register; /* 0x0 */ + u32 reserved0[7]; + u32 base_frequency_id_register; /* 0x20 */ +}; + +#define iou_scntr_secure ((struct iou_scntrs_regs *)VERSAL_IOU_SCNTR_SECURE) diff --git a/arch/arm/mach-versal/include/mach/sys_proto.h b/arch/arm/mach-versal/include/mach/sys_proto.h new file mode 100644 index 0000000000..677facba5e --- /dev/null +++ b/arch/arm/mach-versal/include/mach/sys_proto.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2016 - 2018 Xilinx, Inc. + */ + +/* Empty file - for compilation */ diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index 9fbcb9ef92..07e46471fe 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -38,14 +38,6 @@ ssize_t os_read(int fd, void *buf, size_t count) return read(fd, buf, count); } -ssize_t os_read_no_block(int fd, void *buf, size_t count) -{ - const int flags = fcntl(fd, F_GETFL, 0); - - fcntl(fd, F_SETFL, flags | O_NONBLOCK); - return os_read(fd, buf, count); -} - ssize_t os_write(int fd, const void *buf, size_t count) { return write(fd, buf, count); @@ -85,6 +77,8 @@ int os_open(const char *pathname, int os_flags) if (os_flags & OS_O_CREAT) flags |= O_CREAT; + if (os_flags & OS_O_TRUNC) + flags |= O_TRUNC; return open(pathname, flags, 0777); } @@ -104,14 +98,41 @@ void os_exit(int exit_code) exit(exit_code); } +int os_write_file(const char *name, const void *buf, int size) +{ + char fname[256]; + int fd; + + fd = os_open(fname, OS_O_WRONLY | OS_O_CREAT | OS_O_TRUNC); + if (fd < 0) { + printf("Cannot open file '%s'\n", fname); + return -EIO; + } + if (os_write(fd, buf, size) != size) { + printf("Cannot write to file '%s'\n", fname); + return -EIO; + } + os_close(fd); + printf("Write '%s', size %#x (%d)\n", name, size, size); + + return 0; +} + /* Restore tty state when we exit */ static struct termios orig_term; static bool term_setup; +static bool term_nonblock; void os_fd_restore(void) { if (term_setup) { + int flags; + tcsetattr(0, TCSANOW, &orig_term); + if (term_nonblock) { + flags = fcntl(0, F_GETFL, 0); + fcntl(0, F_SETFL, flags & ~O_NONBLOCK); + } term_setup = false; } } @@ -120,6 +141,7 @@ void os_fd_restore(void) void os_tty_raw(int fd, bool allow_sigs) { struct termios term; + int flags; if (term_setup) return; @@ -136,6 +158,13 @@ void os_tty_raw(int fd, bool allow_sigs) if (tcsetattr(fd, TCSANOW, &term)) return; + flags = fcntl(fd, F_GETFL, 0); + if (!(flags & O_NONBLOCK)) { + if (fcntl(fd, F_SETFL, flags | O_NONBLOCK)) + return; + term_nonblock = true; + } + term_setup = true; atexit(os_fd_restore); } @@ -569,15 +598,40 @@ int os_find_u_boot(char *fname, int maxlen) struct sandbox_state *state = state_get_current(); const char *progname = state->argv[0]; int len = strlen(progname); + const char *suffix; char *p; int fd; if (len >= maxlen || len < 4) return -ENOSPC; - /* Look for 'u-boot' in the same directory as 'u-boot-spl' */ strcpy(fname, progname); - if (!strcmp(fname + len - 4, "-spl")) { + suffix = fname + len - 4; + + /* If we are TPL, boot to SPL */ + if (!strcmp(suffix, "-tpl")) { + fname[len - 3] = 's'; + fd = os_open(fname, O_RDONLY); + if (fd >= 0) { + close(fd); + return 0; + } + + /* Look for 'u-boot-tpl' in the tpl/ directory */ + p = strstr(fname, "/tpl/"); + if (p) { + p[1] = 's'; + fd = os_open(fname, O_RDONLY); + if (fd >= 0) { + close(fd); + return 0; + } + } + return -ENOENT; + } + + /* Look for 'u-boot' in the same directory as 'u-boot-spl' */ + if (!strcmp(suffix, "-spl")) { fname[len - 4] = '\0'; fd = os_open(fname, O_RDONLY); if (fd >= 0) { @@ -636,3 +690,14 @@ void os_abort(void) { abort(); } + +int os_mprotect_allow(void *start, size_t len) +{ + int page_size = getpagesize(); + + /* Move start to the start of a page, len to the end */ + start = (void *)(((ulong)start) & ~(page_size - 1)); + len = (len + page_size * 2) & ~(page_size - 1); + + return mprotect(start, len, PROT_READ | PROT_WRITE); +} diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c index 59c68a20c5..2ee3b48565 100644 --- a/arch/sandbox/cpu/start.c +++ b/arch/sandbox/cpu/start.c @@ -177,7 +177,7 @@ static int sandbox_cmdline_cb_memory(struct sandbox_state *state, err = os_read_ram_buf(arg); if (err) { - printf("Failed to read RAM buffer\n"); + printf("Failed to read RAM buffer '%s': %d\n", arg, err); return err; } @@ -273,6 +273,16 @@ static int sandbox_cmdline_cb_verbose(struct sandbox_state *state, } SANDBOX_CMDLINE_OPT_SHORT(verbose, 'v', 0, "Show test output"); +static int sandbox_cmdline_cb_log_level(struct sandbox_state *state, + const char *arg) +{ + state->default_log_level = simple_strtol(arg, NULL, 10); + + return 0; +} +SANDBOX_CMDLINE_OPT_SHORT(log_level, 'L', 1, + "Set log level (0=panic, 7=debug)"); + int board_run_command(const char *cmdline) { printf("## Commands are disabled. Please enable CONFIG_CMDLINE.\n"); @@ -304,15 +314,14 @@ int main(int argc, char *argv[]) if (ret) goto err; - /* Remove old memory file if required */ - if (state->ram_buf_rm && state->ram_buf_fname) - os_unlink(state->ram_buf_fname); - memset(&data, '\0', sizeof(data)); gd = &data; #if CONFIG_VAL(SYS_MALLOC_F_LEN) gd->malloc_base = CONFIG_MALLOC_F_ADDR; #endif +#if CONFIG_IS_ENABLED(LOG) + gd->default_log_level = state->default_log_level; +#endif setup_ram_buf(state); /* Do pre- and post-relocation init */ diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c index 04a11fed55..d3b9c05985 100644 --- a/arch/sandbox/cpu/state.c +++ b/arch/sandbox/cpu/state.c @@ -393,7 +393,7 @@ int state_uninit(void) state = &main_state; - if (state->write_ram_buf && !state->ram_buf_rm) { + if (state->write_ram_buf) { err = os_write_ram_buf(state->ram_buf_fname); if (err) { printf("Failed to write RAM buffer\n"); @@ -408,6 +408,10 @@ int state_uninit(void) } } + /* Remove old memory file if required */ + if (state->ram_buf_rm && state->ram_buf_fname) + os_unlink(state->ram_buf_fname); + /* Delete this at the last moment so as not to upset gdb too much */ if (state->jumped_fname) os_unlink(state->jumped_fname); diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts index 48db7818d7..fb866e8807 100644 --- a/arch/sandbox/dts/sandbox.dts +++ b/arch/sandbox/dts/sandbox.dts @@ -18,7 +18,7 @@ stdout-path = "/serial"; }; - cros_ec: cros-ec@0 { + cros_ec: cros-ec { reg = <0 0>; compatible = "google,cros-ec-sandbox"; @@ -26,23 +26,23 @@ * This describes the flash memory within the EC. Note * that the STM32L flash erases to 0, not 0xff. */ - #address-cells = <1>; - #size-cells = <1>; - flash@8000000 { - reg = <0x08000000 0x20000>; + flash { + image-pos = <0x08000000>; + size = <0x20000>; erase-value = <0>; - #address-cells = <1>; - #size-cells = <1>; /* Information for sandbox */ ro { - reg = <0 0xf000>; + image-pos = <0>; + size = <0xf000>; }; wp-ro { - reg = <0xf000 0x1000>; + image-pos = <0xf000>; + size = <0x1000>; }; rw { - reg = <0x10000 0x10000>; + image-pos = <0x10000>; + size = <0x10000>; }; }; }; diff --git a/arch/sandbox/dts/sandbox64.dts b/arch/sandbox/dts/sandbox64.dts index 0e32fdad9d..2c6d351381 100644 --- a/arch/sandbox/dts/sandbox64.dts +++ b/arch/sandbox/dts/sandbox64.dts @@ -17,7 +17,7 @@ stdout-path = "/serial"; }; - cros_ec: cros-ec@0 { + cros_ec: cros-ec { reg = <0 0 0 0>; compatible = "google,cros-ec-sandbox"; @@ -25,23 +25,23 @@ * This describes the flash memory within the EC. Note * that the STM32L flash erases to 0, not 0xff. */ - #address-cells = <1>; - #size-cells = <1>; - flash@8000000 { - reg = <0x08000000 0x20000>; + flash { + image-pos = <0x08000000>; + size = <0x20000>; erase-value = <0>; - #address-cells = <1>; - #size-cells = <1>; /* Information for sandbox */ ro { - reg = <0 0xf000>; + image-pos = <0>; + size = <0xf000>; }; wp-ro { - reg = <0xf000 0x1000>; + image-pos = <0xf000>; + size = <0x1000>; }; rw { - reg = <0x10000 0x10000>; + image-pos = <0x10000>; + size = <0x10000>; }; }; }; diff --git a/arch/sandbox/dts/sandbox_pmic.dtsi b/arch/sandbox/dts/sandbox_pmic.dtsi index 403656f25e..5ecafaab36 100644 --- a/arch/sandbox/dts/sandbox_pmic.dtsi +++ b/arch/sandbox/dts/sandbox_pmic.dtsi @@ -60,7 +60,7 @@ regulator-max-microvolt = <3300000>; }; - ldo1 { + ldo_1: ldo1 { regulator-name = "VDD_EMMC_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index ad94901fa1..57e0dd7663 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -11,6 +11,8 @@ eth0 = "/eth@10002000"; eth3 = ð_3; eth5 = ð_5; + gpio1 = &gpio_a; + gpio2 = &gpio_b; i2c0 = "/i2c@0"; mmc0 = "/mmc0"; mmc1 = "/mmc1"; @@ -40,6 +42,35 @@ osd0 = "/osd"; }; + cros_ec: cros-ec { + reg = <0 0>; + compatible = "google,cros-ec-sandbox"; + + /* + * This describes the flash memory within the EC. Note + * that the STM32L flash erases to 0, not 0xff. + */ + flash { + image-pos = <0x08000000>; + size = <0x20000>; + erase-value = <0>; + + /* Information for sandbox */ + ro { + image-pos = <0>; + size = <0xf000>; + }; + wp-ro { + image-pos = <0xf000>; + size = <0x1000>; + }; + rw { + image-pos = <0x10000>; + size = <0x10000>; + }; + }; + }; + a-test { reg = <0 1>; compatible = "denx,u-boot-fdt-test"; @@ -62,6 +93,15 @@ reg = <2 1>; }; + backlight: backlight { + compatible = "pwm-backlight"; + enable-gpios = <&gpio_a 1>; + power-supply = <&ldo_1>; + pwms = <&pwm 0 1000>; + default-brightness-level = <5>; + brightness-levels = <0 16 32 64 128 170 202 234 255>; + }; + bind-test { bind-test-child1 { compatible = "sandbox,phy"; @@ -363,7 +403,11 @@ ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 0x01000000 0 0x40000000 0x40000000 0 0x2000>; sandbox,dev-info = <0x08 0x00 0x1234 0x5678 - 0x0c 0x00 0x1234 0x5678>; + 0x0c 0x00 0x1234 0x5678 + 0x10 0x00 0x1234 0x5678>; + pci@10,0 { + reg = <0x8000 0 0 0 0>; + }; }; pci2: pci-controller2 { @@ -412,12 +456,14 @@ power-domains = <&pwrdom 2>; }; - pwm { + pwm: pwm { compatible = "sandbox,pwm"; + #pwm-cells = <2>; }; pwm2 { compatible = "sandbox,pwm"; + #pwm-cells = <2>; }; ram { @@ -454,6 +500,11 @@ remoteproc-name = "remoteproc-test-dev2"; }; + panel { + compatible = "simple-panel"; + backlight = <&backlight 0 100>; + }; + smem@0 { compatible = "sandbox,smem"; }; diff --git a/arch/sandbox/include/asm/eth.h b/arch/sandbox/include/asm/eth.h index bfcd11b593..477fa00fad 100644 --- a/arch/sandbox/include/asm/eth.h +++ b/arch/sandbox/include/asm/eth.h @@ -13,4 +13,97 @@ void sandbox_eth_disable_response(int index, bool disable); void sandbox_eth_skip_timeout(void); +/* + * sandbox_eth_arp_req_to_reply() + * + * Check for an arp request to be sent. If so, inject a reply + * + * @dev: device that received the packet + * @packet: pointer to the received pacaket buffer + * @len: length of received packet + * @return 0 if injected, -EAGAIN if not + */ +int sandbox_eth_arp_req_to_reply(struct udevice *dev, void *packet, + unsigned int len); + +/* + * sandbox_eth_ping_req_to_reply() + * + * Check for a ping request to be sent. If so, inject a reply + * + * @dev: device that received the packet + * @packet: pointer to the received pacaket buffer + * @len: length of received packet + * @return 0 if injected, -EAGAIN if not + */ +int sandbox_eth_ping_req_to_reply(struct udevice *dev, void *packet, + unsigned int len); + +/* + * sandbox_eth_recv_arp_req() + * + * Inject an ARP request for this target + * + * @dev: device that received the packet + * @return 0 if injected, -EOVERFLOW if not + */ +int sandbox_eth_recv_arp_req(struct udevice *dev); + +/* + * sandbox_eth_recv_ping_req() + * + * Inject a ping request for this target + * + * @dev: device that received the packet + * @return 0 if injected, -EOVERFLOW if not + */ +int sandbox_eth_recv_ping_req(struct udevice *dev); + +/** + * A packet handler + * + * dev - device pointer + * pkt - pointer to the "sent" packet + * len - packet length + */ +typedef int sandbox_eth_tx_hand_f(struct udevice *dev, void *pkt, + unsigned int len); + +/** + * struct eth_sandbox_priv - memory for sandbox mock driver + * + * fake_host_hwaddr - MAC address of mocked machine + * fake_host_ipaddr - IP address of mocked machine + * disabled - Will not respond + * recv_packet_buffer - buffers of the packet returned as received + * recv_packet_length - lengths of the packet returned as received + * recv_packets - number of packets returned + * tx_handler - function to generate responses to sent packets + * priv - a pointer to some structure a test may want to keep track of + */ +struct eth_sandbox_priv { + uchar fake_host_hwaddr[ARP_HLEN]; + struct in_addr fake_host_ipaddr; + bool disabled; + uchar * recv_packet_buffer[PKTBUFSRX]; + int recv_packet_length[PKTBUFSRX]; + int recv_packets; + sandbox_eth_tx_hand_f *tx_handler; + void *priv; +}; + +/* + * Set packet handler + * + * handler - The func ptr to call on send. If NULL, set to default handler + */ +void sandbox_eth_set_tx_handler(int index, sandbox_eth_tx_hand_f *handler); + +/* + * Set priv ptr + * + * priv - priv void ptr to store in the device + */ +void sandbox_eth_set_priv(int index, void *priv); + #endif /* __ETH_H */ diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h index a612ce8944..dcb6d5f568 100644 --- a/arch/sandbox/include/asm/state.h +++ b/arch/sandbox/include/asm/state.h @@ -36,7 +36,6 @@ enum state_terminal_raw { }; struct sandbox_spi_info { - const char *spec; struct udevice *emul; }; @@ -89,6 +88,7 @@ struct sandbox_state { enum state_terminal_raw term_raw; /* Terminal raw/cooked */ bool skip_delays; /* Ignore any time delays (for test) */ bool show_test_output; /* Don't suppress stdout in tests */ + int default_log_level; /* Default log level for sandbox */ /* Pointer to information for each SPI bus/cs */ struct sandbox_spi_info spi[CONFIG_SANDBOX_SPI_MAX_BUS] diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h index 89f3d90c73..8e60f80ae7 100644 --- a/arch/sandbox/include/asm/test.h +++ b/arch/sandbox/include/asm/test.h @@ -98,4 +98,19 @@ int sandbox_usb_keyb_add_string(struct udevice *dev, const char *str); * @buflen: length of buffer in bytes */ int sandbox_osd_get_mem(struct udevice *dev, u8 *buf, size_t buflen); + +/** + * sandbox_pwm_get_config() - get the PWM config for a channel + * + * @dev: Device to check + * @channel: Channel number to check + * @period_ns: Period of the PWM in nanoseconds + * @duty_ns: Current duty cycle of the PWM in nanoseconds + * @enable: true if the PWM is enabled + * @polarity: true if the PWM polarity is active high + * @return 0 if OK, -ENOSPC if the PWM number is invalid + */ +int sandbox_pwm_get_config(struct udevice *dev, uint channel, uint *period_nsp, + uint *duty_nsp, bool *enablep, bool *polarityp); + #endif diff --git a/arch/x86/config.mk b/arch/x86/config.mk index cc940712a8..8151e476d4 100644 --- a/arch/x86/config.mk +++ b/arch/x86/config.mk @@ -23,7 +23,8 @@ endif ifeq ($(IS_32BIT),y) PLATFORM_CPPFLAGS += -march=i386 -m32 else -PLATFORM_CPPFLAGS += $(if $(CONFIG_SPL_BUILD),,-fpic) -fno-common -m64 +PLATFORM_CPPFLAGS += $(if $(CONFIG_SPL_BUILD),,-fpic) -fno-common -march=core2 -m64 +PLATFORM_CPPFLAGS += -mno-mmx -mno-sse endif PLATFORM_RELFLAGS += -fdata-sections -ffunction-sections -fvisibility=hidden diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index a6fd3a849a..aaf0d07192 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -55,10 +55,10 @@ static void board_final_cleanup(void) if (top_type == MTRR_TYPE_WRPROT) { struct mtrr_state state; - mtrr_open(&state); + mtrr_open(&state, true); wrmsrl(MTRR_PHYS_BASE_MSR(top_mtrr), 0); wrmsrl(MTRR_PHYS_MASK_MSR(top_mtrr), 0); - mtrr_close(&state); + mtrr_close(&state, true); } if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) { diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c index 3094006562..0939736164 100644 --- a/arch/x86/cpu/mtrr.c +++ b/arch/x86/cpu/mtrr.c @@ -11,6 +11,11 @@ * System Programming */ +/* + * Note that any console output (e.g. debug()) in this file will likely fail + * since the MTRR registers are sometimes in flux. + */ + #include <common.h> #include <asm/io.h> #include <asm/msr.h> @@ -19,27 +24,29 @@ DECLARE_GLOBAL_DATA_PTR; /* Prepare to adjust MTRRs */ -void mtrr_open(struct mtrr_state *state) +void mtrr_open(struct mtrr_state *state, bool do_caches) { if (!gd->arch.has_mtrr) return; - state->enable_cache = dcache_status(); + if (do_caches) { + state->enable_cache = dcache_status(); - if (state->enable_cache) - disable_caches(); + if (state->enable_cache) + disable_caches(); + } state->deftype = native_read_msr(MTRR_DEF_TYPE_MSR); wrmsrl(MTRR_DEF_TYPE_MSR, state->deftype & ~MTRR_DEF_TYPE_EN); } /* Clean up after adjusting MTRRs, and enable them */ -void mtrr_close(struct mtrr_state *state) +void mtrr_close(struct mtrr_state *state, bool do_caches) { if (!gd->arch.has_mtrr) return; wrmsrl(MTRR_DEF_TYPE_MSR, state->deftype | MTRR_DEF_TYPE_EN); - if (state->enable_cache) + if (do_caches && state->enable_cache) enable_caches(); } @@ -50,10 +57,14 @@ int mtrr_commit(bool do_caches) uint64_t mask; int i; + debug("%s: enabled=%d, count=%d\n", __func__, gd->arch.has_mtrr, + gd->arch.mtrr_req_count); if (!gd->arch.has_mtrr) return -ENOSYS; - mtrr_open(&state); + debug("open\n"); + mtrr_open(&state, do_caches); + debug("open done\n"); for (i = 0; i < gd->arch.mtrr_req_count; i++, req++) { mask = ~(req->size - 1); mask &= (1ULL << CONFIG_CPU_ADDR_BITS) - 1; @@ -62,9 +73,12 @@ int mtrr_commit(bool do_caches) } /* Clear the ones that are unused */ + debug("clear\n"); for (; i < MTRR_COUNT; i++) wrmsrl(MTRR_PHYS_MASK_MSR(i), 0); - mtrr_close(&state); + debug("close\n"); + mtrr_close(&state, do_caches); + debug("mtrr done\n"); return 0; } @@ -74,6 +88,7 @@ int mtrr_add_request(int type, uint64_t start, uint64_t size) struct mtrr_request *req; uint64_t mask; + debug("%s: count=%d\n", __func__, gd->arch.mtrr_req_count); if (!gd->arch.has_mtrr) return -ENOSYS; diff --git a/arch/x86/cpu/quark/Kconfig b/arch/x86/cpu/quark/Kconfig index 76f159243f..3a18cb0dfc 100644 --- a/arch/x86/cpu/quark/Kconfig +++ b/arch/x86/cpu/quark/Kconfig @@ -130,4 +130,8 @@ config SYS_CAR_SIZE Space in bytes in eSRAM used as Cache-As-ARM (CAR). Note this size must not exceed eSRAM's total size. +config X86_TSC_TIMER_EARLY_FREQ + int + default 400 + endif diff --git a/arch/x86/cpu/start64.S b/arch/x86/cpu/start64.S index a473fd166d..a78a3316b6 100644 --- a/arch/x86/cpu/start64.S +++ b/arch/x86/cpu/start64.S @@ -20,6 +20,7 @@ _start: call board_init_f_init_reserve + xor %rdi, %rdi call board_init_f call board_init_f_r diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c index 18b3e94e12..6c063e8200 100644 --- a/arch/x86/cpu/x86_64/cpu.c +++ b/arch/x86/cpu/x86_64/cpu.c @@ -7,30 +7,18 @@ #include <common.h> #include <debug_uart.h> -/* Global declaration of gd */ -struct global_data *global_data_ptr; +/* + * Global declaration of gd. + * + * As we write to it before relocation we have to make sure it is not put into + * a .bss section which may overlap a .rela section. Initialization forces it + * into a .data section which cannot overlap any .rela section. + */ +struct global_data *global_data_ptr = (struct global_data *)~0; void arch_setup_gd(gd_t *new_gd) { global_data_ptr = new_gd; - - /* - * TODO(sjg@chromium.org): For some reason U-Boot does not boot - * without this line. It fails to start up U-Boot proper and instead - * restarts SPL. Need to figure out why: - * - * U-Boot SPL 2017.01 - * - * U-Boot SPL 2017.01 - * CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz - * Trying to boot from SPIJumping to 64-bit U-Boot: Note many - * features are missing - * - * U-Boot SPL 2017.01 - */ -#ifdef CONFIG_DEBUG_UART - printch(' '); -#endif } int cpu_has_64bit(void) diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h index 05cd7b7f17..2d897f82ef 100644 --- a/arch/x86/include/asm/mtrr.h +++ b/arch/x86/include/asm/mtrr.h @@ -77,8 +77,9 @@ struct mtrr_state { * possibly the cache. * * @state: Empty structure to pass in to hold settings + * @do_caches: true to disable caches before opening */ -void mtrr_open(struct mtrr_state *state); +void mtrr_open(struct mtrr_state *state, bool do_caches); /** * mtrr_open() - Clean up after adjusting MTRRs, and enable them @@ -86,8 +87,9 @@ void mtrr_open(struct mtrr_state *state); * This uses the structure containing information returned from mtrr_open(). * * @state: Structure from mtrr_open() + * @state: true to restore cache state to that before mtrr_open() */ -void mtrr_close(struct mtrr_state *state); +void mtrr_close(struct mtrr_state *state, bool do_caches); /** * mtrr_add_request() - Add a new MTRR request diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c index 54c22fe6de..832b1f901c 100644 --- a/arch/x86/lib/bootm.c +++ b/arch/x86/lib/bootm.c @@ -116,6 +116,10 @@ static int boot_prep_linux(bootm_headers_t *images) char *base_ptr; base_ptr = (char *)load_zimage(data, len, &load_address); + if (!base_ptr) { + puts("## Kernel loading failed ...\n"); + goto error; + } images->os.load = load_address; cmd_line_dest = base_ptr + COMMAND_LINE_OFFSET; images->ep = (ulong)base_ptr; diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c index ed10755d9c..4d09e4de42 100644 --- a/arch/x86/lib/relocate.c +++ b/arch/x86/lib/relocate.c @@ -53,6 +53,15 @@ static void do_elf_reloc_fixups64(unsigned int text_base, uintptr_t size, Elf64_Addr *offset_ptr_ram; do { + unsigned long long type = ELF64_R_TYPE(re_src->r_info); + + if (type != R_X86_64_RELATIVE) { + printf("%s: unsupported relocation type 0x%llx " + "at %p, ", __func__, type, re_src); + printf("offset = 0x%llx\n", re_src->r_offset); + continue; + } + /* Get the location from the relocation entry */ offset_ptr_rom = (Elf64_Addr *)(uintptr_t)re_src->r_offset; @@ -91,6 +100,15 @@ static void do_elf_reloc_fixups32(unsigned int text_base, uintptr_t size, Elf32_Addr *offset_ptr_ram; do { + unsigned int type = ELF32_R_TYPE(re_src->r_info); + + if (type != R_386_RELATIVE) { + printf("%s: unsupported relocation type 0x%x " + "at %p, ", __func__, type, re_src); + printf("offset = 0x%x\n", re_src->r_offset); + continue; + } + /* Get the location from the relocation entry */ offset_ptr_rom = (Elf32_Addr *)(uintptr_t)re_src->r_offset; diff --git a/board/Synology/ds414/cmd_syno.c b/board/Synology/ds414/cmd_syno.c index 34643ff538..59e6fe0310 100644 --- a/board/Synology/ds414/cmd_syno.c +++ b/board/Synology/ds414/cmd_syno.c @@ -14,7 +14,6 @@ #include <asm/io.h> #include "../drivers/ddr/marvell/axp/ddr3_init.h" -#define ETH_ALEN 6 #define ETHADDR_MAX 4 #define SYNO_SN_TAG "SN=" #define SYNO_CHKSUM_TAG "CHK=" diff --git a/board/amlogic/khadas-vim2/Kconfig b/board/amlogic/khadas-vim2/Kconfig new file mode 100644 index 0000000000..d0af36264d --- /dev/null +++ b/board/amlogic/khadas-vim2/Kconfig @@ -0,0 +1,12 @@ +if TARGET_KHADAS_VIM2 + +config SYS_BOARD + default "khadas-vim2" + +config SYS_VENDOR + default "amlogic" + +config SYS_CONFIG_NAME + default "khadas-vim2" + +endif diff --git a/board/amlogic/khadas-vim2/MAINTAINERS b/board/amlogic/khadas-vim2/MAINTAINERS new file mode 100644 index 0000000000..ca63e311c6 --- /dev/null +++ b/board/amlogic/khadas-vim2/MAINTAINERS @@ -0,0 +1,6 @@ +KHADAS-VIM2 +M: Neil Armstrong <narmstrong@baylibre.com> +S: Maintained +F: board/amlogic/khadas-vim2/ +F: include/configs/khadas-vim2.h +F: configs/khadas-vim2_defconfig diff --git a/board/amlogic/khadas-vim2/Makefile b/board/amlogic/khadas-vim2/Makefile new file mode 100644 index 0000000000..4e7c9a0592 --- /dev/null +++ b/board/amlogic/khadas-vim2/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2016 BayLibre, SAS +# Author: Neil Armstrong <narmstrong@baylibre.com> + +obj-y := khadas-vim2.o diff --git a/board/amlogic/khadas-vim2/README b/board/amlogic/khadas-vim2/README new file mode 100644 index 0000000000..578693fd2d --- /dev/null +++ b/board/amlogic/khadas-vim2/README @@ -0,0 +1,103 @@ +U-Boot for Khadas VIM2 +======================= + +Khadas VIM2 is an Open Source DIY Box manufactured by Shenzhen Wesion +Technology Co., Ltd with the following specifications: + + - Amlogic S912 ARM Cortex-A53 octo-core SoC @ 1.5GHz + - ARM Mali T860 GPU + - 2/3GB DDR4 SDRAM + - 10/100/1000 Ethernet + - HDMI 2.0 4K/60Hz display + - 40-pin GPIO header + - 2 x USB 2.0 Host, 1 x USB 2.0 Type-C OTG + - 16GB/32GB/64GB eMMC + - 2MB SPI Flash + - microSD + - SDIO Wifi Module, Bluetooth + - Two channels IR receiver + +Currently the u-boot port supports the following devices: + - serial + - eMMC, microSD + - Ethernet + - I2C + - Regulators + - Reset controller + - Clock controller + - USB Host + - ADC + +U-Boot compilation +================== + + > export ARCH=arm + > export CROSS_COMPILE=aarch64-none-elf- + > make khadas-vim2_defconfig + > make + +Image creation +============== + +Amlogic doesn't provide sources for the firmware and for tools needed +to create the bootloader image, so it is necessary to obtain them from +the git tree published by the board vendor: + + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + > git clone https://github.com/khadas/u-boot -b Vim vim-u-boot + > cd vim-u-boot + > make kvim_defconfig + > make + > export FIPDIR=$PWD/fip + +Go back to mainline U-Boot source tree then : + > mkdir fip + + > cp $FIPDIR/gxl/bl2.bin fip/ + > cp $FIPDIR/gxl/acs.bin fip/ + > cp $FIPDIR/gxl/bl21.bin fip/ + > cp $FIPDIR/gxl/bl30.bin fip/ + > cp $FIPDIR/gxl/bl301.bin fip/ + > cp $FIPDIR/gxl/bl31.img fip/ + > cp u-boot.bin fip/bl33.bin + + > $FIPDIR/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + + > python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 + + > $FIPDIR/blx_fix.sh \ + fip/bl2_acs.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/bl21.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \ + --output fip/u-boot.bin \ + --bl2 fip/bl2.n.bin.sig \ + --bl30 fip/bl30_new.bin.enc \ + --bl31 fip/bl31.img.enc \ + --bl33 fip/bl33.bin.enc + +and then write the image to SD with: + + > DEV=/dev/your_sd_device + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 diff --git a/board/amlogic/khadas-vim2/khadas-vim2.c b/board/amlogic/khadas-vim2/khadas-vim2.c new file mode 100644 index 0000000000..ff56569f17 --- /dev/null +++ b/board/amlogic/khadas-vim2/khadas-vim2.c @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#include <common.h> +#include <dm.h> +#include <environment.h> +#include <asm/io.h> +#include <asm/arch/gx.h> +#include <asm/arch/mem.h> +#include <asm/arch/sm.h> +#include <asm/arch/eth.h> + +#define EFUSE_SN_OFFSET 20 +#define EFUSE_SN_SIZE 16 +#define EFUSE_MAC_OFFSET 52 +#define EFUSE_MAC_SIZE 6 + +int board_init(void) +{ + return 0; +} + +int misc_init_r(void) +{ + u8 mac_addr[EFUSE_MAC_SIZE]; + char serial[EFUSE_SN_SIZE]; + ssize_t len; + + meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, 0); + + /* Reset PHY on GPIOZ_14 */ + clrbits_le32(GX_GPIO_EN(3), BIT(14)); + clrbits_le32(GX_GPIO_OUT(3), BIT(14)); + mdelay(10); + setbits_le32(GX_GPIO_OUT(3), BIT(14)); + + if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { + len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, + mac_addr, EFUSE_MAC_SIZE); + if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr)) + eth_env_set_enetaddr("ethaddr", mac_addr); + } + + if (!env_get("serial#")) { + len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, + EFUSE_SN_SIZE); + if (len == EFUSE_SN_SIZE) + env_set("serial#", serial); + } + + return 0; +} + +int ft_board_setup(void *blob, bd_t *bd) +{ + meson_gx_init_reserved_memory(blob); + + return 0; +} diff --git a/board/armltd/integrator/timer.c b/board/armltd/integrator/timer.c index 3063884014..7ecfa49c70 100644 --- a/board/armltd/integrator/timer.c +++ b/board/armltd/integrator/timer.c @@ -93,31 +93,10 @@ int timer_init (void) /* * timer without interrupts */ -ulong get_timer (ulong base_ticks) -{ - return get_timer_masked () - base_ticks; -} - -/* delay usec useconds */ -void __udelay (unsigned long usec) -{ - ulong tmo, tmp; - - /* Convert to U-Boot ticks */ - tmo = usec * CONFIG_SYS_HZ; - tmo /= (1000000L); - - tmp = get_timer_masked(); /* get current timestamp */ - tmo += tmp; /* form target timestamp */ - - while (get_timer_masked () < tmo) {/* loop till event */ - /*NOP*/; - } -} /* converts the timer reading to U-Boot ticks */ /* the timestamp is the number of ticks since reset */ -ulong get_timer_masked (void) +static ulong get_timer_masked (void) { /* get current count */ unsigned long long now = READ_TIMER; @@ -138,10 +117,26 @@ ulong get_timer_masked (void) return timestamp; } -/* waits specified delay value and resets timestamp */ -void udelay_masked (unsigned long usec) +ulong get_timer (ulong base_ticks) +{ + return get_timer_masked () - base_ticks; +} + +/* delay usec useconds */ +void __udelay (unsigned long usec) { - udelay(usec); + ulong tmo, tmp; + + /* Convert to U-Boot ticks */ + tmo = usec * CONFIG_SYS_HZ; + tmo /= (1000000L); + + tmp = get_timer_masked(); /* get current timestamp */ + tmo += tmp; /* form target timestamp */ + + while (get_timer_masked () < tmo) {/* loop till event */ + /*NOP*/; + } } /* diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c index 3bb5cd667e..0856786a0f 100644 --- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c +++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c @@ -20,6 +20,9 @@ DECLARE_GLOBAL_DATA_PTR; /* * Miscelaneous platform dependent initialisations */ + +void at91_prepare_cpu_var(void); + #ifdef CONFIG_CMD_NAND static void at91sam9x5ek_nand_hw_init(void) { @@ -85,6 +88,7 @@ int board_late_init(void) #ifdef CONFIG_DM_VIDEO at91_video_show_board_info(); #endif + at91_prepare_cpu_var(); return 0; } #endif diff --git a/board/atmel/common/board.c b/board/atmel/common/board.c index 8f9b5e137c..fc300a4210 100644 --- a/board/atmel/common/board.c +++ b/board/atmel/common/board.c @@ -13,6 +13,8 @@ #define AT91_PDA_EEPROM_ID_LENGTH 5 #define AT91_PDA_EEPROM_DEFAULT_BUS 0 +char *get_cpu_name(void); + void dummy(void) { } @@ -66,3 +68,8 @@ void at91_pda_detect(void) { } #endif + +void at91_prepare_cpu_var(void) +{ + env_set("cpu", get_cpu_name()); +} diff --git a/board/atmel/common/video_display.c b/board/atmel/common/video_display.c index 7dd7b85556..c7d3f8addc 100644 --- a/board/atmel/common/video_display.c +++ b/board/atmel/common/video_display.c @@ -18,6 +18,7 @@ DECLARE_GLOBAL_DATA_PTR; int at91_video_show_board_info(void) { + struct vidconsole_priv *priv; ulong dram_size, nand_size; int i; u32 len = 0; @@ -63,7 +64,9 @@ int at91_video_show_board_info(void) if (ret) return ret; - vidconsole_position_cursor(con, 0, logo_info.logo_height); + priv = dev_get_uclass_priv(con); + vidconsole_position_cursor(con, 0, (logo_info.logo_height + + priv->y_charsize - 1) / priv->y_charsize); for (s = buf, i = 0; i < len; s++, i++) vidconsole_put_char(con, *s); diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index e8ec553f99..b0b29b3887 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -49,6 +49,33 @@ DECLARE_GLOBAL_DATA_PTR; #define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K) +#ifdef CONFIG_SPL_BUILD +#include <ns16550.h> +#include <dm/platform_data/spi_davinci.h> + +static const struct ns16550_platdata da850evm_serial = { + .base = DAVINCI_UART2_BASE, + .reg_shift = 2, + .clock = 150000000, + .fcr = UART_FCR_DEFVAL, +}; + +U_BOOT_DEVICE(da850evm_uart) = { + .name = "ns16550_serial", + .platdata = &da850evm_serial, +}; + +static const struct davinci_spi_platdata davinci_spi_data = { + .regs = (struct davinci_spi_regs *)0x01f0e000, + .num_cs = 4, +}; + +U_BOOT_DEVICE(davinci_spi) = { + .name = "davinci_spi", + .platdata = &davinci_spi_data, +}; +#endif + #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH static int get_mac_addr(u8 *addr) { diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c index 40b1a0e631..f16b78cf03 100644 --- a/board/freescale/ls1088a/eth_ls1088aqds.c +++ b/board/freescale/ls1088a/eth_ls1088aqds.c @@ -487,16 +487,16 @@ void ls1088a_handle_phy_interface_sgmii(int dpmac_id) case 0x3A: switch (dpmac_id) { case 1: - wriop_set_phy_address(dpmac_id, riser_phy_addr[1]); + wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[1]); break; case 2: - wriop_set_phy_address(dpmac_id, riser_phy_addr[0]); + wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[0]); break; case 3: - wriop_set_phy_address(dpmac_id, riser_phy_addr[3]); + wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[3]); break; case 7: - wriop_set_phy_address(dpmac_id, riser_phy_addr[2]); + wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[2]); break; default: printf("WRIOP: Wrong DPMAC%d set to SGMII", dpmac_id); @@ -532,13 +532,13 @@ void ls1088a_handle_phy_interface_qsgmii(int dpmac_id) case 4: case 5: case 6: - wriop_set_phy_address(dpmac_id, dpmac_id + 9); + wriop_set_phy_address(dpmac_id, 0, dpmac_id + 9); break; case 7: case 8: case 9: case 10: - wriop_set_phy_address(dpmac_id, dpmac_id + 1); + wriop_set_phy_address(dpmac_id, 0, dpmac_id + 1); break; } @@ -567,7 +567,7 @@ void ls1088a_handle_phy_interface_xsgmii(int i) case 0x15: case 0x1D: case 0x1E: - wriop_set_phy_address(i, i + 26); + wriop_set_phy_address(i, 0, i + 26); ls1088a_qds_enable_SFP_TX(SFP_TX); break; default: @@ -590,13 +590,13 @@ static void ls1088a_handle_phy_interface_rgmii(int dpmac_id) switch (dpmac_id) { case 4: - wriop_set_phy_address(dpmac_id, RGMII_PHY1_ADDR); + wriop_set_phy_address(dpmac_id, 0, RGMII_PHY1_ADDR); dpmac_info[dpmac_id].board_mux = EMI1_RGMII1; bus = mii_dev_for_muxval(EMI1_RGMII1); wriop_set_mdio(dpmac_id, bus); break; case 5: - wriop_set_phy_address(dpmac_id, RGMII_PHY2_ADDR); + wriop_set_phy_address(dpmac_id, 0, RGMII_PHY2_ADDR); dpmac_info[dpmac_id].board_mux = EMI1_RGMII2; bus = mii_dev_for_muxval(EMI1_RGMII2); wriop_set_mdio(dpmac_id, bus); diff --git a/board/freescale/ls1088a/eth_ls1088ardb.c b/board/freescale/ls1088a/eth_ls1088ardb.c index 418f362e9a..a2b52a879b 100644 --- a/board/freescale/ls1088a/eth_ls1088ardb.c +++ b/board/freescale/ls1088a/eth_ls1088ardb.c @@ -55,16 +55,17 @@ int board_eth_init(bd_t *bis) * a MAC has no PHY address, we give a PHY address to XFI * MAC error. */ - wriop_set_phy_address(WRIOP1_DPMAC1, 0x0a); - wriop_set_phy_address(WRIOP1_DPMAC2, AQ_PHY_ADDR1); - wriop_set_phy_address(WRIOP1_DPMAC3, QSGMII1_PORT1_PHY_ADDR); - wriop_set_phy_address(WRIOP1_DPMAC4, QSGMII1_PORT2_PHY_ADDR); - wriop_set_phy_address(WRIOP1_DPMAC5, QSGMII1_PORT3_PHY_ADDR); - wriop_set_phy_address(WRIOP1_DPMAC6, QSGMII1_PORT4_PHY_ADDR); - wriop_set_phy_address(WRIOP1_DPMAC7, QSGMII2_PORT1_PHY_ADDR); - wriop_set_phy_address(WRIOP1_DPMAC8, QSGMII2_PORT2_PHY_ADDR); - wriop_set_phy_address(WRIOP1_DPMAC9, QSGMII2_PORT3_PHY_ADDR); - wriop_set_phy_address(WRIOP1_DPMAC10, QSGMII2_PORT4_PHY_ADDR); + wriop_set_phy_address(WRIOP1_DPMAC1, 0, 0x0a); + wriop_set_phy_address(WRIOP1_DPMAC2, 0, AQ_PHY_ADDR1); + wriop_set_phy_address(WRIOP1_DPMAC3, 0, QSGMII1_PORT1_PHY_ADDR); + wriop_set_phy_address(WRIOP1_DPMAC4, 0, QSGMII1_PORT2_PHY_ADDR); + wriop_set_phy_address(WRIOP1_DPMAC5, 0, QSGMII1_PORT3_PHY_ADDR); + wriop_set_phy_address(WRIOP1_DPMAC6, 0, QSGMII1_PORT4_PHY_ADDR); + wriop_set_phy_address(WRIOP1_DPMAC7, 0, QSGMII2_PORT1_PHY_ADDR); + wriop_set_phy_address(WRIOP1_DPMAC8, 0, QSGMII2_PORT2_PHY_ADDR); + wriop_set_phy_address(WRIOP1_DPMAC9, 0, QSGMII2_PORT3_PHY_ADDR); + wriop_set_phy_address(WRIOP1_DPMAC10, 0, + QSGMII2_PORT4_PHY_ADDR); break; default: diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c index 989d57e09b..f706fd4cb6 100644 --- a/board/freescale/ls2080aqds/eth.c +++ b/board/freescale/ls2080aqds/eth.c @@ -623,7 +623,7 @@ void ls2080a_handle_phy_interface_sgmii(int dpmac_id) switch (++slot) { case 1: /* Slot housing a SGMII riser card? */ - wriop_set_phy_address(dpmac_id, + wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[dpmac_id - 1]); dpmac_info[dpmac_id].board_mux = EMI1_SLOT1; bus = mii_dev_for_muxval(EMI1_SLOT1); @@ -631,7 +631,7 @@ void ls2080a_handle_phy_interface_sgmii(int dpmac_id) break; case 2: /* Slot housing a SGMII riser card? */ - wriop_set_phy_address(dpmac_id, + wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[dpmac_id - 1]); dpmac_info[dpmac_id].board_mux = EMI1_SLOT2; bus = mii_dev_for_muxval(EMI1_SLOT2); @@ -641,18 +641,18 @@ void ls2080a_handle_phy_interface_sgmii(int dpmac_id) if (slot == EMI_NONE) return; if (serdes1_prtcl == 0x39) { - wriop_set_phy_address(dpmac_id, + wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[dpmac_id - 2]); if (dpmac_id >= 6 && hwconfig_f("xqsgmii", env_hwconfig)) - wriop_set_phy_address(dpmac_id, + wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[dpmac_id - 3]); } else { - wriop_set_phy_address(dpmac_id, + wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[dpmac_id - 2]); if (dpmac_id >= 7 && hwconfig_f("xqsgmii", env_hwconfig)) - wriop_set_phy_address(dpmac_id, + wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[dpmac_id - 3]); } dpmac_info[dpmac_id].board_mux = EMI1_SLOT3; @@ -691,7 +691,7 @@ serdes2: break; case 4: /* Slot housing a SGMII riser card? */ - wriop_set_phy_address(dpmac_id, + wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[dpmac_id - 9]); dpmac_info[dpmac_id].board_mux = EMI1_SLOT4; bus = mii_dev_for_muxval(EMI1_SLOT4); @@ -701,14 +701,14 @@ serdes2: if (slot == EMI_NONE) return; if (serdes2_prtcl == 0x47) { - wriop_set_phy_address(dpmac_id, + wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[dpmac_id - 10]); if (dpmac_id >= 14 && hwconfig_f("xqsgmii", env_hwconfig)) - wriop_set_phy_address(dpmac_id, + wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[dpmac_id - 11]); } else { - wriop_set_phy_address(dpmac_id, + wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[dpmac_id - 11]); } dpmac_info[dpmac_id].board_mux = EMI1_SLOT5; @@ -717,7 +717,7 @@ serdes2: break; case 6: /* Slot housing a SGMII riser card? */ - wriop_set_phy_address(dpmac_id, + wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[dpmac_id - 13]); dpmac_info[dpmac_id].board_mux = EMI1_SLOT6; bus = mii_dev_for_muxval(EMI1_SLOT6); @@ -775,7 +775,7 @@ void ls2080a_handle_phy_interface_qsgmii(int dpmac_id) switch (++slot) { case 1: /* Slot housing a QSGMII riser card? */ - wriop_set_phy_address(dpmac_id, dpmac_id - 1); + wriop_set_phy_address(dpmac_id, 0, dpmac_id - 1); dpmac_info[dpmac_id].board_mux = EMI1_SLOT1; bus = mii_dev_for_muxval(EMI1_SLOT1); wriop_set_mdio(dpmac_id, bus); @@ -819,7 +819,7 @@ void ls2080a_handle_phy_interface_xsgmii(int i) * the XAUI card is used for the XFI MAC, which will cause * error. */ - wriop_set_phy_address(i, i + 4); + wriop_set_phy_address(i, 0, i + 4); ls2080a_qds_enable_SFP_TX(SFP_TX); break; diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c b/board/freescale/ls2080ardb/eth_ls2080rdb.c index 45f1d60322..62c7a7a315 100644 --- a/board/freescale/ls2080ardb/eth_ls2080rdb.c +++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c @@ -50,21 +50,21 @@ int board_eth_init(bd_t *bis) switch (srds_s1) { case 0x2A: - wriop_set_phy_address(WRIOP1_DPMAC1, CORTINA_PHY_ADDR1); - wriop_set_phy_address(WRIOP1_DPMAC2, CORTINA_PHY_ADDR2); - wriop_set_phy_address(WRIOP1_DPMAC3, CORTINA_PHY_ADDR3); - wriop_set_phy_address(WRIOP1_DPMAC4, CORTINA_PHY_ADDR4); - wriop_set_phy_address(WRIOP1_DPMAC5, AQ_PHY_ADDR1); - wriop_set_phy_address(WRIOP1_DPMAC6, AQ_PHY_ADDR2); - wriop_set_phy_address(WRIOP1_DPMAC7, AQ_PHY_ADDR3); - wriop_set_phy_address(WRIOP1_DPMAC8, AQ_PHY_ADDR4); + wriop_set_phy_address(WRIOP1_DPMAC1, 0, CORTINA_PHY_ADDR1); + wriop_set_phy_address(WRIOP1_DPMAC2, 0, CORTINA_PHY_ADDR2); + wriop_set_phy_address(WRIOP1_DPMAC3, 0, CORTINA_PHY_ADDR3); + wriop_set_phy_address(WRIOP1_DPMAC4, 0, CORTINA_PHY_ADDR4); + wriop_set_phy_address(WRIOP1_DPMAC5, 0, AQ_PHY_ADDR1); + wriop_set_phy_address(WRIOP1_DPMAC6, 0, AQ_PHY_ADDR2); + wriop_set_phy_address(WRIOP1_DPMAC7, 0, AQ_PHY_ADDR3); + wriop_set_phy_address(WRIOP1_DPMAC8, 0, AQ_PHY_ADDR4); break; case 0x4B: - wriop_set_phy_address(WRIOP1_DPMAC1, CORTINA_PHY_ADDR1); - wriop_set_phy_address(WRIOP1_DPMAC2, CORTINA_PHY_ADDR2); - wriop_set_phy_address(WRIOP1_DPMAC3, CORTINA_PHY_ADDR3); - wriop_set_phy_address(WRIOP1_DPMAC4, CORTINA_PHY_ADDR4); + wriop_set_phy_address(WRIOP1_DPMAC1, 0, CORTINA_PHY_ADDR1); + wriop_set_phy_address(WRIOP1_DPMAC2, 0, CORTINA_PHY_ADDR2); + wriop_set_phy_address(WRIOP1_DPMAC3, 0, CORTINA_PHY_ADDR3); + wriop_set_phy_address(WRIOP1_DPMAC4, 0, CORTINA_PHY_ADDR4); break; default: diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c index 4507b1ed99..691d38fdf2 100644 --- a/board/logicpd/omap3som/omap3logic.c +++ b/board/logicpd/omap3som/omap3logic.c @@ -40,6 +40,22 @@ DECLARE_GLOBAL_DATA_PTR; +#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG1 0x00011203 +#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG2 0x000A1302 +#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG3 0x000F1302 +#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG4 0x0A021303 +#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG5 0x00120F18 +#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG6 0x0A030000 +#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG7 0x00000C50 + +#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG1 0x00011203 +#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG2 0x00091102 +#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG3 0x000D1102 +#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG4 0x09021103 +#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG5 0x00100D15 +#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG6 0x09030000 +#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG7 0x00000C50 + /* This is only needed until SPL gets OF support */ #ifdef CONFIG_SPL_BUILD static const struct ns16550_platdata omap3logic_serial = { @@ -50,7 +66,7 @@ static const struct ns16550_platdata omap3logic_serial = { }; U_BOOT_DEVICE(omap3logic_uart) = { - "ns16550_serial", + "omap_serial", &omap3logic_serial }; @@ -63,7 +79,7 @@ static const struct omap_hsmmc_plat omap3_logic_mmc0_platdata = { .cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, }; -U_BOOT_DEVICE(am335x_mmc0) = { +U_BOOT_DEVICE(omap3_logic_mmc0) = { .name = "omap_hsmmc", .platdata = &omap3_logic_mmc0_platdata, }; @@ -89,11 +105,21 @@ int spl_start_uboot(void) void get_board_mem_timings(struct board_sdrc_timings *timings) { timings->mr = MICRON_V_MR_165; - /* 256MB DDR */ - timings->mcfg = MICRON_V_MCFG_200(256 << 20); - timings->ctrla = MICRON_V_ACTIMA_200; - timings->ctrlb = MICRON_V_ACTIMB_200; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; + + if (get_cpu_family() == CPU_OMAP36XX) { + /* 200 MHz works for OMAP36/DM37 */ + /* 256MB DDR */ + timings->mcfg = MICRON_V_MCFG_200(256 << 20); + timings->ctrla = MICRON_V_ACTIMA_200; + timings->ctrlb = MICRON_V_ACTIMB_200; + timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; + } else { + /* 165 MHz works for OMAP35 */ + timings->mcfg = MICRON_V_MCFG_165(256 << 20); + timings->ctrla = MICRON_V_ACTIMA_165; + timings->ctrlb = MICRON_V_ACTIMB_165; + timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + } } #define GPMC_NAND_COMMAND_0 (OMAP34XX_GPMC_BASE + 0x7c) @@ -138,6 +164,7 @@ void spl_board_prepare_for_linux(void) } #endif +#if !CONFIG_IS_ENABLED(DM_USB) #ifdef CONFIG_USB_MUSB_OMAP2PLUS static struct musb_hdrc_config musb_config = { .multipoint = 1, @@ -191,7 +218,7 @@ int ehci_hcd_stop(int index) } #endif /* CONFIG_USB_EHCI_HCD */ - +#endif /* !DM_USB*/ /* * Routine: misc_init_r * Description: Configure board specific parts @@ -201,13 +228,36 @@ int misc_init_r(void) twl4030_power_init(); omap_die_id_display(); +#if !CONFIG_IS_ENABLED(DM_USB) #ifdef CONFIG_USB_MUSB_OMAP2PLUS musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE); #endif - +#endif return 0; } +#if defined(CONFIG_FLASH_CFI_DRIVER) +static const u32 gpmc_dm37_c2nor_config[] = { + LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG1, + LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG2, + LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG3, + LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG4, + LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG5, + LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG6, + LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG7 +}; + +static const u32 gpmc_omap35_c2nor_config[] = { + LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG1, + LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG2, + LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG3, + LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG4, + LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG5, + LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG6, + LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG7 +}; +#endif + /* * Routine: board_init * Description: Early hardware init. @@ -218,7 +268,16 @@ int board_init(void) /* boot param addr */ gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); - +#if defined(CONFIG_FLASH_CFI_DRIVER) + if (get_cpu_family() == CPU_OMAP36XX) { + /* Enable CS2 for NOR Flash */ + enable_gpmc_cs_config(gpmc_dm37_c2nor_config, &gpmc_cfg->cs[2], + 0x10000000, GPMC_SIZE_64M); + } else { + enable_gpmc_cs_config(gpmc_omap35_c2nor_config, &gpmc_cfg->cs[2], + 0x10000000, GPMC_SIZE_64M); + } +#endif return 0; } diff --git a/board/omicron/calimain/calimain.c b/board/omicron/calimain/calimain.c index 648d191523..6f7b2b8cb1 100644 --- a/board/omicron/calimain/calimain.c +++ b/board/omicron/calimain/calimain.c @@ -22,6 +22,7 @@ #include <asm/arch/pinmux_defs.h> #include <asm/arch/davinci_misc.h> #include <asm/arch/timer_defs.h> +#include "../../../drivers/gpio/da8xx_gpio.h" DECLARE_GLOBAL_DATA_PTR; diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c index 852fdda843..8f3d3915f7 100644 --- a/board/renesas/draak/draak.c +++ b/board/renesas/draak/draak.c @@ -26,48 +26,24 @@ DECLARE_GLOBAL_DATA_PTR; -#define CPGWPCR 0xE6150904 -#define CPGWPR 0xE615090C - -#define CLK2MHZ(clk) (clk / 1000 / 1000) void s_init(void) { - struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE; - struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE; - - /* Watchdog init */ - writel(0xA5A5A500, &rwdt->rwtcsra); - writel(0xA5A5A500, &swdt->swtcsra); - - writel(0xA5A50000, CPGWPCR); - writel(0xFFFFFFFF, CPGWPR); } #define GSX_MSTP112 BIT(12) /* 3DG */ -#define TMU0_MSTP125 BIT(25) /* secure */ -#define TMU1_MSTP124 BIT(24) /* non-secure */ #define SCIF2_MSTP310 BIT(10) /* SCIF2 */ #define DVFS_MSTP926 BIT(26) #define HSUSB_MSTP704 BIT(4) /* HSUSB */ int board_early_init_f(void) { - /* TMU0,1 */ /* which use ? */ - mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124); - #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) /* DVFS for reset */ - mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926); + mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926); #endif return 0; } -/* SYSC */ -/* R/- 32 Power status register 2(3DG) */ -#define SYSC_PWRSR2 0xE6180100 -/* -/W 32 Power resume control register 2 (3DG) */ -#define SYSC_PWRONCR2 0xE618010C - /* HSUSB block registers */ #define HSUSB_REG_LPSTS 0xE6590102 #define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14) @@ -84,7 +60,7 @@ int board_init(void) setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); /* Configure the HSUSB block */ - mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704); + mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704); /* Choice USB0SEL */ clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL, HSUSB_REG_UGCTRL2_USB0SEL_EHCI); diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c index 9317410071..0e5efea19d 100644 --- a/board/renesas/eagle/eagle.c +++ b/board/renesas/eagle/eagle.c @@ -50,17 +50,12 @@ void s_init(void) clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); } -#define TMU0_MSTP125 BIT(25) /* secure */ - int board_early_init_f(void) { /* Unlock CPG access */ writel(0xA5A5FFFF, CPGWPR); writel(0x5A5A0000, CPGWPCR); - /* TMU0 */ - mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); - return 0; } diff --git a/board/renesas/ebisu/ebisu.c b/board/renesas/ebisu/ebisu.c index 248223b444..5d8b79eee3 100644 --- a/board/renesas/ebisu/ebisu.c +++ b/board/renesas/ebisu/ebisu.c @@ -30,13 +30,8 @@ void s_init(void) { } -#define TMU0_MSTP125 BIT(25) /* secure */ - int board_early_init_f(void) { - /* TMU0 */ - mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); - return 0; } diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index 00256bc1a3..8b15267d7b 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -27,48 +27,23 @@ DECLARE_GLOBAL_DATA_PTR; -#define CPGWPCR 0xE6150904 -#define CPGWPR 0xE615090C - -#define CLK2MHZ(clk) (clk / 1000 / 1000) void s_init(void) { - struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE; - struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE; - - /* Watchdog init */ - writel(0xA5A5A500, &rwdt->rwtcsra); - writel(0xA5A5A500, &swdt->swtcsra); - - writel(0xA5A50000, CPGWPCR); - writel(0xFFFFFFFF, CPGWPR); } -#define GSX_MSTP112 BIT(12) /* 3DG */ -#define TMU0_MSTP125 BIT(25) /* secure */ -#define TMU1_MSTP124 BIT(24) /* non-secure */ #define SCIF2_MSTP310 BIT(10) /* SCIF2 */ #define DVFS_MSTP926 BIT(26) #define HSUSB_MSTP704 BIT(4) /* HSUSB */ int board_early_init_f(void) { - /* TMU0,1 */ /* which use ? */ - mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124); - #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) /* DVFS for reset */ - mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926); + mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926); #endif return 0; } -/* SYSC */ -/* R/- 32 Power status register 2(3DG) */ -#define SYSC_PWRSR2 0xE6180100 -/* -/W 32 Power resume control register 2 (3DG) */ -#define SYSC_PWRONCR2 0xE618010C - /* HSUSB block registers */ #define HSUSB_REG_LPSTS 0xE6590102 #define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14) @@ -78,25 +53,14 @@ int board_early_init_f(void) int board_init(void) { - u32 cpu_type = rmobile_get_cpu_type(); - /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; - if (cpu_type == RMOBILE_CPU_TYPE_R8A7795) { - /* GSX: force power and clock supply */ - writel(0x0000001F, SYSC_PWRONCR2); - while (readl(SYSC_PWRSR2) != 0x000003E0) - mdelay(20); - - mstp_clrbits_le32(MSTPSR1, SMSTPCR1, GSX_MSTP112); - } - /* USB1 pull-up */ setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); /* Configure the HSUSB block */ - mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704); + mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704); /* Choice USB0SEL */ clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL, HSUSB_REG_UGCTRL2_USB0SEL_EHCI); diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c index 213e869ebe..63550af1f0 100644 --- a/board/renesas/ulcb/ulcb.c +++ b/board/renesas/ulcb/ulcb.c @@ -26,48 +26,24 @@ DECLARE_GLOBAL_DATA_PTR; -#define CPGWPCR 0xE6150904 -#define CPGWPR 0xE615090C - -#define CLK2MHZ(clk) (clk / 1000 / 1000) void s_init(void) { - struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE; - struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE; - - /* Watchdog init */ - writel(0xA5A5A500, &rwdt->rwtcsra); - writel(0xA5A5A500, &swdt->swtcsra); - - writel(0xA5A50000, CPGWPCR); - writel(0xFFFFFFFF, CPGWPR); } #define GSX_MSTP112 BIT(12) /* 3DG */ -#define TMU0_MSTP125 BIT(25) /* secure */ -#define TMU1_MSTP124 BIT(24) /* non-secure */ #define SCIF2_MSTP310 BIT(10) /* SCIF2 */ #define DVFS_MSTP926 BIT(26) #define HSUSB_MSTP704 BIT(4) /* HSUSB */ int board_early_init_f(void) { - /* TMU0,1 */ /* which use ? */ - mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124); - #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) /* DVFS for reset */ - mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926); + mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926); #endif return 0; } -/* SYSC */ -/* R/- 32 Power status register 2(3DG) */ -#define SYSC_PWRSR2 0xE6180100 -/* -/W 32 Power resume control register 2 (3DG) */ -#define SYSC_PWRONCR2 0xE618010C - /* HSUSB block registers */ #define HSUSB_REG_LPSTS 0xE6590102 #define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14) @@ -84,7 +60,7 @@ int board_init(void) setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); /* Configure the HSUSB block */ - mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704); + mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704); /* Choice USB0SEL */ clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL, HSUSB_REG_UGCTRL2_USB0SEL_EHCI); diff --git a/board/samsung/common/exynos5-dt-types.c b/board/samsung/common/exynos5-dt-types.c index 4473968db6..7a86e91877 100644 --- a/board/samsung/common/exynos5-dt-types.c +++ b/board/samsung/common/exynos5-dt-types.c @@ -24,14 +24,15 @@ static const struct udevice_id board_ids[] = { }; /** - * Odroix XU3/XU4/HC1 board revisions (from HC1_MAIN_REV0.1_20170630.pdf): + * Odroix XU3/XU4/HC1/HC2 board revisions (from HC1+_HC2_MAIN_REV0.1_20171017.pdf): * Rev ADCmax Board * 0.1 0 XU3 0.1 * 0.2 372 XU3 0.2 | XU3L - no DISPLAYPORT (probe I2C0:0x40 / INA231) * 0.3 1280 XU4 0.1 * 0.4 739 XU4 0.2 * 0.5 1016 XU4+Air0.1 (Passive cooling) - * 0.6 1308 XU4S 0.1 (HC1) + * 0.6 1309 XU4-HC1 0.1 + * 0.7 1470 XU4-HC1+ 0.1 (HC2) * Use +1% for ADC value tolerance in the array below, the code loops until * the measured ADC value is lower than then ADCmax from the array. */ @@ -39,7 +40,8 @@ struct odroid_rev_info odroid_info[] = { { EXYNOS5_BOARD_ODROID_XU3_REV01, 1, 10, "xu3" }, { EXYNOS5_BOARD_ODROID_XU3_REV02, 2, 375, "xu3" }, { EXYNOS5_BOARD_ODROID_XU4_REV01, 1, 1293, "xu4" }, - { EXYNOS5_BOARD_ODROID_HC1_REV01, 1, 1321, "hc1" }, + { EXYNOS5_BOARD_ODROID_HC1_REV01, 1, 1322, "hc1" }, + { EXYNOS5_BOARD_ODROID_HC2_REV01, 1, 1484, "hc1" }, { EXYNOS5_BOARD_ODROID_UNKNOWN, 0, 4095, "unknown" }, }; @@ -144,6 +146,14 @@ bool board_is_odroidhc1(void) return false; } +bool board_is_odroidhc2(void) +{ + if (gd->board_type == EXYNOS5_BOARD_ODROID_HC2_REV01) + return true; + + return false; +} + bool board_is_generic(void) { if (gd->board_type == EXYNOS5_BOARD_GENERIC) diff --git a/board/samsung/common/exynos5-dt.c b/board/samsung/common/exynos5-dt.c index 8c3a9ea564..c183965b92 100644 --- a/board/samsung/common/exynos5-dt.c +++ b/board/samsung/common/exynos5-dt.c @@ -179,7 +179,7 @@ char *get_dfu_alt_system(char *interface, char *devstr) { char *info = "Not supported!"; - if (board_is_odroidxu4() || board_is_odroidhc1()) + if (board_is_odroidxu4() || board_is_odroidhc1() || board_is_odroidhc2()) return info; return env_get("dfu_alt_system"); @@ -192,7 +192,7 @@ char *get_dfu_alt_boot(char *interface, char *devstr) char *alt_boot; int dev_num; - if (board_is_odroidxu4() || board_is_odroidhc1()) + if (board_is_odroidxu4() || board_is_odroidhc1() || board_is_odroidhc2()) return info; dev_num = simple_strtoul(devstr, NULL, 10); diff --git a/board/synopsys/axs10x/axs10x.c b/board/synopsys/axs10x/axs10x.c index af78127dde..c95f7af7a7 100644 --- a/board/synopsys/axs10x/axs10x.c +++ b/board/synopsys/axs10x/axs10x.c @@ -33,6 +33,13 @@ int board_mmc_init(bd_t *bis) return 0; } +int board_mmc_getcd(struct mmc *mmc) +{ + struct dwmci_host *host = mmc->priv; + + return !(dwmci_readl(host, DWMCI_CDETECT) & 1); +} + #define AXS_MB_CREG 0xE0011000 int board_early_init_f(void) diff --git a/board/synopsys/emdk/emdk.c b/board/synopsys/emdk/emdk.c index bbb946a700..79cafefb8b 100644 --- a/board/synopsys/emdk/emdk.c +++ b/board/synopsys/emdk/emdk.c @@ -34,6 +34,13 @@ int board_mmc_init(bd_t *bis) return 0; } +int board_mmc_getcd(struct mmc *mmc) +{ + struct dwmci_host *host = mmc->priv; + + return !(dwmci_readl(host, DWMCI_CDETECT) & 1); +} + #define CREG_BASE 0xF0001000 #define CREG_BOOT_OFFSET 0 #define CREG_BOOT_WP_OFFSET 8 diff --git a/board/synopsys/hsdk/hsdk.c b/board/synopsys/hsdk/hsdk.c index fb4286f71b..b6aefdbe6d 100644 --- a/board/synopsys/hsdk/hsdk.c +++ b/board/synopsys/hsdk/hsdk.c @@ -1019,6 +1019,13 @@ int board_late_init(void) return 0; } +int board_mmc_getcd(struct mmc *mmc) +{ + struct dwmci_host *host = mmc->priv; + + return !(dwmci_readl(host, DWMCI_CDETECT) & 1); +} + int board_mmc_init(bd_t *bis) { struct dwmci_host *host = NULL; @@ -1046,3 +1053,11 @@ int board_mmc_init(bd_t *bis) return 0; } + +#ifdef CONFIG_DISPLAY_CPUINFO +int print_cpuinfo(void) +{ + printf("CPU: ARC HS38 v2.1c\n"); + return 0; +} +#endif /* CONFIG_DISPLAY_CPUINFO */ diff --git a/board/synopsys/iot_devkit/iot_devkit.c b/board/synopsys/iot_devkit/iot_devkit.c index c185d5cdb5..f8838fb3ce 100644 --- a/board/synopsys/iot_devkit/iot_devkit.c +++ b/board/synopsys/iot_devkit/iot_devkit.c @@ -17,6 +17,7 @@ DECLARE_GLOBAL_DATA_PTR; #define AHBCKDIV (void *)(SYSCON_BASE + 0x04) #define APBCKDIV (void *)(SYSCON_BASE + 0x08) #define APBCKEN (void *)(SYSCON_BASE + 0x0C) +#define RESET_REG (void *)(SYSCON_BASE + 0x18) #define CLKSEL (void *)(SYSCON_BASE + 0x24) #define CLKSTAT (void *)(SYSCON_BASE + 0x28) #define PLLCON (void *)(SYSCON_BASE + 0x2C) @@ -67,6 +68,14 @@ static int set_cpu_freq(unsigned int clk) writel((readl(PLLCON) & PLL_MASK_2) | 0x200191, PLLCON); break; + case 136: + writel(readl(PLLCON) & PLL_MASK_0, PLLCON); + /* pll_off=1, M=17, N=1, OD=1, PLL_OUT_CLK=136M */ + writel((readl(PLLCON) & PLL_MASK_1) | 0x100111, PLLCON); + /* pll_off=0, M=17, N=1, OD=1, PLL_OUT_CLK=136M */ + writel((readl(PLLCON) & PLL_MASK_2) | 0x100111, PLLCON); + break; + case 144: writel(readl(PLLCON) & PLL_MASK_0, PLLCON); /* pll_off=1, M=18, N=1, OD=1, PLL_OUT_CLK=144M */ @@ -99,7 +108,7 @@ extern u8 __ram_end[]; */ int mach_cpu_init(void) { - int offset, freq; + int offset; /* Don't relocate U-Boot */ gd->flags |= GD_FLG_SKIP_RELOC; @@ -120,12 +129,12 @@ int mach_cpu_init(void) if (offset < 0) return offset; - freq = fdtdec_get_int(gd->fdt_blob, offset, "clock-frequency", 0); - if (!freq) + gd->cpu_clk = fdtdec_get_int(gd->fdt_blob, offset, "clock-frequency", 0); + if (!gd->cpu_clk) return -EINVAL; /* If CPU freq > 100 MHz, divide eFLASH clock by 2 */ - if (freq > 100000000) { + if (gd->cpu_clk > 100000000) { u32 reg = readl(AHBCKDIV); reg &= ~(0xF << 8); @@ -133,7 +142,7 @@ int mach_cpu_init(void) writel(reg, AHBCKDIV); } - return set_cpu_freq(freq); + return set_cpu_freq(gd->cpu_clk); } #define ARC_PERIPHERAL_BASE 0xF0000000 @@ -161,8 +170,32 @@ int board_mmc_init(bd_t *bis) return 0; } +int board_mmc_getcd(struct mmc *mmc) +{ + struct dwmci_host *host = mmc->priv; + + return !(dwmci_readl(host, DWMCI_CDETECT) & 1); +} + +#define IOTDK_RESET_SEQ 0x55AA6699 + +void reset_cpu(ulong addr) +{ + writel(IOTDK_RESET_SEQ, RESET_REG); +} + int checkboard(void) { puts("Board: Synopsys IoT Development Kit\n"); return 0; }; + +#ifdef CONFIG_DISPLAY_CPUINFO +int print_cpuinfo(void) +{ + char mhz[8]; + + printf("CPU: ARC EM9D at %s MHz\n", strmhz(mhz, gd->cpu_clk)); + return 0; +} +#endif /* CONFIG_DISPLAY_CPUINFO */ diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c index 274f18e942..d81c8e621f 100644 --- a/board/ti/ks2_evm/board.c +++ b/board/ti/ks2_evm/board.c @@ -146,14 +146,10 @@ int ft_board_setup(void *blob, bd_t *bd) int nbanks; u64 size[2]; u64 start[2]; - int nodeoffset; u32 ddr3a_size; - int unitrd_fixup = 0; env = env_get("mem_lpae"); lpae = env && simple_strtol(env, NULL, 0); - env = env_get("uinitrd_fixup"); - unitrd_fixup = env && simple_strtol(env, NULL, 0); ddr3a_size = 0; if (lpae) { @@ -191,24 +187,41 @@ int ft_board_setup(void *blob, bd_t *bd) fdt_fixup_memory_banks(blob, start, size, nbanks); + return 0; +} + +void ft_board_setup_ex(void *blob, bd_t *bd) +{ + int lpae; + u64 size; + char *env; + u64 *reserve_start; + int unitrd_fixup = 0; + + env = env_get("mem_lpae"); + lpae = env && simple_strtol(env, NULL, 0); + env = env_get("uinitrd_fixup"); + unitrd_fixup = env && simple_strtol(env, NULL, 0); + /* Fix up the initrd */ if (lpae && unitrd_fixup) { + int nodeoffset; int err; - u32 *prop1, *prop2; + u64 *prop1, *prop2; u64 initrd_start, initrd_end; nodeoffset = fdt_path_offset(blob, "/chosen"); if (nodeoffset >= 0) { - prop1 = (u32 *)fdt_getprop(blob, nodeoffset, + prop1 = (u64 *)fdt_getprop(blob, nodeoffset, "linux,initrd-start", NULL); - prop2 = (u32 *)fdt_getprop(blob, nodeoffset, + prop2 = (u64 *)fdt_getprop(blob, nodeoffset, "linux,initrd-end", NULL); if (prop1 && prop2) { - initrd_start = __be32_to_cpu(*prop1); + initrd_start = __be64_to_cpu(*prop1); initrd_start -= CONFIG_SYS_SDRAM_BASE; initrd_start += CONFIG_SYS_LPAE_SDRAM_BASE; initrd_start = __cpu_to_be64(initrd_start); - initrd_end = __be32_to_cpu(*prop2); + initrd_end = __be64_to_cpu(*prop2); initrd_end -= CONFIG_SYS_SDRAM_BASE; initrd_end += CONFIG_SYS_LPAE_SDRAM_BASE; initrd_end = __cpu_to_be64(initrd_end); @@ -240,19 +253,6 @@ int ft_board_setup(void *blob, bd_t *bd) } } - return 0; -} - -void ft_board_setup_ex(void *blob, bd_t *bd) -{ - int lpae; - u64 size; - char *env; - u64 *reserve_start; - - env = env_get("mem_lpae"); - lpae = env && simple_strtol(env, NULL, 0); - if (lpae) { /* * the initrd and other reserved memory areas are diff --git a/board/timll/devkit3250/Kconfig b/board/timll/devkit3250/Kconfig index e3bd4569d6..5129c2dcae 100644 --- a/board/timll/devkit3250/Kconfig +++ b/board/timll/devkit3250/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "timll" -config SYS_SOC - default "lpc32xx" - config SYS_CONFIG_NAME default "devkit3250" diff --git a/board/work-microwave/work_92105/Kconfig b/board/work-microwave/work_92105/Kconfig index 4bc34ed01f..32632f5ab5 100644 --- a/board/work-microwave/work_92105/Kconfig +++ b/board/work-microwave/work_92105/Kconfig @@ -6,9 +6,6 @@ config SYS_BOARD config SYS_VENDOR default "work-microwave" -config SYS_SOC - default "lpc32xx" - config SYS_CONFIG_NAME default "work_92105" diff --git a/board/xilinx/versal/MAINTAINERS b/board/xilinx/versal/MAINTAINERS new file mode 100644 index 0000000000..2d2b808245 --- /dev/null +++ b/board/xilinx/versal/MAINTAINERS @@ -0,0 +1,7 @@ +XILINX_VERSAL BOARDS +M: Michal Simek <michal.simek@xilinx.com> +S: Maintained +F: arch/arm/dts/versal* +F: board/xilinx/versal/ +F: include/configs/xilinx_versal* +F: configs/xilinx_versal* diff --git a/board/xilinx/versal/Makefile b/board/xilinx/versal/Makefile new file mode 100644 index 0000000000..2b812765ee --- /dev/null +++ b/board/xilinx/versal/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2016 - 2018 Xilinx, Inc. +# Michal Simek <michal.simek@xilinx.com> +# + +obj-y := board.o diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c new file mode 100644 index 0000000000..2b3a40b73a --- /dev/null +++ b/board/xilinx/versal/board.c @@ -0,0 +1,81 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2014 - 2018 Xilinx, Inc. + * Michal Simek <michal.simek@xilinx.com> + */ + +#include <common.h> +#include <fdtdec.h> +#include <malloc.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + printf("EL Level:\tEL%d\n", current_el()); + + return 0; +} + +int board_early_init_r(void) +{ + if (current_el() == 3) { + u32 val; + + writel(IOU_SWITCH_CTRL_CLKACT_BIT | + (0x20 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT), + &crlapb_base->iou_switch_ctrl); + + /* Global timer init - Program time stamp reference clk */ + val = readl(&crlapb_base->timestamp_ref_ctrl); + val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT; + writel(val, &crlapb_base->timestamp_ref_ctrl); + + debug("ref ctrl 0x%x\n", + readl(&crlapb_base->timestamp_ref_ctrl)); + + /* Clear reset of timestamp reg */ + writel(0, &crlapb_base->rst_timestamp); + + /* + * Program freq register in System counter and + * enable system counter. + */ + writel(COUNTER_FREQUENCY, + &iou_scntr_secure->base_frequency_id_register); + + debug("counter val 0x%x\n", + readl(&iou_scntr_secure->base_frequency_id_register)); + + writel(IOU_SCNTRS_CONTROL_EN, + &iou_scntr_secure->counter_control_register); + + debug("scntrs control 0x%x\n", + readl(&iou_scntr_secure->counter_control_register)); + debug("timer 0x%llx\n", get_ticks()); + debug("timer 0x%llx\n", get_ticks()); + } + + return 0; +} + +int dram_init_banksize(void) +{ + fdtdec_setup_memory_banksize(); + + return 0; +} + +int dram_init(void) +{ + if (fdtdec_setup_mem_size_base() != 0) + return -EINVAL; + + return 0; +} + +void reset_cpu(ulong addr) +{ +} diff --git a/board/xilinx/zynq/zynq-dlc20-rev1.0/ps7_init_gpl.c b/board/xilinx/zynq/zynq-dlc20-rev1.0/ps7_init_gpl.c new file mode 100644 index 0000000000..5366956e5b --- /dev/null +++ b/board/xilinx/zynq/zynq-dlc20-rev1.0/ps7_init_gpl.c @@ -0,0 +1,280 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved. + */ + +#include <asm/arch/ps7_init_gpl.h> + +static unsigned long ps7_pll_init_data_3_0[] = { + EMIT_WRITE(0xF8000008, 0x0000DF0DU), + EMIT_MASKWRITE(0xF8000110, 0x003FFFF0U, 0x000FA220U), + EMIT_MASKWRITE(0xF8000100, 0x0007F000U, 0x00028000U), + EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000010U), + EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000001U), + EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000000U), + EMIT_MASKPOLL(0xF800010C, 0x00000001U), + EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000000U), + EMIT_MASKWRITE(0xF8000120, 0x1F003F30U, 0x1F000200U), + EMIT_MASKWRITE(0xF8000114, 0x003FFFF0U, 0x0012C220U), + EMIT_MASKWRITE(0xF8000104, 0x0007F000U, 0x00020000U), + EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000010U), + EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000001U), + EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000000U), + EMIT_MASKPOLL(0xF800010C, 0x00000002U), + EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000000U), + EMIT_MASKWRITE(0xF8000124, 0xFFF00003U, 0x0C200003U), + EMIT_MASKWRITE(0xF8000118, 0x003FFFF0U, 0x001452C0U), + EMIT_MASKWRITE(0xF8000108, 0x0007F000U, 0x0001E000U), + EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000010U), + EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000001U), + EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000000U), + EMIT_MASKPOLL(0xF800010C, 0x00000004U), + EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000000U), + EMIT_WRITE(0xF8000004, 0x0000767BU), + EMIT_EXIT(), +}; + +static unsigned long ps7_clock_init_data_3_0[] = { + EMIT_WRITE(0xF8000008, 0x0000DF0DU), + EMIT_MASKWRITE(0xF8000128, 0x03F03F01U, 0x00700F01U), + EMIT_MASKWRITE(0xF8000138, 0x00000011U, 0x00000001U), + EMIT_MASKWRITE(0xF8000140, 0x03F03F71U, 0x00100801U), + EMIT_MASKWRITE(0xF800014C, 0x00003F31U, 0x00000501U), + EMIT_MASKWRITE(0xF8000150, 0x00003F33U, 0x00000A01U), + EMIT_MASKWRITE(0xF8000154, 0x00003F33U, 0x00000A02U), + EMIT_MASKWRITE(0xF8000168, 0x00003F31U, 0x00000501U), + EMIT_MASKWRITE(0xF8000170, 0x03F03F30U, 0x00200500U), + EMIT_MASKWRITE(0xF80001C4, 0x00000001U, 0x00000001U), + EMIT_MASKWRITE(0xF800012C, 0x01FFCCCDU, 0x01EC044DU), + EMIT_WRITE(0xF8000004, 0x0000767BU), + EMIT_EXIT(), +}; + +static unsigned long ps7_ddr_init_data_3_0[] = { + EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000080U), + EMIT_MASKWRITE(0xF8006004, 0x0007FFFFU, 0x00001081U), + EMIT_MASKWRITE(0xF8006008, 0x03FFFFFFU, 0x03C0780FU), + EMIT_MASKWRITE(0xF800600C, 0x03FFFFFFU, 0x02001001U), + EMIT_MASKWRITE(0xF8006010, 0x03FFFFFFU, 0x00014001U), + EMIT_MASKWRITE(0xF8006014, 0x001FFFFFU, 0x0004159AU), + EMIT_MASKWRITE(0xF8006018, 0xF7FFFFFFU, 0x44E458D2U), + EMIT_MASKWRITE(0xF800601C, 0xFFFFFFFFU, 0x720238E5U), + EMIT_MASKWRITE(0xF8006020, 0x7FDFFFFCU, 0x270872D0U), + EMIT_MASKWRITE(0xF8006024, 0x0FFFFFC3U, 0x00000000U), + EMIT_MASKWRITE(0xF8006028, 0x00003FFFU, 0x00002007U), + EMIT_MASKWRITE(0xF800602C, 0xFFFFFFFFU, 0x00000008U), + EMIT_MASKWRITE(0xF8006030, 0xFFFFFFFFU, 0x00040930U), + EMIT_MASKWRITE(0xF8006034, 0x13FF3FFFU, 0x000116D4U), + EMIT_MASKWRITE(0xF8006038, 0x00000003U, 0x00000000U), + EMIT_MASKWRITE(0xF800603C, 0x000FFFFFU, 0x00000777U), + EMIT_MASKWRITE(0xF8006040, 0xFFFFFFFFU, 0xFFF00000U), + EMIT_MASKWRITE(0xF8006044, 0x0FFFFFFFU, 0x0FF66666U), + EMIT_MASKWRITE(0xF8006048, 0x0003F03FU, 0x0003C008U), + EMIT_MASKWRITE(0xF8006050, 0xFF0F8FFFU, 0x77010800U), + EMIT_MASKWRITE(0xF8006058, 0x00010000U, 0x00000000U), + EMIT_MASKWRITE(0xF800605C, 0x0000FFFFU, 0x00005003U), + EMIT_MASKWRITE(0xF8006060, 0x000017FFU, 0x0000003EU), + EMIT_MASKWRITE(0xF8006064, 0x00021FE0U, 0x00020000U), + EMIT_MASKWRITE(0xF8006068, 0x03FFFFFFU, 0x00284141U), + EMIT_MASKWRITE(0xF800606C, 0x0000FFFFU, 0x00001610U), + EMIT_MASKWRITE(0xF8006078, 0x03FFFFFFU, 0x00466111U), + EMIT_MASKWRITE(0xF800607C, 0x000FFFFFU, 0x00032222U), + EMIT_MASKWRITE(0xF80060A4, 0xFFFFFFFFU, 0x10200802U), + EMIT_MASKWRITE(0xF80060A8, 0x0FFFFFFFU, 0x0690CB73U), + EMIT_MASKWRITE(0xF80060AC, 0x000001FFU, 0x000001FEU), + EMIT_MASKWRITE(0xF80060B0, 0x1FFFFFFFU, 0x1CFFFFFFU), + EMIT_MASKWRITE(0xF80060B4, 0x00000200U, 0x00000200U), + EMIT_MASKWRITE(0xF80060B8, 0x01FFFFFFU, 0x00200066U), + EMIT_MASKWRITE(0xF80060C4, 0x00000003U, 0x00000000U), + EMIT_MASKWRITE(0xF80060C8, 0x000000FFU, 0x00000000U), + EMIT_MASKWRITE(0xF80060DC, 0x00000001U, 0x00000000U), + EMIT_MASKWRITE(0xF80060F0, 0x0000FFFFU, 0x00000000U), + EMIT_MASKWRITE(0xF80060F4, 0x0000000FU, 0x00000008U), + EMIT_MASKWRITE(0xF8006114, 0x000000FFU, 0x00000000U), + EMIT_MASKWRITE(0xF8006118, 0x7FFFFFCFU, 0x40000001U), + EMIT_MASKWRITE(0xF800611C, 0x7FFFFFCFU, 0x40000001U), + EMIT_MASKWRITE(0xF8006120, 0x7FFFFFCFU, 0x40000001U), + EMIT_MASKWRITE(0xF8006124, 0x7FFFFFCFU, 0x40000001U), + EMIT_MASKWRITE(0xF800612C, 0x000FFFFFU, 0x00029000U), + EMIT_MASKWRITE(0xF8006130, 0x000FFFFFU, 0x00029000U), + EMIT_MASKWRITE(0xF8006134, 0x000FFFFFU, 0x00029000U), + EMIT_MASKWRITE(0xF8006138, 0x000FFFFFU, 0x00029000U), + EMIT_MASKWRITE(0xF8006140, 0x000FFFFFU, 0x00000035U), + EMIT_MASKWRITE(0xF8006144, 0x000FFFFFU, 0x00000035U), + EMIT_MASKWRITE(0xF8006148, 0x000FFFFFU, 0x00000035U), + EMIT_MASKWRITE(0xF800614C, 0x000FFFFFU, 0x00000035U), + EMIT_MASKWRITE(0xF8006154, 0x000FFFFFU, 0x00000080U), + EMIT_MASKWRITE(0xF8006158, 0x000FFFFFU, 0x00000080U), + EMIT_MASKWRITE(0xF800615C, 0x000FFFFFU, 0x00000080U), + EMIT_MASKWRITE(0xF8006160, 0x000FFFFFU, 0x00000080U), + EMIT_MASKWRITE(0xF8006168, 0x001FFFFFU, 0x000000F9U), + EMIT_MASKWRITE(0xF800616C, 0x001FFFFFU, 0x000000F9U), + EMIT_MASKWRITE(0xF8006170, 0x001FFFFFU, 0x000000F9U), + EMIT_MASKWRITE(0xF8006174, 0x001FFFFFU, 0x000000F9U), + EMIT_MASKWRITE(0xF800617C, 0x000FFFFFU, 0x000000C0U), + EMIT_MASKWRITE(0xF8006180, 0x000FFFFFU, 0x000000C0U), + EMIT_MASKWRITE(0xF8006184, 0x000FFFFFU, 0x000000C0U), + EMIT_MASKWRITE(0xF8006188, 0x000FFFFFU, 0x000000C0U), + EMIT_MASKWRITE(0xF8006190, 0x6FFFFEFEU, 0x00040080U), + EMIT_MASKWRITE(0xF8006194, 0x000FFFFFU, 0x0001FC82U), + EMIT_MASKWRITE(0xF8006204, 0xFFFFFFFFU, 0x00000000U), + EMIT_MASKWRITE(0xF8006208, 0x000703FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF800620C, 0x000703FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF8006210, 0x000703FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF8006214, 0x000703FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF8006218, 0x000F03FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF800621C, 0x000F03FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF8006220, 0x000F03FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF8006224, 0x000F03FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF80062A8, 0x00000FF5U, 0x00000000U), + EMIT_MASKWRITE(0xF80062AC, 0xFFFFFFFFU, 0x00000000U), + EMIT_MASKWRITE(0xF80062B0, 0x003FFFFFU, 0x00005125U), + EMIT_MASKWRITE(0xF80062B4, 0x0003FFFFU, 0x000012A8U), + EMIT_MASKPOLL(0xF8000B74, 0x00002000U), + EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000081U), + EMIT_MASKPOLL(0xF8006054, 0x00000007U), + EMIT_EXIT(), +}; + +static unsigned long ps7_mio_init_data_3_0[] = { + EMIT_WRITE(0xF8000008, 0x0000DF0DU), + EMIT_MASKWRITE(0xF8000B40, 0x00000FFFU, 0x00000600U), + EMIT_MASKWRITE(0xF8000B44, 0x00000FFFU, 0x00000600U), + EMIT_MASKWRITE(0xF8000B48, 0x00000FFFU, 0x00000672U), + EMIT_MASKWRITE(0xF8000B4C, 0x00000FFFU, 0x00000672U), + EMIT_MASKWRITE(0xF8000B50, 0x00000FFFU, 0x00000674U), + EMIT_MASKWRITE(0xF8000B54, 0x00000FFFU, 0x00000674U), + EMIT_MASKWRITE(0xF8000B58, 0x00000FFFU, 0x00000600U), + EMIT_MASKWRITE(0xF8000B5C, 0xFFFFFFFFU, 0x0018C068U), + EMIT_MASKWRITE(0xF8000B60, 0xFFFFFFFFU, 0x00F98068U), + EMIT_MASKWRITE(0xF8000B64, 0xFFFFFFFFU, 0x00F98068U), + EMIT_MASKWRITE(0xF8000B68, 0xFFFFFFFFU, 0x00F98068U), + EMIT_MASKWRITE(0xF8000B6C, 0x00007FFFU, 0x00000260U), + EMIT_MASKWRITE(0xF8000B70, 0x00000001U, 0x00000001U), + EMIT_MASKWRITE(0xF8000B70, 0x00000021U, 0x00000020U), + EMIT_MASKWRITE(0xF8000B70, 0x07FEFFFFU, 0x00000823U), + EMIT_MASKWRITE(0xF8000700, 0x00003FFFU, 0x00001200U), + EMIT_MASKWRITE(0xF8000704, 0x00003FFFU, 0x00001202U), + EMIT_MASKWRITE(0xF8000708, 0x00003FFFU, 0x00000202U), + EMIT_MASKWRITE(0xF800070C, 0x00003FFFU, 0x00000202U), + EMIT_MASKWRITE(0xF8000710, 0x00003FFFU, 0x00000202U), + EMIT_MASKWRITE(0xF8000714, 0x00003FFFU, 0x00000202U), + EMIT_MASKWRITE(0xF8000718, 0x00003FFFU, 0x00000202U), + EMIT_MASKWRITE(0xF800071C, 0x00003FFFU, 0x00000200U), + EMIT_MASKWRITE(0xF8000720, 0x00003FFFU, 0x000002E0U), + EMIT_MASKWRITE(0xF8000724, 0x00003FFFU, 0x000012E1U), + EMIT_MASKWRITE(0xF8000728, 0x00003FFFU, 0x00001200U), + EMIT_MASKWRITE(0xF800072C, 0x00003FFFU, 0x00001200U), + EMIT_MASKWRITE(0xF8000730, 0x00003FFFU, 0x00001200U), + EMIT_MASKWRITE(0xF8000734, 0x00003FFFU, 0x00001200U), + EMIT_MASKWRITE(0xF8000738, 0x00003FFFU, 0x00001240U), + EMIT_MASKWRITE(0xF800073C, 0x00003FFFU, 0x00001240U), + EMIT_MASKWRITE(0xF8000740, 0x00003FFFU, 0x00001202U), + EMIT_MASKWRITE(0xF8000744, 0x00003FFFU, 0x00001202U), + EMIT_MASKWRITE(0xF8000748, 0x00003FFFU, 0x00001202U), + EMIT_MASKWRITE(0xF800074C, 0x00003FFFU, 0x00001202U), + EMIT_MASKWRITE(0xF8000750, 0x00003FFFU, 0x00001202U), + EMIT_MASKWRITE(0xF8000754, 0x00003FFFU, 0x00001202U), + EMIT_MASKWRITE(0xF8000758, 0x00003FFFU, 0x00001203U), + EMIT_MASKWRITE(0xF800075C, 0x00003FFFU, 0x00001203U), + EMIT_MASKWRITE(0xF8000760, 0x00003FFFU, 0x00001203U), + EMIT_MASKWRITE(0xF8000764, 0x00003FFFU, 0x00001203U), + EMIT_MASKWRITE(0xF8000768, 0x00003FFFU, 0x00001203U), + EMIT_MASKWRITE(0xF800076C, 0x00003FFFU, 0x00001203U), + EMIT_MASKWRITE(0xF8000770, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF8000774, 0x00003FFFU, 0x00001205U), + EMIT_MASKWRITE(0xF8000778, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF800077C, 0x00003FFFU, 0x00001205U), + EMIT_MASKWRITE(0xF8000780, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF8000784, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF8000788, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF800078C, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF8000790, 0x00003FFFU, 0x00001205U), + EMIT_MASKWRITE(0xF8000794, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF8000798, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF800079C, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF80007A0, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007A4, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007A8, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007AC, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007B0, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007B4, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007B8, 0x00003F01U, 0x00001201U), + EMIT_MASKWRITE(0xF80007BC, 0x00003F01U, 0x00001201U), + EMIT_MASKWRITE(0xF80007C0, 0x00003FFFU, 0x00001200U), + EMIT_MASKWRITE(0xF80007C4, 0x00003FFFU, 0x00001200U), + EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00001218U), + EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00001200U), + EMIT_MASKWRITE(0xF80007D0, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007D4, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF8000830, 0x003F003FU, 0x002E002FU), + EMIT_WRITE(0xF8000004, 0x0000767BU), + EMIT_EXIT(), +}; + +static unsigned long ps7_peripherals_init_data_3_0[] = { + EMIT_WRITE(0xF8000008, 0x0000DF0DU), + EMIT_MASKWRITE(0xF8000B48, 0x00000180U, 0x00000180U), + EMIT_MASKWRITE(0xF8000B4C, 0x00000180U, 0x00000180U), + EMIT_MASKWRITE(0xF8000B50, 0x00000180U, 0x00000180U), + EMIT_MASKWRITE(0xF8000B54, 0x00000180U, 0x00000180U), + EMIT_WRITE(0xF8000004, 0x0000767BU), + EMIT_MASKWRITE(0xE0001034, 0x000000FFU, 0x00000006U), + EMIT_MASKWRITE(0xE0001018, 0x0000FFFFU, 0x0000007CU), + EMIT_MASKWRITE(0xE0001000, 0x000001FFU, 0x00000017U), + EMIT_MASKWRITE(0xE0001004, 0x000003FFU, 0x00000020U), + EMIT_MASKWRITE(0xE000D000, 0x00080000U, 0x00080000U), + EMIT_MASKWRITE(0xF8007000, 0x20000000U, 0x00000000U), + EMIT_MASKDELAY(0xF8F00200, 1), + EMIT_MASKDELAY(0xF8F00200, 1), + EMIT_MASKDELAY(0xF8F00200, 1), + EMIT_MASKDELAY(0xF8F00200, 1), + EMIT_MASKDELAY(0xF8F00200, 1), + EMIT_MASKDELAY(0xF8F00200, 1), + EMIT_EXIT(), +}; + +static unsigned long ps7_post_config_3_0[] = { + EMIT_WRITE(0xF8000008, 0x0000DF0DU), + EMIT_MASKWRITE(0xF8000900, 0x0000000FU, 0x0000000FU), + EMIT_MASKWRITE(0xF8000240, 0xFFFFFFFFU, 0x00000000U), + EMIT_WRITE(0xF8000004, 0x0000767BU), + EMIT_EXIT(), +}; + +int ps7_post_config(void) +{ + int ret = -1; + + ret = ps7_config(ps7_post_config_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + + return PS7_INIT_SUCCESS; +} + +int ps7_init(void) +{ + int ret; + + ret = ps7_config(ps7_mio_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + + ret = ps7_config(ps7_pll_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + + ret = ps7_config(ps7_clock_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + + ret = ps7_config(ps7_ddr_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + + ret = ps7_config(ps7_peripherals_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + return PS7_INIT_SUCCESS; +} diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c index f8c8674f87..3e039ccb13 100644 --- a/board/xilinx/zynqmp/cmds.c +++ b/board/xilinx/zynqmp/cmds.c @@ -6,6 +6,7 @@ #include <common.h> #include <malloc.h> +#include <asm/arch/hardware.h> #include <asm/arch/sys_proto.h> #include <asm/io.h> @@ -102,10 +103,36 @@ static int do_zynqmp_mmio_write(cmd_tbl_t *cmdtp, int flag, int argc, return ret; } +#ifdef CONFIG_DEFINE_TCM_OCM_MMAP +static int do_zynqmp_tcm_init(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + u8 mode; + + if (argc != cmdtp->maxargs) + return CMD_RET_USAGE; + + mode = simple_strtoul(argv[2], NULL, 16); + if (mode != TCM_LOCK && mode != TCM_SPLIT) { + printf("Mode should be either 0(lock)/1(split)\n"); + return CMD_RET_FAILURE; + } + + dcache_disable(); + tcm_init(mode); + dcache_enable(); + + return CMD_RET_SUCCESS; +} +#endif + static cmd_tbl_t cmd_zynqmp_sub[] = { U_BOOT_CMD_MKENT(secure, 5, 0, do_zynqmp_verify_secure, "", ""), U_BOOT_CMD_MKENT(mmio_read, 3, 0, do_zynqmp_mmio_read, "", ""), U_BOOT_CMD_MKENT(mmio_write, 5, 0, do_zynqmp_mmio_write, "", ""), +#ifdef CONFIG_DEFINE_TCM_OCM_MMAP + U_BOOT_CMD_MKENT(tcminit, 3, 0, do_zynqmp_tcm_init, "", ""), +#endif }; /** @@ -145,7 +172,15 @@ static char zynqmp_help_text[] = " be used for decryption\n" "zynqmp mmio_read address - read from address\n" "zynqmp mmio_write address mask value - write value after masking to\n" - " address\n"; + " address\n" +#ifdef CONFIG_DEFINE_TCM_OCM_MMAP + "zynqmp tcminit mode - Initialize the TCM with zeros. TCM needs to be\n" + " initialized before accessing to avoid ECC\n" + " errors. mode specifies in which mode TCM has\n" + " to be initialized. Supported modes will be\n" + " lock(0)/split(1)\n" +#endif + ; #endif U_BOOT_CMD( diff --git a/cmd/Kconfig b/cmd/Kconfig index 7ed3c9c3b3..d66f710ad0 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1811,6 +1811,7 @@ config CMD_IRQ config CMD_KGDB bool "kgdb - Allow debugging of U-Boot with gdb" + depends on PPC help This enables a 'kgdb' command which allows gdb to connect to U-Boot over a serial link for debugging purposes. This allows diff --git a/cmd/bootefi.c b/cmd/bootefi.c index 82d755ceb3..4d68d80748 100644 --- a/cmd/bootefi.c +++ b/cmd/bootefi.c @@ -40,6 +40,13 @@ efi_status_t efi_init_obj_list(void) { efi_status_t ret = EFI_SUCCESS; + /* + * On the ARM architecture gd is mapped to a fixed register (r9 or x18). + * As this register may be overwritten by an EFI payload we save it here + * and restore it on every callback entered. + */ + efi_save_gd(); + /* Initialize once only */ if (efi_obj_list_initialized != OBJ_LIST_NOT_INITIALIZED) return efi_obj_list_initialized; @@ -374,12 +381,6 @@ static efi_status_t do_bootefi_exec(void *efi, if (ret != EFI_SUCCESS) goto exit; - /* - * gd lives in a fixed register which may get clobbered while we execute - * the payload. So save it here and restore it on every callback entry - */ - efi_save_gd(); - /* Transfer environment variable bootargs as load options */ set_load_options(loaded_image_info, "bootargs"); /* Load the EFI payload */ @@ -460,12 +461,6 @@ static int do_bootefi_bootmgr_exec(void) void *addr; efi_status_t r; - /* - * gd lives in a fixed register which may get clobbered while we execute - * the payload. So save it here and restore it on every callback entry - */ - efi_save_gd(); - addr = efi_bootmgr_load(&device_path, &file_path); if (!addr) return 1; @@ -547,11 +542,6 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (r != EFI_SUCCESS) return CMD_RET_FAILURE; - /* - * gd lives in a fixed register which may get clobbered while we - * execute the payload. So save it here and restore it on every - * callback entry - */ efi_save_gd(); /* Transfer environment variable efi_selftest as load options */ set_load_options(loaded_image_info, "efi_selftest"); diff --git a/cmd/cros_ec.c b/cmd/cros_ec.c index 60c87838fd..9e2f1b06f3 100644 --- a/cmd/cros_ec.c +++ b/cmd/cros_ec.c @@ -27,7 +27,7 @@ static int cros_ec_decode_region(int argc, char * const argv[]) { if (argc > 0) { if (0 == strcmp(*argv, "rw")) - return EC_FLASH_REGION_RW; + return EC_FLASH_REGION_ACTIVE; else if (0 == strcmp(*argv, "ro")) return EC_FLASH_REGION_RO; @@ -49,7 +49,7 @@ static int cros_ec_decode_region(int argc, char * const argv[]) * @return 0 for ok, 1 for a usage error or -ve for ec command error * (negative EC_RES_...) */ -static int do_read_write(struct cros_ec_dev *dev, int is_write, int argc, +static int do_read_write(struct udevice *dev, int is_write, int argc, char * const argv[]) { uint32_t offset, size = -1U, region_size; @@ -94,8 +94,7 @@ static int do_read_write(struct cros_ec_dev *dev, int is_write, int argc, static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - struct cros_ec_dev *dev; - struct udevice *udev; + struct udevice *dev; const char *cmd; int ret = 0; @@ -105,10 +104,10 @@ static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) cmd = argv[1]; if (0 == strcmp("init", cmd)) { /* Remove any existing device */ - ret = uclass_find_device(UCLASS_CROS_EC, 0, &udev); + ret = uclass_find_device(UCLASS_CROS_EC, 0, &dev); if (!ret) - device_remove(udev, DM_REMOVE_NORMAL); - ret = uclass_get_device(UCLASS_CROS_EC, 0, &udev); + device_remove(dev, DM_REMOVE_NORMAL); + ret = uclass_get_device(UCLASS_CROS_EC, 0, &dev); if (ret) { printf("Could not init cros_ec device (err %d)\n", ret); return 1; @@ -116,12 +115,11 @@ static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; } - ret = uclass_get_device(UCLASS_CROS_EC, 0, &udev); + ret = uclass_get_device(UCLASS_CROS_EC, 0, &dev); if (ret) { printf("Cannot get cros-ec device (err=%d)\n", ret); return 1; } - dev = dev_get_uclass_priv(udev); if (0 == strcmp("id", cmd)) { char id[MSG_BYTES]; @@ -139,7 +137,6 @@ static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } printf("rows = %u\n", info.rows); printf("cols = %u\n", info.cols); - printf("switches = %#x\n", info.switches); } else if (0 == strcmp("curimage", cmd)) { enum ec_current_image image; @@ -152,7 +149,7 @@ static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) struct ec_response_vboot_hash hash; int i; - if (cros_ec_read_hash(dev, &hash)) { + if (cros_ec_read_hash(dev, EC_VBOOT_HASH_OFFSET_ACTIVE, &hash)) { debug("%s: Could not read KBC hash\n", __func__); return 1; } @@ -179,7 +176,7 @@ static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) region = cros_ec_decode_region(argc - 2, argv + 2); if (region == EC_FLASH_REGION_RO) cmd = EC_REBOOT_JUMP_RO; - else if (region == EC_FLASH_REGION_RW) + else if (region == EC_FLASH_REGION_ACTIVE) cmd = EC_REBOOT_JUMP_RW; else return CMD_RET_USAGE; @@ -262,7 +259,8 @@ static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) unsigned long result; if (argc <= 2) { - ret = cros_ec_read_vbnvcontext(dev, block); + ret = cros_ec_read_nvdata(dev, block, + EC_VBNV_BLOCK_SIZE); if (!ret) { printf("vbnv_block: "); for (i = 0; i < EC_VBNV_BLOCK_SIZE; i++) @@ -288,7 +286,8 @@ static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) strict_strtoul(buf, 16, &result); block[i] = result; } - ret = cros_ec_write_vbnvcontext(dev, block); + ret = cros_ec_write_nvdata(dev, block, + EC_VBNV_BLOCK_SIZE); } if (ret) { debug("%s: Could not %s VbNvContext\n", __func__, @@ -336,9 +335,9 @@ static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) state = simple_strtoul(argv[3], &endp, 10); if (*argv[3] == 0 || *endp != 0) return CMD_RET_USAGE; - ret = cros_ec_set_ldo(udev, index, state); + ret = cros_ec_set_ldo(dev, index, state); } else { - ret = cros_ec_get_ldo(udev, index, &state); + ret = cros_ec_get_ldo(dev, index, &state); if (!ret) { printf("LDO%d: %s\n", index, state == EC_LDO_STATE_ON ? @@ -596,6 +596,9 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) fdt_strerror(err)); return CMD_RET_FAILURE; } +#ifdef CONFIG_SOC_KEYSTONE + ft_board_setup_ex(working_fdt, gd->bd); +#endif } #endif /* Create a chosen node */ @@ -471,6 +471,7 @@ struct pxe_label { char *name; char *menu; char *kernel; + char *config; char *append; char *initrd; char *fdt; @@ -538,6 +539,9 @@ static void label_destroy(struct pxe_label *label) if (label->kernel) free(label->kernel); + if (label->config) + free(label->config); + if (label->append) free(label->append); @@ -618,6 +622,7 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label) char initrd_str[28]; char mac_str[29] = ""; char ip_str[68] = ""; + char *fit_addr = NULL; int bootm_argc = 2; int len = 0; ulong kernel_addr; @@ -699,6 +704,18 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label) } bootm_argv[1] = env_get("kernel_addr_r"); + /* for FIT, append the configuration identifier */ + if (label->config) { + int len = strlen(bootm_argv[1]) + strlen(label->config) + 1; + + fit_addr = malloc(len); + if (!fit_addr) { + printf("malloc fail (FIT address)\n"); + return 1; + } + snprintf(fit_addr, len, "%s%s", bootm_argv[1], label->config); + bootm_argv[1] = fit_addr; + } /* * fdt usage is optional: @@ -758,7 +775,7 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label) fdtfilefree = malloc(len); if (!fdtfilefree) { printf("malloc fail (FDT filename)\n"); - return 1; + goto cleanup; } snprintf(fdtfilefree, len, "%s%s%s%s%s%s", @@ -772,7 +789,7 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label) if (err < 0) { printf("Skipping %s for failure retrieving fdt\n", label->name); - return 1; + goto cleanup; } } else { bootm_argv[3] = NULL; @@ -803,6 +820,10 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label) do_bootz(cmdtp, 0, bootm_argc, bootm_argv); #endif unmap_sysmem(buf); + +cleanup: + if (fit_addr) + free(fit_addr); return 1; } @@ -1188,6 +1209,33 @@ static int parse_label_menu(char **c, struct pxe_menu *cfg, } /* + * Handles parsing a 'kernel' label. + * expecting "filename" or "<fit_filename>#cfg" + */ +static int parse_label_kernel(char **c, struct pxe_label *label) +{ + char *s; + int err; + + err = parse_sliteral(c, &label->kernel); + if (err < 0) + return err; + + s = strstr(label->kernel, "#"); + if (!s) + return 1; + + label->config = malloc(strlen(s) + 1); + if (!label->config) + return -ENOMEM; + + strcpy(label->config, s); + *s = 0; + + return 1; +} + +/* * Parses a label and adds it to the list of labels for a menu. * * A label ends when we either get to the end of a file, or @@ -1228,7 +1276,7 @@ static int parse_label(char **c, struct pxe_menu *cfg) case T_KERNEL: case T_LINUX: - err = parse_sliteral(c, &label->kernel); + err = parse_label_kernel(c, label); break; case T_APPEND: diff --git a/cmd/tpm_test.c b/cmd/tpm_test.c index 35f3c96e3d..f21ad5d3cf 100644 --- a/cmd/tpm_test.c +++ b/cmd/tpm_test.c @@ -62,14 +62,6 @@ static uint32_t tpm_get_flags(uint8_t *disable, uint8_t *deactivated, return 0; } -static uint32_t tpm_set_global_lock(void) -{ - uint32_t x; - - debug("TPM: Set global lock\n"); - return tpm_nv_write_value(INDEX0, (uint8_t *)&x, 0); -} - static uint32_t tpm_nv_write_value_lock(uint32_t index) { debug("TPM: Write lock 0x%x\n", index); @@ -77,13 +69,6 @@ static uint32_t tpm_nv_write_value_lock(uint32_t index) return tpm_nv_write_value(index, NULL, 0); } -static uint32_t tpm_nv_set_locked(void) -{ - debug("TPM: Set NV locked\n"); - - return tpm_nv_define_space(TPM_NV_INDEX_LOCK, 0, 0); -} - static int tpm_is_owned(void) { uint8_t response[TPM_PUBEK_SIZE]; diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c index 70f373a72a..d3fd959235 100644 --- a/cmd/x86/mtrr.c +++ b/cmd/x86/mtrr.c @@ -73,10 +73,10 @@ static int do_mtrr_set(uint reg, int argc, char * const argv[]) mask |= MTRR_PHYS_MASK_VALID; printf("base=%llx, mask=%llx\n", base, mask); - mtrr_open(&state); + mtrr_open(&state, true); wrmsrl(MTRR_PHYS_BASE_MSR(reg), base); wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask); - mtrr_close(&state); + mtrr_close(&state, true); return 0; } @@ -86,14 +86,14 @@ static int mtrr_set_valid(int reg, bool valid) struct mtrr_state state; uint64_t mask; - mtrr_open(&state); + mtrr_open(&state, true); mask = native_read_msr(MTRR_PHYS_MASK_MSR(reg)); if (valid) mask |= MTRR_PHYS_MASK_VALID; else mask &= ~MTRR_PHYS_MASK_VALID; wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask); - mtrr_close(&state); + mtrr_close(&state, true); return 0; } diff --git a/common/bootm_os.c b/common/bootm_os.c index f4bd905909..f302135868 100644 --- a/common/bootm_os.c +++ b/common/bootm_os.c @@ -505,10 +505,17 @@ __weak void arch_preboot_os(void) /* please define platform specific arch_preboot_os() */ } +/* Allow for board specific config before we boot */ +__weak void board_preboot_os(void) +{ + /* please define board specific board_preboot_os() */ +} + int boot_selected_os(int argc, char * const argv[], int state, bootm_headers_t *images, boot_os_fn *boot_fn) { arch_preboot_os(); + board_preboot_os(); boot_fn(state, argc, argv, images); /* Stand-alone may return when 'autostart' is 'no' */ diff --git a/common/cros_ec.c b/common/cros_ec.c index 1a0caf80dd..4ca15e19d5 100644 --- a/common/cros_ec.c +++ b/common/cros_ec.c @@ -13,7 +13,7 @@ #include <dm.h> #include <errno.h> -struct cros_ec_dev *board_get_cros_ec_dev(void) +struct udevice *board_get_cros_ec_dev(void) { struct udevice *dev; int ret; @@ -23,7 +23,7 @@ struct cros_ec_dev *board_get_cros_ec_dev(void) debug("%s: Error %d\n", __func__, ret); return NULL; } - return dev_get_uclass_priv(dev); + return dev; } int cros_ec_get_error(void) diff --git a/common/log.c b/common/log.c index 59869cd29d..ec14644516 100644 --- a/common/log.c +++ b/common/log.c @@ -315,7 +315,8 @@ int log_init(void) drv++; } gd->flags |= GD_FLG_LOG_READY; - gd->default_log_level = LOGL_INFO; + if (!gd->default_log_level) + gd->default_log_level = LOGL_INFO; gd->log_fmt = LOGF_DEFAULT; return 0; diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index cb0cc5299b..faf4ddbd1f 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -6,6 +6,7 @@ #include <common.h> #include <errno.h> +#include <fpga.h> #include <image.h> #include <linux/libfdt.h> #include <spl.h> @@ -140,14 +141,6 @@ static int get_aligned_image_size(struct spl_load_info *info, int data_size, return (data_size + info->bl_len - 1) / info->bl_len; } -#ifdef CONFIG_SPL_FPGA_SUPPORT -__weak int spl_load_fpga_image(struct spl_load_info *info, size_t length, - int nr_sectors, int sector_offset) -{ - return 0; -} -#endif - /** * spl_load_fit_image(): load the image described in a certain FIT node * @info: points to information about the device to load data from @@ -169,7 +162,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector, void *fit, ulong base_offset, int node, struct spl_image_info *image_info) { - int offset, sector_offset; + int offset; size_t length; int len; ulong size; @@ -217,16 +210,9 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector, overhead = get_aligned_image_overhead(info, offset); nr_sectors = get_aligned_image_size(info, length, offset); - sector_offset = sector + get_aligned_image_offset(info, offset); - -#ifdef CONFIG_SPL_FPGA_SUPPORT - if (type == IH_TYPE_FPGA) { - return spl_load_fpga_image(info, length, nr_sectors, - sector_offset); - } -#endif - if (info->read(info, sector_offset, + if (info->read(info, + sector + get_aligned_image_offset(info, offset), nr_sectors, (void *)load_ptr) != nr_sectors) return -EIO; @@ -409,6 +395,18 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, printf("%s: Cannot load the FPGA: %i\n", __func__, ret); return ret; } + + debug("FPGA bitstream at: %x, size: %x\n", + (u32)spl_image->load_addr, spl_image->size); + + ret = fpga_load(0, (const void *)spl_image->load_addr, + spl_image->size, BIT_FULL); + if (ret) { + printf("%s: Cannot load the image to the FPGA\n", + __func__); + return ret; + } + puts("FPGA image loaded from FIT\n"); node = -1; } diff --git a/configs/3c120_defconfig b/configs/3c120_defconfig index 303a81ceb0..42a032f1e7 100644 --- a/configs/3c120_defconfig +++ b/configs/3c120_defconfig @@ -25,7 +25,11 @@ CONFIG_MISC=y CONFIG_ALTERA_SYSID=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig index 5711f091b8..fd74888d6c 100644 --- a/configs/B4420QDS_NAND_defconfig +++ b/configs/B4420QDS_NAND_defconfig @@ -36,6 +36,9 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/B4420QDS_SPIFLASH_defconfig b/configs/B4420QDS_SPIFLASH_defconfig index 1ba0fe934a..8e3b0a7e7d 100644 --- a/configs/B4420QDS_SPIFLASH_defconfig +++ b/configs/B4420QDS_SPIFLASH_defconfig @@ -26,6 +26,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/B4420QDS_defconfig b/configs/B4420QDS_defconfig index 4dd8faae86..29b351a328 100644 --- a/configs/B4420QDS_defconfig +++ b/configs/B4420QDS_defconfig @@ -25,6 +25,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig index 0cd3223ff2..bfd1bcf6f6 100644 --- a/configs/B4860QDS_NAND_defconfig +++ b/configs/B4860QDS_NAND_defconfig @@ -36,6 +36,9 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig index 16c48a01bb..26ad411d44 100644 --- a/configs/B4860QDS_SECURE_BOOT_defconfig +++ b/configs/B4860QDS_SECURE_BOOT_defconfig @@ -26,6 +26,9 @@ CONFIG_CMD_EXT2=y CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/B4860QDS_SPIFLASH_defconfig b/configs/B4860QDS_SPIFLASH_defconfig index 8192888722..612cb7ed92 100644 --- a/configs/B4860QDS_SPIFLASH_defconfig +++ b/configs/B4860QDS_SPIFLASH_defconfig @@ -26,6 +26,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/B4860QDS_defconfig b/configs/B4860QDS_defconfig index af9adf25a1..3232530afa 100644 --- a/configs/B4860QDS_defconfig +++ b/configs/B4860QDS_defconfig @@ -25,6 +25,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig index 3abecded67..04ace68d7f 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig @@ -29,8 +29,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash," CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)" CONFIG_DM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig index e26809406f..7b71fa12d9 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig @@ -32,8 +32,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig index eddf42693c..a2ea749b8e 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig @@ -29,8 +29,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash," CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)" CONFIG_DM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig index 20c3bd39b0..31a13956da 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig @@ -32,8 +32,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig index 87329cc5db..5c78181a91 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig @@ -29,8 +29,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash," CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)" CONFIG_DM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig index 679f53f7d6..1f2990b70a 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig @@ -28,8 +28,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig index 6851344c69..33e9b462e3 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig @@ -29,8 +29,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash," CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)" CONFIG_DM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig index f06780d3fd..767be683a5 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig @@ -28,8 +28,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig index 611eac0560..bd0a7067af 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig @@ -29,8 +29,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash," CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)" CONFIG_DM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig index 48ef31c780..e56bae07aa 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig @@ -28,8 +28,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig index a7ad1ffe35..a9bc5f6ee7 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig @@ -29,8 +29,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash," CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)" CONFIG_DM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig index f0828ad5ae..9c552d01cd 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig @@ -28,8 +28,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig index 95b7275228..a99f691f4b 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig @@ -29,8 +29,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash," CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)" CONFIG_DM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig index a2bca0e742..2d61ea85d5 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig @@ -28,8 +28,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig index 6d13c420fb..dfd2770d4c 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig @@ -29,8 +29,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash," CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)" CONFIG_DM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig index cda838a29f..61d0c4cc8a 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig @@ -28,8 +28,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig index 22e2703ed5..aef42acb16 100644 --- a/configs/C29XPCIE_NAND_defconfig +++ b/configs/C29XPCIE_NAND_defconfig @@ -35,6 +35,9 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig index 337b287ec4..efc8dd90b7 100644 --- a/configs/C29XPCIE_NOR_SECBOOT_defconfig +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig @@ -23,6 +23,9 @@ CONFIG_DOS_PARTITION=y CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig index a8cf2c0d0b..dcf793b734 100644 --- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig @@ -24,6 +24,9 @@ CONFIG_DOS_PARTITION=y CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/C29XPCIE_SPIFLASH_defconfig b/configs/C29XPCIE_SPIFLASH_defconfig index f6d49f8d41..aaecadbecc 100644 --- a/configs/C29XPCIE_SPIFLASH_defconfig +++ b/configs/C29XPCIE_SPIFLASH_defconfig @@ -23,6 +23,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/C29XPCIE_defconfig b/configs/C29XPCIE_defconfig index 8fe205f06c..a487dcae75 100644 --- a/configs/C29XPCIE_defconfig +++ b/configs/C29XPCIE_defconfig @@ -22,6 +22,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index 920476042d..934cda4aa6 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -13,4 +13,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig index 233e258a61..efa5e7102b 100644 --- a/configs/M52277EVB_defconfig +++ b/configs/M52277EVB_defconfig @@ -18,6 +18,10 @@ CONFIG_CMD_JFFS2=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_NET is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI=y diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig index 573cea9655..3628729a48 100644 --- a/configs/M52277EVB_stmicro_defconfig +++ b/configs/M52277EVB_stmicro_defconfig @@ -17,6 +17,10 @@ CONFIG_CMD_JFFS2=y CONFIG_ENV_IS_IN_SPI_FLASH=y # CONFIG_NET is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI=y diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index 7d3b6d8581..fff57436c7 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -18,4 +18,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index 78d8ddc130..07e0f4f50b 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -18,4 +18,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y diff --git a/configs/M5249EVB_defconfig b/configs/M5249EVB_defconfig index 8478136c6b..908f6a1ab1 100644 --- a/configs/M5249EVB_defconfig +++ b/configs/M5249EVB_defconfig @@ -11,3 +11,6 @@ CONFIG_LOOPW=y CONFIG_CMD_CACHE=y # CONFIG_NET is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index 7a4e1d4346..85283d40e4 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -14,4 +14,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index 8619c89996..5ff262425c 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -16,4 +16,6 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig index 3f10c15a83..289922ba33 100644 --- a/configs/M5282EVB_defconfig +++ b/configs/M5282EVB_defconfig @@ -14,4 +14,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index 5b0430f3ef..0b1073af61 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -16,4 +16,8 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index 0b66da2645..c6dff0e27b 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -16,4 +16,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index b2c97b8485..56dba26f6f 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -16,4 +16,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index 38641f42e5..39823200ee 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -16,4 +16,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig index 070c4e7392..8448b6cfbf 100644 --- a/configs/M54451EVB_defconfig +++ b/configs/M54451EVB_defconfig @@ -22,6 +22,10 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig index d819ad4112..ce5f65666c 100644 --- a/configs/M54451EVB_stmicro_defconfig +++ b/configs/M54451EVB_stmicro_defconfig @@ -21,6 +21,10 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig index 75d85de27a..f9be1c3773 100644 --- a/configs/M54455EVB_a66_defconfig +++ b/configs/M54455EVB_a66_defconfig @@ -26,6 +26,10 @@ CONFIG_CMD_JFFS2=y CONFIG_ISO_PARTITION=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig index 84303f11c2..abb69a966a 100644 --- a/configs/M54455EVB_defconfig +++ b/configs/M54455EVB_defconfig @@ -27,6 +27,10 @@ CONFIG_CMD_JFFS2=y CONFIG_ISO_PARTITION=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig index ec5d69ae9f..6050df5d51 100644 --- a/configs/M54455EVB_i66_defconfig +++ b/configs/M54455EVB_i66_defconfig @@ -26,6 +26,10 @@ CONFIG_CMD_JFFS2=y CONFIG_ISO_PARTITION=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig index 7019cd66d9..686c00e318 100644 --- a/configs/M54455EVB_intel_defconfig +++ b/configs/M54455EVB_intel_defconfig @@ -26,6 +26,10 @@ CONFIG_CMD_JFFS2=y CONFIG_ISO_PARTITION=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig index 62e9d26fa6..fc19de50d1 100644 --- a/configs/M54455EVB_stm33_defconfig +++ b/configs/M54455EVB_stm33_defconfig @@ -26,6 +26,10 @@ CONFIG_CMD_JFFS2=y CONFIG_ISO_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y diff --git a/configs/M5475AFE_defconfig b/configs/M5475AFE_defconfig index 5f18579d52..b0296acff0 100644 --- a/configs/M5475AFE_defconfig +++ b/configs/M5475AFE_defconfig @@ -15,6 +15,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y diff --git a/configs/M5475BFE_defconfig b/configs/M5475BFE_defconfig index 29977f30a1..7fc61bd249 100644 --- a/configs/M5475BFE_defconfig +++ b/configs/M5475BFE_defconfig @@ -15,6 +15,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y diff --git a/configs/M5475CFE_defconfig b/configs/M5475CFE_defconfig index 14f29469cc..22d1074521 100644 --- a/configs/M5475CFE_defconfig +++ b/configs/M5475CFE_defconfig @@ -15,6 +15,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y diff --git a/configs/M5475DFE_defconfig b/configs/M5475DFE_defconfig index ee7e45648e..ee8c2abfba 100644 --- a/configs/M5475DFE_defconfig +++ b/configs/M5475DFE_defconfig @@ -15,6 +15,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y diff --git a/configs/M5475EFE_defconfig b/configs/M5475EFE_defconfig index 302651f964..939e56b28e 100644 --- a/configs/M5475EFE_defconfig +++ b/configs/M5475EFE_defconfig @@ -15,6 +15,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y diff --git a/configs/M5475FFE_defconfig b/configs/M5475FFE_defconfig index a3f418862c..1fef8fffd6 100644 --- a/configs/M5475FFE_defconfig +++ b/configs/M5475FFE_defconfig @@ -15,6 +15,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y diff --git a/configs/M5475GFE_defconfig b/configs/M5475GFE_defconfig index 39d3409409..d78cafffed 100644 --- a/configs/M5475GFE_defconfig +++ b/configs/M5475GFE_defconfig @@ -15,6 +15,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y diff --git a/configs/M5485AFE_defconfig b/configs/M5485AFE_defconfig index 496db41e34..5cda25a99a 100644 --- a/configs/M5485AFE_defconfig +++ b/configs/M5485AFE_defconfig @@ -15,6 +15,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y diff --git a/configs/M5485BFE_defconfig b/configs/M5485BFE_defconfig index b5b5153199..7cd4a5355b 100644 --- a/configs/M5485BFE_defconfig +++ b/configs/M5485BFE_defconfig @@ -15,6 +15,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y diff --git a/configs/M5485CFE_defconfig b/configs/M5485CFE_defconfig index a0446feac0..ff5e8ef043 100644 --- a/configs/M5485CFE_defconfig +++ b/configs/M5485CFE_defconfig @@ -15,6 +15,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y diff --git a/configs/M5485DFE_defconfig b/configs/M5485DFE_defconfig index ba4f03c5bf..c4dd6c3ae9 100644 --- a/configs/M5485DFE_defconfig +++ b/configs/M5485DFE_defconfig @@ -15,6 +15,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y diff --git a/configs/M5485EFE_defconfig b/configs/M5485EFE_defconfig index 0c24ab7b30..4e84828f48 100644 --- a/configs/M5485EFE_defconfig +++ b/configs/M5485EFE_defconfig @@ -15,6 +15,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y diff --git a/configs/M5485FFE_defconfig b/configs/M5485FFE_defconfig index 1399d91b35..f6264e8c5e 100644 --- a/configs/M5485FFE_defconfig +++ b/configs/M5485FFE_defconfig @@ -15,6 +15,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y diff --git a/configs/M5485GFE_defconfig b/configs/M5485GFE_defconfig index 162618b00b..9a589e0ae2 100644 --- a/configs/M5485GFE_defconfig +++ b/configs/M5485GFE_defconfig @@ -15,6 +15,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y diff --git a/configs/M5485HFE_defconfig b/configs/M5485HFE_defconfig index 201610c65a..edc50c8f53 100644 --- a/configs/M5485HFE_defconfig +++ b/configs/M5485HFE_defconfig @@ -15,6 +15,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index f8e4a47172..29a60e3a98 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -66,6 +66,8 @@ CONFIG_CMD_PING=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MPC8XX_FEC=y # CONFIG_PCI is not set CONFIG_SHA256=y diff --git a/configs/MPC8308RDB_defconfig b/configs/MPC8308RDB_defconfig index 8e9cf9bf04..06657b2bfe 100644 --- a/configs/MPC8308RDB_defconfig +++ b/configs/MPC8308RDB_defconfig @@ -22,6 +22,9 @@ CONFIG_CMD_DATE=y CONFIG_CMD_FAT=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/MPC8313ERDB_33_defconfig b/configs/MPC8313ERDB_33_defconfig index ac60840371..3bb680c217 100644 --- a/configs/MPC8313ERDB_33_defconfig +++ b/configs/MPC8313ERDB_33_defconfig @@ -24,6 +24,10 @@ CONFIG_MTDIDS_DEFAULT="nand0=e2800000.flash" CONFIG_MTDPARTS_DEFAULT="mtdparts=e2800000.flash:512k(uboot),128k(env),6m@1m(kernel),-(fs)" # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/MPC8313ERDB_66_defconfig b/configs/MPC8313ERDB_66_defconfig index 8a0784dd2a..bb26a9e381 100644 --- a/configs/MPC8313ERDB_66_defconfig +++ b/configs/MPC8313ERDB_66_defconfig @@ -24,6 +24,10 @@ CONFIG_MTDIDS_DEFAULT="nand0=e2800000.flash" CONFIG_MTDPARTS_DEFAULT="mtdparts=e2800000.flash:512k(uboot),128k(env),6m@1m(kernel),-(fs)" # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/MPC8313ERDB_NAND_33_defconfig b/configs/MPC8313ERDB_NAND_33_defconfig index 141ecb843b..ab28a78cbe 100644 --- a/configs/MPC8313ERDB_NAND_33_defconfig +++ b/configs/MPC8313ERDB_NAND_33_defconfig @@ -30,6 +30,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=e2800000.flash:512k(uboot),128k(env),6m@1m(ker CONFIG_ENV_IS_IN_NAND=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_PHY_MARVELL=y CONFIG_TSEC_ENET=y diff --git a/configs/MPC8313ERDB_NAND_66_defconfig b/configs/MPC8313ERDB_NAND_66_defconfig index 5a3bde4de2..a454ec67fc 100644 --- a/configs/MPC8313ERDB_NAND_66_defconfig +++ b/configs/MPC8313ERDB_NAND_66_defconfig @@ -30,6 +30,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=e2800000.flash:512k(uboot),128k(env),6m@1m(ker CONFIG_ENV_IS_IN_NAND=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_PHY_MARVELL=y CONFIG_TSEC_ENET=y diff --git a/configs/MPC8315ERDB_defconfig b/configs/MPC8315ERDB_defconfig index 533a8fbb46..b45369e626 100644 --- a/configs/MPC8315ERDB_defconfig +++ b/configs/MPC8315ERDB_defconfig @@ -24,6 +24,9 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=e0600000.flash:512k(uboot),128k(env),6m@1m(ker CONFIG_FSL_SATA=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/MPC8323ERDB_defconfig b/configs/MPC8323ERDB_defconfig index 0294061f1a..a1227bfdad 100644 --- a/configs/MPC8323ERDB_defconfig +++ b/configs/MPC8323ERDB_defconfig @@ -15,5 +15,8 @@ CONFIG_CMD_PCI=y CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC832XEMDS_ATM_defconfig b/configs/MPC832XEMDS_ATM_defconfig index 637903b408..e4c44d90a9 100644 --- a/configs/MPC832XEMDS_ATM_defconfig +++ b/configs/MPC832XEMDS_ATM_defconfig @@ -15,6 +15,9 @@ CONFIG_CMD_I2C=y CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC832XEMDS_HOST_33_defconfig b/configs/MPC832XEMDS_HOST_33_defconfig index 0ebd39b76f..2b03a56245 100644 --- a/configs/MPC832XEMDS_HOST_33_defconfig +++ b/configs/MPC832XEMDS_HOST_33_defconfig @@ -16,5 +16,8 @@ CONFIG_CMD_PCI=y CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC832XEMDS_HOST_66_defconfig b/configs/MPC832XEMDS_HOST_66_defconfig index f611201cb7..4aa34dc331 100644 --- a/configs/MPC832XEMDS_HOST_66_defconfig +++ b/configs/MPC832XEMDS_HOST_66_defconfig @@ -16,5 +16,8 @@ CONFIG_CMD_PCI=y CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC832XEMDS_SLAVE_defconfig b/configs/MPC832XEMDS_SLAVE_defconfig index 682a9a8337..332088934a 100644 --- a/configs/MPC832XEMDS_SLAVE_defconfig +++ b/configs/MPC832XEMDS_SLAVE_defconfig @@ -16,5 +16,8 @@ CONFIG_CMD_PCI=y CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC832XEMDS_defconfig b/configs/MPC832XEMDS_defconfig index b607132fb3..f3ec967b3c 100644 --- a/configs/MPC832XEMDS_defconfig +++ b/configs/MPC832XEMDS_defconfig @@ -14,6 +14,9 @@ CONFIG_CMD_I2C=y CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig index 27bd949981..41a1d9609b 100644 --- a/configs/MPC8349EMDS_defconfig +++ b/configs/MPC8349EMDS_defconfig @@ -14,6 +14,9 @@ CONFIG_CMD_PING=y CONFIG_CMD_DATE=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set diff --git a/configs/MPC8349ITXGP_defconfig b/configs/MPC8349ITXGP_defconfig index 7d523308d8..95d807bac0 100644 --- a/configs/MPC8349ITXGP_defconfig +++ b/configs/MPC8349ITXGP_defconfig @@ -21,6 +21,9 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/MPC8349ITX_LOWBOOT_defconfig b/configs/MPC8349ITX_LOWBOOT_defconfig index d740908290..5166723548 100644 --- a/configs/MPC8349ITX_LOWBOOT_defconfig +++ b/configs/MPC8349ITX_LOWBOOT_defconfig @@ -28,6 +28,9 @@ CONFIG_CMD_FAT=y CONFIG_SATA_SIL3114=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/MPC8349ITX_defconfig b/configs/MPC8349ITX_defconfig index 03f20c39ae..55e593c115 100644 --- a/configs/MPC8349ITX_defconfig +++ b/configs/MPC8349ITX_defconfig @@ -28,6 +28,9 @@ CONFIG_CMD_FAT=y CONFIG_SATA_SIL3114=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/MPC837XEMDS_HOST_defconfig b/configs/MPC837XEMDS_HOST_defconfig index 05afeb7b70..4ac95735b2 100644 --- a/configs/MPC837XEMDS_HOST_defconfig +++ b/configs/MPC837XEMDS_HOST_defconfig @@ -21,6 +21,9 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/MPC837XEMDS_defconfig b/configs/MPC837XEMDS_defconfig index 76a7c1c082..9ee8c7d880 100644 --- a/configs/MPC837XEMDS_defconfig +++ b/configs/MPC837XEMDS_defconfig @@ -19,6 +19,9 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index 5d94a21639..45b68e9092 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -22,6 +22,10 @@ CONFIG_CMD_FAT=y CONFIG_FSL_SATA=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/MPC8536DS_36BIT_defconfig b/configs/MPC8536DS_36BIT_defconfig index 925f3fac4d..654a5175d2 100644 --- a/configs/MPC8536DS_36BIT_defconfig +++ b/configs/MPC8536DS_36BIT_defconfig @@ -28,6 +28,8 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_FSL_DDR2=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/MPC8536DS_SDCARD_defconfig b/configs/MPC8536DS_SDCARD_defconfig index afc4d1f799..eebc00337e 100644 --- a/configs/MPC8536DS_SDCARD_defconfig +++ b/configs/MPC8536DS_SDCARD_defconfig @@ -27,6 +27,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_FSL_DDR2=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/MPC8536DS_SPIFLASH_defconfig b/configs/MPC8536DS_SPIFLASH_defconfig index 1671da1b5f..c376abe5f1 100644 --- a/configs/MPC8536DS_SPIFLASH_defconfig +++ b/configs/MPC8536DS_SPIFLASH_defconfig @@ -27,6 +27,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_FSL_DDR2=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/MPC8536DS_defconfig b/configs/MPC8536DS_defconfig index 46583baa3e..7501488117 100644 --- a/configs/MPC8536DS_defconfig +++ b/configs/MPC8536DS_defconfig @@ -27,6 +27,8 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_FSL_DDR2=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/MPC8541CDS_defconfig b/configs/MPC8541CDS_defconfig index c076c5264d..3307dbbb48 100644 --- a/configs/MPC8541CDS_defconfig +++ b/configs/MPC8541CDS_defconfig @@ -18,6 +18,8 @@ CONFIG_CMD_PING=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/MPC8541CDS_legacy_defconfig b/configs/MPC8541CDS_legacy_defconfig index 6e8418b93d..bef89171ea 100644 --- a/configs/MPC8541CDS_legacy_defconfig +++ b/configs/MPC8541CDS_legacy_defconfig @@ -19,6 +19,8 @@ CONFIG_CMD_PING=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/MPC8544DS_defconfig b/configs/MPC8544DS_defconfig index bcc0f6440e..a77f8f14cd 100644 --- a/configs/MPC8544DS_defconfig +++ b/configs/MPC8544DS_defconfig @@ -23,6 +23,8 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_SCSI_AHCI=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index 94623b7e7c..672dc78211 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -18,6 +18,8 @@ CONFIG_CMD_PING=y # CONFIG_CMD_HASH is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index b579315747..09726d2830 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -17,6 +17,8 @@ CONFIG_CMD_PING=y # CONFIG_CMD_HASH is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index d00829d920..4a2d11f1b6 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -17,6 +17,8 @@ CONFIG_CMD_PING=y # CONFIG_CMD_HASH is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/MPC8555CDS_defconfig b/configs/MPC8555CDS_defconfig index 87440a3a3c..f5fcd81f11 100644 --- a/configs/MPC8555CDS_defconfig +++ b/configs/MPC8555CDS_defconfig @@ -18,6 +18,8 @@ CONFIG_CMD_PING=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/MPC8555CDS_legacy_defconfig b/configs/MPC8555CDS_legacy_defconfig index dd777f8982..7887bccb64 100644 --- a/configs/MPC8555CDS_legacy_defconfig +++ b/configs/MPC8555CDS_legacy_defconfig @@ -19,6 +19,8 @@ CONFIG_CMD_PING=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/MPC8568MDS_defconfig b/configs/MPC8568MDS_defconfig index 4e70f905c2..f3544a2557 100644 --- a/configs/MPC8568MDS_defconfig +++ b/configs/MPC8568MDS_defconfig @@ -20,6 +20,8 @@ CONFIG_CMD_PING=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/MPC8569MDS_ATM_defconfig b/configs/MPC8569MDS_ATM_defconfig index 08e980f13f..5140ae9ecd 100644 --- a/configs/MPC8569MDS_ATM_defconfig +++ b/configs/MPC8569MDS_ATM_defconfig @@ -25,6 +25,8 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_E1000=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8569MDS_defconfig b/configs/MPC8569MDS_defconfig index 442f18e4f7..a778eaeeb8 100644 --- a/configs/MPC8569MDS_defconfig +++ b/configs/MPC8569MDS_defconfig @@ -24,6 +24,8 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_E1000=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8572DS_36BIT_defconfig b/configs/MPC8572DS_36BIT_defconfig index 938a435c27..3f02171737 100644 --- a/configs/MPC8572DS_36BIT_defconfig +++ b/configs/MPC8572DS_36BIT_defconfig @@ -26,6 +26,8 @@ CONFIG_SCSI_AHCI=y CONFIG_SYS_FSL_DDR2=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/MPC8572DS_defconfig b/configs/MPC8572DS_defconfig index 42ce6f4fd6..acb4af4b3d 100644 --- a/configs/MPC8572DS_defconfig +++ b/configs/MPC8572DS_defconfig @@ -25,6 +25,8 @@ CONFIG_SCSI_AHCI=y CONFIG_SYS_FSL_DDR2=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/MPC8610HPCD_defconfig b/configs/MPC8610HPCD_defconfig index 2df03d7a00..cfdfa9011f 100644 --- a/configs/MPC8610HPCD_defconfig +++ b/configs/MPC8610HPCD_defconfig @@ -22,6 +22,8 @@ CONFIG_DOS_PARTITION=y CONFIG_SCSI_AHCI=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SCSI=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/MPC8641HPCN_36BIT_defconfig b/configs/MPC8641HPCN_36BIT_defconfig index 5819e71464..4b924c08b3 100644 --- a/configs/MPC8641HPCN_36BIT_defconfig +++ b/configs/MPC8641HPCN_36BIT_defconfig @@ -21,6 +21,8 @@ CONFIG_DOS_PARTITION=y CONFIG_SCSI_AHCI=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/MPC8641HPCN_defconfig b/configs/MPC8641HPCN_defconfig index 39db233540..52fba9750d 100644 --- a/configs/MPC8641HPCN_defconfig +++ b/configs/MPC8641HPCN_defconfig @@ -21,6 +21,8 @@ CONFIG_DOS_PARTITION=y CONFIG_SCSI_AHCI=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/MigoR_defconfig b/configs/MigoR_defconfig index c182d34275..b261a92e03 100644 --- a/configs/MigoR_defconfig +++ b/configs/MigoR_defconfig @@ -24,5 +24,7 @@ CONFIG_CMD_PING=y # CONFIG_CMD_MISC is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig index 3c767087fb..568d886161 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig @@ -30,6 +30,9 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index d4057f0ffb..23993301c7 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -42,6 +42,9 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig index ee9492d05e..e565b414a0 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig @@ -29,6 +29,9 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 2ba579d959..1723d8dc55 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -28,6 +28,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 7ef9011a5c..798a0dcc37 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -39,6 +39,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig index eb10eef2b8..d8482a3efa 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig @@ -30,6 +30,9 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 89cfcfef3f..3b4992fcf5 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -40,6 +40,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig index e1e8e2a6c7..b2f000af14 100644 --- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig @@ -29,6 +29,9 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 1a02d70d9a..0dd4d4a45b 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -41,6 +41,9 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig index adbb76c4ca..806bf88c9d 100644 --- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig @@ -28,6 +28,9 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 38b70479ab..f1429abf74 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -27,6 +27,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index bdb5db2ce3..eb3151c370 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -38,6 +38,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig index e23473793d..9c759db24f 100644 --- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig @@ -29,6 +29,9 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index a42a6e3a02..5513446739 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -39,6 +39,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig index 0d46f26c94..aee9edf406 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig @@ -30,6 +30,9 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 1388dcade1..0f7e989b4e 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -42,6 +42,9 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig index 4b805169b0..f41e0503c7 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig @@ -29,6 +29,9 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 037fbba28d..a7e7ecff9e 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -28,6 +28,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 79d695d078..aca04419f5 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -39,6 +39,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig index e6032fd235..9a0332d6af 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig @@ -30,6 +30,9 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 54f07db75f..7041356374 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -40,6 +40,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig index bc7be37f57..39b62bb375 100644 --- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig @@ -29,6 +29,9 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index a66da9e06f..cdf51c8735 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -41,6 +41,9 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig index 0f3e2f6dce..45c7d3cd1d 100644 --- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig @@ -28,6 +28,9 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 08558c65a5..f1753a3971 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -27,6 +27,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 3a0291b7e4..56200bb6e8 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -38,6 +38,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig index 3e65ac08e0..60e2e1bb38 100644 --- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig @@ -29,6 +29,9 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index c15fecec5e..f44d36c342 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -39,6 +39,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig index edaa0f99cf..cd1c8fc965 100644 --- a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig @@ -39,6 +39,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/P1020MBG-PC_36BIT_defconfig b/configs/P1020MBG-PC_36BIT_defconfig index 93f3c60b8e..63cc1b6b77 100644 --- a/configs/P1020MBG-PC_36BIT_defconfig +++ b/configs/P1020MBG-PC_36BIT_defconfig @@ -29,6 +29,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/P1020MBG-PC_SDCARD_defconfig b/configs/P1020MBG-PC_SDCARD_defconfig index c62138e13c..21c10af164 100644 --- a/configs/P1020MBG-PC_SDCARD_defconfig +++ b/configs/P1020MBG-PC_SDCARD_defconfig @@ -38,6 +38,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/P1020MBG-PC_defconfig b/configs/P1020MBG-PC_defconfig index ec4cc08ea4..f0a479aca8 100644 --- a/configs/P1020MBG-PC_defconfig +++ b/configs/P1020MBG-PC_defconfig @@ -28,6 +28,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index cbe6791d78..09fc7d9fb9 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -41,6 +41,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index fbe2ae923e..778a258bd7 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -39,6 +39,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 3e2ab2b56e..31572566d4 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -40,6 +40,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 3ceb8f959c..3dbefd3c6b 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -29,6 +29,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 604015522a..2cc48c6a11 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -40,6 +40,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index bb2685f4e2..983fbc740b 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -38,6 +38,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 2550b07fa0..0f49a81c04 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -39,6 +39,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 5b2e332689..2dadfa92c7 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -28,6 +28,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 2f006c04a1..4b3922c48c 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -42,8 +42,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=ec000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:128k(dtb),6016k(kernel),57088k(fs),1m(vsc7385-firmware),1280k(u-boot)" CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index fe86e16364..7fcd9aea58 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -40,8 +40,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=ec000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:128k(dtb),6016k(kernel),57088k(fs),1m(vsc7385-firmware),1280k(u-boot)" CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index bfd2796514..ac0af80215 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -41,8 +41,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=ec000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:128k(dtb),6016k(kernel),57088k(fs),1m(vsc7385-firmware),1280k(u-boot)" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index c836b7db87..8222ad3a26 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -30,8 +30,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=ec000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:128k(dtb),6016k(kernel),57088k(fs),1m(vsc7385-firmware),1280k(u-boot)" CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig index 06bdb00598..0c15789c44 100644 --- a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig @@ -39,6 +39,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/P1020UTM-PC_36BIT_defconfig b/configs/P1020UTM-PC_36BIT_defconfig index f907ab4a14..4fe2a9228a 100644 --- a/configs/P1020UTM-PC_36BIT_defconfig +++ b/configs/P1020UTM-PC_36BIT_defconfig @@ -29,6 +29,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/P1020UTM-PC_SDCARD_defconfig b/configs/P1020UTM-PC_SDCARD_defconfig index 981326d6d3..3285aabfc2 100644 --- a/configs/P1020UTM-PC_SDCARD_defconfig +++ b/configs/P1020UTM-PC_SDCARD_defconfig @@ -38,6 +38,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/P1020UTM-PC_defconfig b/configs/P1020UTM-PC_defconfig index c637bbb204..dbe1879d88 100644 --- a/configs/P1020UTM-PC_defconfig +++ b/configs/P1020UTM-PC_defconfig @@ -28,6 +28,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig index 5f4f744000..8be649f404 100644 --- a/configs/P1021RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig @@ -44,8 +44,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)" CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig index a54ed1670d..0a5871289a 100644 --- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig @@ -42,8 +42,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)" CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig index 567a3fa106..850dd3222d 100644 --- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig @@ -43,8 +43,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1021RDB-PC_36BIT_defconfig b/configs/P1021RDB-PC_36BIT_defconfig index 5a6daea638..f7e7fd83dc 100644 --- a/configs/P1021RDB-PC_36BIT_defconfig +++ b/configs/P1021RDB-PC_36BIT_defconfig @@ -32,8 +32,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)" CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig index 2ae51b55dd..fdb0a34a45 100644 --- a/configs/P1021RDB-PC_NAND_defconfig +++ b/configs/P1021RDB-PC_NAND_defconfig @@ -43,8 +43,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)" CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig index 0982787b8a..815f435404 100644 --- a/configs/P1021RDB-PC_SDCARD_defconfig +++ b/configs/P1021RDB-PC_SDCARD_defconfig @@ -41,8 +41,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)" CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig index faf781b8c5..71c00d5bc2 100644 --- a/configs/P1021RDB-PC_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_SPIFLASH_defconfig @@ -42,8 +42,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1021RDB-PC_defconfig b/configs/P1021RDB-PC_defconfig index 129cd3f8b1..e1c69e1a8d 100644 --- a/configs/P1021RDB-PC_defconfig +++ b/configs/P1021RDB-PC_defconfig @@ -31,8 +31,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)" CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig index 944efcc4b9..4c36dc594c 100644 --- a/configs/P1022DS_36BIT_NAND_defconfig +++ b/configs/P1022DS_36BIT_NAND_defconfig @@ -42,8 +42,11 @@ CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)" CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P1022DS_36BIT_SDCARD_defconfig b/configs/P1022DS_36BIT_SDCARD_defconfig index 0aa7103376..d09da905d4 100644 --- a/configs/P1022DS_36BIT_SDCARD_defconfig +++ b/configs/P1022DS_36BIT_SDCARD_defconfig @@ -40,8 +40,11 @@ CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)" CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig index 109c8f43cf..886147c00f 100644 --- a/configs/P1022DS_36BIT_SPIFLASH_defconfig +++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig @@ -41,8 +41,11 @@ CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1022DS_36BIT_defconfig b/configs/P1022DS_36BIT_defconfig index bf37365445..f0282e20e7 100644 --- a/configs/P1022DS_36BIT_defconfig +++ b/configs/P1022DS_36BIT_defconfig @@ -30,8 +30,11 @@ CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)" CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig index 77fe9c09c5..128cef8d41 100644 --- a/configs/P1022DS_NAND_defconfig +++ b/configs/P1022DS_NAND_defconfig @@ -41,8 +41,11 @@ CONFIG_MTDIDS_DEFAULT="nor0=e8000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=e8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)" CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P1022DS_SDCARD_defconfig b/configs/P1022DS_SDCARD_defconfig index 21113b0d9a..53cffcd97d 100644 --- a/configs/P1022DS_SDCARD_defconfig +++ b/configs/P1022DS_SDCARD_defconfig @@ -39,8 +39,11 @@ CONFIG_MTDIDS_DEFAULT="nor0=e8000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=e8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)" CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig index c0ead20d57..b640f8f5ed 100644 --- a/configs/P1022DS_SPIFLASH_defconfig +++ b/configs/P1022DS_SPIFLASH_defconfig @@ -40,8 +40,11 @@ CONFIG_MTDIDS_DEFAULT="nor0=e8000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=e8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1022DS_defconfig b/configs/P1022DS_defconfig index 78272618eb..700959a685 100644 --- a/configs/P1022DS_defconfig +++ b/configs/P1022DS_defconfig @@ -29,8 +29,11 @@ CONFIG_MTDIDS_DEFAULT="nor0=e8000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=e8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)" CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1023RDB_defconfig b/configs/P1023RDB_defconfig index a740803751..b4e27c4d23 100644 --- a/configs/P1023RDB_defconfig +++ b/configs/P1023RDB_defconfig @@ -29,6 +29,8 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/P1024RDB_36BIT_defconfig b/configs/P1024RDB_36BIT_defconfig index 566e05a796..b34dc74863 100644 --- a/configs/P1024RDB_36BIT_defconfig +++ b/configs/P1024RDB_36BIT_defconfig @@ -29,6 +29,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig index 14bd81837b..ed1b5e5aa2 100644 --- a/configs/P1024RDB_NAND_defconfig +++ b/configs/P1024RDB_NAND_defconfig @@ -40,6 +40,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P1024RDB_SDCARD_defconfig b/configs/P1024RDB_SDCARD_defconfig index a5b822e81e..0925c2cf1b 100644 --- a/configs/P1024RDB_SDCARD_defconfig +++ b/configs/P1024RDB_SDCARD_defconfig @@ -38,6 +38,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig index 01e410a882..398112fe4c 100644 --- a/configs/P1024RDB_SPIFLASH_defconfig +++ b/configs/P1024RDB_SPIFLASH_defconfig @@ -39,6 +39,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1024RDB_defconfig b/configs/P1024RDB_defconfig index 8ddf3b0be2..2f21e2a403 100644 --- a/configs/P1024RDB_defconfig +++ b/configs/P1024RDB_defconfig @@ -28,6 +28,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1025RDB_36BIT_defconfig b/configs/P1025RDB_36BIT_defconfig index 143f4670cb..30cef8ed41 100644 --- a/configs/P1025RDB_36BIT_defconfig +++ b/configs/P1025RDB_36BIT_defconfig @@ -31,6 +31,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig index d8e145a15f..9e5bf25eac 100644 --- a/configs/P1025RDB_NAND_defconfig +++ b/configs/P1025RDB_NAND_defconfig @@ -42,6 +42,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P1025RDB_SDCARD_defconfig b/configs/P1025RDB_SDCARD_defconfig index eabf075b6f..5ca059cce1 100644 --- a/configs/P1025RDB_SDCARD_defconfig +++ b/configs/P1025RDB_SDCARD_defconfig @@ -40,6 +40,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig index 20be5458d6..ebb04754da 100644 --- a/configs/P1025RDB_SPIFLASH_defconfig +++ b/configs/P1025RDB_SPIFLASH_defconfig @@ -41,6 +41,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P1025RDB_defconfig b/configs/P1025RDB_defconfig index 189e4ee44f..2feb9cca4a 100644 --- a/configs/P1025RDB_defconfig +++ b/configs/P1025RDB_defconfig @@ -30,6 +30,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 3a1382a180..7f01310fe1 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -44,8 +44,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)" CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 6e8fc92e19..f78af0d620 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -42,8 +42,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)" CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index fa40cc418b..cdc2835e9a 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -43,8 +43,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 90af3c12a2..96d59625ec 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -32,8 +32,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)" CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 3c9fd49cf3..10cd5c55e9 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -43,8 +43,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)" CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index b676ab72a0..da780a077f 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -41,8 +41,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)" CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 63d23fd9b8..3b1c53f498 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -42,8 +42,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index ab83d43438..35c6bdd638 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -31,8 +31,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)" CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 00d48ab41a..96c388b621 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -27,6 +27,9 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index d137456ef5..3d5d96e1ce 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -27,6 +27,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig b/configs/P2041RDB_SECURE_BOOT_defconfig index b876ea688f..098f40fea5 100644 --- a/configs/P2041RDB_SECURE_BOOT_defconfig +++ b/configs/P2041RDB_SECURE_BOOT_defconfig @@ -27,6 +27,9 @@ CONFIG_CMD_FAT=y CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 4f48e3f08e..e8698e8456 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -27,6 +27,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 2461895dd5..07c212b6ed 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -26,6 +26,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P3041DS_NAND_SECURE_BOOT_defconfig b/configs/P3041DS_NAND_SECURE_BOOT_defconfig index 27366b3d96..0f38a46201 100644 --- a/configs/P3041DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P3041DS_NAND_SECURE_BOOT_defconfig @@ -28,6 +28,9 @@ CONFIG_CMD_FAT=y CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 627025a95d..a8dea7d783 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -27,6 +27,9 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 0e644c65f1..40b40fc073 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -27,6 +27,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P3041DS_SECURE_BOOT_defconfig b/configs/P3041DS_SECURE_BOOT_defconfig index 1a3363a710..06555e806e 100644 --- a/configs/P3041DS_SECURE_BOOT_defconfig +++ b/configs/P3041DS_SECURE_BOOT_defconfig @@ -27,6 +27,9 @@ CONFIG_CMD_FAT=y CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 64dd6ef7e6..84b5d76a2d 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -27,6 +27,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index 33fa23ea84..2d72e76f3c 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -26,6 +26,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index 74e2d4be88..1a617b2e89 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -27,6 +27,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P4080DS_SECURE_BOOT_defconfig b/configs/P4080DS_SECURE_BOOT_defconfig index ad463560d3..517a3af1ae 100644 --- a/configs/P4080DS_SECURE_BOOT_defconfig +++ b/configs/P4080DS_SECURE_BOOT_defconfig @@ -27,6 +27,9 @@ CONFIG_CMD_FAT=y CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index c3ef630f52..b90d65eff7 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -27,6 +27,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 61d225febf..83a925b664 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -26,6 +26,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P5020DS_NAND_SECURE_BOOT_defconfig b/configs/P5020DS_NAND_SECURE_BOOT_defconfig index 9866386591..7d420a3710 100644 --- a/configs/P5020DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P5020DS_NAND_SECURE_BOOT_defconfig @@ -29,6 +29,9 @@ CONFIG_CMD_FAT=y CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P5020DS_NAND_defconfig b/configs/P5020DS_NAND_defconfig index 399de815be..8c89cca5eb 100644 --- a/configs/P5020DS_NAND_defconfig +++ b/configs/P5020DS_NAND_defconfig @@ -28,6 +28,9 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P5020DS_SDCARD_defconfig b/configs/P5020DS_SDCARD_defconfig index badbeb9a3e..0116c2d3a8 100644 --- a/configs/P5020DS_SDCARD_defconfig +++ b/configs/P5020DS_SDCARD_defconfig @@ -28,6 +28,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P5020DS_SECURE_BOOT_defconfig b/configs/P5020DS_SECURE_BOOT_defconfig index e8edce687d..ce172a9332 100644 --- a/configs/P5020DS_SECURE_BOOT_defconfig +++ b/configs/P5020DS_SECURE_BOOT_defconfig @@ -28,6 +28,9 @@ CONFIG_CMD_FAT=y CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P5020DS_SPIFLASH_defconfig b/configs/P5020DS_SPIFLASH_defconfig index a89a0f52ad..28ac033e97 100644 --- a/configs/P5020DS_SPIFLASH_defconfig +++ b/configs/P5020DS_SPIFLASH_defconfig @@ -28,6 +28,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P5020DS_defconfig b/configs/P5020DS_defconfig index d524cfb48c..7177716222 100644 --- a/configs/P5020DS_defconfig +++ b/configs/P5020DS_defconfig @@ -27,6 +27,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P5040DS_NAND_SECURE_BOOT_defconfig b/configs/P5040DS_NAND_SECURE_BOOT_defconfig index a3d28cbc83..19c41ea799 100644 --- a/configs/P5040DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P5040DS_NAND_SECURE_BOOT_defconfig @@ -29,6 +29,9 @@ CONFIG_CMD_FAT=y CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 23822ea9cf..3e7c1f73d0 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -28,6 +28,9 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index c29ce5c995..b12bb8f6a5 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -28,6 +28,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P5040DS_SECURE_BOOT_defconfig b/configs/P5040DS_SECURE_BOOT_defconfig index 8db2658fe1..66c116f426 100644 --- a/configs/P5040DS_SECURE_BOOT_defconfig +++ b/configs/P5040DS_SECURE_BOOT_defconfig @@ -28,6 +28,9 @@ CONFIG_CMD_FAT=y CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 8dd5404567..1c3495967c 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -28,6 +28,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 93ff1aba2d..314d05b210 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -27,6 +27,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig index dc3dcb9989..3cab0707bb 100644 --- a/configs/T1023RDB_NAND_defconfig +++ b/configs/T1023RDB_NAND_defconfig @@ -42,8 +42,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig index bf9e699545..4b2f59b561 100644 --- a/configs/T1023RDB_SDCARD_defconfig +++ b/configs/T1023RDB_SDCARD_defconfig @@ -42,8 +42,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig index 9820d34212..f75ee2e35c 100644 --- a/configs/T1023RDB_SECURE_BOOT_defconfig +++ b/configs/T1023RDB_SECURE_BOOT_defconfig @@ -32,8 +32,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000 CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" CONFIG_DM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig index a1e37a6f38..0ad7c28641 100644 --- a/configs/T1023RDB_SPIFLASH_defconfig +++ b/configs/T1023RDB_SPIFLASH_defconfig @@ -43,8 +43,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/T1023RDB_defconfig b/configs/T1023RDB_defconfig index 07220b9d56..d3c3740a75 100644 --- a/configs/T1023RDB_defconfig +++ b/configs/T1023RDB_defconfig @@ -31,8 +31,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig index 71911b3df7..55cceae8ad 100644 --- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig @@ -33,8 +33,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000 CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)" CONFIG_DM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig index 35a3992a1e..60f2b867ea 100644 --- a/configs/T1024QDS_DDR4_defconfig +++ b/configs/T1024QDS_DDR4_defconfig @@ -32,8 +32,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig index 38b43977c5..755ecff6b1 100644 --- a/configs/T1024QDS_NAND_defconfig +++ b/configs/T1024QDS_NAND_defconfig @@ -44,8 +44,12 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig index 4a94d8016c..b02a5616be 100644 --- a/configs/T1024QDS_SDCARD_defconfig +++ b/configs/T1024QDS_SDCARD_defconfig @@ -44,8 +44,12 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig index 192140d746..4876aa6600 100644 --- a/configs/T1024QDS_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_SECURE_BOOT_defconfig @@ -34,8 +34,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_DM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig index 182d5cbb23..7c5e1efed6 100644 --- a/configs/T1024QDS_SPIFLASH_defconfig +++ b/configs/T1024QDS_SPIFLASH_defconfig @@ -45,8 +45,12 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig index e5b79c3da1..e530f188f6 100644 --- a/configs/T1024QDS_defconfig +++ b/configs/T1024QDS_defconfig @@ -33,8 +33,12 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index fc9e407783..fc35fb3366 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -44,8 +44,12 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 9c3d9c6316..079d7721fc 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -44,8 +44,12 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig index 10810c0c4f..376010fd2a 100644 --- a/configs/T1024RDB_SECURE_BOOT_defconfig +++ b/configs/T1024RDB_SECURE_BOOT_defconfig @@ -34,8 +34,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_DM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 5718ed3945..006d25c066 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -45,8 +45,12 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index ab40d599d1..86411a57be 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -33,8 +33,12 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig index 27b5398eb4..bef7af22a4 100644 --- a/configs/T1040D4RDB_NAND_defconfig +++ b/configs/T1040D4RDB_NAND_defconfig @@ -41,8 +41,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig index 0a54a9c9cd..0720711b62 100644 --- a/configs/T1040D4RDB_SDCARD_defconfig +++ b/configs/T1040D4RDB_SDCARD_defconfig @@ -41,8 +41,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig index fdb2f5a621..1a29efe22b 100644 --- a/configs/T1040D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig @@ -31,8 +31,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000 CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)" CONFIG_DM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig index 4e5109c33e..27f867289d 100644 --- a/configs/T1040D4RDB_SPIFLASH_defconfig +++ b/configs/T1040D4RDB_SPIFLASH_defconfig @@ -42,8 +42,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig index a7b5c6be80..a8c6708006 100644 --- a/configs/T1040D4RDB_defconfig +++ b/configs/T1040D4RDB_defconfig @@ -30,8 +30,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig index c91e4f7c82..32a2857486 100644 --- a/configs/T1040QDS_DDR4_defconfig +++ b/configs/T1040QDS_DDR4_defconfig @@ -33,8 +33,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig index 250e4faf85..da9d2d1a00 100644 --- a/configs/T1040QDS_SECURE_BOOT_defconfig +++ b/configs/T1040QDS_SECURE_BOOT_defconfig @@ -35,8 +35,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_DM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig index f01063f708..193e6db436 100644 --- a/configs/T1040QDS_defconfig +++ b/configs/T1040QDS_defconfig @@ -34,8 +34,12 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig index 160daed4c5..5c60dc7e5a 100644 --- a/configs/T1040RDB_NAND_defconfig +++ b/configs/T1040RDB_NAND_defconfig @@ -42,8 +42,12 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig index 8f3fa46e9d..69c8a24c88 100644 --- a/configs/T1040RDB_SDCARD_defconfig +++ b/configs/T1040RDB_SDCARD_defconfig @@ -42,8 +42,12 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig index b4a7776bd5..b4cfb47fa8 100644 --- a/configs/T1040RDB_SECURE_BOOT_defconfig +++ b/configs/T1040RDB_SECURE_BOOT_defconfig @@ -32,8 +32,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_DM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig index 8ea5413863..3f06483475 100644 --- a/configs/T1040RDB_SPIFLASH_defconfig +++ b/configs/T1040RDB_SPIFLASH_defconfig @@ -43,8 +43,12 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1040RDB_defconfig b/configs/T1040RDB_defconfig index b815622b89..a1e800d5a3 100644 --- a/configs/T1040RDB_defconfig +++ b/configs/T1040RDB_defconfig @@ -31,8 +31,12 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index d7abf3c5a2..d3f4367b26 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -42,8 +42,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 4fdf14aa34..894985ae14 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -42,8 +42,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig index 2d5d9eb433..5c9d8e8a55 100644 --- a/configs/T1042D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig @@ -32,8 +32,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000 CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)" CONFIG_DM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 290e505b0e..d5838524d8 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -43,8 +43,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 7d2b530a9b..6b03b6bfe0 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -31,8 +31,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig index a0fad040ce..61ada5d3b7 100644 --- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig @@ -47,8 +47,12 @@ CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig index ec652e36d5..35949207fc 100644 --- a/configs/T1042RDB_PI_NAND_defconfig +++ b/configs/T1042RDB_PI_NAND_defconfig @@ -44,8 +44,12 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig index 7102a2b622..fd8f060670 100644 --- a/configs/T1042RDB_PI_SDCARD_defconfig +++ b/configs/T1042RDB_PI_SDCARD_defconfig @@ -44,8 +44,12 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig index e2ce4815f1..c7157d5531 100644 --- a/configs/T1042RDB_PI_SPIFLASH_defconfig +++ b/configs/T1042RDB_PI_SPIFLASH_defconfig @@ -45,8 +45,12 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig index d7a82e6c68..d953034cc0 100644 --- a/configs/T1042RDB_PI_defconfig +++ b/configs/T1042RDB_PI_defconfig @@ -33,8 +33,12 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig index b3029cba0d..3a67c3f287 100644 --- a/configs/T1042RDB_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_SECURE_BOOT_defconfig @@ -31,8 +31,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_DM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig index 98646a208c..329e57a959 100644 --- a/configs/T1042RDB_defconfig +++ b/configs/T1042RDB_defconfig @@ -30,8 +30,12 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 4a39cd2d1d..84a70c9207 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -7,7 +7,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y -CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -37,11 +36,16 @@ CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index c89c63d92d..02a5655582 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -8,7 +8,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y -CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -37,11 +36,16 @@ CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 29873cefe6..d742b1514a 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -28,8 +28,12 @@ CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000 CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" CONFIG_DM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index b5f960fa1f..221e045158 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -9,7 +9,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y -CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -38,11 +37,16 @@ CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index b34a0f5c99..27e06b6c44 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -30,8 +30,12 @@ CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index fa30d2917b..505dd14aae 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -40,8 +40,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 30fe40e506..71c641605b 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -40,8 +40,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig index 1e8bea5b7a..28e671201a 100644 --- a/configs/T2080RDB_SECURE_BOOT_defconfig +++ b/configs/T2080RDB_SECURE_BOOT_defconfig @@ -30,8 +30,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 # CONFIG_CMD_IRQ is not set CONFIG_DM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 8a96ff8752..b6960df27f 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -41,8 +41,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 969e7d730e..89bd8dad72 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -29,8 +29,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig index bba3457248..d0147d8377 100644 --- a/configs/T2081QDS_NAND_defconfig +++ b/configs/T2081QDS_NAND_defconfig @@ -38,8 +38,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig index a64be133e3..39d8f1dfef 100644 --- a/configs/T2081QDS_SDCARD_defconfig +++ b/configs/T2081QDS_SDCARD_defconfig @@ -38,8 +38,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig index 40812b7aed..db2409f985 100644 --- a/configs/T2081QDS_SPIFLASH_defconfig +++ b/configs/T2081QDS_SPIFLASH_defconfig @@ -39,8 +39,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T2081QDS_defconfig b/configs/T2081QDS_defconfig index 85d8b89aa8..7846a42c60 100644 --- a/configs/T2081QDS_defconfig +++ b/configs/T2081QDS_defconfig @@ -27,8 +27,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig index 3454e3d7cc..af529b2967 100644 --- a/configs/T4160QDS_NAND_defconfig +++ b/configs/T4160QDS_NAND_defconfig @@ -36,6 +36,9 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T4160QDS_SDCARD_defconfig b/configs/T4160QDS_SDCARD_defconfig index 81a8c4b137..b29c069102 100644 --- a/configs/T4160QDS_SDCARD_defconfig +++ b/configs/T4160QDS_SDCARD_defconfig @@ -36,6 +36,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/T4160QDS_SECURE_BOOT_defconfig b/configs/T4160QDS_SECURE_BOOT_defconfig index 02975511f5..4463386c07 100644 --- a/configs/T4160QDS_SECURE_BOOT_defconfig +++ b/configs/T4160QDS_SECURE_BOOT_defconfig @@ -26,6 +26,9 @@ CONFIG_CMD_FAT=y CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/T4160QDS_defconfig b/configs/T4160QDS_defconfig index 271060a653..4f45229895 100644 --- a/configs/T4160QDS_defconfig +++ b/configs/T4160QDS_defconfig @@ -25,6 +25,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/T4160RDB_defconfig b/configs/T4160RDB_defconfig index 4b26aa8cfe..06c80381a7 100644 --- a/configs/T4160RDB_defconfig +++ b/configs/T4160RDB_defconfig @@ -25,6 +25,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig index 1a00746901..caeeacbefc 100644 --- a/configs/T4240QDS_NAND_defconfig +++ b/configs/T4240QDS_NAND_defconfig @@ -36,6 +36,9 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T4240QDS_SDCARD_defconfig b/configs/T4240QDS_SDCARD_defconfig index 4ca0a3b854..b461e0880b 100644 --- a/configs/T4240QDS_SDCARD_defconfig +++ b/configs/T4240QDS_SDCARD_defconfig @@ -36,6 +36,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/T4240QDS_SECURE_BOOT_defconfig b/configs/T4240QDS_SECURE_BOOT_defconfig index c34164ccb0..416b415bb5 100644 --- a/configs/T4240QDS_SECURE_BOOT_defconfig +++ b/configs/T4240QDS_SECURE_BOOT_defconfig @@ -26,6 +26,9 @@ CONFIG_CMD_FAT=y CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/T4240QDS_defconfig b/configs/T4240QDS_defconfig index 7ef45464cf..d1f33d79be 100644 --- a/configs/T4240QDS_defconfig +++ b/configs/T4240QDS_defconfig @@ -25,6 +25,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 29733d467c..8bde983738 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -36,6 +36,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 1272b3e378..d9f5845756 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -25,6 +25,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/TQM834x_defconfig b/configs/TQM834x_defconfig index c1f30699f3..e1a7a06306 100644 --- a/configs/TQM834x_defconfig +++ b/configs/TQM834x_defconfig @@ -25,6 +25,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=TQM834x-0:256k(u-boot),256k(env),1m(kernel),2m # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/TWR-P1025_defconfig b/configs/TWR-P1025_defconfig index bf23ab5641..081bb653dd 100644 --- a/configs/TWR-P1025_defconfig +++ b/configs/TWR-P1025_defconfig @@ -32,9 +32,13 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:256k(vsc7385-firmware),256k(dtb), CONFIG_ENV_IS_IN_FLASH=y CONFIG_SATA_SIL3114=y CONFIG_FSL_ESDHC=y +CONFIG_MTD_PARTITIONS=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y -CONFIG_MTD_PARTITIONS=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/UCP1020_SPIFLASH_defconfig b/configs/UCP1020_SPIFLASH_defconfig index ca28326853..d75c1f3906 100644 --- a/configs/UCP1020_SPIFLASH_defconfig +++ b/configs/UCP1020_SPIFLASH_defconfig @@ -37,6 +37,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig index 48bbb74ce2..7fc6acc0b0 100644 --- a/configs/UCP1020_defconfig +++ b/configs/UCP1020_defconfig @@ -37,6 +37,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig index 1155d0d643..1e26affaa9 100644 --- a/configs/adp-ae3xx_defconfig +++ b/configs/adp-ae3xx_defconfig @@ -29,7 +29,10 @@ CONFIG_FTSDC010=y CONFIG_FTSDC010_SDIO=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/adp-ag101p_defconfig b/configs/adp-ag101p_defconfig index 4545eec4d8..2e0bbc5262 100644 --- a/configs/adp-ag101p_defconfig +++ b/configs/adp-ag101p_defconfig @@ -25,6 +25,9 @@ CONFIG_DM_MMC=y CONFIG_FTSDC010=y CONFIG_FTSDC010_SDIO=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig index f59d0f4900..54dc7dff78 100644 --- a/configs/am335x_evm_nor_defconfig +++ b/configs/am335x_evm_nor_defconfig @@ -27,12 +27,16 @@ CONFIG_DFU_RAM=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_MMC_OMAP_HS=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVER_TI_CPSW=y CONFIG_MII=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y CONFIG_USB=y diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig index f10eb545c7..5d7ccf0c5a 100644 --- a/configs/am335x_evm_norboot_defconfig +++ b/configs/am335x_evm_norboot_defconfig @@ -24,11 +24,15 @@ CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_MMC_OMAP_HS=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVER_TI_CPSW=y CONFIG_MII=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y CONFIG_USB=y diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig index ce61e16c8d..43e71cd6c2 100644 --- a/configs/amcore_defconfig +++ b/configs/amcore_defconfig @@ -20,4 +20,7 @@ CONFIG_ENV_IS_IN_FLASH=y # CONFIG_NET is not set CONFIG_DM=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_SERIAL=y diff --git a/configs/ap325rxa_defconfig b/configs/ap325rxa_defconfig index 8cadf0b9c9..d2f0d7fc42 100644 --- a/configs/ap325rxa_defconfig +++ b/configs/ap325rxa_defconfig @@ -27,6 +27,8 @@ CONFIG_CMD_EXT2=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0xB6080000 CONFIG_SMC911X_32_BIT=y diff --git a/configs/ap_sh4a_4a_defconfig b/configs/ap_sh4a_4a_defconfig index 4cff5be785..6851c37185 100644 --- a/configs/ap_sh4a_4a_defconfig +++ b/configs/ap_sh4a_4a_defconfig @@ -27,6 +27,8 @@ CONFIG_CMD_PING=y # CONFIG_CMD_MISC is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig index da6ebe7dcd..230c4cb921 100644 --- a/configs/astro_mcf5373l_defconfig +++ b/configs/astro_mcf5373l_defconfig @@ -22,3 +22,7 @@ CONFIG_FPGA_CYCLON2=y CONFIG_FPGA_XILINX=y CONFIG_FPGA_SPARTAN3=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y diff --git a/configs/at91rm9200ek_defconfig b/configs/at91rm9200ek_defconfig index 6af0118cf5..7ebbdacbfc 100644 --- a/configs/at91rm9200ek_defconfig +++ b/configs/at91rm9200ek_defconfig @@ -20,6 +20,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/at91rm9200ek_ram_defconfig b/configs/at91rm9200ek_ram_defconfig index 2688299db1..87fd7a303a 100644 --- a/configs/at91rm9200ek_ram_defconfig +++ b/configs/at91rm9200ek_ram_defconfig @@ -21,6 +21,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index 8218729556..556fc15418 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -39,6 +39,8 @@ CONFIG_AT91_GPIO=y CONFIG_DM_MMC=y CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index e30b394dfb..892f6af1b8 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -39,6 +39,8 @@ CONFIG_AT91_GPIO=y CONFIG_DM_MMC=y CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 8e80c59597..ef84aa276b 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -18,7 +19,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 2db273b1a9..a44ab6bd90 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -18,7 +19,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index a60a217b10..ac81113543 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -18,7 +19,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 4b50c255d7..e80b54edec 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_FIT=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -18,7 +19,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/avnet_ultra96_rev1_defconfig b/configs/avnet_ultra96_rev1_defconfig index a86719bc29..c49c9f2346 100644 --- a/configs/avnet_ultra96_rev1_defconfig +++ b/configs/avnet_ultra96_rev1_defconfig @@ -20,8 +20,8 @@ CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_ATF=y CONFIG_SYS_PROMPT="ZynqMP> " CONFIG_CMD_BOOTMENU=y -CONFIG_CMD_POWEROFF=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_BIND=y CONFIG_CMD_CLK=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -30,12 +30,12 @@ CONFIG_CMD_FPGA_LOADP=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_POWEROFF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y @@ -66,6 +66,8 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_DM_ETH=y +# CONFIG_NETDEVICES is not set CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y @@ -84,6 +86,8 @@ CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_WDT=y diff --git a/configs/ax25-ae350_defconfig b/configs/ax25-ae350_defconfig index 614ef15dc7..d7c4f40e58 100644 --- a/configs/ax25-ae350_defconfig +++ b/configs/ax25-ae350_defconfig @@ -23,7 +23,10 @@ CONFIG_MMC=y CONFIG_FTSDC010=y CONFIG_FTSDC010_SDIO=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index 7eef2945e1..244ab22f6f 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -46,6 +46,8 @@ CONFIG_DM_MMC=y CONFIG_SH_MMCIF=y CONFIG_RENESAS_SDHI=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig index 676ff0ef74..2d52f522ba 100644 --- a/configs/boston32r2_defconfig +++ b/configs/boston32r2_defconfig @@ -30,7 +30,11 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_PCH_GBE=y CONFIG_PCI=y diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig index 3ffcfdab18..2e2beede1a 100644 --- a/configs/boston32r2el_defconfig +++ b/configs/boston32r2el_defconfig @@ -31,7 +31,11 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_PCH_GBE=y CONFIG_PCI=y diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig index 15f96e4aa2..07613bf6ba 100644 --- a/configs/boston32r6_defconfig +++ b/configs/boston32r6_defconfig @@ -31,7 +31,11 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_PCH_GBE=y CONFIG_PCI=y diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig index 920b8086a8..14d9aa1411 100644 --- a/configs/boston32r6el_defconfig +++ b/configs/boston32r6el_defconfig @@ -32,7 +32,11 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_PCH_GBE=y CONFIG_PCI=y diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig index e2fba096c0..310c4a98ea 100644 --- a/configs/boston64r2_defconfig +++ b/configs/boston64r2_defconfig @@ -31,7 +31,11 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_PCH_GBE=y CONFIG_PCI=y diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig index e0119c42cf..3b39df1a82 100644 --- a/configs/boston64r2el_defconfig +++ b/configs/boston64r2el_defconfig @@ -32,7 +32,11 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_PCH_GBE=y CONFIG_PCI=y diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig index 9f8303604c..a0779b8e1f 100644 --- a/configs/boston64r6_defconfig +++ b/configs/boston64r6_defconfig @@ -31,7 +31,11 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_PCH_GBE=y CONFIG_PCI=y diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig index d04929c94f..3cdd1de16d 100644 --- a/configs/boston64r6el_defconfig +++ b/configs/boston64r6el_defconfig @@ -32,7 +32,11 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_PCH_GBE=y CONFIG_PCI=y diff --git a/configs/caddy2_defconfig b/configs/caddy2_defconfig index 4367ed0e6c..5fec4f8d49 100644 --- a/configs/caddy2_defconfig +++ b/configs/caddy2_defconfig @@ -18,6 +18,8 @@ CONFIG_CMD_PING=y CONFIG_CMD_DATE=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_E1000=y CONFIG_BAUDRATE=9600 CONFIG_SYS_NS16550=y diff --git a/configs/calimain_defconfig b/configs/calimain_defconfig index e4f392b1b6..f2b0814acf 100644 --- a/configs/calimain_defconfig +++ b/configs/calimain_defconfig @@ -28,6 +28,10 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0x01C23000 CONFIG_DA8XX_GPIO=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_DRIVER_TI_EMAC=y CONFIG_SYS_NS16550=y diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index fe6544b31a..2c51a2f7f7 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -69,6 +69,7 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_INTEL=y CONFIG_CROS_EC=y CONFIG_CROS_EC_LPC=y +CONFIG_SPL_DM_RTC=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_SPL_TIMER=y diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index 8f2336c633..e5483c5920 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -1,6 +1,6 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFE00000 -CONFIG_SYS_MALLOC_F_LEN=0x1800 +CONFIG_SYS_MALLOC_F_LEN=0x1a00 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig index 2ad169ddfb..2ff489f4a9 100644 --- a/configs/colibri_pxa270_defconfig +++ b/configs/colibri_pxa270_defconfig @@ -27,6 +27,10 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_SERIAL=y CONFIG_PXA_SERIAL=y CONFIG_USB=y diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index 121e785ae8..82f2070713 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -36,7 +36,10 @@ CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY=y CONFIG_BCM6348_USBH_PHY=y CONFIG_DM_RESET=y diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig index ba84e7a94b..987e4c3fbc 100644 --- a/configs/comtrend_wap5813n_ram_defconfig +++ b/configs/comtrend_wap5813n_ram_defconfig @@ -36,7 +36,10 @@ CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY=y CONFIG_BCM6368_USBH_PHY=y CONFIG_DM_RESET=y diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig index 6745cd10fa..8487509259 100644 --- a/configs/da850_am18xxevm_defconfig +++ b/configs/da850_am18xxevm_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_DM=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 @@ -35,6 +36,8 @@ CONFIG_CRC32_VERIFY=y CONFIG_CMD_DIAG=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="da850-evm" +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y CONFIG_DA8XX_GPIO=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 6dc70dd387..5df45ae855 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_DM=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 @@ -37,6 +38,8 @@ CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:512k(u-boot.ais),64k(u-boot-env),7552k(kernel-spare),64k(MAC-Address)" CONFIG_CMD_DIAG=y CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_OF_PLATDATA=y CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 8ea522af93..b4564f2101 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -40,18 +40,20 @@ CONFIG_DM=y CONFIG_BLK=y CONFIG_DA8XX_GPIO=y CONFIG_DM_I2C=y -CONFIG_DM_I2C_COMPAT=y CONFIG_SYS_I2C_DAVINCI=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_SINGLE=y CONFIG_MII=y CONFIG_DRIVER_TI_EMAC=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_SINGLE=y CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index d13d832e81..20f8e0ae31 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -7,9 +7,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_DM=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="da850-evm" +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_OF_PLATDATA=y CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index cdb4bd50d7..b739f27803 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -1,5 +1,5 @@ CONFIG_ARM=y -CONFIG_TARGET_DEVKIT3250=y +CONFIG_ARCH_LPC32XX=y CONFIG_SYS_TEXT_BASE=0x83F00000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -29,18 +29,17 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_FAT=y CONFIG_CMD_JFFS2=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_DM=y -CONFIG_SPL_DM=y -CONFIG_DM_GPIO=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_NAND_LPC32XX_SLC=y CONFIG_SPL_NAND_SIMPLE=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR=31 -CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_LPC32XX_SSP=y diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index 08965c9ac4..3632706f33 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -22,6 +22,9 @@ CONFIG_LED_STATUS_BOOT_ENABLE=y CONFIG_LED_STATUS_BOOT=0 CONFIG_LED_STATUS_CMD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_VIDEO=y # CONFIG_CFB_CONSOLE is not set diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig index aaee4abe44..73c6744e7f 100644 --- a/configs/eb_cpu5282_internal_defconfig +++ b/configs/eb_cpu5282_internal_defconfig @@ -21,6 +21,9 @@ CONFIG_LED_STATUS_BOOT_ENABLE=y CONFIG_LED_STATUS_BOOT=0 CONFIG_LED_STATUS_CMD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_VIDEO=y # CONFIG_CFB_CONSOLE is not set diff --git a/configs/ecovec_defconfig b/configs/ecovec_defconfig index bf588c3864..e6d19446eb 100644 --- a/configs/ecovec_defconfig +++ b/configs/ecovec_defconfig @@ -31,6 +31,8 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y CONFIG_USB=y diff --git a/configs/edb9315a_defconfig b/configs/edb9315a_defconfig index 72238c58a5..f8f2e16f85 100644 --- a/configs/edb9315a_defconfig +++ b/configs/edb9315a_defconfig @@ -38,6 +38,10 @@ CONFIG_LED_STATUS_GREEN_ENABLE=y CONFIG_LED_STATUS_GREEN=0 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_USB=y diff --git a/configs/edison_defconfig b/configs/edison_defconfig index f0f3449464..eb9f9a089f 100644 --- a/configs/edison_defconfig +++ b/configs/edison_defconfig @@ -33,6 +33,7 @@ CONFIG_CPU=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DM_PCI_COMPAT=y +CONFIG_RTC_MC146818=y CONFIG_USB_DWC3_GADGET=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Intel" diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig index 35e28bba9b..1d06b3e612 100644 --- a/configs/edminiv2_defconfig +++ b/configs/edminiv2_defconfig @@ -27,6 +27,8 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MVGBE=y CONFIG_MII=y CONFIG_SYS_NS16550=y diff --git a/configs/espt_defconfig b/configs/espt_defconfig index f47552a970..95a7cb7cb6 100644 --- a/configs/espt_defconfig +++ b/configs/espt_defconfig @@ -27,6 +27,8 @@ CONFIG_CMD_PING=y # CONFIG_CMD_MISC is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/flea3_defconfig b/configs/flea3_defconfig index 15e45967b0..4e6de6c023 100644 --- a/configs/flea3_defconfig +++ b/configs/flea3_defconfig @@ -23,8 +23,13 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=mxc_nand:50m(root1),32m(rootfb),64m(pcache),64 CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y # CONFIG_MMC is not set -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_PHYLIB=y diff --git a/configs/hrcon_defconfig b/configs/hrcon_defconfig index 93d8330a62..7605c56619 100644 --- a/configs/hrcon_defconfig +++ b/configs/hrcon_defconfig @@ -29,6 +29,9 @@ CONFIG_CMD_EXT2=y CONFIG_DOS_PARTITION=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/hrcon_dh_defconfig b/configs/hrcon_dh_defconfig index 6885bef055..bc51a5d02a 100644 --- a/configs/hrcon_dh_defconfig +++ b/configs/hrcon_dh_defconfig @@ -27,6 +27,9 @@ CONFIG_CMD_EXT2=y CONFIG_DOS_PARTITION=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index 039dc2f2ab..6bb14ba736 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -36,7 +36,10 @@ CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY=y CONFIG_BCM6358_USBH_PHY=y CONFIG_DM_RESET=y diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig index cedd56528f..93dde6be11 100644 --- a/configs/ids8313_defconfig +++ b/configs/ids8313_defconfig @@ -37,6 +37,11 @@ CONFIG_BOOTCOUNT_I2C=y CONFIG_SYS_BOOTCOUNT_ADDR=0x9 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig index 42187f4d41..eb3aebf3f3 100644 --- a/configs/integratorap_cm720t_defconfig +++ b/configs/integratorap_cm720t_defconfig @@ -19,6 +19,9 @@ CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PCI=y CONFIG_BAUDRATE=38400 CONFIG_OF_LIBFDT=y diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig index 1711e4d139..6af27016c3 100644 --- a/configs/integratorap_cm920t_defconfig +++ b/configs/integratorap_cm920t_defconfig @@ -19,6 +19,9 @@ CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PCI=y CONFIG_BAUDRATE=38400 CONFIG_OF_LIBFDT=y diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig index a6b99564ce..177709e852 100644 --- a/configs/integratorap_cm926ejs_defconfig +++ b/configs/integratorap_cm926ejs_defconfig @@ -19,6 +19,9 @@ CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PCI=y CONFIG_BAUDRATE=38400 CONFIG_OF_LIBFDT=y diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig index 6d4c1b53c9..0620e3760f 100644 --- a/configs/integratorap_cm946es_defconfig +++ b/configs/integratorap_cm946es_defconfig @@ -19,6 +19,9 @@ CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PCI=y CONFIG_BAUDRATE=38400 CONFIG_OF_LIBFDT=y diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig index 308b94c519..1b3d067ce6 100644 --- a/configs/integratorcp_cm1136_defconfig +++ b/configs/integratorcp_cm1136_defconfig @@ -18,5 +18,8 @@ CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_BAUDRATE=38400 CONFIG_OF_LIBFDT=y diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig index ddabc0aa33..847196e1cf 100644 --- a/configs/integratorcp_cm920t_defconfig +++ b/configs/integratorcp_cm920t_defconfig @@ -18,5 +18,8 @@ CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_BAUDRATE=38400 CONFIG_OF_LIBFDT=y diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig index b86053d267..b3a1bcba3c 100644 --- a/configs/integratorcp_cm926ejs_defconfig +++ b/configs/integratorcp_cm926ejs_defconfig @@ -18,5 +18,8 @@ CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_BAUDRATE=38400 CONFIG_OF_LIBFDT=y diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig index d830fa8485..cadf5e8915 100644 --- a/configs/integratorcp_cm946es_defconfig +++ b/configs/integratorcp_cm946es_defconfig @@ -18,5 +18,8 @@ CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_BAUDRATE=38400 CONFIG_OF_LIBFDT=y diff --git a/configs/iot_devkit_defconfig b/configs/iot_devkit_defconfig index 1f0f9c3256..1b6dd9e55a 100644 --- a/configs/iot_devkit_defconfig +++ b/configs/iot_devkit_defconfig @@ -4,8 +4,9 @@ CONFIG_CPU_ARCEM6=y CONFIG_SYS_ICACHE_OFF=y CONFIG_SYS_DCACHE_OFF=y CONFIG_TARGET_IOT_DEVKIT=y -CONFIG_SYS_TEXT_BASE=0x20000000 +CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_CLK_FREQ=16000000 +CONFIG_LOCALVERSION="-iotdk-1.0" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_PROMPT="IoTDK# " # CONFIG_CMD_BOOTD is not set @@ -17,7 +18,6 @@ CONFIG_SYS_PROMPT="IoTDK# " # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y CONFIG_CMD_USB=y -# CONFIG_CMD_NET is not set CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y @@ -25,6 +25,7 @@ CONFIG_DEFAULT_DEVICE_TREE="iot_devkit" CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +# CONFIG_NET is not set CONFIG_DM=y CONFIG_MMC=y CONFIG_MMC_DW=y diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig new file mode 100644 index 0000000000..f21e3a8ddf --- /dev/null +++ b/configs/khadas-vim2_defconfig @@ -0,0 +1,51 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_MESON_GXM=y +CONFIG_TARGET_KHADAS_VIM2=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" khadas-vim2" +CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-khadas-vim2" +CONFIG_DEBUG_UART=y +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_ADC=y +CONFIG_SARADC_MESON=y +CONFIG_OF_CONTROL=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_GPIO=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_GXL=y +CONFIG_DEBUG_UART_MESON=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y +CONFIG_USB_DWC3=y +CONFIG_USB_STORAGE=y +CONFIG_PHY=y +CONFIG_MESON_GXL_USB_PHY=y +CONFIG_MTD=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index 941c1f0b72..8a41d1ddc9 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -32,6 +32,11 @@ CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xE011BFF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y CONFIG_BCH=y diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index 2d5f284411..3f78854da7 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -32,6 +32,11 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0xE011BFF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index 5f68f062dd..a81f4a39e6 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -32,6 +32,11 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 98de2e873a..8234e1454f 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -32,6 +32,11 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index a3325a7662..55fbed61c0 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -33,6 +33,11 @@ CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y CONFIG_BCH=y diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index 46dcb379cd..ef7453f85a 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -32,6 +32,11 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/kmvect1_defconfig b/configs/kmvect1_defconfig index 927ef9d56e..4f513cbb50 100644 --- a/configs/kmvect1_defconfig +++ b/configs/kmvect1_defconfig @@ -33,6 +33,11 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/kzm9g_defconfig b/configs/kzm9g_defconfig index b64a437f77..032246a48b 100644 --- a/configs/kzm9g_defconfig +++ b/configs/kzm9g_defconfig @@ -22,6 +22,8 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x10000000 CONFIG_SMC911X_32_BIT=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index d588209206..d697a0302b 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -36,6 +36,9 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index 93b98e8b73..f485b73a8b 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -37,6 +37,9 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 5c2d6862c3..045ef52a0f 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -52,6 +52,9 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index 760ae0a623..716cc63624 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -37,6 +37,9 @@ CONFIG_DM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 5c06a3e0f6..9be4838c7e 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -37,6 +37,9 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 3615000f7f..df922f59af 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -38,6 +38,9 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index c07ac6878c..ec7f1bc15d 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -50,6 +50,9 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 1d1586d7e4..97ffa21228 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -29,8 +29,12 @@ CONFIG_CMD_BMP=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_DM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y @@ -50,5 +54,3 @@ CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_RSA=y CONFIG_SPL_RSA=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index c22686398e..582f52151f 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x60100000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y @@ -28,9 +29,14 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y @@ -39,6 +45,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y @@ -50,10 +57,3 @@ CONFIG_USB_STORAGE=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_BLK=y -CONFIG_DM_MMC=y -CONFIG_DM_SCSI=y -CONFIG_SATA_CEVA=y -CONFIG_SCSI_AHCI=y -CONFIG_SCSI=y -CONFIG_AHCI=y diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index 221755ca3e..a567c07062 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -31,8 +31,12 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-lpuart" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y @@ -51,5 +55,3 @@ CONFIG_USB_STORAGE=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index c540635fa4..44e59d2acc 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -46,6 +46,9 @@ CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 2dfe44dcd1..4824a83fb4 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -42,8 +42,12 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y @@ -61,5 +65,3 @@ CONFIG_USB_STORAGE=y CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index fe0aeafbea..7db5d2d43a 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_FSL_LS_PPA=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y @@ -29,9 +30,14 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_E1000=y @@ -39,6 +45,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y @@ -47,10 +54,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y -CONFIG_BLK=y -CONFIG_DM_MMC=y -CONFIG_DM_SCSI=y -CONFIG_SATA_CEVA=y -CONFIG_SCSI_AHCI=y -CONFIG_SCSI=y -CONFIG_AHCI=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index 2e06f6d8df..65f61f43d1 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -31,8 +31,12 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_E1000=y @@ -49,5 +53,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index aed30c1e7f..06b266aa7d 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -45,8 +45,12 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_E1000=y @@ -62,5 +66,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index c1e86d1e3b..318152a391 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -31,8 +31,12 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_E1000=y @@ -48,5 +52,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index b37d52dbcc..d547fefcda 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -45,8 +45,12 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_E1000=y @@ -62,5 +66,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 28027ff24e..41df0b9fbf 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -24,8 +24,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y @@ -45,5 +49,3 @@ CONFIG_USB_STORAGE=y CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index df68b94f0f..e67273a199 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -25,8 +25,12 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y @@ -43,5 +47,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 97364b0218..356569c907 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -42,8 +42,12 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DM=y CONFIG_SPL_DM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y @@ -62,5 +66,3 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y CONFIG_RSA=y CONFIG_SPL_RSA=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 476bb90cba..154df22d8c 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -42,8 +42,12 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y @@ -60,5 +64,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index d63eb6d0fb..3c19694456 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -43,6 +43,9 @@ CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 95438004e5..6424f85eaa 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -40,8 +40,12 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y @@ -58,5 +62,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index bab8009128..8f61afa5fd 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -30,8 +30,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_DM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_E1000=y @@ -49,5 +53,3 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y CONFIG_RSA=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index fad2eed085..47a8dcd68b 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -31,8 +31,12 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_E1000=y @@ -49,5 +53,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index 08f2f14475..7edb0ad384 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -32,8 +32,12 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-lpuart" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_E1000=y @@ -51,5 +55,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 3d302057d6..d8a5b0e95e 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -38,8 +38,12 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_E1000=y @@ -56,5 +60,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index e9c101fabe..ff9b0367ae 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -47,8 +47,12 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_E1000=y @@ -65,5 +69,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig index 64677f0f9d..177c56889a 100644 --- a/configs/ls1088aqds_defconfig +++ b/configs/ls1088aqds_defconfig @@ -28,8 +28,12 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_SPI_FLASH=y CONFIG_E1000=y CONFIG_MII=y @@ -47,5 +51,3 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index b1dc2ef306..b34be2eaf9 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -38,8 +38,12 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_E1000=y CONFIG_MII=y @@ -55,5 +59,3 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls2080a_simu_defconfig b/configs/ls2080a_simu_defconfig index 57a568d9bb..17460a2198 100644 --- a/configs/ls2080a_simu_defconfig +++ b/configs/ls2080a_simu_defconfig @@ -33,8 +33,9 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index b8b043172f..6a2a522046 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -31,8 +31,12 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y @@ -54,5 +58,3 @@ CONFIG_USB_STORAGE=y CONFIG_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index 30263513de..f4a361a64d 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -32,8 +32,12 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y @@ -53,5 +57,3 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 9d79a22c0e..bf4ab46063 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -31,8 +31,12 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y @@ -55,5 +59,3 @@ CONFIG_USB_STORAGE=y CONFIG_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index f3ff02c087..a604bc1cb9 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -32,8 +32,12 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y @@ -54,5 +58,3 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 8af5cba98b..135cd80253 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -40,8 +40,12 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_E1000=y @@ -58,5 +62,3 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_BLK=y -CONFIG_DM_MMC=y diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index c509581ee8..15c4e622c8 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -22,5 +22,9 @@ CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="mti,malta" CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PCI=y +CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index 992c855579..592fef5d2c 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -23,5 +23,9 @@ CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="mti,malta" CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PCI=y +CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/configs/malta_defconfig b/configs/malta_defconfig index 585440584e..9d6064ec91 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -21,5 +21,9 @@ CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="mti,malta" CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PCI=y +CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index 9cba7229f1..f30f451b4e 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -22,5 +22,9 @@ CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="mti,malta" CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PCI=y +CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 66447e8057..964db15c81 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -28,10 +28,15 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_FSL_ESDHC=y +CONFIG_MTD_PARTITIONS=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y -CONFIG_MTD_PARTITIONS=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index e965e78d36..9f4507e839 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -29,10 +29,15 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_FSL_ESDHC=y +CONFIG_MTD_PARTITIONS=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y -CONFIG_MTD_PARTITIONS=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 7cd5e6da31..ab378f8919 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -44,9 +44,14 @@ CONFIG_DM_GPIO=y CONFIG_XILINX_GPIO=y CONFIG_LED=y CONFIG_LED_GPIO=y +CONFIG_MTD_PARTITIONS=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y -CONFIG_MTD_PARTITIONS=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y diff --git a/configs/mpc8308_p1m_defconfig b/configs/mpc8308_p1m_defconfig index 661bafc915..114ffeeddb 100644 --- a/configs/mpc8308_p1m_defconfig +++ b/configs/mpc8308_p1m_defconfig @@ -16,6 +16,9 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/mpr2_defconfig b/configs/mpr2_defconfig index 238f8f5287..3e50c555ca 100644 --- a/configs/mpr2_defconfig +++ b/configs/mpr2_defconfig @@ -25,5 +25,7 @@ CONFIG_CMD_CACHE=y # CONFIG_CMD_MISC is not set # CONFIG_NET is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/ms7720se_defconfig b/configs/ms7720se_defconfig index 7434a1ff86..1e580f5cd0 100644 --- a/configs/ms7720se_defconfig +++ b/configs/ms7720se_defconfig @@ -30,5 +30,7 @@ CONFIG_CMD_EXT2=y CONFIG_DOS_PARTITION=y # CONFIG_NET is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/ms7722se_defconfig b/configs/ms7722se_defconfig index 37463a33c4..642527574b 100644 --- a/configs/ms7722se_defconfig +++ b/configs/ms7722se_defconfig @@ -27,5 +27,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/ms7750se_defconfig b/configs/ms7750se_defconfig index db2d6b03a3..6534dd9d40 100644 --- a/configs/ms7750se_defconfig +++ b/configs/ms7750se_defconfig @@ -25,6 +25,8 @@ CONFIG_BOOTARGS="console=ttySC0,38400" CONFIG_ENV_IS_IN_FLASH=y # CONFIG_NET is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_BAUDRATE=38400 CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/mx35pdk_defconfig b/configs/mx35pdk_defconfig index 082c26309d..b37fb562ba 100644 --- a/configs/mx35pdk_defconfig +++ b/configs/mx35pdk_defconfig @@ -27,8 +27,13 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_MII=y diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index 258b9781cc..d5c7cc7129 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_SYS_TEXT_BASE=0x43E00000 CONFIG_ARCH_EXYNOS5=y -CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1" +CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1/HC2" CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=8 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index 4521aedb2a..2b7dececf7 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -24,8 +24,8 @@ CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_NAND=y CONFIG_CMD_NAND_LOCK_UNLOCK=y CONFIG_CMD_CACHE=y -CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0" -CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1792k(u-boot),128k(spl-os),128k(u-boot-env),6m(kernel),-(fs)" +CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0,nor0=physmap-flash.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1792k(u-boot),128k(spl-os),128k(u-boot-env),6m(kernel),-(fs);physmap-flash.0:-(nor)" CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y @@ -39,6 +39,12 @@ CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index d29621d8ce..16351ba41c 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -20,12 +20,11 @@ CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 # CONFIG_CMD_EEPROM is not set -# CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_NAND_LOCK_UNLOCK=y CONFIG_CMD_CACHE=y -CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0" -CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1792k(u-boot),128k(spl-os),128k(u-boot-env),6m(kernel),-(fs)" +CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0,nor0=physmap-flash.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1792k(u-boot),128k(spl-os),128k(u-boot-env),6m(kernel),-(fs);physmap-flash.0:-(nor)" CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y @@ -40,6 +39,12 @@ CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y CONFIG_MMC_OMAP36XX_PINS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index b8c6a8fa09..d2c4c25672 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -36,6 +36,8 @@ CONFIG_DM_GPIO=y CONFIG_AT91_GPIO=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index 2a269c761b..ceb7efe503 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -36,6 +36,8 @@ CONFIG_DM_GPIO=y CONFIG_AT91_GPIO=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index cf1ba8ea61..32922b84ff 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -63,6 +63,7 @@ CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y CONFIG_CPU=y +CONFIG_SPL_DM_RTC=y CONFIG_SPI=y CONFIG_SPL_TIMER=y CONFIG_USB_STORAGE=y diff --git a/configs/qemu_mips64_defconfig b/configs/qemu_mips64_defconfig index 6789530dc1..aff109512e 100644 --- a/configs/qemu_mips64_defconfig +++ b/configs/qemu_mips64_defconfig @@ -18,5 +18,8 @@ CONFIG_CMD_FAT=y # CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_NS16550=y CONFIG_LZMA=y diff --git a/configs/qemu_mips64el_defconfig b/configs/qemu_mips64el_defconfig index 577bf42067..63cbd44c0d 100644 --- a/configs/qemu_mips64el_defconfig +++ b/configs/qemu_mips64el_defconfig @@ -19,5 +19,8 @@ CONFIG_CMD_FAT=y # CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_NS16550=y CONFIG_LZMA=y diff --git a/configs/qemu_mips_defconfig b/configs/qemu_mips_defconfig index a6950fc230..37bf69f9e8 100644 --- a/configs/qemu_mips_defconfig +++ b/configs/qemu_mips_defconfig @@ -16,5 +16,8 @@ CONFIG_CMD_FAT=y # CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_NS16550=y CONFIG_LZMA=y diff --git a/configs/qemu_mipsel_defconfig b/configs/qemu_mipsel_defconfig index 6ee0acfc5b..82091b97df 100644 --- a/configs/qemu_mipsel_defconfig +++ b/configs/qemu_mipsel_defconfig @@ -17,5 +17,8 @@ CONFIG_CMD_FAT=y # CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_NS16550=y CONFIG_LZMA=y diff --git a/configs/r0p7734_defconfig b/configs/r0p7734_defconfig index 376b4f3058..111cb5da90 100644 --- a/configs/r0p7734_defconfig +++ b/configs/r0p7734_defconfig @@ -27,6 +27,8 @@ CONFIG_CMD_PING=y # CONFIG_CMD_MISC is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig index b3b915c9f7..4c1912c8a1 100644 --- a/configs/r2dplus_defconfig +++ b/configs/r2dplus_defconfig @@ -16,6 +16,8 @@ CONFIG_CMD_EXT2=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_RTL8139=y CONFIG_PCI=y CONFIG_SCIF_CONSOLE=y diff --git a/configs/r7780mp_defconfig b/configs/r7780mp_defconfig index 60271d37e2..7862312d23 100644 --- a/configs/r7780mp_defconfig +++ b/configs/r7780mp_defconfig @@ -29,6 +29,8 @@ CONFIG_CMD_EXT2=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PCI=y CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/r8a7795_salvator-x_defconfig b/configs/r8a7795_salvator-x_defconfig index aae38e84a0..87870fc595 100644 --- a/configs/r8a7795_salvator-x_defconfig +++ b/configs/r8a7795_salvator-x_defconfig @@ -8,7 +8,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a7795-salvator-x.dtb" CONFIG_VERSION_VARIABLE=y @@ -21,6 +21,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y diff --git a/configs/r8a7795_ulcb_defconfig b/configs/r8a7795_ulcb_defconfig index c341e1aaac..f1d150b5a0 100644 --- a/configs/r8a7795_ulcb_defconfig +++ b/configs/r8a7795_ulcb_defconfig @@ -8,7 +8,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a7795-h3ulcb.dtb" CONFIG_VERSION_VARIABLE=y diff --git a/configs/r8a77965_salvator-x_defconfig b/configs/r8a77965_salvator-x_defconfig index 567f63977e..72549e2836 100644 --- a/configs/r8a77965_salvator-x_defconfig +++ b/configs/r8a77965_salvator-x_defconfig @@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a77965-salvator-x.dtb" CONFIG_VERSION_VARIABLE=y diff --git a/configs/r8a7796_salvator-x_defconfig b/configs/r8a7796_salvator-x_defconfig index e3551a8007..7c39268a43 100644 --- a/configs/r8a7796_salvator-x_defconfig +++ b/configs/r8a7796_salvator-x_defconfig @@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a7796-salvator-x.dtb" CONFIG_VERSION_VARIABLE=y diff --git a/configs/r8a7796_ulcb_defconfig b/configs/r8a7796_ulcb_defconfig index 8086261637..ef5c9443f9 100644 --- a/configs/r8a7796_ulcb_defconfig +++ b/configs/r8a7796_ulcb_defconfig @@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a7796-m3ulcb.dtb" CONFIG_VERSION_VARIABLE=y diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index 0cd47c1203..67ef2632a9 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb" CONFIG_VERSION_VARIABLE=y diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 4f9ebad23d..7363310d52 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb" CONFIG_VERSION_VARIABLE=y diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index ca89a12b7b..f704d325fc 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb" CONFIG_VERSION_VARIABLE=y @@ -46,7 +46,10 @@ CONFIG_RENESAS_SDHI=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y CONFIG_RENESAS_RPC_HF=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/rsk7203_defconfig b/configs/rsk7203_defconfig index 6bcef9f2ec..231d699270 100644 --- a/configs/rsk7203_defconfig +++ b/configs/rsk7203_defconfig @@ -26,5 +26,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y # CONFIG_CMD_MISC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/rsk7264_defconfig b/configs/rsk7264_defconfig index 06c9369882..2ae70842a8 100644 --- a/configs/rsk7264_defconfig +++ b/configs/rsk7264_defconfig @@ -9,5 +9,7 @@ CONFIG_BOOTARGS="console=ttySC3,115200" CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/rsk7269_defconfig b/configs/rsk7269_defconfig index cc9afa14f6..3d2b03cc57 100644 --- a/configs/rsk7269_defconfig +++ b/configs/rsk7269_defconfig @@ -9,5 +9,7 @@ CONFIG_BOOTARGS="console=ttySC7,115200" CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index 0ac2445887..13395efe0e 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -15,7 +15,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FAT_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y @@ -28,7 +27,6 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p2 rw rootwai CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set @@ -41,6 +39,7 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="1" @@ -89,3 +88,8 @@ CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y CONFIG_DM_VIDEO=y CONFIG_ATMEL_HLCD=y +CONFIG_W1=y +CONFIG_W1_GPIO=y +CONFIG_W1_EEPROM=y +CONFIG_W1_EEPROM_DS24XXX=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index fbde79c4ef..e260554a21 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -29,7 +29,6 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index 60df0f0062..e40ee00312 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -13,12 +13,13 @@ CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait" CONFIG_CONSOLE_MUX=y CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index 4e39406a24..dd6068dd46 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -13,12 +13,13 @@ CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" CONFIG_CONSOLE_MUX=y CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index ca5d4f4221..4e6169285b 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -15,7 +15,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_FAT_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y @@ -28,7 +27,6 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwai CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set @@ -41,6 +39,7 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" @@ -86,3 +85,8 @@ CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y CONFIG_DM_VIDEO=y CONFIG_ATMEL_HLCD=y +CONFIG_W1=y +CONFIG_W1_GPIO=y +CONFIG_W1_EEPROM=y +CONFIG_W1_EEPROM_DS24XXX=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index f8748f8c84..fd2526158c 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -29,7 +29,6 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index efe71769a4..9bb4a07546 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -27,7 +27,6 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 154cdc2189..9ff71deb8c 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -27,7 +27,6 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwai CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 3bf93de9c0..39bb68b49d 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -24,7 +24,6 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(boots CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 24aa13c45d..6faea0ec3f 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -62,6 +62,9 @@ CONFIG_AT91_GPIO=y CONFIG_DM_MMC=y CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index 7a99414451..e641279ee1 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -57,6 +57,9 @@ CONFIG_AT91_GPIO=y CONFIG_DM_MMC=y CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 48103f0f28..37f603d528 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -57,6 +57,9 @@ CONFIG_AT91_GPIO=y CONFIG_DM_MMC=y CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index f60b6b5bc9..bfcea3f519 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -28,7 +28,6 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 3524dbffcf..2c1b7f17c0 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -25,7 +25,6 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 3f519cd503..a89dd11a8c 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -27,7 +27,6 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMI is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 1c4a3330b4..2ce336fc81 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -1,5 +1,6 @@ CONFIG_SYS_TEXT_BASE=0 CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ANDROID_BOOT_IMAGE=y @@ -173,6 +174,7 @@ CONFIG_REMOTEPROC_SANDBOX=y CONFIG_DM_RESET=y CONFIG_SANDBOX_RESET=y CONFIG_DM_RTC=y +CONFIG_DEBUG_UART_SANDBOX=y CONFIG_SANDBOX_SERIAL=y CONFIG_SMEM=y CONFIG_SANDBOX_SMEM=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 9f672e5063..2f8a98c379 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 CONFIG_CONSOLE_RECORD=y CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 CONFIG_SILENT_CONSOLE=y +CONFIG_LOG_MAX_LEVEL=6 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y diff --git a/configs/sbc8349_PCI_33_defconfig b/configs/sbc8349_PCI_33_defconfig index 01a6c260dd..02d5185124 100644 --- a/configs/sbc8349_PCI_33_defconfig +++ b/configs/sbc8349_PCI_33_defconfig @@ -15,6 +15,8 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/sbc8349_PCI_66_defconfig b/configs/sbc8349_PCI_66_defconfig index 30bb7c366f..945c5229b9 100644 --- a/configs/sbc8349_PCI_66_defconfig +++ b/configs/sbc8349_PCI_66_defconfig @@ -15,6 +15,8 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/sbc8349_defconfig b/configs/sbc8349_defconfig index 06b5ba0044..82379e67d2 100644 --- a/configs/sbc8349_defconfig +++ b/configs/sbc8349_defconfig @@ -13,6 +13,8 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set diff --git a/configs/sbc8548_PCI_33_PCIE_defconfig b/configs/sbc8548_PCI_33_PCIE_defconfig index da26d50c06..5a04646a7e 100644 --- a/configs/sbc8548_PCI_33_PCIE_defconfig +++ b/configs/sbc8548_PCI_33_PCIE_defconfig @@ -21,6 +21,8 @@ CONFIG_CMD_PING=y # CONFIG_CMD_IRQ is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/sbc8548_PCI_33_defconfig b/configs/sbc8548_PCI_33_defconfig index a2c01be85a..36291e0e7a 100644 --- a/configs/sbc8548_PCI_33_defconfig +++ b/configs/sbc8548_PCI_33_defconfig @@ -21,6 +21,8 @@ CONFIG_CMD_PING=y # CONFIG_CMD_IRQ is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/sbc8548_PCI_66_PCIE_defconfig b/configs/sbc8548_PCI_66_PCIE_defconfig index c97d9c2afc..cfe0f3a340 100644 --- a/configs/sbc8548_PCI_66_PCIE_defconfig +++ b/configs/sbc8548_PCI_66_PCIE_defconfig @@ -21,6 +21,8 @@ CONFIG_CMD_PING=y # CONFIG_CMD_IRQ is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/sbc8548_PCI_66_defconfig b/configs/sbc8548_PCI_66_defconfig index eda393d36c..e4b3c63def 100644 --- a/configs/sbc8548_PCI_66_defconfig +++ b/configs/sbc8548_PCI_66_defconfig @@ -21,6 +21,8 @@ CONFIG_CMD_PING=y # CONFIG_CMD_IRQ is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/sbc8548_defconfig b/configs/sbc8548_defconfig index c3cf3a33db..33be2b90df 100644 --- a/configs/sbc8548_defconfig +++ b/configs/sbc8548_defconfig @@ -19,6 +19,8 @@ CONFIG_CMD_PING=y # CONFIG_CMD_IRQ is not set # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/sbc8641d_defconfig b/configs/sbc8641d_defconfig index bc30124504..d1ffea5afb 100644 --- a/configs/sbc8641d_defconfig +++ b/configs/sbc8641d_defconfig @@ -17,6 +17,9 @@ CONFIG_MP=y CONFIG_DOS_PARTITION=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig index 16c7846ed7..12adfb01e7 100644 --- a/configs/sfr_nb4-ser_ram_defconfig +++ b/configs/sfr_nb4-ser_ram_defconfig @@ -38,7 +38,10 @@ CONFIG_LED_BCM6358=y CONFIG_LED_GPIO=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY=y CONFIG_BCM6358_USBH_PHY=y CONFIG_DM_RESET=y diff --git a/configs/sh7763rdp_defconfig b/configs/sh7763rdp_defconfig index e8eb7e27a9..89fdc98ee6 100644 --- a/configs/sh7763rdp_defconfig +++ b/configs/sh7763rdp_defconfig @@ -28,6 +28,8 @@ CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sh7785lcr_32bit_defconfig b/configs/sh7785lcr_32bit_defconfig index ebcde31d22..b520be5c37 100644 --- a/configs/sh7785lcr_32bit_defconfig +++ b/configs/sh7785lcr_32bit_defconfig @@ -31,6 +31,8 @@ CONFIG_CMD_FAT=y CONFIG_MAC_PARTITION=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PCI=y CONFIG_SCIF_CONSOLE=y CONFIG_USB=y diff --git a/configs/sh7785lcr_defconfig b/configs/sh7785lcr_defconfig index cbf047427d..d48ba73346 100644 --- a/configs/sh7785lcr_defconfig +++ b/configs/sh7785lcr_defconfig @@ -30,6 +30,8 @@ CONFIG_CMD_FAT=y CONFIG_MAC_PARTITION=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PCI=y CONFIG_SCIF_CONSOLE=y CONFIG_USB=y diff --git a/configs/shmin_defconfig b/configs/shmin_defconfig index 746978dc5d..4686e67efd 100644 --- a/configs/shmin_defconfig +++ b/configs/shmin_defconfig @@ -25,5 +25,7 @@ CONFIG_CMD_SDRAM=y CONFIG_CMD_PING=y # CONFIG_CMD_MISC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index 8ccd80cd43..2d5e158871 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -32,6 +32,8 @@ CONFIG_CMD_EXT2=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/spear310_pnor_defconfig b/configs/spear310_pnor_defconfig index 7b9f7fe7c0..6969644cbf 100644 --- a/configs/spear310_pnor_defconfig +++ b/configs/spear310_pnor_defconfig @@ -21,9 +21,12 @@ CONFIG_CMD_PING=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_I2C_DW=y # CONFIG_MMC is not set +CONFIG_MTD_PARTITIONS=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y -CONFIG_MTD_PARTITIONS=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/spear310_usbtty_pnor_defconfig b/configs/spear310_usbtty_pnor_defconfig index bab444aeec..847b2c8c1f 100644 --- a/configs/spear310_usbtty_pnor_defconfig +++ b/configs/spear310_usbtty_pnor_defconfig @@ -21,9 +21,12 @@ CONFIG_CMD_PING=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_I2C_DW=y # CONFIG_MMC is not set +CONFIG_MTD_PARTITIONS=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y -CONFIG_MTD_PARTITIONS=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/spear320_pnor_defconfig b/configs/spear320_pnor_defconfig index d1e5140ff4..2f97047750 100644 --- a/configs/spear320_pnor_defconfig +++ b/configs/spear320_pnor_defconfig @@ -21,9 +21,12 @@ CONFIG_CMD_PING=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_I2C_DW=y # CONFIG_MMC is not set +CONFIG_MTD_PARTITIONS=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y -CONFIG_MTD_PARTITIONS=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/spear320_usbtty_pnor_defconfig b/configs/spear320_usbtty_pnor_defconfig index d3cdea9ad6..dea26052f1 100644 --- a/configs/spear320_usbtty_pnor_defconfig +++ b/configs/spear320_usbtty_pnor_defconfig @@ -21,9 +21,12 @@ CONFIG_CMD_PING=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_I2C_DW=y # CONFIG_MMC is not set +CONFIG_MTD_PARTITIONS=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y -CONFIG_MTD_PARTITIONS=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/strider_con_defconfig b/configs/strider_con_defconfig index 6268279cea..24c793dfc5 100644 --- a/configs/strider_con_defconfig +++ b/configs/strider_con_defconfig @@ -32,6 +32,9 @@ CONFIG_CMD_EXT2=y CONFIG_DOS_PARTITION=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/strider_con_dp_defconfig b/configs/strider_con_dp_defconfig index a45aba1fc3..c70d99a7e6 100644 --- a/configs/strider_con_dp_defconfig +++ b/configs/strider_con_dp_defconfig @@ -32,6 +32,9 @@ CONFIG_CMD_EXT2=y CONFIG_DOS_PARTITION=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/strider_cpu_defconfig b/configs/strider_cpu_defconfig index ef2f0e4eb4..fef58848af 100644 --- a/configs/strider_cpu_defconfig +++ b/configs/strider_cpu_defconfig @@ -32,6 +32,9 @@ CONFIG_CMD_EXT2=y CONFIG_DOS_PARTITION=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/strider_cpu_dp_defconfig b/configs/strider_cpu_dp_defconfig index be70e723b7..fc8f39eb54 100644 --- a/configs/strider_cpu_dp_defconfig +++ b/configs/strider_cpu_dp_defconfig @@ -32,6 +32,9 @@ CONFIG_CMD_EXT2=y CONFIG_DOS_PARTITION=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/suvd3_defconfig b/configs/suvd3_defconfig index 6bb1ae0e00..8f3248e066 100644 --- a/configs/suvd3_defconfig +++ b/configs/suvd3_defconfig @@ -32,6 +32,11 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index 1c67bc0c15..bee1baa41e 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -32,6 +32,11 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index de22b0b5ea..69b359c527 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -32,6 +32,11 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index 52de8ca46c..bfaef1381d 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -9,8 +9,10 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" +CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index 7afdd7c1ca..d9400b8596 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -24,7 +24,6 @@ CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y # CONFIG_CMD_MISC is not set -CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=uniphier-nand.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=uniphier-nand.0:1m(firmware),-(UBI)" CONFIG_CMD_UBI=y @@ -37,7 +36,8 @@ CONFIG_MISC=y CONFIG_I2C_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_MMC_UNIPHIER=y -CONFIG_MTD_PARTITIONS=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_NAND_DENALI_DT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index 1b7bd5b299..7b1f006423 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -23,7 +23,6 @@ CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y # CONFIG_CMD_MISC is not set -CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=uniphier-nand.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=uniphier-nand.0:1m(firmware),-(UBI)" CONFIG_CMD_UBI=y @@ -36,7 +35,8 @@ CONFIG_MISC=y CONFIG_I2C_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_MMC_UNIPHIER=y -CONFIG_MTD_PARTITIONS=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_NAND_DENALI_DT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index 5ec39126b3..25587557c5 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -34,6 +34,8 @@ CONFIG_MMC_UNIPHIER=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_NAND_DENALI_DT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 diff --git a/configs/vct_platinum_defconfig b/configs/vct_platinum_defconfig index 53358f7af2..2a35ace0e0 100644 --- a/configs/vct_platinum_defconfig +++ b/configs/vct_platinum_defconfig @@ -16,6 +16,8 @@ CONFIG_CMD_SNTP=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x00000000 CONFIG_SMC911X_32_BIT=y diff --git a/configs/vct_platinum_small_defconfig b/configs/vct_platinum_small_defconfig index 79f0811bfb..8a3f94aadf 100644 --- a/configs/vct_platinum_small_defconfig +++ b/configs/vct_platinum_small_defconfig @@ -22,4 +22,6 @@ CONFIG_CMD_IMLS=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_NET is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_NS16550=y diff --git a/configs/vct_platinumavc_defconfig b/configs/vct_platinumavc_defconfig index 974d47b4d0..3783becc8a 100644 --- a/configs/vct_platinumavc_defconfig +++ b/configs/vct_platinumavc_defconfig @@ -13,5 +13,7 @@ CONFIG_CMD_I2C=y # CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_NS16550=y # CONFIG_REGEX is not set diff --git a/configs/vct_platinumavc_small_defconfig b/configs/vct_platinumavc_small_defconfig index f3cab1c1c3..0d8cd07f9f 100644 --- a/configs/vct_platinumavc_small_defconfig +++ b/configs/vct_platinumavc_small_defconfig @@ -22,4 +22,6 @@ CONFIG_CMD_IMLS=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_NET is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_NS16550=y diff --git a/configs/vct_premium_defconfig b/configs/vct_premium_defconfig index 441021177c..2396b24d55 100644 --- a/configs/vct_premium_defconfig +++ b/configs/vct_premium_defconfig @@ -16,6 +16,8 @@ CONFIG_CMD_SNTP=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x00000000 CONFIG_SMC911X_32_BIT=y diff --git a/configs/vct_premium_small_defconfig b/configs/vct_premium_small_defconfig index 93bb30568c..a8eba61827 100644 --- a/configs/vct_premium_small_defconfig +++ b/configs/vct_premium_small_defconfig @@ -22,4 +22,6 @@ CONFIG_CMD_IMLS=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_NET is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_NS16550=y diff --git a/configs/ve8313_defconfig b/configs/ve8313_defconfig index 018820b7a2..584aafb08f 100644 --- a/configs/ve8313_defconfig +++ b/configs/ve8313_defconfig @@ -16,6 +16,9 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/vexpress_aemv8a_dram_defconfig b/configs/vexpress_aemv8a_dram_defconfig index 65acbda274..9848f96293 100644 --- a/configs/vexpress_aemv8a_dram_defconfig +++ b/configs/vexpress_aemv8a_dram_defconfig @@ -29,5 +29,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_SERIAL=y CONFIG_OF_LIBFDT=y diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index bfd421f767..ef38915955 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -29,6 +29,10 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x018000000 CONFIG_SMC911X_32_BIT=y diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 896dd89de9..a4d1233cd5 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -29,5 +29,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_DM_SERIAL=y CONFIG_OF_LIBFDT=y diff --git a/configs/vexpress_ca15_tc2_defconfig b/configs/vexpress_ca15_tc2_defconfig index ff872c82f0..f4d555be48 100644 --- a/configs/vexpress_ca15_tc2_defconfig +++ b/configs/vexpress_ca15_tc2_defconfig @@ -20,6 +20,10 @@ CONFIG_CMD_MMC=y # CONFIG_CMD_MISC is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x1a000000 CONFIG_SMC911X_32_BIT=y diff --git a/configs/vexpress_ca5x2_defconfig b/configs/vexpress_ca5x2_defconfig index 49b2165a40..bdacc60c2c 100644 --- a/configs/vexpress_ca5x2_defconfig +++ b/configs/vexpress_ca5x2_defconfig @@ -19,6 +19,10 @@ CONFIG_CMD_MMC=y # CONFIG_CMD_MISC is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x1a000000 CONFIG_SMC911X_32_BIT=y diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig index 92f6cc3b8e..7a90831918 100644 --- a/configs/vexpress_ca9x4_defconfig +++ b/configs/vexpress_ca9x4_defconfig @@ -19,6 +19,10 @@ CONFIG_CMD_MMC=y # CONFIG_CMD_MISC is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x4e000000 CONFIG_SMC911X_32_BIT=y diff --git a/configs/vme8349_defconfig b/configs/vme8349_defconfig index dae53cf238..a7d81a3a0f 100644 --- a/configs/vme8349_defconfig +++ b/configs/vme8349_defconfig @@ -17,6 +17,8 @@ CONFIG_CMD_PING=y CONFIG_CMD_DATE=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_TSEC_ENET=y CONFIG_BAUDRATE=9600 diff --git a/configs/woodburn_defconfig b/configs/woodburn_defconfig index fb57e88f3f..ec90c0f78c 100644 --- a/configs/woodburn_defconfig +++ b/configs/woodburn_defconfig @@ -28,8 +28,13 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_PHYLIB=y diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig index f9c7988e49..12e949c65a 100644 --- a/configs/woodburn_sd_defconfig +++ b/configs/woodburn_sd_defconfig @@ -39,8 +39,13 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y CONFIG_FSL_ESDHC=y -CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_PHYLIB=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 7504077558..105e51a400 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -1,12 +1,13 @@ CONFIG_ARM=y -CONFIG_TARGET_WORK_92105=y +CONFIG_ARCH_LPC32XX=y CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL=y +CONFIG_TARGET_WORK_92105=y CONFIG_CMD_HD44760=y CONFIG_CMD_MAX6957=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -32,13 +33,9 @@ CONFIG_CMD_PING=y CONFIG_CMD_DATE=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_DM=y -CONFIG_SPL_DM=y -CONFIG_DM_GPIO=y # CONFIG_MMC is not set CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y -CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_LPC32XX_SSP=y diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig new file mode 100644 index 0000000000..668c313a29 --- /dev/null +++ b/configs/xilinx_versal_virt_defconfig @@ -0,0 +1,68 @@ +CONFIG_ARM=y +CONFIG_ARCH_VERSAL=y +CONFIG_SYS_TEXT_BASE=0x8000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=0 +CONFIG_COUNTER_FREQUENCY=62500000 +CONFIG_DEBUG_UART=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_BOOTDELAY=-1 +CONFIG_SUPPORT_RAW_INITRD=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="Versal> " +CONFIG_CMD_BOOTMENU=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_PXE=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_ISO_PARTITION=y +CONFIG_EFI_PARTITION=y +# CONFIG_PARTITION_UUIDS is not set +CONFIG_OF_BOARD=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHY_FIXED=y +CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y +CONFIG_MII=y +CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART_PL011=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_PL01X_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FAT_WRITE=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index c0ec79c98c..917637ddac 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -39,6 +39,7 @@ CONFIG_CMD_MMC=y # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set +# CONFIG_MP is not set CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index c1f5e64a04..1ffa528d6d 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -39,6 +39,7 @@ CONFIG_CMD_MMC=y # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set +# CONFIG_MP is not set CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index e119ec1c3b..74ba0c97f3 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set +# CONFIG_MP is not set # CONFIG_PARTITIONS is not set CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 9fcc7c2ea3..db129b6ce7 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -42,7 +42,6 @@ CONFIG_CMD_SF=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_MISC is not set -CONFIG_MP=y # CONFIG_PARTITIONS is not set CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi" diff --git a/configs/xilinx_zynqmp_zc1232_revA_defconfig b/configs/xilinx_zynqmp_zc1232_revA_defconfig index 2aeee193fa..7521fc4e34 100644 --- a/configs/xilinx_zynqmp_zc1232_revA_defconfig +++ b/configs/xilinx_zynqmp_zc1232_revA_defconfig @@ -25,7 +25,6 @@ CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADP=y # CONFIG_CMD_NET is not set CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/xilinx_zynqmp_zc1254_revA_defconfig b/configs/xilinx_zynqmp_zc1254_revA_defconfig index e72808d428..e0822b931e 100644 --- a/configs/xilinx_zynqmp_zc1254_revA_defconfig +++ b/configs/xilinx_zynqmp_zc1254_revA_defconfig @@ -25,7 +25,6 @@ CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADP=y # CONFIG_CMD_NET is not set CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/xilinx_zynqmp_zc1275_revA_defconfig b/configs/xilinx_zynqmp_zc1275_revA_defconfig index c8746b9a98..3afed69737 100644 --- a/configs/xilinx_zynqmp_zc1275_revA_defconfig +++ b/configs/xilinx_zynqmp_zc1275_revA_defconfig @@ -25,7 +25,6 @@ CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADP=y # CONFIG_CMD_NET is not set CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/xilinx_zynqmp_zc1275_revB_defconfig b/configs/xilinx_zynqmp_zc1275_revB_defconfig index 053afa7095..7e31b1112f 100644 --- a/configs/xilinx_zynqmp_zc1275_revB_defconfig +++ b/configs/xilinx_zynqmp_zc1275_revB_defconfig @@ -27,7 +27,6 @@ CONFIG_CMD_FPGA_LOADP=y CONFIG_CMD_MMC=y # CONFIG_CMD_NET is not set CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index 28dabddfb3..ec26dd70fd 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -35,7 +35,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig index 89da50d1ad..c2b3d189ec 100644 --- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig @@ -35,7 +35,6 @@ CONFIG_CMD_NAND_LOCK_UNLOCK=y CONFIG_CMD_USB=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig b/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig index e9af979e00..b853e2f56f 100644 --- a/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig @@ -32,7 +32,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig index 445b6b0180..a0bbc0fbde 100644 --- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig @@ -27,7 +27,6 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig index 491619cf08..0625d195c9 100644 --- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig @@ -28,7 +28,6 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/xilinx_zynqmp_zcu100_revC_defconfig b/configs/xilinx_zynqmp_zcu100_revC_defconfig index 48508b59e3..dc1e7cd824 100644 --- a/configs/xilinx_zynqmp_zcu100_revC_defconfig +++ b/configs/xilinx_zynqmp_zcu100_revC_defconfig @@ -20,8 +20,8 @@ CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_ATF=y CONFIG_SYS_PROMPT="ZynqMP> " CONFIG_CMD_BOOTMENU=y -CONFIG_CMD_POWEROFF=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_BIND=y CONFIG_CMD_CLK=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -30,12 +30,12 @@ CONFIG_CMD_FPGA_LOADP=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_POWEROFF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y @@ -66,6 +66,8 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_DM_ETH=y +# CONFIG_NETDEVICES is not set CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y @@ -84,6 +86,8 @@ CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_WDT=y diff --git a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig index 409067b464..e41366ecf7 100644 --- a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig +++ b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig @@ -39,7 +39,6 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/xilinx_zynqmp_zcu102_revA_defconfig b/configs/xilinx_zynqmp_zcu102_revA_defconfig index 066d6de5c3..02dd5ed2b7 100644 --- a/configs/xilinx_zynqmp_zcu102_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revA_defconfig @@ -38,7 +38,6 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig index bd0bc6dc8e..78deb6a967 100644 --- a/configs/xilinx_zynqmp_zcu102_revB_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig @@ -38,7 +38,6 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/xilinx_zynqmp_zcu104_revA_defconfig b/configs/xilinx_zynqmp_zcu104_revA_defconfig index 86670e1e0e..ff57ca8674 100644 --- a/configs/xilinx_zynqmp_zcu104_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu104_revA_defconfig @@ -33,7 +33,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/xilinx_zynqmp_zcu104_revC_defconfig b/configs/xilinx_zynqmp_zcu104_revC_defconfig index e566c4a940..33258e41b2 100644 --- a/configs/xilinx_zynqmp_zcu104_revC_defconfig +++ b/configs/xilinx_zynqmp_zcu104_revC_defconfig @@ -33,7 +33,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/xilinx_zynqmp_zcu106_revA_defconfig b/configs/xilinx_zynqmp_zcu106_revA_defconfig index f4f923e739..210c9a347f 100644 --- a/configs/xilinx_zynqmp_zcu106_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu106_revA_defconfig @@ -34,7 +34,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/xilinx_zynqmp_zcu111_revA_defconfig b/configs/xilinx_zynqmp_zcu111_revA_defconfig index e643d9f878..8bace6d808 100644 --- a/configs/xilinx_zynqmp_zcu111_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu111_revA_defconfig @@ -32,7 +32,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TIME=y -CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/xpedite517x_defconfig b/configs/xpedite517x_defconfig index f52749cc01..d2d8313da6 100644 --- a/configs/xpedite517x_defconfig +++ b/configs/xpedite517x_defconfig @@ -28,6 +28,9 @@ CONFIG_CMD_PCA953X=y CONFIG_DS4510=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/xpedite520x_defconfig b/configs/xpedite520x_defconfig index 296bb017a9..1c0bd951ee 100644 --- a/configs/xpedite520x_defconfig +++ b/configs/xpedite520x_defconfig @@ -29,6 +29,9 @@ CONFIG_CMD_JFFS2=y CONFIG_CMD_PCA953X=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/xpedite537x_defconfig b/configs/xpedite537x_defconfig index 6f2102e02a..e009aabb55 100644 --- a/configs/xpedite537x_defconfig +++ b/configs/xpedite537x_defconfig @@ -32,6 +32,9 @@ CONFIG_CMD_PCA953X=y CONFIG_DS4510=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/xpedite550x_defconfig b/configs/xpedite550x_defconfig index 5e43d22884..5d3569b34d 100644 --- a/configs/xpedite550x_defconfig +++ b/configs/xpedite550x_defconfig @@ -30,6 +30,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_CMD_PCA953X=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index 77354fec07..e95b6649a3 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -23,6 +23,9 @@ CONFIG_DM=y # CONFIG_DM_STDIO is not set # CONFIG_DM_SEQ_ALIAS is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHYLIB=y CONFIG_DM_ETH=y CONFIG_ETHOC=y diff --git a/configs/zipitz2_defconfig b/configs/zipitz2_defconfig index 5a5f211ce9..509adcffd9 100644 --- a/configs/zipitz2_defconfig +++ b/configs/zipitz2_defconfig @@ -20,6 +20,10 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_NET is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_CONS_INDEX=2 CONFIG_PXA_SERIAL=y CONFIG_USB=y diff --git a/configs/zmx25_defconfig b/configs/zmx25_defconfig index 02acb11f94..60f0efd46e 100644 --- a/configs/zmx25_defconfig +++ b/configs/zmx25_defconfig @@ -23,6 +23,9 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index 1f81c0bf74..b4831f89a1 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -46,4 +46,7 @@ CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nor" CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y # CONFIG_EFI_LOADER is not set diff --git a/configs/zynq_dlc20_rev1_0_defconfig b/configs/zynq_dlc20_rev1_0_defconfig new file mode 100644 index 0000000000..4b9fdfe186 --- /dev/null +++ b/configs/zynq_dlc20_rev1_0_defconfig @@ -0,0 +1,74 @@ +CONFIG_ARM=y +CONFIG_ARCH_ZYNQ=y +CONFIG_SYS_TEXT_BASE=0x4000000 +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 +CONFIG_IDENT_STRING=" Xilinx Zynq DLC20 Rev1.0" +CONFIG_SPL_STACK_R_ADDR=0x200000 +CONFIG_DEBUG_UART=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_IMAGE_FORMAT_LEGACY=y +CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd" +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_PROMPT="Zynq> " +CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_CMD_EEPROM=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADFS=y +CONFIG_CMD_FPGA_LOADMK=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_EMBED=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-dlc20-rev1.0" +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQPL=y +CONFIG_DM_GPIO=y +CONFIG_SYS_I2C_ZYNQ=y +CONFIG_ZYNQ_I2C0=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_REALTEK=y +CONFIG_MII=y +CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ZYNQ_SERIAL=y +CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_THOR=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index 619190062f..bcbfa65e41 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -12,9 +12,12 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_PRINT=y +CONFIG_SPL_LOAD_FIT=y CONFIG_IMAGE_FORMAT_LEGACY=y CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd" CONFIG_SPL_STACK_R=y +CONFIG_SPL_FPGA_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_PROMPT="Zynq> " @@ -78,3 +81,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y CONFIG_WDT=y CONFIG_WDT_CDNS=y +CONFIG_SPL_GZIP=y diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig index 8399c9b893..aa20971e44 100644 --- a/configs/zynq_zc770_xm012_defconfig +++ b/configs/zynq_zc770_xm012_defconfig @@ -35,6 +35,9 @@ CONFIG_FPGA_ZYNQPL=y CONFIG_DM_GPIO=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y diff --git a/disk/part_efi.c b/disk/part_efi.c index 519a637684..d6bb53e6b5 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -82,11 +82,11 @@ static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba, uint32_t calc_crc32; /* Check the GPT header signature */ - if (le64_to_cpu(gpt_h->signature) != GPT_HEADER_SIGNATURE) { + if (le64_to_cpu(gpt_h->signature) != GPT_HEADER_SIGNATURE_UBOOT) { printf("%s signature is wrong: 0x%llX != 0x%llX\n", "GUID Partition Table Header", le64_to_cpu(gpt_h->signature), - GPT_HEADER_SIGNATURE); + GPT_HEADER_SIGNATURE_UBOOT); return -1; } @@ -603,7 +603,7 @@ static uint32_t partition_entries_offset(struct blk_desc *dev_desc) int gpt_fill_header(struct blk_desc *dev_desc, gpt_header *gpt_h, char *str_guid, int parts_count) { - gpt_h->signature = cpu_to_le64(GPT_HEADER_SIGNATURE); + gpt_h->signature = cpu_to_le64(GPT_HEADER_SIGNATURE_UBOOT); gpt_h->revision = cpu_to_le32(GPT_HEADER_REVISION_V1); gpt_h->header_size = cpu_to_le32(sizeof(gpt_header)); gpt_h->my_lba = cpu_to_le64(1); diff --git a/doc/README.fdt-control b/doc/README.fdt-control index 634a10616f..d6ab7bf570 100644 --- a/doc/README.fdt-control +++ b/doc/README.fdt-control @@ -56,7 +56,11 @@ In case you are wondering, OF stands for Open Firmware. Tools ----- -To use this feature you will need to get the device tree compiler here: +To use this feature you will need to get the device tree compiler. This is +provided by U-Boot automatically. If you have a system version of dtc +(typically in the 'device-tree-compiler' package), it is currently not used. + +If you want to build your own dtc, it is kept here: git://git.kernel.org/pub/scm/utils/dtc/dtc.git @@ -170,6 +174,16 @@ After board configuration is done, fdt supported u-boot can be build in two ways $ make DEVICE_TREE=<dts-file-name> +Relocation, SPL and TPL +----------------------- + +U-Boot can be divided into three phases: TPL, SPL and U-Boot proper. + +The full device tree is available to U-Boot proper, but normally only a subset +(or none at all) is available to TPL and SPL. See 'Pre-Relocation Support' and +'SPL Support' in doc/driver-model/README.txt for more details. + + Limitations ----------- diff --git a/doc/README.pxe b/doc/README.pxe index 98862cdfde..42f913c61f 100644 --- a/doc/README.pxe +++ b/doc/README.pxe @@ -140,6 +140,13 @@ kernel <path> - if this label is chosen, use tftp to retrieve the kernel (or FIT image) at <path>. it will be stored at the address indicated in the kernel_addr_r environment variable, and that address will be passed to bootm to boot this kernel. + For FIT image, The configuration specification can be + appended to the file name, with the format: + <path>#<conf>[#<extra-conf[#...]] + It will passed to bootm with that address. + (see: doc/uImage.FIT/command_syntax_extensions.txt) + It useful for overlay selection in pxe file + (see: doc/uImage.FIT/overlay-fdt-boot.txt) append <string> - use <string> as the kernel command line when booting this label. diff --git a/doc/README.x86 b/doc/README.x86 index 8cc46725f2..fa49cb8b8a 100644 --- a/doc/README.x86 +++ b/doc/README.x86 @@ -32,7 +32,7 @@ are supported: - Link (Chromebook Pixel) - Minnowboard MAX - Samus (Chromebook Pixel 2015) - - QEMU x86 + - QEMU x86 (32-bit & 64-bit) As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit Linux kernel as part of a FIT image. It also supports a compressed zImage. @@ -376,7 +376,9 @@ QEMU x86 target instructions for bare mode: To build u-boot.rom for QEMU x86 targets, just simply run -$ make qemu-x86_defconfig +$ make qemu-x86_defconfig (for 32-bit) +or +$ make qemu-x86_64_defconfig (for 64-bit) $ make all Note this default configuration will build a U-Boot for the QEMU x86 i440FX @@ -479,6 +481,19 @@ Here the kernel (bzImage) is loaded to 01000000 and initrd is to 04000000. Then, => zboot 01000000 - 04000000 1b1ab50 +To run 64-bit U-Boot, qemu-system-x86_64 should be used instead, e.g.: +$ qemu-system-x86_64 -nographic -bios path/to/u-boot.rom + +A specific CPU can be specified via the '-cpu' parameter but please make +sure the specified CPU supports 64-bit like '-cpu core2duo'. Conversely +'-cpu pentium' won't work for obvious reasons that the processor only +supports 32-bit. + +Note 64-bit support is very preliminary at this point. Lots of features +are missing in the 64-bit world. One notable feature is the VGA console +support which is currently missing, so that you must specify '-nographic' +to get 64-bit U-Boot up and running. + Updating U-Boot on Edison ------------------------- By default Intel Edison boards are shipped with preinstalled heavily @@ -1145,27 +1160,10 @@ to load a 'u-boot-payload.efi', see below test logs on QEMU. See README.u-boot_on_efi and README.uefi for details of EFI support in U-Boot. -64-bit Support --------------- -U-Boot supports booting a 64-bit kernel directly and is able to change to -64-bit mode to do so. However, U-Boot itself is currently always built -in 32-bit mode. Some access to the full memory range is provided with -arch_phys_memset(). - -The development work to make U-Boot itself run in 64-bit mode has not yet -been attempted. The best approach would likely be to build a 32-bit SPL -image for U-Boot, with CONFIG_SPL_BUILD. This could then handle the early CPU -init in 16-bit and 32-bit mode, running the FSP and any other binaries that -are needed. Then it could change to 64-bit model and jump to U-Boot proper. - -Given U-Boot's extensive 64-bit support this has not been a high priority, -but it would be a nice addition. - TODO List --------- - Audio - Chrome OS verified boot -- Building U-Boot to run in 64-bit mode References ---------- diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt b/doc/device-tree-bindings/net/ti,dp83867.txt index cb77fdf082..034146f5f8 100644 --- a/doc/device-tree-bindings/net/ti,dp83867.txt +++ b/doc/device-tree-bindings/net/ti,dp83867.txt @@ -8,6 +8,12 @@ Required properties: for applicable values - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h for applicable values + - enet-phy-lane-swap - Indicates that PHY will swap the TX/RX lanes to + compensate for the board being designed with the lanes swapped. + - enet-phy-no-lane-swap - Indicates that PHY will disable swap of the + TX/RX lanes. + - ti,clk-output-sel - Clock output select - see dt-bindings/net/ti-dp83867.h + for applicable values Default child nodes are standard Ethernet PHY device nodes as described in doc/devicetree/bindings/net/ethernet.txt @@ -19,6 +25,8 @@ Example: ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + enet-phy-lane-no-swap; + ti,clk-output-sel = <DP83867_CLK_O_SEL_CHN_A_TCLK>; }; Datasheet can be found: diff --git a/doc/driver-model/README.txt b/doc/driver-model/README.txt index e949ff63ba..36541630a2 100644 --- a/doc/driver-model/README.txt +++ b/doc/driver-model/README.txt @@ -832,11 +832,14 @@ Pre-Relocation Support For pre-relocation we simply call the driver model init function. Only drivers marked with DM_FLAG_PRE_RELOC or the device tree 'u-boot,dm-pre-reloc' flag are initialised prior to relocation. This helps -to reduce the driver model overhead. +to reduce the driver model overhead. This flag applies to SPL and TPL as +well, if device tree is enabled there. It is possible to limit this to specific relocation steps, by using the more specialized 'u-boot,dm-spl' and 'u-boot,dm-tpl' flags -in the devicetree. +in the device tree node. For U-Boot proper you can use 'u-boot,dm-pre-proper' +which means that it will be processed (and a driver bound) in U-Boot proper +prior to relocation, but will not be available in SPL or TPL. Then post relocation we throw that away and re-init driver model again. For drivers which require some sort of continuity between pre- and diff --git a/doc/driver-model/pci-info.txt b/doc/driver-model/pci-info.txt index e1701d1fbc..14364c5c75 100644 --- a/doc/driver-model/pci-info.txt +++ b/doc/driver-model/pci-info.txt @@ -34,11 +34,15 @@ under that bus. Note that this is all done on a lazy basis, as needed, so until something is touched on PCI (eg: a call to pci_find_devices()) it will not be probed. -PCI devices can appear in the flattened device tree. If they do this serves to -specify the driver to use for the device. In this case they will be bound at -first. Each PCI device node must have a compatible string list as well as a -<reg> property, as defined by the IEEE Std 1275-1994 PCI bus binding document -v2.1. Note we must describe PCI devices with the same bus hierarchy as the +PCI devices can appear in the flattened device tree. If they do, their node +often contains extra information which cannot be derived from the PCI IDs or +PCI class of the device. Each PCI device node must have a <reg> property, as +defined by the IEEE Std 1275-1994 PCI bus binding document v2.1. Compatible +string list is optional and generally not needed, since PCI is discoverable +bus, albeit there are justified exceptions. If the compatible string is +present, matching on it takes precedence over PCI IDs and PCI classes. + +Note we must describe PCI devices with the same bus hierarchy as the hardware, otherwise driver model cannot detect the correct parent/children relationship during PCI bus enumeration thus PCI devices won't be bound to their drivers accordingly. A working example like below: diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig index f9502b36ba..33f4aa2418 100644 --- a/drivers/block/Kconfig +++ b/drivers/block/Kconfig @@ -27,6 +27,18 @@ config SPL_BLK be partitioned into several areas, called 'partitions' in U-Boot. A filesystem can be placed in each partition. +config TPL_BLK + bool "Support block devices in TPL" + depends on TPL_DM && BLK + default y + help + Enable support for block devices, such as SCSI, MMC and USB + flash sticks. These provide a block-level interface which permits + reading, writing and (in some cases) erasing blocks. Block + devices often have a partition table which allows the device to + be partitioned into several areas, called 'partitions' in U-Boot. + A filesystem can be placed in each partition. + config BLOCK_CACHE bool "Use block device cache" depends on BLK diff --git a/drivers/block/Makefile b/drivers/block/Makefile index 0e80ce9405..055d42f7d4 100644 --- a/drivers/block/Makefile +++ b/drivers/block/Makefile @@ -11,4 +11,4 @@ endif obj-$(CONFIG_IDE) += ide.o obj-$(CONFIG_SANDBOX) += sandbox.o -obj-$(CONFIG_$(SPL_)BLOCK_CACHE) += blkcache.o +obj-$(CONFIG_$(SPL_TPL_)BLOCK_CACHE) += blkcache.o diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index 9a0bd516d9..67033637c0 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -127,4 +127,10 @@ config SYS_BOOTCOUNT_ADDR help Set the address used for reading and writing the boot counter. +config SYS_BOOTCOUNT_MAGIC + hex "Magic value for the boot counter" + default 0xB001C041 + help + Set the magic value used for the boot counter. + endif diff --git a/drivers/bootcount/bootcount.c b/drivers/bootcount/bootcount.c index 646c563f8a..66c1284c5b 100644 --- a/drivers/bootcount/bootcount.c +++ b/drivers/bootcount/bootcount.c @@ -16,13 +16,13 @@ __weak void bootcount_store(ulong a) uintptr_t flush_end; #if defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD) - raw_bootcount_store(reg, (BOOTCOUNT_MAGIC & 0xffff0000) | a); + raw_bootcount_store(reg, (CONFIG_SYS_BOOTCOUNT_MAGIC & 0xffff0000) | a); flush_end = roundup(CONFIG_SYS_BOOTCOUNT_ADDR + 4, CONFIG_SYS_CACHELINE_SIZE); #else raw_bootcount_store(reg, a); - raw_bootcount_store(reg + 4, BOOTCOUNT_MAGIC); + raw_bootcount_store(reg + 4, CONFIG_SYS_BOOTCOUNT_MAGIC); flush_end = roundup(CONFIG_SYS_BOOTCOUNT_ADDR + 8, CONFIG_SYS_CACHELINE_SIZE); @@ -37,12 +37,12 @@ __weak ulong bootcount_load(void) #if defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD) u32 tmp = raw_bootcount_load(reg); - if ((tmp & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) + if ((tmp & 0xffff0000) != (CONFIG_SYS_BOOTCOUNT_MAGIC & 0xffff0000)) return 0; else return (tmp & 0x0000ffff); #else - if (raw_bootcount_load(reg + 4) != BOOTCOUNT_MAGIC) + if (raw_bootcount_load(reg + 4) != CONFIG_SYS_BOOTCOUNT_MAGIC) return 0; else return raw_bootcount_load(reg); diff --git a/drivers/bootcount/bootcount_at91.c b/drivers/bootcount/bootcount_at91.c index 3092ba56c0..c4ab5ceafa 100644 --- a/drivers/bootcount/bootcount_at91.c +++ b/drivers/bootcount/bootcount_at91.c @@ -6,15 +6,16 @@ #include <asm/arch/at91_gpbr.h> /* - * We combine the BOOTCOUNT_MAGIC and bootcount in one 32-bit register. - * This is done so we need to use only one of the four GPBR registers. + * We combine the CONFIG_SYS_BOOTCOUNT_MAGIC and bootcount in one 32-bit + * register. This is done so we need to use only one of the four GPBR + * registers. */ void bootcount_store(ulong a) { at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR; - writel((BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff), - &gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]); + writel((CONFIG_SYS_BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff), + &gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]); } ulong bootcount_load(void) @@ -22,7 +23,7 @@ ulong bootcount_load(void) at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR; ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]); - if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) + if ((val & 0xffff0000) != (CONFIG_SYS_BOOTCOUNT_MAGIC & 0xffff0000)) return 0; else return val & 0x0000ffff; diff --git a/drivers/bootcount/bootcount_davinci.c b/drivers/bootcount/bootcount_davinci.c index 7101ad9413..6326957d7b 100644 --- a/drivers/bootcount/bootcount_davinci.c +++ b/drivers/bootcount/bootcount_davinci.c @@ -24,7 +24,7 @@ void bootcount_store(ulong a) writel(RTC_KICK0R_WE, ®->kick0r); writel(RTC_KICK1R_WE, ®->kick1r); raw_bootcount_store(®->scratch2, - (BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff)); + (CONFIG_SYS_BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff)); } ulong bootcount_load(void) @@ -34,7 +34,7 @@ ulong bootcount_load(void) (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR; val = raw_bootcount_load(®->scratch2); - if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) + if ((val & 0xffff0000) != (CONFIG_SYS_BOOTCOUNT_MAGIC & 0xffff0000)) return 0; else return val & 0x0000ffff; diff --git a/drivers/bootcount/bootcount_ram.c b/drivers/bootcount/bootcount_ram.c index e514a57286..edef36724b 100644 --- a/drivers/bootcount/bootcount_ram.c +++ b/drivers/bootcount/bootcount_ram.c @@ -28,7 +28,7 @@ void bootcount_store(ulong a) size += gd->bd->bi_dram[i].size; save_addr = (ulong *)(size - BOOTCOUNT_ADDR); writel(a, save_addr); - writel(BOOTCOUNT_MAGIC, &save_addr[1]); + writel(CONFIG_SYS_BOOTCOUNT_MAGIC, &save_addr[1]); for (i = 0; i < REPEAT_PATTERN; i++) writel(patterns[i % NBR_OF_PATTERNS], diff --git a/drivers/core/device.c b/drivers/core/device.c index feed43c8c3..5176aa3f86 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -331,7 +331,8 @@ int device_probe(struct udevice *dev) /* Allocate private data if requested and not reentered */ size = dev->uclass->uc_drv->per_device_auto_alloc_size; if (size && !dev->uclass_priv) { - dev->uclass_priv = calloc(1, size); + dev->uclass_priv = alloc_priv(size, + dev->uclass->uc_drv->flags); if (!dev->uclass_priv) { ret = -ENOMEM; goto fail; @@ -441,7 +442,7 @@ fail: return ret; } -void *dev_get_platdata(struct udevice *dev) +void *dev_get_platdata(const struct udevice *dev) { if (!dev) { dm_warn("%s: null device\n", __func__); @@ -451,7 +452,7 @@ void *dev_get_platdata(struct udevice *dev) return dev->platdata; } -void *dev_get_parent_platdata(struct udevice *dev) +void *dev_get_parent_platdata(const struct udevice *dev) { if (!dev) { dm_warn("%s: null device\n", __func__); @@ -461,7 +462,7 @@ void *dev_get_parent_platdata(struct udevice *dev) return dev->parent_platdata; } -void *dev_get_uclass_platdata(struct udevice *dev) +void *dev_get_uclass_platdata(const struct udevice *dev) { if (!dev) { dm_warn("%s: null device\n", __func__); @@ -471,7 +472,7 @@ void *dev_get_uclass_platdata(struct udevice *dev) return dev->uclass_platdata; } -void *dev_get_priv(struct udevice *dev) +void *dev_get_priv(const struct udevice *dev) { if (!dev) { dm_warn("%s: null device\n", __func__); @@ -481,7 +482,7 @@ void *dev_get_priv(struct udevice *dev) return dev->priv; } -void *dev_get_uclass_priv(struct udevice *dev) +void *dev_get_uclass_priv(const struct udevice *dev) { if (!dev) { dm_warn("%s: null device\n", __func__); @@ -491,7 +492,7 @@ void *dev_get_uclass_priv(struct udevice *dev) return dev->uclass_priv; } -void *dev_get_parent_priv(struct udevice *dev) +void *dev_get_parent_priv(const struct udevice *dev) { if (!dev) { dm_warn("%s: null device\n", __func__); @@ -680,17 +681,35 @@ int device_find_next_child(struct udevice **devp) return 0; } -struct udevice *dev_get_parent(struct udevice *child) +int device_find_first_inactive_child(struct udevice *parent, + enum uclass_id uclass_id, + struct udevice **devp) +{ + struct udevice *dev; + + *devp = NULL; + list_for_each_entry(dev, &parent->child_head, sibling_node) { + if (!device_active(dev) && + device_get_uclass_id(dev) == uclass_id) { + *devp = dev; + return 0; + } + } + + return -ENODEV; +} + +struct udevice *dev_get_parent(const struct udevice *child) { return child->parent; } -ulong dev_get_driver_data(struct udevice *dev) +ulong dev_get_driver_data(const struct udevice *dev) { return dev->driver_data; } -const void *dev_get_driver_ops(struct udevice *dev) +const void *dev_get_driver_ops(const struct udevice *dev) { if (!dev || !dev->driver->ops) return NULL; @@ -698,12 +717,12 @@ const void *dev_get_driver_ops(struct udevice *dev) return dev->driver->ops; } -enum uclass_id device_get_uclass_id(struct udevice *dev) +enum uclass_id device_get_uclass_id(const struct udevice *dev) { return dev->uclass->uc_drv->id; } -const char *dev_get_uclass_name(struct udevice *dev) +const char *dev_get_uclass_name(const struct udevice *dev) { if (!dev) return NULL; @@ -711,7 +730,7 @@ const char *dev_get_uclass_name(struct udevice *dev) return dev->uclass->uc_drv->name; } -bool device_has_children(struct udevice *dev) +bool device_has_children(const struct udevice *dev) { return !list_empty(&dev->child_head); } diff --git a/drivers/core/of_extra.c b/drivers/core/of_extra.c index aa48917ddd..f1f393c359 100644 --- a/drivers/core/of_extra.c +++ b/drivers/core/of_extra.c @@ -13,19 +13,30 @@ int ofnode_read_fmap_entry(ofnode node, struct fmap_entry *entry) { const char *prop; - u32 reg[2]; - if (ofnode_read_u32_array(node, "reg", reg, 2)) { - debug("Node '%s' has bad/missing 'reg' property\n", + if (ofnode_read_u32(node, "image-pos", &entry->offset)) { + debug("Node '%s' has bad/missing 'image-pos' property\n", ofnode_get_name(node)); - return -log_ret(ENOENT); + return log_ret(-ENOENT); + } + if (ofnode_read_u32(node, "size", &entry->length)) { + debug("Node '%s' has bad/missing 'size' property\n", + ofnode_get_name(node)); + return log_ret(-ENOENT); } - entry->offset = reg[0]; - entry->length = reg[1]; entry->used = ofnode_read_s32_default(node, "used", entry->length); prop = ofnode_read_string(node, "compress"); - entry->compress_algo = prop && !strcmp(prop, "lzo") ? - FMAP_COMPRESS_LZO : FMAP_COMPRESS_NONE; + if (prop) { + if (!strcmp(prop, "lz4")) + entry->compress_algo = FMAP_COMPRESS_LZ4; + else + return log_msg_ret("Unknown compression algo", + -EINVAL); + } else { + entry->compress_algo = FMAP_COMPRESS_NONE; + } + entry->unc_length = ofnode_read_s32_default(node, "uncomp-size", + entry->length); prop = ofnode_read_string(node, "hash"); if (prop) entry->hash_size = strlen(prop); diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 1e354803b0..b7b7ad3a62 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -541,9 +541,13 @@ fdt_addr_t ofnode_get_addr_size(ofnode node, const char *property, if (!prop) return FDT_ADDR_T_NONE; na = of_n_addr_cells(np); - ns = of_n_addr_cells(np); + ns = of_n_size_cells(np); *sizep = of_read_number(prop + na, ns); - return of_read_number(prop, na); + + if (IS_ENABLED(CONFIG_OF_TRANSLATE) && ns > 0) + return of_translate_address(np, prop); + else + return of_read_number(prop, na); } else { return fdtdec_get_addr_size(gd->fdt_blob, ofnode_to_offset(node), property, @@ -695,6 +699,8 @@ bool ofnode_pre_reloc(ofnode node) { if (ofnode_read_bool(node, "u-boot,dm-pre-reloc")) return true; + if (ofnode_read_bool(node, "u-boot,dm-pre-proper")) + return true; #ifdef CONFIG_TPL_BUILD if (ofnode_read_bool(node, "u-boot,dm-tpl")) diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c index b0d49cb46f..bd79448164 100644 --- a/drivers/gpio/da8xx_gpio.c +++ b/drivers/gpio/da8xx_gpio.c @@ -11,11 +11,14 @@ #include <fdtdec.h> #include <asm/io.h> #include <asm/gpio.h> -#include <asm/arch/hardware.h> -#include <asm/arch/davinci_misc.h> #include <dt-bindings/gpio/gpio.h> +#include "da8xx_gpio.h" + #ifndef CONFIG_DM_GPIO +#include <asm/arch/hardware.h> +#include <asm/arch/davinci_misc.h> + static struct gpio_registry { int is_registered; char name[GPIO_NAME_SIZE]; @@ -530,6 +533,7 @@ static int davinci_gpio_probe(struct udevice *dev) static const struct udevice_id davinci_gpio_ids[] = { { .compatible = "ti,dm6441-gpio" }, + { .compatible = "ti,k2g-gpio" }, { } }; diff --git a/drivers/gpio/da8xx_gpio.h b/drivers/gpio/da8xx_gpio.h new file mode 100644 index 0000000000..1de9ec7f6f --- /dev/null +++ b/drivers/gpio/da8xx_gpio.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef _GPIO_DA8XX_DEFS_H_ +#define _GPIO_DA8XX_DEFS_H_ + +struct davinci_gpio { + unsigned int dir; + unsigned int out_data; + unsigned int set_data; + unsigned int clr_data; + unsigned int in_data; + unsigned int set_rising; + unsigned int clr_rising; + unsigned int set_falling; + unsigned int clr_falling; + unsigned int intstat; +}; + +struct davinci_gpio_bank { + int num_gpio; + unsigned int irq_num; + unsigned int irq_mask; + unsigned long *in_use; + struct davinci_gpio *base; +}; + +#define GPIO_NAME_SIZE 20 +#define MAX_NUM_GPIOS 144 +#define GPIO_BIT(gp) ((gp) & 0x1F) + +#ifdef CONFIG_DM_GPIO + +/* Information about a GPIO bank */ +struct davinci_gpio_platdata { + int bank_index; + ulong base; /* address of registers in physical memory */ + const char *port_name; +}; +#endif + +#endif diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index ae3b501555..1ef22e6bcd 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -416,6 +416,13 @@ config SYS_I2C_UNIPHIER_F Support for UniPhier FIFO-builtin I2C controller driver. This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs. +config SYS_I2C_VERSATILE + bool "Arm Ltd Versatile I2C bus driver" + depends on DM_I2C && (TARGET_VEXPRESS_CA15_TC2 || TARGET_VEXPRESS64_JUNO) + help + Add support for the Arm Ltd Versatile Express I2C driver. The I2C host + controller is present in the development boards manufactured by Arm Ltd. + config SYS_I2C_MVTWSI bool "Marvell I2C driver" depends on DM_I2C diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index f2cbe78c53..d3637bcd8d 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -36,6 +36,7 @@ obj-$(CONFIG_SYS_I2C_STM32F7) += stm32f7_i2c.o obj-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o obj-$(CONFIG_SYS_I2C_UNIPHIER) += i2c-uniphier.o obj-$(CONFIG_SYS_I2C_UNIPHIER_F) += i2c-uniphier-f.o +obj-$(CONFIG_SYS_I2C_VERSATILE) += i2c-versatile.o obj-$(CONFIG_SYS_I2C_ZYNQ) += zynq_i2c.o obj-$(CONFIG_TEGRA186_BPMP_I2C) += tegra186_bpmp_i2c.o diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig index 7ffb949f12..7afdafed94 100644 --- a/drivers/input/Kconfig +++ b/drivers/input/Kconfig @@ -1,3 +1,16 @@ +config INPUT + bool "Enable input subsystem" + depends on DM + default y + +config SPL_INPUT + bool "Enable input subsystem for SPL" + depends on SPL_DM + +config TPL_INPUT + bool "Enable input subsystem for TPL" + depends on TPL_DM + config DM_KEYBOARD bool "Enable driver model keyboard support" depends on DM @@ -7,8 +20,43 @@ config DM_KEYBOARD includes methods to start/stop the device, check for available input and update LEDs if the keyboard has them. +config SPL_DM_KEYBOARD + bool "Enable driver model keyboard support" + depends on SPL_DM + help + This adds a uclass for keyboards and implements keyboard support + using driver model. The API is implemented by keyboard.h and + includes methods to start/stop the device, check for available + input and update LEDs if the keyboard has them. + +config TPL_DM_KEYBOARD + bool "Enable driver model keyboard support" + depends on TPL_DM + help + This adds a uclass for keyboards and implements keyboard support + using driver model. The API is implemented by keyboard.h and + includes methods to start/stop the device, check for available + input and update LEDs if the keyboard has them. + config CROS_EC_KEYB bool "Enable Chrome OS EC keyboard support" + depends on INPUT + help + Most ARM Chromebooks use an EC to provide access to the keyboard. + Messages are used to request key scans from the EC and these are + then decoded into keys by this driver. + +config SPL_CROS_EC_KEYB + bool "Enable Chrome OS EC keyboard support in SPL" + depends on SPL_INPUT + help + Most ARM Chromebooks use an EC to provide access to the keyboard. + Messages are used to request key scans from the EC and these are + then decoded into keys by this driver. + +config TPL_CROS_EC_KEYB + bool "Enable Chrome OS EC keyboard support in TPL" + depends on TPL_INPUT help Most ARM Chromebooks use an EC to provide access to the keyboard. Messages are used to request key scans from the EC and these are diff --git a/drivers/input/Makefile b/drivers/input/Makefile index d13baf3576..fd56d7b349 100644 --- a/drivers/input/Makefile +++ b/drivers/input/Makefile @@ -3,12 +3,15 @@ # (C) Copyright 2000-2007 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -obj-$(CONFIG_DM_KEYBOARD) += keyboard-uclass.o +obj-y += input.o +obj-$(CONFIG_$(SPL_TPL_)CROS_EC_KEYB) += cros_ec_keyb.o +obj-$(CONFIG_$(SPL_TPL_)OF_CONTROL) += key_matrix.o +obj-$(CONFIG_$(SPL_TPL_)DM_KEYBOARD) += keyboard-uclass.o + +ifndef CONFIG_SPL_BUILD obj-$(CONFIG_I8042_KEYB) += i8042.o obj-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o obj-$(CONFIG_TWL4030_INPUT) += twl4030.o obj-$(CONFIG_TWL6030_INPUT) += twl6030.o -obj-$(CONFIG_CROS_EC_KEYB) += cros_ec_keyb.o -obj-y += input.o -obj-$(CONFIG_$(SPL_)OF_CONTROL) += key_matrix.o +endif diff --git a/drivers/input/input.c b/drivers/input/input.c index 29620a9e27..4f514dba56 100644 --- a/drivers/input/input.c +++ b/drivers/input/input.c @@ -652,7 +652,7 @@ int input_stdio_register(struct stdio_dev *dev) int error; error = stdio_register(dev); - +#if !defined(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(ENV_SUPPORT) /* check if this is the standard input device */ if (!error && strcmp(env_get("stdin"), dev->name) == 0) { /* reassign the console */ @@ -660,6 +660,9 @@ int input_stdio_register(struct stdio_dev *dev) console_assign(stdin, dev->name)) return -1; } +#else + error = error; +#endif return 0; } diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c index 6f299d407a..190505c11c 100644 --- a/drivers/misc/cros_ec.c +++ b/drivers/misc/cros_ec.c @@ -83,15 +83,15 @@ int cros_ec_calc_checksum(const uint8_t *data, int size) * @param dout_len Size of output data in bytes * @return packet size in bytes, or <0 if error. */ -static int create_proto3_request(struct cros_ec_dev *dev, +static int create_proto3_request(struct cros_ec_dev *cdev, int cmd, int cmd_version, const void *dout, int dout_len) { - struct ec_host_request *rq = (struct ec_host_request *)dev->dout; + struct ec_host_request *rq = (struct ec_host_request *)cdev->dout; int out_bytes = dout_len + sizeof(*rq); /* Fail if output size is too big */ - if (out_bytes > (int)sizeof(dev->dout)) { + if (out_bytes > (int)sizeof(cdev->dout)) { debug("%s: Cannot send %d bytes\n", __func__, dout_len); return -EC_RES_REQUEST_TRUNCATED; } @@ -108,9 +108,9 @@ static int create_proto3_request(struct cros_ec_dev *dev, memcpy(rq + 1, dout, dout_len); /* Write checksum field so the entire packet sums to 0 */ - rq->checksum = (uint8_t)(-cros_ec_calc_checksum(dev->dout, out_bytes)); + rq->checksum = (uint8_t)(-cros_ec_calc_checksum(cdev->dout, out_bytes)); - cros_ec_dump_data("out", cmd, dev->dout, out_bytes); + cros_ec_dump_data("out", cmd, cdev->dout, out_bytes); /* Return size of request packet */ return out_bytes; @@ -123,12 +123,12 @@ static int create_proto3_request(struct cros_ec_dev *dev, * @param din_len Maximum size of response in bytes * @return maximum expected number of bytes in response, or <0 if error. */ -static int prepare_proto3_response_buffer(struct cros_ec_dev *dev, int din_len) +static int prepare_proto3_response_buffer(struct cros_ec_dev *cdev, int din_len) { int in_bytes = din_len + sizeof(struct ec_host_response); /* Fail if input size is too big */ - if (in_bytes > (int)sizeof(dev->din)) { + if (in_bytes > (int)sizeof(cdev->din)) { debug("%s: Cannot receive %d bytes\n", __func__, din_len); return -EC_RES_RESPONSE_TOO_BIG; } @@ -197,7 +197,7 @@ static int handle_proto3_response(struct cros_ec_dev *dev, return rs->data_len; } -static int send_command_proto3(struct cros_ec_dev *dev, +static int send_command_proto3(struct cros_ec_dev *cdev, int cmd, int cmd_version, const void *dout, int dout_len, uint8_t **dinp, int din_len) @@ -207,23 +207,24 @@ static int send_command_proto3(struct cros_ec_dev *dev, int rv; /* Create request packet */ - out_bytes = create_proto3_request(dev, cmd, cmd_version, + out_bytes = create_proto3_request(cdev, cmd, cmd_version, dout, dout_len); if (out_bytes < 0) return out_bytes; /* Prepare response buffer */ - in_bytes = prepare_proto3_response_buffer(dev, din_len); + in_bytes = prepare_proto3_response_buffer(cdev, din_len); if (in_bytes < 0) return in_bytes; - ops = dm_cros_ec_get_ops(dev->dev); - rv = ops->packet ? ops->packet(dev->dev, out_bytes, in_bytes) : -ENOSYS; + ops = dm_cros_ec_get_ops(cdev->dev); + rv = ops->packet ? ops->packet(cdev->dev, out_bytes, in_bytes) : + -ENOSYS; if (rv < 0) return rv; /* Process the response */ - return handle_proto3_response(dev, dinp, din_len); + return handle_proto3_response(cdev, dinp, din_len); } static int send_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version, @@ -262,15 +263,16 @@ static int send_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version, * @param din_len Maximum size of response in bytes * @return number of bytes in response, or -ve on error */ -static int ec_command_inptr(struct cros_ec_dev *dev, uint8_t cmd, - int cmd_version, const void *dout, int dout_len, uint8_t **dinp, - int din_len) +static int ec_command_inptr(struct udevice *dev, uint8_t cmd, + int cmd_version, const void *dout, int dout_len, + uint8_t **dinp, int din_len) { + struct cros_ec_dev *cdev = dev_get_uclass_priv(dev); uint8_t *din = NULL; int len; - len = send_command(dev, cmd, cmd_version, dout, dout_len, - &din, din_len); + len = send_command(cdev, cmd, cmd_version, dout, dout_len, &din, + din_len); /* If the command doesn't complete, wait a while */ if (len == -EC_RES_IN_PROGRESS) { @@ -283,9 +285,9 @@ static int ec_command_inptr(struct cros_ec_dev *dev, uint8_t cmd, int ret; mdelay(50); /* Insert some reasonable delay */ - ret = send_command(dev, EC_CMD_GET_COMMS_STATUS, 0, - NULL, 0, - (uint8_t **)&resp, sizeof(*resp)); + ret = send_command(cdev, EC_CMD_GET_COMMS_STATUS, 0, + NULL, 0, + (uint8_t **)&resp, sizeof(*resp)); if (ret < 0) return ret; @@ -298,8 +300,8 @@ static int ec_command_inptr(struct cros_ec_dev *dev, uint8_t cmd, /* OK it completed, so read the status response */ /* not sure why it was 0 for the last argument */ - len = send_command(dev, EC_CMD_RESEND_RESPONSE, 0, - NULL, 0, &din, din_len); + len = send_command(cdev, EC_CMD_RESEND_RESPONSE, 0, NULL, 0, + &din, din_len); } debug("%s: len=%d, din=%p\n", __func__, len, din); @@ -328,7 +330,7 @@ static int ec_command_inptr(struct cros_ec_dev *dev, uint8_t cmd, * @param din_len Maximum size of response in bytes * @return number of bytes in response, or -ve on error */ -static int ec_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version, +static int ec_command(struct udevice *dev, uint8_t cmd, int cmd_version, const void *dout, int dout_len, void *din, int din_len) { @@ -337,7 +339,7 @@ static int ec_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version, assert((din_len == 0) || din); len = ec_command_inptr(dev, cmd, cmd_version, dout, dout_len, - &in_buffer, din_len); + &in_buffer, din_len); if (len > 0) { /* * If we were asked to put it somewhere, do so, otherwise just @@ -353,16 +355,14 @@ static int ec_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version, int cros_ec_scan_keyboard(struct udevice *dev, struct mbkp_keyscan *scan) { - struct cros_ec_dev *cdev = dev_get_uclass_priv(dev); - - if (ec_command(cdev, EC_CMD_MKBP_STATE, 0, NULL, 0, scan, + if (ec_command(dev, EC_CMD_MKBP_STATE, 0, NULL, 0, scan, sizeof(scan->data)) != sizeof(scan->data)) return -1; return 0; } -int cros_ec_read_id(struct cros_ec_dev *dev, char *id, int maxlen) +int cros_ec_read_id(struct udevice *dev, char *id, int maxlen) { struct ec_response_get_version *r; @@ -388,8 +388,8 @@ int cros_ec_read_id(struct cros_ec_dev *dev, char *id, int maxlen) return 0; } -int cros_ec_read_version(struct cros_ec_dev *dev, - struct ec_response_get_version **versionp) +int cros_ec_read_version(struct udevice *dev, + struct ec_response_get_version **versionp) { if (ec_command_inptr(dev, EC_CMD_GET_VERSION, 0, NULL, 0, (uint8_t **)versionp, sizeof(**versionp)) @@ -399,7 +399,7 @@ int cros_ec_read_version(struct cros_ec_dev *dev, return 0; } -int cros_ec_read_build_info(struct cros_ec_dev *dev, char **strp) +int cros_ec_read_build_info(struct udevice *dev, char **strp) { if (ec_command_inptr(dev, EC_CMD_GET_BUILD_INFO, 0, NULL, 0, (uint8_t **)strp, EC_PROTO2_MAX_PARAM_SIZE) < 0) @@ -408,8 +408,8 @@ int cros_ec_read_build_info(struct cros_ec_dev *dev, char **strp) return 0; } -int cros_ec_read_current_image(struct cros_ec_dev *dev, - enum ec_current_image *image) +int cros_ec_read_current_image(struct udevice *dev, + enum ec_current_image *image) { struct ec_response_get_version *r; @@ -421,8 +421,8 @@ int cros_ec_read_current_image(struct cros_ec_dev *dev, return 0; } -static int cros_ec_wait_on_hash_done(struct cros_ec_dev *dev, - struct ec_response_vboot_hash *hash) +static int cros_ec_wait_on_hash_done(struct udevice *dev, + struct ec_response_vboot_hash *hash) { struct ec_params_vboot_hash p; ulong start; @@ -444,14 +444,14 @@ static int cros_ec_wait_on_hash_done(struct cros_ec_dev *dev, return 0; } - -int cros_ec_read_hash(struct cros_ec_dev *dev, - struct ec_response_vboot_hash *hash) +int cros_ec_read_hash(struct udevice *dev, uint hash_offset, + struct ec_response_vboot_hash *hash) { struct ec_params_vboot_hash p; int rv; p.cmd = EC_VBOOT_HASH_GET; + p.offset = hash_offset; if (ec_command(dev, EC_CMD_VBOOT_HASH, 0, &p, sizeof(p), hash, sizeof(*hash)) < 0) return -1; @@ -474,7 +474,7 @@ int cros_ec_read_hash(struct cros_ec_dev *dev, p.cmd = EC_VBOOT_HASH_START; p.hash_type = EC_VBOOT_HASH_TYPE_SHA256; p.nonce_size = 0; - p.offset = EC_VBOOT_HASH_OFFSET_RW; + p.offset = hash_offset; if (ec_command(dev, EC_CMD_VBOOT_HASH, 0, &p, sizeof(p), hash, sizeof(*hash)) < 0) @@ -489,7 +489,7 @@ int cros_ec_read_hash(struct cros_ec_dev *dev, return 0; } -static int cros_ec_invalidate_hash(struct cros_ec_dev *dev) +static int cros_ec_invalidate_hash(struct udevice *dev) { struct ec_params_vboot_hash p; struct ec_response_vboot_hash *hash; @@ -514,8 +514,7 @@ static int cros_ec_invalidate_hash(struct cros_ec_dev *dev) return 0; } -int cros_ec_reboot(struct cros_ec_dev *dev, enum ec_reboot_cmd cmd, - uint8_t flags) +int cros_ec_reboot(struct udevice *dev, enum ec_reboot_cmd cmd, uint8_t flags) { struct ec_params_reboot_ec p; @@ -555,7 +554,7 @@ int cros_ec_interrupt_pending(struct udevice *dev) return dm_gpio_get_value(&cdev->ec_int); } -int cros_ec_info(struct cros_ec_dev *dev, struct ec_response_mkbp_info *info) +int cros_ec_info(struct udevice *dev, struct ec_response_mkbp_info *info) { if (ec_command(dev, EC_CMD_MKBP_INFO, 0, NULL, 0, info, sizeof(*info)) != sizeof(*info)) @@ -564,7 +563,7 @@ int cros_ec_info(struct cros_ec_dev *dev, struct ec_response_mkbp_info *info) return 0; } -int cros_ec_get_host_events(struct cros_ec_dev *dev, uint32_t *events_ptr) +int cros_ec_get_host_events(struct udevice *dev, uint32_t *events_ptr) { struct ec_response_host_event_mask *resp; @@ -583,7 +582,7 @@ int cros_ec_get_host_events(struct cros_ec_dev *dev, uint32_t *events_ptr) return 0; } -int cros_ec_clear_host_events(struct cros_ec_dev *dev, uint32_t events) +int cros_ec_clear_host_events(struct udevice *dev, uint32_t events) { struct ec_params_host_event_mask params; @@ -600,9 +599,9 @@ int cros_ec_clear_host_events(struct cros_ec_dev *dev, uint32_t events) return 0; } -int cros_ec_flash_protect(struct cros_ec_dev *dev, - uint32_t set_mask, uint32_t set_flags, - struct ec_response_flash_protect *resp) +int cros_ec_flash_protect(struct udevice *dev, uint32_t set_mask, + uint32_t set_flags, + struct ec_response_flash_protect *resp) { struct ec_params_flash_protect params; @@ -617,17 +616,18 @@ int cros_ec_flash_protect(struct cros_ec_dev *dev, return 0; } -static int cros_ec_check_version(struct cros_ec_dev *dev) +static int cros_ec_check_version(struct udevice *dev) { + struct cros_ec_dev *cdev = dev_get_uclass_priv(dev); struct ec_params_hello req; struct ec_response_hello *resp; struct dm_cros_ec_ops *ops; int ret; - ops = dm_cros_ec_get_ops(dev->dev); + ops = dm_cros_ec_get_ops(dev); if (ops->check_version) { - ret = ops->check_version(dev->dev); + ret = ops->check_version(dev); if (ret) return ret; } @@ -647,7 +647,7 @@ static int cros_ec_check_version(struct cros_ec_dev *dev) */ /* Try sending a version 3 packet */ - dev->protocol_version = 3; + cdev->protocol_version = 3; req.in_data = 0; if (ec_command_inptr(dev, EC_CMD_HELLO, 0, &req, sizeof(req), (uint8_t **)&resp, sizeof(*resp)) > 0) { @@ -655,9 +655,9 @@ static int cros_ec_check_version(struct cros_ec_dev *dev) } /* Try sending a version 2 packet */ - dev->protocol_version = 2; + cdev->protocol_version = 2; if (ec_command_inptr(dev, EC_CMD_HELLO, 0, &req, sizeof(req), - (uint8_t **)&resp, sizeof(*resp)) > 0) { + (uint8_t **)&resp, sizeof(*resp)) > 0) { return 0; } @@ -667,12 +667,12 @@ static int cros_ec_check_version(struct cros_ec_dev *dev) * version is no longer supported, and we don't know about any new * protocol versions. */ - dev->protocol_version = 0; + cdev->protocol_version = 0; printf("%s: ERROR: old EC interface not supported\n", __func__); return -1; } -int cros_ec_test(struct cros_ec_dev *dev) +int cros_ec_test(struct udevice *dev) { struct ec_params_hello req; struct ec_response_hello *resp; @@ -691,7 +691,7 @@ int cros_ec_test(struct cros_ec_dev *dev) return 0; } -int cros_ec_flash_offset(struct cros_ec_dev *dev, enum ec_flash_region region, +int cros_ec_flash_offset(struct udevice *dev, enum ec_flash_region region, uint32_t *offset, uint32_t *size) { struct ec_params_flash_region_info p; @@ -713,7 +713,7 @@ int cros_ec_flash_offset(struct cros_ec_dev *dev, enum ec_flash_region region, return 0; } -int cros_ec_flash_erase(struct cros_ec_dev *dev, uint32_t offset, uint32_t size) +int cros_ec_flash_erase(struct udevice *dev, uint32_t offset, uint32_t size) { struct ec_params_flash_erase p; @@ -741,8 +741,8 @@ int cros_ec_flash_erase(struct cros_ec_dev *dev, uint32_t offset, uint32_t size) * @param size Number of bytes to write * @return 0 if ok, -1 on error */ -static int cros_ec_flash_write_block(struct cros_ec_dev *dev, - const uint8_t *data, uint32_t offset, uint32_t size) +static int cros_ec_flash_write_block(struct udevice *dev, const uint8_t *data, + uint32_t offset, uint32_t size) { struct ec_params_flash_write *p; int ret; @@ -767,7 +767,7 @@ static int cros_ec_flash_write_block(struct cros_ec_dev *dev, /** * Return optimal flash write burst size */ -static int cros_ec_flash_write_burst_size(struct cros_ec_dev *dev) +static int cros_ec_flash_write_burst_size(struct udevice *dev) { return EC_FLASH_WRITE_VER0_SIZE; } @@ -801,8 +801,8 @@ static int cros_ec_data_is_erased(const uint32_t *data, int size) * @param dev Pointer to device * @param info Pointer to output flash info struct */ -int cros_ec_read_flashinfo(struct cros_ec_dev *dev, - struct ec_response_flash_info *info) +int cros_ec_read_flashinfo(struct udevice *dev, + struct ec_response_flash_info *info) { int ret; @@ -814,9 +814,10 @@ int cros_ec_read_flashinfo(struct cros_ec_dev *dev, return ret < sizeof(*info) ? -1 : 0; } -int cros_ec_flash_write(struct cros_ec_dev *dev, const uint8_t *data, - uint32_t offset, uint32_t size) +int cros_ec_flash_write(struct udevice *dev, const uint8_t *data, + uint32_t offset, uint32_t size) { + struct cros_ec_dev *cdev = dev_get_uclass_priv(dev); uint32_t burst = cros_ec_flash_write_burst_size(dev); uint32_t end, off; int ret; @@ -831,8 +832,8 @@ int cros_ec_flash_write(struct cros_ec_dev *dev, const uint8_t *data, /* If the data is empty, there is no point in programming it */ todo = min(end - off, burst); - if (dev->optimise_flash_write && - cros_ec_data_is_erased((uint32_t *)data, todo)) + if (cdev->optimise_flash_write && + cros_ec_data_is_erased((uint32_t *)data, todo)) continue; ret = cros_ec_flash_write_block(dev, data, off, todo); @@ -858,8 +859,8 @@ int cros_ec_flash_write(struct cros_ec_dev *dev, const uint8_t *data, * @param size Number of bytes to read * @return 0 if ok, -1 on error */ -static int cros_ec_flash_read_block(struct cros_ec_dev *dev, uint8_t *data, - uint32_t offset, uint32_t size) +static int cros_ec_flash_read_block(struct udevice *dev, uint8_t *data, + uint32_t offset, uint32_t size) { struct ec_params_flash_read p; @@ -870,8 +871,8 @@ static int cros_ec_flash_read_block(struct cros_ec_dev *dev, uint8_t *data, &p, sizeof(p), data, size) >= 0 ? 0 : -1; } -int cros_ec_flash_read(struct cros_ec_dev *dev, uint8_t *data, uint32_t offset, - uint32_t size) +int cros_ec_flash_read(struct udevice *dev, uint8_t *data, uint32_t offset, + uint32_t size) { uint32_t burst = cros_ec_flash_write_burst_size(dev); uint32_t end, off; @@ -888,13 +889,14 @@ int cros_ec_flash_read(struct cros_ec_dev *dev, uint8_t *data, uint32_t offset, return 0; } -int cros_ec_flash_update_rw(struct cros_ec_dev *dev, - const uint8_t *image, int image_size) +int cros_ec_flash_update_rw(struct udevice *dev, const uint8_t *image, + int image_size) { uint32_t rw_offset, rw_size; int ret; - if (cros_ec_flash_offset(dev, EC_FLASH_REGION_RW, &rw_offset, &rw_size)) + if (cros_ec_flash_offset(dev, EC_FLASH_REGION_ACTIVE, &rw_offset, + &rw_size)) return -1; if (image_size > (int)rw_size) return -1; @@ -927,26 +929,31 @@ int cros_ec_flash_update_rw(struct cros_ec_dev *dev, return 0; } -int cros_ec_read_vbnvcontext(struct cros_ec_dev *dev, uint8_t *block) +int cros_ec_read_nvdata(struct udevice *dev, uint8_t *block, int size) { struct ec_params_vbnvcontext p; int len; + if (size != EC_VBNV_BLOCK_SIZE) + return -EINVAL; + p.op = EC_VBNV_CONTEXT_OP_READ; len = ec_command(dev, EC_CMD_VBNV_CONTEXT, EC_VER_VBNV_CONTEXT, &p, sizeof(p), block, EC_VBNV_BLOCK_SIZE); if (len < EC_VBNV_BLOCK_SIZE) - return -1; + return -EIO; return 0; } -int cros_ec_write_vbnvcontext(struct cros_ec_dev *dev, const uint8_t *block) +int cros_ec_write_nvdata(struct udevice *dev, const uint8_t *block, int size) { struct ec_params_vbnvcontext p; int len; + if (size != EC_VBNV_BLOCK_SIZE) + return -EINVAL; p.op = EC_VBNV_CONTEXT_OP_WRITE; memcpy(p.block, block, sizeof(p.block)); @@ -960,13 +967,12 @@ int cros_ec_write_vbnvcontext(struct cros_ec_dev *dev, const uint8_t *block) int cros_ec_set_ldo(struct udevice *dev, uint8_t index, uint8_t state) { - struct cros_ec_dev *cdev = dev_get_uclass_priv(dev); struct ec_params_ldo_set params; params.index = index; params.state = state; - if (ec_command_inptr(cdev, EC_CMD_LDO_SET, 0, ¶ms, sizeof(params), + if (ec_command_inptr(dev, EC_CMD_LDO_SET, 0, ¶ms, sizeof(params), NULL, 0)) return -1; @@ -975,13 +981,12 @@ int cros_ec_set_ldo(struct udevice *dev, uint8_t index, uint8_t state) int cros_ec_get_ldo(struct udevice *dev, uint8_t index, uint8_t *state) { - struct cros_ec_dev *cdev = dev_get_uclass_priv(dev); struct ec_params_ldo_get params; struct ec_response_ldo_get *resp; params.index = index; - if (ec_command_inptr(cdev, EC_CMD_LDO_GET, 0, ¶ms, sizeof(params), + if (ec_command_inptr(dev, EC_CMD_LDO_GET, 0, ¶ms, sizeof(params), (uint8_t **)&resp, sizeof(*resp)) != sizeof(*resp)) return -1; @@ -1001,12 +1006,12 @@ int cros_ec_register(struct udevice *dev) GPIOD_IS_IN); cdev->optimise_flash_write = dev_read_bool(dev, "optimise-flash-write"); - if (cros_ec_check_version(cdev)) { + if (cros_ec_check_version(dev)) { debug("%s: Could not detect CROS-EC version\n", __func__); return -CROS_EC_ERR_CHECK_VERSION; } - if (cros_ec_read_id(cdev, id, sizeof(id))) { + if (cros_ec_read_id(dev, id, sizeof(id))) { debug("%s: Could not read KBC ID\n", __func__); return -CROS_EC_ERR_READ_ID; } @@ -1042,7 +1047,7 @@ int cros_ec_decode_ec_flash(struct udevice *dev, struct fdt_cros_ec *config) if (0 == strcmp(name, "ro")) { region = EC_FLASH_REGION_RO; } else if (0 == strcmp(name, "rw")) { - region = EC_FLASH_REGION_RW; + region = EC_FLASH_REGION_ACTIVE; } else if (0 == strcmp(name, "wp-ro")) { region = EC_FLASH_REGION_WP_RO; } else { @@ -1062,7 +1067,6 @@ int cros_ec_decode_ec_flash(struct udevice *dev, struct fdt_cros_ec *config) int cros_ec_i2c_tunnel(struct udevice *dev, int port, struct i2c_msg *in, int nmsgs) { - struct cros_ec_dev *cdev = dev_get_uclass_priv(dev); union { struct ec_params_i2c_passthru p; uint8_t outbuf[EC_PROTO2_MAX_PARAM_SIZE]; @@ -1112,7 +1116,7 @@ int cros_ec_i2c_tunnel(struct udevice *dev, int port, struct i2c_msg *in, } } - rv = ec_command(cdev, EC_CMD_I2C_PASSTHRU, 0, p, pdata - (uint8_t *)p, + rv = ec_command(dev, EC_CMD_I2C_PASSTHRU, 0, p, pdata - (uint8_t *)p, r, sizeof(*r) + read_len); if (rv < 0) return rv; diff --git a/drivers/misc/cros_ec_lpc.c b/drivers/misc/cros_ec_lpc.c index be17adcc5a..71d03bfba2 100644 --- a/drivers/misc/cros_ec_lpc.c +++ b/drivers/misc/cros_ec_lpc.c @@ -40,6 +40,38 @@ static int wait_for_sync(struct cros_ec_dev *dev) return 0; } +int cros_ec_lpc_packet(struct udevice *udev, int out_bytes, int in_bytes) +{ + struct cros_ec_dev *dev = dev_get_uclass_priv(udev); + uint8_t *d; + int i; + + if (out_bytes > EC_LPC_HOST_PACKET_SIZE) + return log_msg_ret("Cannot send that many bytes\n", -E2BIG); + + if (in_bytes > EC_LPC_HOST_PACKET_SIZE) + return log_msg_ret("Cannot receive that many bytes\n", -E2BIG); + + if (wait_for_sync(dev)) + return log_msg_ret("Timeout waiting ready\n", -ETIMEDOUT); + + /* Write data */ + for (i = 0, d = (uint8_t *)dev->dout; i < out_bytes; i++, d++) + outb(*d, EC_LPC_ADDR_HOST_PACKET + i); + + /* Start the command */ + outb(EC_COMMAND_PROTOCOL_3, EC_LPC_ADDR_HOST_CMD); + + if (wait_for_sync(dev)) + return log_msg_ret("Timeout waiting ready\n", -ETIMEDOUT); + + /* Read back args */ + for (i = 0, d = dev->din; i < in_bytes; i++, d++) + *d = inb(EC_LPC_ADDR_HOST_PACKET + i); + + return in_bytes; +} + int cros_ec_lpc_command(struct udevice *udev, uint8_t cmd, int cmd_version, const uint8_t *dout, int dout_len, uint8_t **dinp, int din_len) @@ -200,6 +232,7 @@ static int cros_ec_probe(struct udevice *dev) } static struct dm_cros_ec_ops cros_ec_ops = { + .packet = cros_ec_lpc_packet, .command = cros_ec_lpc_command, .check_version = cros_ec_lpc_check_version, }; diff --git a/drivers/misc/cros_ec_sandbox.c b/drivers/misc/cros_ec_sandbox.c index 47a9d26c3c..d741554d8a 100644 --- a/drivers/misc/cros_ec_sandbox.c +++ b/drivers/misc/cros_ec_sandbox.c @@ -365,7 +365,7 @@ static int process_cmd(struct ec_state *ec, struct fmap_entry *entry; int ret, size; - entry = &ec->ec_config.region[EC_FLASH_REGION_RW]; + entry = &ec->ec_config.region[EC_FLASH_REGION_ACTIVE]; switch (req->cmd) { case EC_VBOOT_HASH_RECALC: @@ -420,7 +420,7 @@ static int process_cmd(struct ec_state *ec, switch (req->region) { case EC_FLASH_REGION_RO: - case EC_FLASH_REGION_RW: + case EC_FLASH_REGION_ACTIVE: case EC_FLASH_REGION_WP_RO: entry = &ec->ec_config.region[req->region]; resp->offset = entry->offset; @@ -491,9 +491,9 @@ int cros_ec_sandbox_packet(struct udevice *udev, int out_bytes, int in_bytes) return in_bytes; } -void cros_ec_check_keyboard(struct cros_ec_dev *dev) +void cros_ec_check_keyboard(struct udevice *dev) { - struct ec_state *ec = dev_get_priv(dev->dev); + struct ec_state *ec = dev_get_priv(dev); ulong start; printf("Press keys for EC to detect on reset (ESC=recovery)..."); diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 0a0d4aaf6c..27246ee465 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -538,7 +538,7 @@ config MMC_SDHCI_TEGRA config MMC_SDHCI_ZYNQ bool "Arasan SDHCI controller support" - depends on ARCH_ZYNQ || ARCH_ZYNQMP + depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL depends on DM_MMC && OF_CONTROL && BLK depends on MMC_SDHCI help diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c index b311b80be8..138de59470 100644 --- a/drivers/mmc/tmio-common.c +++ b/drivers/mmc/tmio-common.c @@ -372,11 +372,19 @@ static int tmio_sd_dma_xfer(struct udevice *dev, struct mmc_data *data) } /* check if the address is DMA'able */ -static bool tmio_sd_addr_is_dmaable(unsigned long addr) +static bool tmio_sd_addr_is_dmaable(const char *src) { + uintptr_t addr = (uintptr_t)src; + if (!IS_ALIGNED(addr, TMIO_SD_DMA_MINALIGN)) return false; +#if defined(CONFIG_RCAR_GEN3) + /* Gen3 DMA has 32bit limit */ + if (addr >> 32) + return false; +#endif + #if defined(CONFIG_ARCH_UNIPHIER) && !defined(CONFIG_ARM64) && \ defined(CONFIG_SPL_BUILD) /* @@ -486,7 +494,7 @@ int tmio_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, if (data) { /* use DMA if the HW supports it and the buffer is aligned */ if (priv->caps & TMIO_SD_CAP_DMA_INTERNAL && - tmio_sd_addr_is_dmaable((long)data->src)) + tmio_sd_addr_is_dmaable(data->src)) ret = tmio_sd_dma_xfer(dev, data); else ret = tmio_sd_pio_xfer(dev, data); diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index d98457e223..11cf12bb55 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -28,6 +28,16 @@ config MTD_PARTITIONS Adds the MTD partitioning infrastructure from the Linux kernel. Needed for UBI support. +config FLASH_CFI_DRIVER + bool "Enable CFI Flash driver" + help + The Common Flash Interface specification was developed by Intel, + AMD and other flash manufactures. It provides a universal method + for probing the capabilities of flash devices. If you wish to + support any device that is CFI-compliant, you need to enable this + option. Visit <http://www.amd.com/products/nvd/overview/cfi.html> + for more information on CFI. + config CFI_FLASH bool "Enable Driver Model for CFI Flash driver" depends on MTD @@ -39,6 +49,34 @@ config CFI_FLASH option. Visit <http://www.amd.com/products/nvd/overview/cfi.html> for more information on CFI. +config SYS_FLASH_USE_BUFFER_WRITE + bool "Enable buffered writes to flash" + depends on FLASH_CFI_DRIVER + help + Use buffered writes to flash. + +config FLASH_CFI_MTD + bool "Enable CFI MTD driver" + depends on FLASH_CFI_DRIVER + help + This option enables the building of the cfi_mtd driver + in the drivers directory. The driver exports CFI flash + to the MTD layer. + +config SYS_FLASH_PROTECTION + bool "Use hardware flash protection" + depends on FLASH_CFI_DRIVER + help + If defined, hardware flash sectors protection is used + instead of U-Boot software protection. + +config SYS_FLASH_CFI + bool "Define extra elements in CFI for flash geometry" + depends on FLASH_CFI_DRIVER + help + Define if the flash driver uses extra elements in the + common flash structure for storing flash geometry. + config ALTERA_QSPI bool "Altera Generic Quad SPI Controller" depends on MTD diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c index 6a211d52ff..7d7a11c990 100644 --- a/drivers/mtd/mtd_uboot.c +++ b/drivers/mtd/mtd_uboot.c @@ -104,7 +104,10 @@ int mtd_probe_devices(void) mtd_probe_uclass_mtd_devs(); /* Check if mtdparts/mtdids changed since last call, otherwise: exit */ - if (!strcmp(mtdparts, old_mtdparts) && !strcmp(mtdids, old_mtdids)) + if ((!mtdparts && !old_mtdparts && !mtdids && !old_mtdids) || + (mtdparts && old_mtdparts && mtdids && old_mtdids && + !strcmp(mtdparts, old_mtdparts) && + !strcmp(mtdids, old_mtdids))) return 0; /* Update the local copy of mtdparts */ @@ -140,6 +143,10 @@ int mtd_probe_devices(void) } } + /* If either mtdparts or mtdids is empty, then exit */ + if (!mtdparts || !mtdids) + return 0; + /* Start the parsing by ignoring the extra 'mtdparts=' prefix, if any */ if (strstr(mtdparts, "mtdparts=")) mtdparts += 9; diff --git a/drivers/mtd/nand/raw/atmel_nand.c b/drivers/mtd/nand/raw/atmel_nand.c index a5b76e1aa0..31ad2cfa88 100644 --- a/drivers/mtd/nand/raw/atmel_nand.c +++ b/drivers/mtd/nand/raw/atmel_nand.c @@ -249,7 +249,7 @@ static void pmecc_get_sigma(struct mtd_info *mtd) int diff; /* Init the Sigma(x) */ - memset(smu, 0, sizeof(int16_t) * ARRAY_SIZE(smu)); + memset(smu, 0, sizeof(int16_t) * num * (cap + 2)); dmu_0_count = 0; diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c index 1b6c028251..7fef754c63 100644 --- a/drivers/mtd/spi/sandbox.c +++ b/drivers/mtd/spi/sandbox.c @@ -8,6 +8,8 @@ * Licensed under the GPL-2 or later. */ +#define LOG_CATEGORY UCLASS_SPI_FLASH + #include <common.h> #include <dm.h> #include <malloc.h> @@ -41,6 +43,7 @@ enum sandbox_sf_state { SF_WRITE_STATUS, /* write the flash's status register */ }; +#if CONFIG_IS_ENABLED(LOG) static const char *sandbox_sf_state_name(enum sandbox_sf_state state) { static const char * const states[] = { @@ -49,6 +52,7 @@ static const char *sandbox_sf_state_name(enum sandbox_sf_state state) }; return states[state]; } +#endif /* LOG */ /* Bits for the status register */ #define STAT_WIP (1 << 0) @@ -101,69 +105,44 @@ struct sandbox_spi_flash_plat_data { /** * This is a very strange probe function. If it has platform data (which may * have come from the device tree) then this function gets the filename and - * device type from there. Failing that it looks at the command line - * parameter. + * device type from there. */ static int sandbox_sf_probe(struct udevice *dev) { /* spec = idcode:file */ struct sandbox_spi_flash *sbsf = dev_get_priv(dev); - const char *file; size_t len, idname_len; const struct spi_flash_info *data; struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev); struct sandbox_state *state = state_get_current(); + struct dm_spi_slave_platdata *slave_plat; struct udevice *bus = dev->parent; const char *spec = NULL; + struct udevice *emul; int ret = 0; int cs = -1; - int i; debug("%s: bus %d, looking for emul=%p: ", __func__, bus->seq, dev); - if (bus->seq >= 0 && bus->seq < CONFIG_SANDBOX_SPI_MAX_BUS) { - for (i = 0; i < CONFIG_SANDBOX_SPI_MAX_CS; i++) { - if (state->spi[bus->seq][i].emul == dev) - cs = i; - } - } - if (cs == -1) { + ret = sandbox_spi_get_emul(state, bus, dev, &emul); + if (ret) { printf("Error: Unknown chip select for device '%s'\n", - dev->name); - return -EINVAL; + dev->name); + return ret; } + slave_plat = dev_get_parent_platdata(dev); + cs = slave_plat->cs; debug("found at cs %d\n", cs); if (!pdata->filename) { - struct sandbox_state *state = state_get_current(); - - assert(bus->seq != -1); - if (bus->seq < CONFIG_SANDBOX_SPI_MAX_BUS) - spec = state->spi[bus->seq][cs].spec; - if (!spec) { - debug("%s: No spec found for bus %d, cs %d\n", - __func__, bus->seq, cs); - ret = -ENOENT; - goto error; - } - - file = strchr(spec, ':'); - if (!file) { - printf("%s: unable to parse file\n", __func__); - ret = -EINVAL; - goto error; - } - idname_len = file - spec; - pdata->filename = file + 1; - pdata->device_name = spec; - ++file; - } else { - spec = strchr(pdata->device_name, ','); - if (spec) - spec++; - else - spec = pdata->device_name; - idname_len = strlen(spec); + printf("Error: No filename available\n"); + return -EINVAL; } + spec = strchr(pdata->device_name, ','); + if (spec) + spec++; + else + spec = pdata->device_name; + idname_len = strlen(spec); debug("%s: device='%s'\n", __func__, spec); for (data = spi_flash_ids; data->name; data++) { @@ -214,7 +193,7 @@ static void sandbox_sf_cs_activate(struct udevice *dev) { struct sandbox_spi_flash *sbsf = dev_get_priv(dev); - debug("sandbox_sf: CS activated; state is fresh!\n"); + log_content("sandbox_sf: CS activated; state is fresh!\n"); /* CS is asserted, so reset state */ sbsf->off = 0; @@ -226,7 +205,7 @@ static void sandbox_sf_cs_activate(struct udevice *dev) static void sandbox_sf_cs_deactivate(struct udevice *dev) { - debug("sandbox_sf: CS deactivated; cmd done processing!\n"); + log_content("sandbox_sf: CS deactivated; cmd done processing!\n"); } /* @@ -302,8 +281,8 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx, } if (oldstate != sbsf->state) - debug(" cmd: transition to %s state\n", - sandbox_sf_state_name(sbsf->state)); + log_content(" cmd: transition to %s state\n", + sandbox_sf_state_name(sbsf->state)); return 0; } @@ -334,8 +313,8 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, int bytes = bitlen / 8; int ret; - debug("sandbox_sf: state:%x(%s) bytes:%u\n", sbsf->state, - sandbox_sf_state_name(sbsf->state), bytes); + log_content("sandbox_sf: state:%x(%s) bytes:%u\n", sbsf->state, + sandbox_sf_state_name(sbsf->state), bytes); if ((flags & SPI_XFER_BEGIN)) sandbox_sf_cs_activate(dev); @@ -354,7 +333,7 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, case SF_ID: { u8 id; - debug(" id: off:%u tx:", sbsf->off); + log_content(" id: off:%u tx:", sbsf->off); if (sbsf->off < IDCODE_LEN) { /* Extract correct byte from ID 0x00aabbcc */ id = ((JEDEC_MFR(sbsf->data) << 16) | @@ -363,18 +342,18 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, } else { id = 0; } - debug("%d %02x\n", sbsf->off, id); + log_content("%d %02x\n", sbsf->off, id); tx[pos++] = id; ++sbsf->off; break; } case SF_ADDR: - debug(" addr: bytes:%u rx:%02x ", sbsf->addr_bytes, - rx[pos]); + log_content(" addr: bytes:%u rx:%02x ", + sbsf->addr_bytes, rx[pos]); if (sbsf->addr_bytes++ < SF_ADDR_LEN) sbsf->off = (sbsf->off << 8) | rx[pos]; - debug("addr:%06x\n", sbsf->off); + log_content("addr:%06x\n", sbsf->off); if (tx) sandbox_spi_tristate(&tx[pos], 1); @@ -403,8 +382,8 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, sbsf->state = SF_ERASE; goto case_sf_erase; } - debug(" cmd: transition to %s state\n", - sandbox_sf_state_name(sbsf->state)); + log_content(" cmd: transition to %s state\n", + sandbox_sf_state_name(sbsf->state)); break; case SF_READ: /* @@ -413,7 +392,7 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, */ cnt = bytes - pos; - debug(" tx: read(%u)\n", cnt); + log_content(" tx: read(%u)\n", cnt); assert(tx); ret = os_read(sbsf->fd, tx + pos, cnt); if (ret < 0) { @@ -423,19 +402,19 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, pos += ret; break; case SF_READ_STATUS: - debug(" read status: %#x\n", sbsf->status); + log_content(" read status: %#x\n", sbsf->status); cnt = bytes - pos; memset(tx + pos, sbsf->status, cnt); pos += cnt; break; case SF_READ_STATUS1: - debug(" read status: %#x\n", sbsf->status); + log_content(" read status: %#x\n", sbsf->status); cnt = bytes - pos; memset(tx + pos, sbsf->status >> 8, cnt); pos += cnt; break; case SF_WRITE_STATUS: - debug(" write status: %#x (ignored)\n", rx[pos]); + log_content(" write status: %#x (ignored)\n", rx[pos]); pos = bytes; break; case SF_WRITE: @@ -451,7 +430,7 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, } cnt = bytes - pos; - debug(" rx: write(%u)\n", cnt); + log_content(" rx: write(%u)\n", cnt); if (tx) sandbox_spi_tristate(&tx[pos], cnt); ret = os_write(sbsf->fd, rx + pos, cnt); @@ -471,15 +450,15 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, /* verify address is aligned */ if (sbsf->off & (sbsf->erase_size - 1)) { - debug(" sector erase: cmd:%#x needs align:%#x, but we got %#x\n", - sbsf->cmd, sbsf->erase_size, - sbsf->off); + log_content(" sector erase: cmd:%#x needs align:%#x, but we got %#x\n", + sbsf->cmd, sbsf->erase_size, + sbsf->off); sbsf->status &= ~STAT_WEL; goto done; } - debug(" sector erase addr: %u, size: %u\n", sbsf->off, - sbsf->erase_size); + log_content(" sector erase addr: %u, size: %u\n", + sbsf->off, sbsf->erase_size); cnt = bytes - pos; if (tx) @@ -493,13 +472,13 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, ret = sandbox_erase_part(sbsf, sbsf->erase_size); sbsf->status &= ~STAT_WEL; if (ret) { - debug("sandbox_sf: Erase failed\n"); + log_content("sandbox_sf: Erase failed\n"); goto done; } goto done; } default: - debug(" ??? no idea what to do ???\n"); + log_content(" ??? no idea what to do ???\n"); goto done; } } @@ -530,31 +509,6 @@ static const struct dm_spi_emul_ops sandbox_sf_emul_ops = { }; #ifdef CONFIG_SPI_FLASH -static int sandbox_cmdline_cb_spi_sf(struct sandbox_state *state, - const char *arg) -{ - unsigned long bus, cs; - const char *spec = sandbox_spi_parse_spec(arg, &bus, &cs); - - if (!spec) - return 1; - - /* - * It is safe to not make a copy of 'spec' because it comes from the - * command line. - * - * TODO(sjg@chromium.org): It would be nice if we could parse the - * spec here, but the problem is that no U-Boot init has been done - * yet. Perhaps we can figure something out. - */ - state->spi[bus][cs].spec = spec; - debug("%s: Setting up spec '%s' for bus %ld, cs %ld\n", __func__, - spec, bus, cs); - - return 0; -} -SANDBOX_CMDLINE_OPT(spi_sf, 1, "connect a SPI flash: <bus>:<cs>:<id>:<file>"); - int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs, struct udevice *bus, ofnode node, const char *spec) { @@ -597,33 +551,6 @@ void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs) state->spi[busnum][cs].emul = NULL; } -static int sandbox_sf_bind_bus_cs(struct sandbox_state *state, int busnum, - int cs, const char *spec) -{ - struct udevice *bus, *slave; - int ret; - - ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, true, &bus); - if (ret) { - printf("Invalid bus %d for spec '%s' (err=%d)\n", busnum, - spec, ret); - return ret; - } - ret = spi_find_chip_select(bus, cs, &slave); - if (!ret) { - printf("Chip select %d already exists for spec '%s'\n", cs, - spec); - return -EEXIST; - } - - ret = device_bind_driver(bus, "spi_flash_std", spec, &slave); - if (ret) - return ret; - - return sandbox_sf_bind_emul(state, busnum, cs, bus, ofnode_null(), - spec); -} - int sandbox_spi_get_emul(struct sandbox_state *state, struct udevice *bus, struct udevice *slave, struct udevice **emulp) @@ -650,35 +577,6 @@ int sandbox_spi_get_emul(struct sandbox_state *state, return 0; } - -int dm_scan_other(bool pre_reloc_only) -{ - struct sandbox_state *state = state_get_current(); - int busnum, cs; - - if (pre_reloc_only) - return 0; - for (busnum = 0; busnum < CONFIG_SANDBOX_SPI_MAX_BUS; busnum++) { - for (cs = 0; cs < CONFIG_SANDBOX_SPI_MAX_CS; cs++) { - const char *spec = state->spi[busnum][cs].spec; - int ret; - - if (spec) { - ret = sandbox_sf_bind_bus_cs(state, busnum, - cs, spec); - if (ret) { - debug("%s: Bind failed for bus %d, cs %d\n", - __func__, busnum, cs); - return ret; - } - debug("%s: Setting up spec '%s' for bus %d, cs %d\n", - __func__, spec, busnum, cs); - } - } - } - - return 0; -} #endif static const struct udevice_id sandbox_sf_ids[] = { diff --git a/drivers/mtd/spi/sf-uclass.c b/drivers/mtd/spi/sf-uclass.c index 3858f77a6d..662525f016 100644 --- a/drivers/mtd/spi/sf-uclass.c +++ b/drivers/mtd/spi/sf-uclass.c @@ -14,18 +14,18 @@ DECLARE_GLOBAL_DATA_PTR; int spi_flash_read_dm(struct udevice *dev, u32 offset, size_t len, void *buf) { - return sf_get_ops(dev)->read(dev, offset, len, buf); + return log_ret(sf_get_ops(dev)->read(dev, offset, len, buf)); } int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len, const void *buf) { - return sf_get_ops(dev)->write(dev, offset, len, buf); + return log_ret(sf_get_ops(dev)->write(dev, offset, len, buf)); } int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len) { - return sf_get_ops(dev)->erase(dev, offset, len); + return log_ret(sf_get_ops(dev)->erase(dev, offset, len)); } /* diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 4f63cacc64..26f5c7c995 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -32,6 +32,7 @@ enum spi_nor_option_flags { /* CFI Manufacture ID's */ #define SPI_FLASH_CFI_MFR_SPANSION 0x01 #define SPI_FLASH_CFI_MFR_STMICRO 0x20 +#define SPI_FLASH_CFI_MFR_MICRON 0x2C #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2 #define SPI_FLASH_CFI_MFR_SST 0xbf #define SPI_FLASH_CFI_MFR_WINBOND 0xef diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 42c7cdedf6..94fde2ae7a 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -97,7 +97,7 @@ static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len, { struct spi_flash *flash = dev_get_uclass_priv(dev); - return spi_flash_cmd_read_ops(flash, offset, len, buf); + return log_ret(spi_flash_cmd_read_ops(flash, offset, len, buf)); } static int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len, diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index c159124259..a87bacd4ac 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -468,17 +468,17 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, size_t len, void *data) { struct spi_slave *spi = flash->spi; - u8 *cmd, cmdsz; + u8 cmdsz; u32 remain_len, read_len, read_addr; int bank_sel = 0; - int ret = -1; + int ret = 0; /* Handle memory-mapped SPI */ if (flash->memory_map) { ret = spi_claim_bus(spi); if (ret) { debug("SF: unable to claim SPI bus\n"); - return ret; + return log_ret(ret); } spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP); spi_flash_copy_mmap(data, flash->memory_map + offset, len); @@ -488,11 +488,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, } cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte; - cmd = calloc(1, cmdsz); - if (!cmd) { - debug("SF: Failed to allocate cmd\n"); - return -ENOMEM; - } + u8 cmd[cmdsz]; cmd[0] = flash->read_cmd; while (len) { @@ -505,7 +501,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, #ifdef CONFIG_SPI_FLASH_BAR ret = write_bar(flash, read_addr); if (ret < 0) - return ret; + return log_ret(ret); bank_sel = flash->bank_curr; #endif remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) * @@ -535,8 +531,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, ret = clean_bar(flash); #endif - free(cmd); - return ret; + return log_ret(ret); } #ifdef CONFIG_SPI_FLASH_SST @@ -1096,6 +1091,7 @@ static int set_quad_mode(struct spi_flash *flash, #endif #ifdef CONFIG_SPI_FLASH_STMICRO case SPI_FLASH_CFI_MFR_STMICRO: + case SPI_FLASH_CFI_MFR_MICRON: debug("SF: QEB is volatile for %02x flash\n", JEDEC_MFR(info)); return 0; #endif @@ -1183,6 +1179,7 @@ int spi_flash_scan(struct spi_flash *flash) #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) /* NOR protection support for STmicro/Micron chips and similar */ if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_STMICRO || + JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MICRON || JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) { flash->flash_lock = stm_lock; flash->flash_unlock = stm_unlock; diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 5441da47d1..f1f0e2d94e 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -344,7 +344,7 @@ config XILINX_EMACLITE This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. config ZYNQ_GEM - depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP) + depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL) select PHYLIB bool "Xilinx Ethernet GEM" help diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c index 8d7c271038..e3c403c13f 100644 --- a/drivers/net/dc2114x.c +++ b/drivers/net/dc2114x.c @@ -123,7 +123,6 @@ #define TOUT_LOOP 1000000 #define SETUP_FRAME_LEN 192 -#define ETH_ALEN 6 struct de4x5_desc { volatile s32 status; diff --git a/drivers/net/eepro100.c b/drivers/net/eepro100.c index ae65b649bf..2fe0ba6e20 100644 --- a/drivers/net/eepro100.c +++ b/drivers/net/eepro100.c @@ -193,8 +193,6 @@ struct descriptor { /* A generic descriptor. */ #define TOUT_LOOP 1000000 -#define ETH_ALEN 6 - static struct RxFD rx_ring[NUM_RX_DESC]; /* RX descriptor ring */ static struct TxFD tx_ring[NUM_TX_DESC]; /* TX descriptor ring */ static int rx_next; /* RX descriptor ring pointer */ diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index d9a897dc86..b245fbc681 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -363,8 +363,7 @@ static int mc_fixup_mac_addrs(void *blob, enum mc_fixup_type type) for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) { /* port not enabled */ - if ((wriop_is_enabled_dpmac(i) != 1) || - (wriop_get_phy_address(i) == -1)) + if (wriop_is_enabled_dpmac(i) != 1) continue; snprintf(ethname, ETH_NAME_LEN, "DPMAC%d@%s", i, @@ -886,8 +885,7 @@ int fsl_mc_ldpaa_init(bd_t *bis) int i; for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) - if ((wriop_is_enabled_dpmac(i) == 1) && - (wriop_get_phy_address(i) != -1)) + if (wriop_is_enabled_dpmac(i) == 1) ldpaa_eth_init(i, wriop_get_enet_if(i)); return 0; } diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c index a25b7cd906..73b7ba29df 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.c +++ b/drivers/net/ldpaa_eth/ldpaa_eth.c @@ -23,21 +23,43 @@ static int init_phy(struct eth_device *dev) struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)dev->priv; struct phy_device *phydev = NULL; struct mii_dev *bus; + int phy_addr, phy_num; + int ret = 0; bus = wriop_get_mdio(priv->dpmac_id); if (bus == NULL) return 0; - phydev = phy_connect(bus, wriop_get_phy_address(priv->dpmac_id), - dev, wriop_get_enet_if(priv->dpmac_id)); - if (!phydev) { - printf("Failed to connect\n"); - return -1; + for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) { + phy_addr = wriop_get_phy_address(priv->dpmac_id, phy_num); + if (phy_addr < 0) + continue; + + phydev = phy_connect(bus, phy_addr, dev, + wriop_get_enet_if(priv->dpmac_id)); + if (!phydev) { + printf("Failed to connect\n"); + ret = -ENODEV; + break; + } + wriop_set_phy_dev(priv->dpmac_id, phy_num, phydev); + ret = phy_config(phydev); + if (ret) + break; } - priv->phydev = phydev; + if (ret) { + for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) { + phydev = wriop_get_phy_dev(priv->dpmac_id, phy_num); + if (!phydev) + continue; + + free(phydev); + wriop_set_phy_dev(priv->dpmac_id, phy_num, NULL); + } + } - return phy_config(phydev); + return ret; } #endif @@ -377,6 +399,70 @@ error: return err; } +static int ldpaa_get_dpmac_state(struct ldpaa_eth_priv *priv, + struct dpmac_link_state *state) +{ + phy_interface_t enet_if; + int phys_detected; +#ifdef CONFIG_PHYLIB + struct phy_device *phydev = NULL; + int err, phy_num; +#endif + + /* let's start off with maximum capabilities */ + enet_if = wriop_get_enet_if(priv->dpmac_id); + switch (enet_if) { + case PHY_INTERFACE_MODE_XGMII: + state->rate = SPEED_10000; + break; + default: + state->rate = SPEED_1000; + break; + } + state->up = 1; + + phys_detected = 0; +#ifdef CONFIG_PHYLIB + state->options |= DPMAC_LINK_OPT_AUTONEG; + + /* start the phy devices one by one and update the dpmac state */ + for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) { + phydev = wriop_get_phy_dev(priv->dpmac_id, phy_num); + if (!phydev) + continue; + + phys_detected++; + err = phy_startup(phydev); + if (err) { + printf("%s: Could not initialize\n", phydev->dev->name); + state->up = 0; + break; + } + if (phydev->link) { + state->rate = min(state->rate, (uint32_t)phydev->speed); + if (!phydev->duplex) + state->options |= DPMAC_LINK_OPT_HALF_DUPLEX; + if (!phydev->autoneg) + state->options &= ~DPMAC_LINK_OPT_AUTONEG; + } else { + /* break out of loop even if one phy is down */ + state->up = 0; + break; + } + } +#endif + if (!phys_detected) + state->options &= ~DPMAC_LINK_OPT_AUTONEG; + + if (!state->up) { + state->rate = 0; + state->options = 0; + return -ENOLINK; + } + + return 0; +} + static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) { struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv; @@ -385,8 +471,6 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) struct dpni_link_state link_state; #endif int err = 0; - struct mii_dev *bus; - phy_interface_t enet_if; struct dpni_queue d_queue; if (net_dev->state == ETH_STATE_ACTIVE) @@ -407,47 +491,14 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) if (err < 0) goto err_dpmac_setup; -#ifdef CONFIG_PHYLIB - if (priv->phydev) { - err = phy_startup(priv->phydev); - if (err) { - printf("%s: Could not initialize\n", - priv->phydev->dev->name); - goto err_dpamc_bind; - } - } -#else - priv->phydev = (struct phy_device *)malloc(sizeof(struct phy_device)); - memset(priv->phydev, 0, sizeof(struct phy_device)); - - priv->phydev->speed = SPEED_1000; - priv->phydev->link = 1; - priv->phydev->duplex = DUPLEX_FULL; -#endif - - bus = wriop_get_mdio(priv->dpmac_id); - enet_if = wriop_get_enet_if(priv->dpmac_id); - if ((bus == NULL) && - (enet_if == PHY_INTERFACE_MODE_XGMII)) { - priv->phydev = (struct phy_device *) - malloc(sizeof(struct phy_device)); - memset(priv->phydev, 0, sizeof(struct phy_device)); - - priv->phydev->speed = SPEED_10000; - priv->phydev->link = 1; - priv->phydev->duplex = DUPLEX_FULL; - } - - if (!priv->phydev->link) { - printf("%s: No link.\n", priv->phydev->dev->name); - err = -1; - goto err_dpamc_bind; - } + err = ldpaa_get_dpmac_state(priv, &dpmac_link_state); + if (err < 0) + goto err_dpmac_bind; /* DPMAC binding DPNI */ err = ldpaa_dpmac_bind(priv); if (err) - goto err_dpamc_bind; + goto err_dpmac_bind; /* DPNI initialization */ err = ldpaa_dpni_setup(priv); @@ -476,18 +527,6 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) return err; } - dpmac_link_state.rate = priv->phydev->speed; - - if (priv->phydev->autoneg == AUTONEG_DISABLE) - dpmac_link_state.options &= ~DPMAC_LINK_OPT_AUTONEG; - else - dpmac_link_state.options |= DPMAC_LINK_OPT_AUTONEG; - - if (priv->phydev->duplex == DUPLEX_HALF) - dpmac_link_state.options |= DPMAC_LINK_OPT_HALF_DUPLEX; - - dpmac_link_state.up = priv->phydev->link; - err = dpmac_set_link_state(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpmac_handle, &dpmac_link_state); if (err < 0) { @@ -530,7 +569,7 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) goto err_qdid; } - return priv->phydev->link; + return dpmac_link_state.up; err_qdid: err_get_queue: @@ -540,7 +579,7 @@ err_dpni_bind: err_dpbp_setup: dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle); err_dpni_setup: -err_dpamc_bind: +err_dpmac_bind: dpmac_close(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpmac_handle); dpmac_destroy(dflt_mc_io, dflt_dprc_handle, @@ -554,7 +593,8 @@ static void ldpaa_eth_stop(struct eth_device *net_dev) struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv; int err = 0; #ifdef CONFIG_PHYLIB - struct mii_dev *bus = wriop_get_mdio(priv->dpmac_id); + struct phy_device *phydev = NULL; + int phy_num; #endif if ((net_dev->state == ETH_STATE_PASSIVE) || @@ -588,11 +628,10 @@ static void ldpaa_eth_stop(struct eth_device *net_dev) printf("dpni_disable() failed\n"); #ifdef CONFIG_PHYLIB - if (priv->phydev && bus != NULL) - phy_shutdown(priv->phydev); - else { - free(priv->phydev); - priv->phydev = NULL; + for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) { + phydev = wriop_get_phy_dev(priv->dpmac_id, phy_num); + if (phydev) + phy_shutdown(phydev); } #endif diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.h b/drivers/net/ldpaa_eth/ldpaa_eth.h index ee784a55ee..3f9154b5bb 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.h +++ b/drivers/net/ldpaa_eth/ldpaa_eth.h @@ -127,7 +127,6 @@ struct ldpaa_eth_priv { uint16_t tx_flow_id; enum ldpaa_eth_type type; /* 1G or 10G ethernet */ - struct phy_device *phydev; }; struct dprc_endpoint dpmac_endpoint; diff --git a/drivers/net/ldpaa_eth/ldpaa_wriop.c b/drivers/net/ldpaa_eth/ldpaa_wriop.c index 0731a795c8..06a284ad68 100644 --- a/drivers/net/ldpaa_eth/ldpaa_wriop.c +++ b/drivers/net/ldpaa_eth/ldpaa_wriop.c @@ -22,10 +22,10 @@ __weak phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtc) void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl) { phy_interface_t enet_if; + int phy_num; dpmac_info[dpmac_id].enabled = 0; dpmac_info[dpmac_id].id = 0; - dpmac_info[dpmac_id].phy_addr = -1; dpmac_info[dpmac_id].enet_if = PHY_INTERFACE_MODE_NONE; enet_if = wriop_dpmac_enet_if(dpmac_id, lane_prtcl); @@ -34,14 +34,23 @@ void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl) dpmac_info[dpmac_id].id = dpmac_id; dpmac_info[dpmac_id].enet_if = enet_if; } + for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) { + dpmac_info[dpmac_id].phydev[phy_num] = NULL; + dpmac_info[dpmac_id].phy_addr[phy_num] = -1; + } } void wriop_init_dpmac_enet_if(int dpmac_id, phy_interface_t enet_if) { + int phy_num; + dpmac_info[dpmac_id].enabled = 1; dpmac_info[dpmac_id].id = dpmac_id; - dpmac_info[dpmac_id].phy_addr = -1; dpmac_info[dpmac_id].enet_if = enet_if; + for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) { + dpmac_info[dpmac_id].phydev[phy_num] = NULL; + dpmac_info[dpmac_id].phy_addr[phy_num] = -1; + } } @@ -58,47 +67,53 @@ static int wriop_dpmac_to_index(int dpmac_id) return -1; } -void wriop_disable_dpmac(int dpmac_id) +int wriop_disable_dpmac(int dpmac_id) { int i = wriop_dpmac_to_index(dpmac_id); if (i == -1) - return; + return -ENODEV; dpmac_info[i].enabled = 0; wriop_dpmac_disable(dpmac_id); + + return 0; } -void wriop_enable_dpmac(int dpmac_id) +int wriop_enable_dpmac(int dpmac_id) { int i = wriop_dpmac_to_index(dpmac_id); if (i == -1) - return; + return -ENODEV; dpmac_info[i].enabled = 1; wriop_dpmac_enable(dpmac_id); + + return 0; } -u8 wriop_is_enabled_dpmac(int dpmac_id) +int wriop_is_enabled_dpmac(int dpmac_id) { int i = wriop_dpmac_to_index(dpmac_id); if (i == -1) - return -1; + return -ENODEV; return dpmac_info[i].enabled; } -void wriop_set_mdio(int dpmac_id, struct mii_dev *bus) +int wriop_set_mdio(int dpmac_id, struct mii_dev *bus) { int i = wriop_dpmac_to_index(dpmac_id); if (i == -1) - return; + return -ENODEV; dpmac_info[i].bus = bus; + + return 0; } struct mii_dev *wriop_get_mdio(int dpmac_id) @@ -111,44 +126,56 @@ struct mii_dev *wriop_get_mdio(int dpmac_id) return dpmac_info[i].bus; } -void wriop_set_phy_address(int dpmac_id, int address) +int wriop_set_phy_address(int dpmac_id, int phy_num, int address) { int i = wriop_dpmac_to_index(dpmac_id); if (i == -1) - return; + return -ENODEV; + if (phy_num < 0 || phy_num >= WRIOP_MAX_PHY_NUM) + return -EINVAL; + + dpmac_info[i].phy_addr[phy_num] = address; - dpmac_info[i].phy_addr = address; + return 0; } -int wriop_get_phy_address(int dpmac_id) +int wriop_get_phy_address(int dpmac_id, int phy_num) { int i = wriop_dpmac_to_index(dpmac_id); if (i == -1) - return -1; + return -ENODEV; + if (phy_num < 0 || phy_num >= WRIOP_MAX_PHY_NUM) + return -EINVAL; - return dpmac_info[i].phy_addr; + return dpmac_info[i].phy_addr[phy_num]; } -void wriop_set_phy_dev(int dpmac_id, struct phy_device *phydev) +int wriop_set_phy_dev(int dpmac_id, int phy_num, struct phy_device *phydev) { int i = wriop_dpmac_to_index(dpmac_id); if (i == -1) - return; + return -ENODEV; + if (phy_num < 0 || phy_num >= WRIOP_MAX_PHY_NUM) + return -EINVAL; - dpmac_info[i].phydev = phydev; + dpmac_info[i].phydev[phy_num] = phydev; + + return 0; } -struct phy_device *wriop_get_phy_dev(int dpmac_id) +struct phy_device *wriop_get_phy_dev(int dpmac_id, int phy_num) { int i = wriop_dpmac_to_index(dpmac_id); if (i == -1) return NULL; + if (phy_num < 0 || phy_num >= WRIOP_MAX_PHY_NUM) + return NULL; - return dpmac_info[i].phydev; + return dpmac_info[i].phydev[phy_num]; } phy_interface_t wriop_get_enet_if(int dpmac_id) diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c index ab697b9bc7..8cb04b52d7 100644 --- a/drivers/net/mvneta.c +++ b/drivers/net/mvneta.c @@ -34,14 +34,6 @@ DECLARE_GLOBAL_DATA_PTR; # error Marvell mvneta requires PHYLIB #endif -/* Some linux -> U-Boot compatibility stuff */ -#define netdev_err(dev, fmt, args...) \ - printf(fmt, ##args) -#define netdev_warn(dev, fmt, args...) \ - printf(fmt, ##args) -#define netdev_info(dev, fmt, args...) \ - printf(fmt, ##args) - #define CONFIG_NR_CPUS 1 #define ETH_HLEN 14 /* Total octets in header */ diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c index 62c0c2be06..f34245ba77 100644 --- a/drivers/net/mvpp2.c +++ b/drivers/net/mvpp2.c @@ -35,18 +35,6 @@ DECLARE_GLOBAL_DATA_PTR; -/* Some linux -> U-Boot compatibility stuff */ -#define netdev_err(dev, fmt, args...) \ - printf(fmt, ##args) -#define netdev_warn(dev, fmt, args...) \ - printf(fmt, ##args) -#define netdev_info(dev, fmt, args...) \ - printf(fmt, ##args) -#define netdev_dbg(dev, fmt, args...) \ - printf(fmt, ##args) - -#define ETH_ALEN 6 /* Octets in one ethernet addr */ - #define __verify_pcpu_ptr(ptr) \ do { \ const void __percpu *__vpp_verify = (typeof((ptr) + 0))NULL; \ @@ -68,7 +56,6 @@ do { \ #define NET_SKB_PAD max(32, MVPP2_CPU_D_CACHE_LINE_SIZE) #define CONFIG_NR_CPUS 1 -#define ETH_HLEN ETHER_HDR_SIZE /* Total octets in header */ /* 2(HW hdr) 14(MAC hdr) 4(CRC) 32(extra for cache prefetch) */ #define WRAP (2 + ETH_HLEN + 4 + 32) diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c index 0ed9bb5765..86f689802e 100644 --- a/drivers/net/natsemi.c +++ b/drivers/net/natsemi.c @@ -61,7 +61,6 @@ #define EEPROM_SIZE 0xb /*12 16-bit chunks, or 24 bytes*/ #define DSIZE 0x00000FFF -#define ETH_ALEN 6 #define CRC_SIZE 4 #define TOUT_LOOP 500000 #define TX_BUF_SIZE 1536 diff --git a/drivers/net/ns8382x.c b/drivers/net/ns8382x.c index f941c15b27..ea7ece54b6 100644 --- a/drivers/net/ns8382x.c +++ b/drivers/net/ns8382x.c @@ -59,7 +59,6 @@ /* defines */ #define DSIZE 0x00000FFF -#define ETH_ALEN 6 #define CRC_SIZE 4 #define TOUT_LOOP 500000 #define TX_BUF_SIZE 1536 diff --git a/drivers/net/pch_gbe.c b/drivers/net/pch_gbe.c index d31c45f3b6..2286dd07e9 100644 --- a/drivers/net/pch_gbe.c +++ b/drivers/net/pch_gbe.c @@ -429,7 +429,7 @@ static int pch_gbe_phy_init(struct udevice *dev) return 0; } -int pch_gbe_probe(struct udevice *dev) +static int pch_gbe_probe(struct udevice *dev) { struct pch_gbe_priv *priv; struct eth_pdata *plat = dev_get_platdata(dev); @@ -464,7 +464,7 @@ int pch_gbe_probe(struct udevice *dev) return pch_gbe_phy_init(dev); } -int pch_gbe_remove(struct udevice *dev) +static int pch_gbe_remove(struct udevice *dev) { struct pch_gbe_priv *priv = dev_get_priv(dev); diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c index f870e6d662..6db6edd0d0 100644 --- a/drivers/net/phy/ti.c +++ b/drivers/net/phy/ti.c @@ -24,6 +24,7 @@ /* Extended Registers */ #define DP83867_CFG4 0x0031 #define DP83867_RGMIICTL 0x0032 +#define DP83867_STRAP_STS1 0x006E #define DP83867_RGMIIDCTL 0x0086 #define DP83867_IO_MUX_CFG 0x0170 @@ -48,8 +49,12 @@ #define DP83867_RGMII_TX_CLK_DELAY_EN BIT(1) #define DP83867_RGMII_RX_CLK_DELAY_EN BIT(0) +/* STRAP_STS1 bits */ +#define DP83867_STRAP_STS1_RESERVED BIT(11) + /* PHY CTRL bits */ #define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14 +#define DP83867_PHYCR_RESERVED_MASK BIT(11) #define DP83867_MDI_CROSSOVER 5 #define DP83867_MDI_CROSSOVER_AUTO 2 #define DP83867_MDI_CROSSOVER_MDIX 2 @@ -88,6 +93,18 @@ #define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX 0x0 #define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN 0x1f +#define DP83867_IO_MUX_CFG_CLK_O_SEL_SHIFT 8 +#define DP83867_IO_MUX_CFG_CLK_O_SEL_MASK \ + GENMASK(0x1f, DP83867_IO_MUX_CFG_CLK_O_SEL_SHIFT) + +/* CFG4 bits */ +#define DP83867_CFG4_PORT_MIRROR_EN BIT(0) + +enum { + DP83867_PORT_MIRRORING_KEEP, + DP83867_PORT_MIRRORING_EN, + DP83867_PORT_MIRRORING_DIS, +}; struct dp83867_private { int rx_id_delay; @@ -95,6 +112,8 @@ struct dp83867_private { int fifo_depth; int io_impedance; bool rxctrl_strap_quirk; + int port_mirroring; + int clk_output_sel; }; /** @@ -163,6 +182,26 @@ void phy_write_mmd_indirect(struct phy_device *phydev, int prtad, phy_write(phydev, addr, MII_MMD_DATA, data); } +static int dp83867_config_port_mirroring(struct phy_device *phydev) +{ + struct dp83867_private *dp83867 = + (struct dp83867_private *)phydev->priv; + u16 val; + + val = phy_read_mmd_indirect(phydev, DP83867_CFG4, DP83867_DEVADDR, + phydev->addr); + + if (dp83867->port_mirroring == DP83867_PORT_MIRRORING_EN) + val |= DP83867_CFG4_PORT_MIRROR_EN; + else + val &= ~DP83867_CFG4_PORT_MIRROR_EN; + + phy_write_mmd_indirect(phydev, DP83867_CFG4, DP83867_DEVADDR, + phydev->addr, val); + + return 0; +} + #if defined(CONFIG_DM_ETH) /** * dp83867_data_init - Convenience function for setting PHY specific data @@ -173,6 +212,18 @@ static int dp83867_of_init(struct phy_device *phydev) { struct dp83867_private *dp83867 = phydev->priv; ofnode node; + u16 val; + + /* Optional configuration */ + + /* + * Keep the default value if ti,clk-output-sel is not set + * or to high + */ + + dp83867->clk_output_sel = + ofnode_read_u32_default(node, "ti,clk-output-sel", + DP83867_CLK_O_SEL_REF_CLK); node = phy_get_ofnode(phydev); if (!ofnode_valid(node)) @@ -197,6 +248,23 @@ static int dp83867_of_init(struct phy_device *phydev) dp83867->fifo_depth = ofnode_read_u32_default(node, "ti,fifo-depth", -1); + if (ofnode_read_bool(node, "enet-phy-lane-swap")) + dp83867->port_mirroring = DP83867_PORT_MIRRORING_EN; + + if (ofnode_read_bool(node, "enet-phy-lane-no-swap")) + dp83867->port_mirroring = DP83867_PORT_MIRRORING_DIS; + + + /* Clock output selection if muxing property is set */ + if (dp83867->clk_output_sel != DP83867_CLK_O_SEL_REF_CLK) { + val = phy_read_mmd_indirect(phydev, DP83867_IO_MUX_CFG, + DP83867_DEVADDR, phydev->addr); + val &= ~DP83867_IO_MUX_CFG_CLK_O_SEL_MASK; + val |= (dp83867->clk_output_sel << + DP83867_IO_MUX_CFG_CLK_O_SEL_SHIFT); + phy_write_mmd_indirect(phydev, DP83867_IO_MUX_CFG, + DP83867_DEVADDR, phydev->addr, val); + } return 0; } @@ -218,7 +286,7 @@ static int dp83867_config(struct phy_device *phydev) { struct dp83867_private *dp83867; unsigned int val, delay, cfg2; - int ret; + int ret, bs; if (!phydev->priv) { dp83867 = kzalloc(sizeof(*dp83867), GFP_KERNEL); @@ -253,6 +321,26 @@ static int dp83867_config(struct phy_device *phydev) (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT)); if (ret) goto err_out; + + /* The code below checks if "port mirroring" N/A MODE4 has been + * enabled during power on bootstrap. + * + * Such N/A mode enabled by mistake can put PHY IC in some + * internal testing mode and disable RGMII transmission. + * + * In this particular case one needs to check STRAP_STS1 + * register's bit 11 (marked as RESERVED). + */ + + bs = phy_read_mmd_indirect(phydev, DP83867_STRAP_STS1, + DP83867_DEVADDR, phydev->addr); + val = phy_read(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL); + if (bs & DP83867_STRAP_STS1_RESERVED) { + val &= ~DP83867_PHYCR_RESERVED_MASK; + phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL, + val); + } + } else if (phy_interface_is_sgmii(phydev)) { phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, (BMCR_ANENABLE | BMCR_FULLDPLX | BMCR_SPEED1000)); @@ -315,6 +403,9 @@ static int dp83867_config(struct phy_device *phydev) } } + if (dp83867->port_mirroring != DP83867_PORT_MIRRORING_KEEP) + dp83867_config_port_mirroring(phydev); + genphy_config_aneg(phydev); return 0; diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl8139.c index ea523435f0..590f8ce154 100644 --- a/drivers/net/rtl8139.c +++ b/drivers/net/rtl8139.c @@ -80,10 +80,6 @@ #define RTL_TIMEOUT 100000 -#define ETH_FRAME_LEN 1514 -#define ETH_ALEN 6 -#define ETH_ZLEN 60 - /* PCI Tuning Parameters Threshold is bytes transferred to chip before transmission starts. */ #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */ diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index e0e3a6d570..a78f3d233f 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -102,10 +102,6 @@ static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 }; #define RTL_R16(reg) readw(ioaddr + (reg)) #define RTL_R32(reg) readl(ioaddr + (reg)) -#define ETH_FRAME_LEN MAX_ETH_FRAME_SIZE -#define ETH_ALEN MAC_ADDR_LEN -#define ETH_ZLEN 60 - #define bus_to_phys(a) pci_mem_to_phys((pci_dev_t)(unsigned long)dev->priv, \ (pci_addr_t)(unsigned long)a) #define phys_to_bus(a) pci_phys_to_mem((pci_dev_t)(unsigned long)dev->priv, \ diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c index b71c8f88d9..decce2fa59 100644 --- a/drivers/net/sandbox.c +++ b/drivers/net/sandbox.c @@ -10,26 +10,11 @@ #include <dm.h> #include <malloc.h> #include <net.h> +#include <asm/eth.h> #include <asm/test.h> DECLARE_GLOBAL_DATA_PTR; -/** - * struct eth_sandbox_priv - memory for sandbox mock driver - * - * fake_host_hwaddr: MAC address of mocked machine - * fake_host_ipaddr: IP address of mocked machine - * recv_packet_buffer: buffer of the packet returned as received - * recv_packet_length: length of the packet returned as received - */ -struct eth_sandbox_priv { - uchar fake_host_hwaddr[ARP_HLEN]; - struct in_addr fake_host_ipaddr; - uchar *recv_packet_buffer; - int recv_packet_length; -}; - -static bool disabled[8] = {false}; static bool skip_timeout; /* @@ -40,7 +25,16 @@ static bool skip_timeout; */ void sandbox_eth_disable_response(int index, bool disable) { - disabled[index] = disable; + struct udevice *dev; + struct eth_sandbox_priv *priv; + int ret; + + ret = uclass_get_device(UCLASS_ETH, index, &dev); + if (ret) + return; + + priv = dev_get_priv(dev); + priv->disabled = disable; } /* @@ -53,103 +47,304 @@ void sandbox_eth_skip_timeout(void) skip_timeout = true; } -static int sb_eth_start(struct udevice *dev) +/* + * sandbox_eth_arp_req_to_reply() + * + * Check for an arp request to be sent. If so, inject a reply + * + * returns 0 if injected, -EAGAIN if not + */ +int sandbox_eth_arp_req_to_reply(struct udevice *dev, void *packet, + unsigned int len) { struct eth_sandbox_priv *priv = dev_get_priv(dev); + struct ethernet_hdr *eth = packet; + struct arp_hdr *arp; + struct ethernet_hdr *eth_recv; + struct arp_hdr *arp_recv; - debug("eth_sandbox: Start\n"); + if (ntohs(eth->et_protlen) != PROT_ARP) + return -EAGAIN; - priv->recv_packet_buffer = net_rx_packets[0]; + arp = packet + ETHER_HDR_SIZE; + + if (ntohs(arp->ar_op) != ARPOP_REQUEST) + return -EAGAIN; + + /* Don't allow the buffer to overrun */ + if (priv->recv_packets >= PKTBUFSRX) + return 0; + + /* store this as the assumed IP of the fake host */ + priv->fake_host_ipaddr = net_read_ip(&arp->ar_tpa); + + /* Formulate a fake response */ + eth_recv = (void *)priv->recv_packet_buffer[priv->recv_packets]; + memcpy(eth_recv->et_dest, eth->et_src, ARP_HLEN); + memcpy(eth_recv->et_src, priv->fake_host_hwaddr, ARP_HLEN); + eth_recv->et_protlen = htons(PROT_ARP); + + arp_recv = (void *)eth_recv + ETHER_HDR_SIZE; + arp_recv->ar_hrd = htons(ARP_ETHER); + arp_recv->ar_pro = htons(PROT_IP); + arp_recv->ar_hln = ARP_HLEN; + arp_recv->ar_pln = ARP_PLEN; + arp_recv->ar_op = htons(ARPOP_REPLY); + memcpy(&arp_recv->ar_sha, priv->fake_host_hwaddr, ARP_HLEN); + net_write_ip(&arp_recv->ar_spa, priv->fake_host_ipaddr); + memcpy(&arp_recv->ar_tha, &arp->ar_sha, ARP_HLEN); + net_copy_ip(&arp_recv->ar_tpa, &arp->ar_spa); + + priv->recv_packet_length[priv->recv_packets] = + ETHER_HDR_SIZE + ARP_HDR_SIZE; + ++priv->recv_packets; return 0; } -static int sb_eth_send(struct udevice *dev, void *packet, int length) +/* + * sandbox_eth_ping_req_to_reply() + * + * Check for a ping request to be sent. If so, inject a reply + * + * returns 0 if injected, -EAGAIN if not + */ +int sandbox_eth_ping_req_to_reply(struct udevice *dev, void *packet, + unsigned int len) { struct eth_sandbox_priv *priv = dev_get_priv(dev); struct ethernet_hdr *eth = packet; + struct ip_udp_hdr *ip; + struct icmp_hdr *icmp; + struct ethernet_hdr *eth_recv; + struct ip_udp_hdr *ipr; + struct icmp_hdr *icmpr; - debug("eth_sandbox: Send packet %d\n", length); + if (ntohs(eth->et_protlen) != PROT_IP) + return -EAGAIN; + + ip = packet + ETHER_HDR_SIZE; + + if (ip->ip_p != IPPROTO_ICMP) + return -EAGAIN; + + icmp = (struct icmp_hdr *)&ip->udp_src; + + if (icmp->type != ICMP_ECHO_REQUEST) + return -EAGAIN; + + /* Don't allow the buffer to overrun */ + if (priv->recv_packets >= PKTBUFSRX) + return 0; + + /* reply to the ping */ + eth_recv = (void *)priv->recv_packet_buffer[priv->recv_packets]; + memcpy(eth_recv, packet, len); + ipr = (void *)eth_recv + ETHER_HDR_SIZE; + icmpr = (struct icmp_hdr *)&ipr->udp_src; + memcpy(eth_recv->et_dest, eth->et_src, ARP_HLEN); + memcpy(eth_recv->et_src, priv->fake_host_hwaddr, ARP_HLEN); + ipr->ip_sum = 0; + ipr->ip_off = 0; + net_copy_ip((void *)&ipr->ip_dst, &ip->ip_src); + net_write_ip((void *)&ipr->ip_src, priv->fake_host_ipaddr); + ipr->ip_sum = compute_ip_checksum(ipr, IP_HDR_SIZE); + + icmpr->type = ICMP_ECHO_REPLY; + icmpr->checksum = 0; + icmpr->checksum = compute_ip_checksum(icmpr, ICMP_HDR_SIZE); + + priv->recv_packet_length[priv->recv_packets] = len; + ++priv->recv_packets; + + return 0; +} + +/* + * sandbox_eth_recv_arp_req() + * + * Inject an ARP request for this target + * + * returns 0 if injected, -EOVERFLOW if not + */ +int sandbox_eth_recv_arp_req(struct udevice *dev) +{ + struct eth_sandbox_priv *priv = dev_get_priv(dev); + struct ethernet_hdr *eth_recv; + struct arp_hdr *arp_recv; + + /* Don't allow the buffer to overrun */ + if (priv->recv_packets >= PKTBUFSRX) + return -EOVERFLOW; + + /* Formulate a fake request */ + eth_recv = (void *)priv->recv_packet_buffer[priv->recv_packets]; + memcpy(eth_recv->et_dest, net_bcast_ethaddr, ARP_HLEN); + memcpy(eth_recv->et_src, priv->fake_host_hwaddr, ARP_HLEN); + eth_recv->et_protlen = htons(PROT_ARP); + + arp_recv = (void *)eth_recv + ETHER_HDR_SIZE; + arp_recv->ar_hrd = htons(ARP_ETHER); + arp_recv->ar_pro = htons(PROT_IP); + arp_recv->ar_hln = ARP_HLEN; + arp_recv->ar_pln = ARP_PLEN; + arp_recv->ar_op = htons(ARPOP_REQUEST); + memcpy(&arp_recv->ar_sha, priv->fake_host_hwaddr, ARP_HLEN); + net_write_ip(&arp_recv->ar_spa, priv->fake_host_ipaddr); + memcpy(&arp_recv->ar_tha, net_null_ethaddr, ARP_HLEN); + net_write_ip(&arp_recv->ar_tpa, net_ip); + + priv->recv_packet_length[priv->recv_packets] = + ETHER_HDR_SIZE + ARP_HDR_SIZE; + ++priv->recv_packets; + + return 0; +} + +/* + * sandbox_eth_recv_ping_req() + * + * Inject a ping request for this target + * + * returns 0 if injected, -EOVERFLOW if not + */ +int sandbox_eth_recv_ping_req(struct udevice *dev) +{ + struct eth_sandbox_priv *priv = dev_get_priv(dev); + struct ethernet_hdr *eth_recv; + struct ip_udp_hdr *ipr; + struct icmp_hdr *icmpr; + + /* Don't allow the buffer to overrun */ + if (priv->recv_packets >= PKTBUFSRX) + return -EOVERFLOW; + + /* Formulate a fake ping */ + eth_recv = (void *)priv->recv_packet_buffer[priv->recv_packets]; + + memcpy(eth_recv->et_dest, net_ethaddr, ARP_HLEN); + memcpy(eth_recv->et_src, priv->fake_host_hwaddr, ARP_HLEN); + eth_recv->et_protlen = htons(PROT_IP); + + ipr = (void *)eth_recv + ETHER_HDR_SIZE; + ipr->ip_hl_v = 0x45; + ipr->ip_len = htons(IP_ICMP_HDR_SIZE); + ipr->ip_off = htons(IP_FLAGS_DFRAG); + ipr->ip_p = IPPROTO_ICMP; + ipr->ip_sum = 0; + net_write_ip(&ipr->ip_src, priv->fake_host_ipaddr); + net_write_ip(&ipr->ip_dst, net_ip); + ipr->ip_sum = compute_ip_checksum(ipr, IP_HDR_SIZE); + + icmpr = (struct icmp_hdr *)&ipr->udp_src; + + icmpr->type = ICMP_ECHO_REQUEST; + icmpr->code = 0; + icmpr->checksum = 0; + icmpr->un.echo.id = 0; + icmpr->un.echo.sequence = htons(1); + icmpr->checksum = compute_ip_checksum(icmpr, ICMP_HDR_SIZE); + + priv->recv_packet_length[priv->recv_packets] = + ETHER_HDR_SIZE + IP_ICMP_HDR_SIZE; + ++priv->recv_packets; + + return 0; +} - if (dev->seq >= 0 && dev->seq < ARRAY_SIZE(disabled) && - disabled[dev->seq]) +/* + * sb_default_handler() + * + * perform typical responses to simple ping + * + * dev - device pointer + * pkt - "sent" packet buffer + * len - length of packet + */ +static int sb_default_handler(struct udevice *dev, void *packet, + unsigned int len) +{ + if (!sandbox_eth_arp_req_to_reply(dev, packet, len)) + return 0; + if (!sandbox_eth_ping_req_to_reply(dev, packet, len)) return 0; - if (ntohs(eth->et_protlen) == PROT_ARP) { - struct arp_hdr *arp = packet + ETHER_HDR_SIZE; - - if (ntohs(arp->ar_op) == ARPOP_REQUEST) { - struct ethernet_hdr *eth_recv; - struct arp_hdr *arp_recv; - - /* store this as the assumed IP of the fake host */ - priv->fake_host_ipaddr = net_read_ip(&arp->ar_tpa); - /* Formulate a fake response */ - eth_recv = (void *)priv->recv_packet_buffer; - memcpy(eth_recv->et_dest, eth->et_src, ARP_HLEN); - memcpy(eth_recv->et_src, priv->fake_host_hwaddr, - ARP_HLEN); - eth_recv->et_protlen = htons(PROT_ARP); - - arp_recv = (void *)priv->recv_packet_buffer + - ETHER_HDR_SIZE; - arp_recv->ar_hrd = htons(ARP_ETHER); - arp_recv->ar_pro = htons(PROT_IP); - arp_recv->ar_hln = ARP_HLEN; - arp_recv->ar_pln = ARP_PLEN; - arp_recv->ar_op = htons(ARPOP_REPLY); - memcpy(&arp_recv->ar_sha, priv->fake_host_hwaddr, - ARP_HLEN); - net_write_ip(&arp_recv->ar_spa, priv->fake_host_ipaddr); - memcpy(&arp_recv->ar_tha, &arp->ar_sha, ARP_HLEN); - net_copy_ip(&arp_recv->ar_tpa, &arp->ar_spa); - - priv->recv_packet_length = ETHER_HDR_SIZE + - ARP_HDR_SIZE; - } - } else if (ntohs(eth->et_protlen) == PROT_IP) { - struct ip_udp_hdr *ip = packet + ETHER_HDR_SIZE; - - if (ip->ip_p == IPPROTO_ICMP) { - struct icmp_hdr *icmp = (struct icmp_hdr *)&ip->udp_src; - - if (icmp->type == ICMP_ECHO_REQUEST) { - struct ethernet_hdr *eth_recv; - struct ip_udp_hdr *ipr; - struct icmp_hdr *icmpr; - - /* reply to the ping */ - memcpy(priv->recv_packet_buffer, packet, - length); - eth_recv = (void *)priv->recv_packet_buffer; - ipr = (void *)priv->recv_packet_buffer + - ETHER_HDR_SIZE; - icmpr = (struct icmp_hdr *)&ipr->udp_src; - memcpy(eth_recv->et_dest, eth->et_src, - ARP_HLEN); - memcpy(eth_recv->et_src, priv->fake_host_hwaddr, - ARP_HLEN); - ipr->ip_sum = 0; - ipr->ip_off = 0; - net_copy_ip((void *)&ipr->ip_dst, &ip->ip_src); - net_write_ip((void *)&ipr->ip_src, - priv->fake_host_ipaddr); - ipr->ip_sum = compute_ip_checksum(ipr, - IP_HDR_SIZE); - - icmpr->type = ICMP_ECHO_REPLY; - icmpr->checksum = 0; - icmpr->checksum = compute_ip_checksum(icmpr, - ICMP_HDR_SIZE); - - priv->recv_packet_length = length; - } - } + return 0; +} + +/* + * sandbox_eth_set_tx_handler() + * + * Set a custom response to a packet being sent through the sandbox eth test + * driver + * + * index - interface to set the handler for + * handler - The func ptr to call on send. If NULL, set to default handler + */ +void sandbox_eth_set_tx_handler(int index, sandbox_eth_tx_hand_f *handler) +{ + struct udevice *dev; + struct eth_sandbox_priv *priv; + int ret; + + ret = uclass_get_device(UCLASS_ETH, index, &dev); + if (ret) + return; + + priv = dev_get_priv(dev); + if (handler) + priv->tx_handler = handler; + else + priv->tx_handler = sb_default_handler; +} + +/* + * Set priv ptr + * + * priv - priv void ptr to store in the device + */ +void sandbox_eth_set_priv(int index, void *priv) +{ + struct udevice *dev; + struct eth_sandbox_priv *dev_priv; + int ret; + + ret = uclass_get_device(UCLASS_ETH, index, &dev); + if (ret) + return; + + dev_priv = dev_get_priv(dev); + + dev_priv->priv = priv; +} + +static int sb_eth_start(struct udevice *dev) +{ + struct eth_sandbox_priv *priv = dev_get_priv(dev); + + debug("eth_sandbox: Start\n"); + + priv->recv_packets = 0; + for (int i = 0; i < PKTBUFSRX; i++) { + priv->recv_packet_buffer[i] = net_rx_packets[i]; + priv->recv_packet_length[i] = 0; } return 0; } +static int sb_eth_send(struct udevice *dev, void *packet, int length) +{ + struct eth_sandbox_priv *priv = dev_get_priv(dev); + + debug("eth_sandbox: Send packet %d\n", length); + + if (priv->disabled) + return 0; + + return priv->tx_handler(dev, packet, length); +} + static int sb_eth_recv(struct udevice *dev, int flags, uchar **packetp) { struct eth_sandbox_priv *priv = dev_get_priv(dev); @@ -159,18 +354,37 @@ static int sb_eth_recv(struct udevice *dev, int flags, uchar **packetp) skip_timeout = false; } - if (priv->recv_packet_length) { - int lcl_recv_packet_length = priv->recv_packet_length; + if (priv->recv_packets) { + int lcl_recv_packet_length = priv->recv_packet_length[0]; - debug("eth_sandbox: received packet %d\n", - priv->recv_packet_length); - priv->recv_packet_length = 0; - *packetp = priv->recv_packet_buffer; + debug("eth_sandbox: received packet[%d], %d waiting\n", + lcl_recv_packet_length, priv->recv_packets - 1); + *packetp = priv->recv_packet_buffer[0]; return lcl_recv_packet_length; } return 0; } +static int sb_eth_free_pkt(struct udevice *dev, uchar *packet, int length) +{ + struct eth_sandbox_priv *priv = dev_get_priv(dev); + int i; + + if (!priv->recv_packets) + return 0; + + --priv->recv_packets; + for (i = 0; i < priv->recv_packets; i++) { + priv->recv_packet_length[i] = priv->recv_packet_length[i + 1]; + memcpy(priv->recv_packet_buffer[i], + priv->recv_packet_buffer[i + 1], + priv->recv_packet_length[i + 1]); + } + priv->recv_packet_length[priv->recv_packets] = 0; + + return 0; +} + static void sb_eth_stop(struct udevice *dev) { debug("eth_sandbox: Stop\n"); @@ -189,6 +403,7 @@ static const struct eth_ops sb_eth_ops = { .start = sb_eth_start, .send = sb_eth_send, .recv = sb_eth_recv, + .free_pkt = sb_eth_free_pkt, .stop = sb_eth_stop, .write_hwaddr = sb_eth_write_hwaddr, }; @@ -212,6 +427,8 @@ static int sb_eth_ofdata_to_platdata(struct udevice *dev) return -EINVAL; } memcpy(priv->fake_host_hwaddr, mac, ARP_HLEN); + priv->disabled = false; + priv->tx_handler = sb_default_handler; return 0; } diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index e22d048e8f..bc33126536 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -461,6 +461,7 @@ static int zynq_gem_init(struct udevice *dev) break; } +#if !defined(CONFIG_ARCH_VERSAL) ret = clk_set_rate(&priv->clk, clk_rate); if (IS_ERR_VALUE(ret) && ret != (unsigned long)-ENOSYS) { dev_err(dev, "failed to set tx clock rate\n"); @@ -472,6 +473,9 @@ static int zynq_gem_init(struct udevice *dev) dev_err(dev, "failed to enable tx clock\n"); return ret; } +#else + debug("requested clk_rate %ld\n", clk_rate); +#endif setbits_le32(®s->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK | ZYNQ_GEM_NWCTRL_TXEN_MASK); diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index eb118f3496..da49c96ed5 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -90,6 +90,27 @@ int pci_get_ff(enum pci_size_t size) } } +static void pci_dev_find_ofnode(struct udevice *bus, phys_addr_t bdf, + ofnode *rnode) +{ + struct fdt_pci_addr addr; + ofnode node; + int ret; + + dev_for_each_subnode(node, bus) { + ret = ofnode_read_pci_addr(node, FDT_PCI_SPACE_CONFIG, "reg", + &addr); + if (ret) + continue; + + if (PCI_MASK_BUS(addr.phys_hi) != PCI_MASK_BUS(bdf)) + continue; + + *rnode = node; + break; + } +}; + int pci_bus_find_devfn(struct udevice *bus, pci_dev_t find_devfn, struct udevice **devp) { @@ -641,6 +662,7 @@ static int pci_find_and_bind_driver(struct udevice *parent, pci_dev_t bdf, struct udevice **devp) { struct pci_driver_entry *start, *entry; + ofnode node = ofnode_null(); const char *drv; int n_ents; int ret; @@ -651,6 +673,10 @@ static int pci_find_and_bind_driver(struct udevice *parent, debug("%s: Searching for driver: vendor=%x, device=%x\n", __func__, find_id->vendor, find_id->device); + + /* Determine optional OF node */ + pci_dev_find_ofnode(parent, bdf, &node); + start = ll_entry_start(struct pci_driver_entry, pci_driver_entry); n_ents = ll_entry_count(struct pci_driver_entry, pci_driver_entry); for (entry = start; entry != start + n_ents; entry++) { @@ -684,8 +710,8 @@ static int pci_find_and_bind_driver(struct udevice *parent, * find another driver. For now this doesn't seem * necesssary, so just bind the first match. */ - ret = device_bind(parent, drv, drv->name, NULL, -1, - &dev); + ret = device_bind_ofnode(parent, drv, drv->name, NULL, + node, &dev); if (ret) goto error; debug("%s: Match found: %s\n", __func__, drv->name); @@ -712,7 +738,7 @@ static int pci_find_and_bind_driver(struct udevice *parent, return -ENOMEM; drv = bridge ? "pci_bridge_drv" : "pci_generic_drv"; - ret = device_bind_driver(parent, drv, str, devp); + ret = device_bind_driver_to_node(parent, drv, str, node, devp); if (ret) { debug("%s: Failed to bind generic driver: %d\n", __func__, ret); free(str); diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c index 29113f7958..eaacd4066e 100644 --- a/drivers/pci/pci_rom.c +++ b/drivers/pci/pci_rom.c @@ -247,7 +247,7 @@ int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void), } if (!board_should_load_oprom(dev)) - return -ENXIO; + return log_msg_ret("Should not load OPROM", -ENXIO); ret = pci_rom_probe(dev, &rom); if (ret) @@ -328,7 +328,7 @@ int vbe_setup_video_priv(struct vesa_mode_info *vesa, struct video_uc_platdata *plat) { if (!vesa->x_resolution) - return -ENXIO; + return log_msg_ret("No x resolution", -ENXIO); uc_priv->xsize = vesa->x_resolution; uc_priv->ysize = vesa->y_resolution; switch (vesa->bits_per_pixel) { diff --git a/drivers/pwm/sandbox_pwm.c b/drivers/pwm/sandbox_pwm.c index 4b50b19c61..28988187e0 100644 --- a/drivers/pwm/sandbox_pwm.c +++ b/drivers/pwm/sandbox_pwm.c @@ -14,6 +14,14 @@ enum { NUM_CHANNELS = 3, }; +/** + * struct sandbox_pwm_chan - a sandbox PWM channel + * + * @period_ns: Period of the PWM in nanoseconds + * @duty_ns: Current duty cycle of the PWM in nanoseconds + * @enable: true if the PWM is enabled + * @polarity: true if the PWM polarity is active high + */ struct sandbox_pwm_chan { uint period_ns; uint duty_ns; @@ -25,6 +33,23 @@ struct sandbox_pwm_priv { struct sandbox_pwm_chan chan[NUM_CHANNELS]; }; +int sandbox_pwm_get_config(struct udevice *dev, uint channel, uint *period_nsp, + uint *duty_nsp, bool *enablep, bool *polarityp) +{ + struct sandbox_pwm_priv *priv = dev_get_priv(dev); + struct sandbox_pwm_chan *chan; + + if (channel >= NUM_CHANNELS) + return -ENOSPC; + chan = &priv->chan[channel]; + *period_nsp = chan->period_ns; + *duty_nsp = chan->duty_ns; + *enablep = chan->enable; + *polarityp = chan->polarity; + + return 0; +} + static int sandbox_pwm_set_config(struct udevice *dev, uint channel, uint period_ns, uint duty_ns) { diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 54365092ec..bcc01b135e 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -13,6 +13,24 @@ config DM_RTC drivers to perform the actual functions. See rtc.h for a description of the API. +config SPL_DM_RTC + bool "Enable Driver Model for RTC drivers in SPL" + depends on SPL_DM + help + Enable drver model for real-time-clock drivers. The RTC uclass + then provides the rtc_get()/rtc_set() interface, delegating to + drivers to perform the actual functions. See rtc.h for a + description of the API. + +config TPL_DM_RTC + bool "Enable Driver Model for RTC drivers in TPL" + depends on TPL_DM + help + Enable drver model for real-time-clock drivers. The RTC uclass + then provides the rtc_get()/rtc_set() interface, delegating to + drivers to perform the actual functions. See rtc.h for a + description of the API. + config RTC_PCF2127 bool "Enable PCF2127 driver" depends on DM_RTC @@ -68,4 +86,12 @@ config RTC_S35392A help Enable s35392a driver which provides rtc get and set function. +config RTC_MC146818 + bool "Enable MC146818 driver" + help + This is a widely used real-time clock chip originally by Motorola + and now available from NXP. It includes a battery-backed real-time + clock with a wide array of features and 50 bytes of general-purpose, + battery-backed RAM. The driver supports access to the clock and RAM. + endmenu diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 513e3ffc07..1724602f1c 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -4,7 +4,7 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. #ccflags-y += -DDEBUG -obj-$(CONFIG_DM_RTC) += rtc-uclass.o +obj-$(CONFIG_$(SPL_TPL_)DM_RTC) += rtc-uclass.o obj-$(CONFIG_RTC_AT91SAM9_RTT) += at91sam9_rtt.o obj-y += date.o diff --git a/drivers/rtc/isl1208.c b/drivers/rtc/isl1208.c index 22ac0d2b08..59a60b75b3 100644 --- a/drivers/rtc/isl1208.c +++ b/drivers/rtc/isl1208.c @@ -52,6 +52,24 @@ #define RTC_STAT_BIT_RTCF 0x01 /* REAL TIME CLOCK FAIL BIT */ /* + * Read an RTC register + */ + +static int isl1208_rtc_read8(struct udevice *dev, unsigned int reg) +{ + return dm_i2c_reg_read(dev, reg); +} + +/* + * Write an RTC register + */ + +static int isl1208_rtc_write8(struct udevice *dev, unsigned int reg, int val) +{ + return dm_i2c_reg_write(dev, reg, val); +} + +/* * Get the current time from the RTC */ @@ -161,6 +179,8 @@ static const struct rtc_ops isl1208_rtc_ops = { .get = isl1208_rtc_get, .set = isl1208_rtc_set, .reset = isl1208_rtc_reset, + .read8 = isl1208_rtc_read8, + .write8 = isl1208_rtc_write8, }; static const struct udevice_id isl1208_rtc_ids[] = { diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 5fa27254e3..597db4b9cb 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -53,6 +53,16 @@ config SPL_SERIAL_PRESENT This option enables the full UART in SPL, so if is it disabled, the full UART driver will be omitted, thus saving space. +config TPL_SERIAL_PRESENT + bool "Provide a serial driver in TPL" + depends on DM_SERIAL + default y + help + In very space-constrained devices even the full UART driver is too + large. In this case the debug UART can still be used in some cases. + This option enables the full UART in TPL, so if is it disabled, + the full UART driver will be omitted, thus saving space. + # Logic to allow us to use the imply keyword to set what the default port # should be. The default is otherwise 1. config CONS_INDEX_0 @@ -324,6 +334,15 @@ config DEBUG_UART_MXC will need to provide parameters to make this work. The driver will be available until the real driver model serial is running. +config DEBUG_UART_SANDBOX + bool "sandbox" + depends on SANDBOX_SERIAL + help + Select this to enable the debug UART using the sandbox driver. This + provides basic serial output from the console without needing to + start up driver model. The driver will be available until the real + driver model serial is running. + config DEBUG_UART_STM32 bool "STMicroelectronics STM32" depends on STM32_SERIAL @@ -354,6 +373,7 @@ endchoice config DEBUG_UART_BASE hex "Base address of UART" depends on DEBUG_UART + default 0 if DEBUG_UART_SANDBOX help This is the base address of your UART for memory-mapped UARTs. @@ -363,6 +383,7 @@ config DEBUG_UART_BASE config DEBUG_UART_CLOCK int "UART input clock" depends on DEBUG_UART + default 0 if DEBUG_UART_SANDBOX help The UART input clock determines the speed of the internal UART circuitry. The baud rate is derived from this by dividing the input diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c index 94b4fdfb17..4a05ea44ce 100644 --- a/drivers/serial/sandbox.c +++ b/drivers/serial/sandbox.c @@ -22,6 +22,8 @@ DECLARE_GLOBAL_DATA_PTR; +#if CONFIG_IS_ENABLED(OF_CONTROL) + /* * * serial_buf: A buffer that holds keyboard characters for the @@ -124,7 +126,7 @@ static int sandbox_serial_pending(struct udevice *dev, bool input) if (next_index == serial_buf_read) return 1; /* buffer full */ - count = os_read_no_block(0, &serial_buf[serial_buf_write], 1); + count = os_read(0, &serial_buf[serial_buf_write], 1); if (count == 1) serial_buf_write = next_index; @@ -142,6 +144,24 @@ static int sandbox_serial_getc(struct udevice *dev) serial_buf_read = increment_buffer_index(serial_buf_read); return result; } +#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */ + +#ifdef CONFIG_DEBUG_UART_SANDBOX + +#include <debug_uart.h> + +static inline void _debug_uart_init(void) +{ +} + +static inline void _debug_uart_putc(int ch) +{ + os_putc(ch); +} + +DEBUG_UART_FUNCS + +#endif /* CONFIG_DEBUG_UART_SANDBOX */ static int sandbox_serial_setconfig(struct udevice *dev, uint serial_config) { @@ -156,6 +176,7 @@ static int sandbox_serial_setconfig(struct udevice *dev, uint serial_config) return 0; } +#if CONFIG_IS_ENABLED(OF_CONTROL) static const char * const ansi_colour[] = { "black", "red", "green", "yellow", "blue", "megenta", "cyan", "white", @@ -215,3 +236,4 @@ U_BOOT_DEVICE(serial_sandbox_non_fdt) = { .name = "serial_sandbox", .platdata = &platdata_non_fdt, }; +#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */ diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index ffdcae0931..e50f0aa851 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -26,6 +26,7 @@ static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE; #error "Serial is required before relocation - define CONFIG_$(SPL_)SYS_MALLOC_F_LEN to make this work" #endif +#if CONFIG_IS_ENABLED(SERIAL_PRESENT) static int serial_check_stdout(const void *blob, struct udevice **devp) { int node; @@ -150,12 +151,15 @@ static void serial_find_console_or_panic(void) panic_str("No serial driver found"); #endif } +#endif /* CONFIG_SERIAL_PRESENT */ /* Called prior to relocation */ int serial_init(void) { +#if CONFIG_IS_ENABLED(SERIAL_PRESENT) serial_find_console_or_panic(); gd->flags |= GD_FLG_SERIAL_READY; +#endif return 0; } diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 1df6876e9b..516188ea88 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -243,7 +243,7 @@ config XILINX_SPI config ZYNQ_SPI bool "Zynq SPI driver" - depends on ARCH_ZYNQ || ARCH_ZYNQMP + depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL help Enable the Zynq SPI driver. This driver can be used to access the SPI NOR flash on platforms embedding this Zynq @@ -260,7 +260,7 @@ config ZYNQ_QSPI config ZYNQMP_GQSPI bool "Configure ZynqMP Generic QSPI" - depends on ARCH_ZYNQMP + depends on ARCH_ZYNQMP || ARCH_VERSAL help This option is used to enable ZynqMP QSPI controller driver which is used to communicate with qspi flash devices. diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index a822858323..07fa5e3b8a 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -14,6 +14,7 @@ #include <asm/io.h> #include <asm/arch/hardware.h> #include <dm.h> +#include <dm/platform_data/spi_davinci.h> /* SPIGCR0 */ #define SPIGCR0_SPIENA_MASK 0x1 @@ -529,50 +530,58 @@ static int davinci_spi_xfer(struct udevice *dev, unsigned int bitlen, return __davinci_spi_xfer(ds, bitlen, dout, din, flags); } +static const struct dm_spi_ops davinci_spi_ops = { + .claim_bus = davinci_spi_claim_bus, + .release_bus = davinci_spi_release_bus, + .xfer = davinci_spi_xfer, + .set_speed = davinci_spi_set_speed, + .set_mode = davinci_spi_set_mode, +}; + static int davinci_spi_probe(struct udevice *bus) { - /* Nothing to do */ + struct davinci_spi_slave *ds = dev_get_priv(bus); + struct davinci_spi_platdata *plat = bus->platdata; + ds->regs = plat->regs; + ds->num_cs = plat->num_cs; + return 0; } +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) static int davinci_ofdata_to_platadata(struct udevice *bus) { - struct davinci_spi_slave *ds = dev_get_priv(bus); - const void *blob = gd->fdt_blob; - int node = dev_of_offset(bus); + struct davinci_spi_platdata *plat = bus->platdata; + fdt_addr_t addr; - ds->regs = devfdt_map_physmem(bus, sizeof(struct davinci_spi_regs)); - if (!ds->regs) { - printf("%s: could not map device address\n", __func__); + addr = devfdt_get_addr(bus); + if (addr == FDT_ADDR_T_NONE) return -EINVAL; - } - ds->num_cs = fdtdec_get_int(blob, node, "num-cs", 4); + + plat->regs = (struct davinci_spi_regs *)addr; + plat->num_cs = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus), "num-cs", 4); return 0; } -static const struct dm_spi_ops davinci_spi_ops = { - .claim_bus = davinci_spi_claim_bus, - .release_bus = davinci_spi_release_bus, - .xfer = davinci_spi_xfer, - .set_speed = davinci_spi_set_speed, - .set_mode = davinci_spi_set_mode, -}; - static const struct udevice_id davinci_spi_ids[] = { { .compatible = "ti,keystone-spi" }, { .compatible = "ti,dm6441-spi" }, { .compatible = "ti,da830-spi" }, { } }; +#endif U_BOOT_DRIVER(davinci_spi) = { .name = "davinci_spi", .id = UCLASS_SPI, +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .of_match = davinci_spi_ids, - .ops = &davinci_spi_ops, .ofdata_to_platdata = davinci_ofdata_to_platadata, - .priv_auto_alloc_size = sizeof(struct davinci_spi_slave), + .platdata_auto_alloc_size = sizeof(struct davinci_spi_platdata), +#endif .probe = davinci_spi_probe, + .ops = &davinci_spi_ops, + .priv_auto_alloc_size = sizeof(struct davinci_spi_slave), }; #endif diff --git a/drivers/spi/sandbox_spi.c b/drivers/spi/sandbox_spi.c index 75ba6a1ed7..906401ec8a 100644 --- a/drivers/spi/sandbox_spi.c +++ b/drivers/spi/sandbox_spi.c @@ -8,6 +8,8 @@ * Licensed under the GPL-2 or later. */ +#define LOG_CATEGORY UCLASS_SPI + #include <common.h> #include <dm.h> #include <malloc.h> @@ -56,7 +58,6 @@ static int sandbox_spi_xfer(struct udevice *slave, unsigned int bitlen, struct udevice *emul; uint bytes = bitlen / 8, i; int ret; - u8 *tx = (void *)dout, *rx = din; uint busnum, cs; if (bitlen == 0) @@ -87,37 +88,16 @@ static int sandbox_spi_xfer(struct udevice *slave, unsigned int bitlen, if (ret) return ret; - /* make sure rx/tx buffers are full so clients can assume */ - if (!tx) { - debug("sandbox_spi: xfer: auto-allocating tx scratch buffer\n"); - tx = malloc(bytes); - if (!tx) { - debug("sandbox_spi: Out of memory\n"); - return -ENOMEM; - } - } - if (!rx) { - debug("sandbox_spi: xfer: auto-allocating rx scratch buffer\n"); - rx = malloc(bytes); - if (!rx) { - debug("sandbox_spi: Out of memory\n"); - return -ENOMEM; - } - } - ops = spi_emul_get_ops(emul); ret = ops->xfer(emul, bitlen, dout, din, flags); - debug("sandbox_spi: xfer: got back %i (that's %s)\n rx:", - ret, ret ? "bad" : "good"); - for (i = 0; i < bytes; ++i) - debug(" %u:%02x", i, rx[i]); - debug("\n"); - - if (tx != dout) - free(tx); - if (rx != din) - free(rx); + log_content("sandbox_spi: xfer: got back %i (that's %s)\n rx:", + ret, ret ? "bad" : "good"); + if (din) { + for (i = 0; i < bytes; ++i) + log_content(" %u:%02x", i, ((u8 *)din)[i]); + } + log_content("\n"); return ret; } diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c index c517d066f6..b84255bd27 100644 --- a/drivers/spi/spi-uclass.c +++ b/drivers/spi/spi-uclass.c @@ -63,11 +63,11 @@ int dm_spi_claim_bus(struct udevice *dev) int ret = spi_set_speed_mode(bus, speed, slave->mode); if (ret) - return ret; + return log_ret(ret); slave->speed = speed; } - return ops->claim_bus ? ops->claim_bus(dev) : 0; + return log_ret(ops->claim_bus ? ops->claim_bus(dev) : 0); } void dm_spi_release_bus(struct udevice *dev) @@ -92,7 +92,7 @@ int dm_spi_xfer(struct udevice *dev, unsigned int bitlen, int spi_claim_bus(struct spi_slave *slave) { - return dm_spi_claim_bus(slave->dev); + return log_ret(dm_spi_claim_bus(slave->dev)); } void spi_release_bus(struct spi_slave *slave) diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c index 06ef0ed96c..ad831c703a 100644 --- a/drivers/sysreset/sysreset-uclass.c +++ b/drivers/sysreset/sysreset-uclass.c @@ -4,6 +4,8 @@ * Written by Simon Glass <sjg@chromium.org> */ +#define LOG_CATEGORY UCLASS_SYSRESET + #include <common.h> #include <sysreset.h> #include <dm.h> @@ -34,6 +36,16 @@ int sysreset_get_status(struct udevice *dev, char *buf, int size) return ops->get_status(dev, buf, size); } +int sysreset_get_last(struct udevice *dev) +{ + struct sysreset_ops *ops = sysreset_get_ops(dev); + + if (!ops->get_last) + return -ENOSYS; + + return ops->get_last(dev); +} + int sysreset_walk(enum sysreset_t type) { struct udevice *dev; @@ -53,6 +65,26 @@ int sysreset_walk(enum sysreset_t type) return ret; } +int sysreset_get_last_walk(void) +{ + struct udevice *dev; + int value = -ENOENT; + + for (uclass_first_device(UCLASS_SYSRESET, &dev); + dev; + uclass_next_device(&dev)) { + int ret; + + ret = sysreset_get_last(dev); + if (ret >= 0) { + value = ret; + break; + } + } + + return value; +} + void sysreset_walk_halt(enum sysreset_t type) { int ret; @@ -64,7 +96,7 @@ void sysreset_walk_halt(enum sysreset_t type) mdelay(100); /* Still no reset? Give up */ - debug("System reset not supported on this platform\n"); + log_err("System reset not supported on this platform\n"); hang(); } diff --git a/drivers/sysreset/sysreset_sandbox.c b/drivers/sysreset/sysreset_sandbox.c index 75004d9f77..7f6d4186e1 100644 --- a/drivers/sysreset/sysreset_sandbox.c +++ b/drivers/sysreset/sysreset_sandbox.c @@ -36,6 +36,11 @@ int sandbox_warm_sysreset_get_status(struct udevice *dev, char *buf, int size) return 0; } +int sandbox_warm_sysreset_get_last(struct udevice *dev) +{ + return SYSRESET_WARM; +} + static int sandbox_sysreset_request(struct udevice *dev, enum sysreset_t type) { struct sandbox_state *state = state_get_current(); @@ -58,6 +63,9 @@ static int sandbox_sysreset_request(struct udevice *dev, enum sysreset_t type) return -EACCES; sandbox_exit(); break; + case SYSRESET_POWER_OFF: + if (!state->sysreset_allowed[type]) + return -EACCES; default: return -ENOSYS; } @@ -74,9 +82,15 @@ int sandbox_sysreset_get_status(struct udevice *dev, char *buf, int size) return 0; } +int sandbox_sysreset_get_last(struct udevice *dev) +{ + return SYSRESET_COLD; +} + static struct sysreset_ops sandbox_sysreset_ops = { .request = sandbox_sysreset_request, .get_status = sandbox_sysreset_get_status, + .get_last = sandbox_sysreset_get_last, }; static const struct udevice_id sandbox_sysreset_ids[] = { @@ -94,6 +108,7 @@ U_BOOT_DRIVER(sysreset_sandbox) = { static struct sysreset_ops sandbox_warm_sysreset_ops = { .request = sandbox_warm_sysreset_request, .get_status = sandbox_warm_sysreset_get_status, + .get_last = sandbox_warm_sysreset_get_last, }; static const struct udevice_id sandbox_warm_sysreset_ids[] = { diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index a7d600b6e4..d012cf71a9 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -30,6 +30,9 @@ config TPL_TIMER config TIMER_EARLY bool "Allow timer to be used early in U-Boot" depends on TIMER + # initr_bootstage() requires a timer and is called before initr_dm() + # so only the early timer is available + default y if X86 && BOOTSTAGE help In some cases the timer must be accessible before driver model is active. Examples include when using CONFIG_TRACE to trace U-Boot's @@ -79,6 +82,16 @@ config X86_TSC_TIMER help Select this to enable Time-Stamp Counter (TSC) timer for x86. +config X86_TSC_TIMER_EARLY_FREQ + int "x86 TSC timer frequency in MHz when used as the early timer" + depends on X86_TSC_TIMER + default 1000 + help + Sets the estimated CPU frequency in MHz when TSC is used as the + early timer and the frequency can neither be calibrated via some + hardware ways, nor got from device tree at the time when device + tree is not available yet. + config OMAP_TIMER bool "Omap timer support" depends on TIMER diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c index 6473de20f1..da7c812908 100644 --- a/drivers/timer/tsc_timer.c +++ b/drivers/timer/tsc_timer.c @@ -341,7 +341,7 @@ static int tsc_timer_get_count(struct udevice *dev, u64 *count) return 0; } -static void tsc_timer_ensure_setup(bool stop) +static void tsc_timer_ensure_setup(bool early) { if (gd->arch.tsc_base) return; @@ -362,8 +362,8 @@ static void tsc_timer_ensure_setup(bool stop) if (fast_calibrate) goto done; - if (stop) - panic("TSC frequency is ZERO"); + if (early) + fast_calibrate = CONFIG_X86_TSC_TIMER_EARLY_FREQ; else return; diff --git a/drivers/tpm/Makefile b/drivers/tpm/Makefile index af473ef662..94c337b8ed 100644 --- a/drivers/tpm/Makefile +++ b/drivers/tpm/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ # Copyright (c) 2011 The Chromium OS Authors. All rights reserved. -obj-$(CONFIG_TPM) += tpm-uclass.o +obj-$(CONFIG_$(SPL_TPL_)TPM) += tpm-uclass.o obj-$(CONFIG_TPM_ATMEL_TWI) += tpm_atmel_twi.o obj-$(CONFIG_TPM_TIS_INFINEON) += tpm_tis_infineon.o diff --git a/drivers/tpm/tpm-uclass.c b/drivers/tpm/tpm-uclass.c index c83f53ab86..1b11c93194 100644 --- a/drivers/tpm/tpm-uclass.c +++ b/drivers/tpm/tpm-uclass.c @@ -126,8 +126,11 @@ int tpm_xfer(struct udevice *dev, const uint8_t *sendbuf, size_t send_size, } UCLASS_DRIVER(tpm) = { - .id = UCLASS_TPM, - .name = "tpm", - .flags = DM_UC_FLAG_SEQ_ALIAS, + .id = UCLASS_TPM, + .name = "tpm", + .flags = DM_UC_FLAG_SEQ_ALIAS, +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) + .post_bind = dm_scan_fdt_dev, +#endif .per_device_auto_alloc_size = sizeof(struct tpm_chip_priv), }; diff --git a/drivers/tpm/tpm_tis_lpc.c b/drivers/tpm/tpm_tis_lpc.c index 7664bb1a60..e993fd9f83 100644 --- a/drivers/tpm/tpm_tis_lpc.c +++ b/drivers/tpm/tpm_tis_lpc.c @@ -164,7 +164,7 @@ static int tpm_tis_lpc_probe(struct udevice *dev) u32 didvid; ulong chip_type = dev_get_driver_data(dev); - addr = devfdt_get_addr(dev); + addr = dev_read_addr(dev); if (addr == FDT_ADDR_T_NONE) return -EINVAL; priv->regs = map_sysmem(addr, 0); diff --git a/drivers/tpm/tpm_tis_sandbox.c b/drivers/tpm/tpm_tis_sandbox.c index 8816d55759..79517f015a 100644 --- a/drivers/tpm/tpm_tis_sandbox.c +++ b/drivers/tpm/tpm_tis_sandbox.c @@ -13,6 +13,10 @@ /* TPM NVRAM location indices. */ #define FIRMWARE_NV_INDEX 0x1007 #define KERNEL_NV_INDEX 0x1008 +#define BACKUP_NV_INDEX 0x1009 +#define FWMP_NV_INDEX 0x100a +#define REC_HASH_NV_INDEX 0x100b +#define REC_HASH_NV_SIZE VB2_SHA256_DIGEST_SIZE #define NV_DATA_PUBLIC_PERMISSIONS_OFFSET 60 @@ -45,18 +49,28 @@ enum { NV_GLOBAL_LOCK, NV_SEQ_FIRMWARE, NV_SEQ_KERNEL, + NV_SEQ_BACKUP, + NV_SEQ_FWMP, + NV_SEQ_REC_HASH, + NV_SEQ_COUNT, }; /* Size of each non-volatile space */ #define NV_DATA_SIZE 0x20 +struct nvdata_state { + bool present; + u8 data[NV_DATA_SIZE]; +}; + /* * Information about our TPM emulation. This is preserved in the sandbox * state file if enabled. */ static struct tpm_state { - uint8_t nvdata[NV_SEQ_COUNT][NV_DATA_SIZE]; + bool valid; + struct nvdata_state nvdata[NV_SEQ_COUNT]; } g_state; /** @@ -82,9 +96,12 @@ static int sandbox_tpm_read_state(const void *blob, int node) sprintf(prop_name, "nvdata%d", i); prop = fdt_getprop(blob, node, prop_name, &len); - if (prop && len == NV_DATA_SIZE) - memcpy(g_state.nvdata[i], prop, NV_DATA_SIZE); + if (prop && len == NV_DATA_SIZE) { + memcpy(g_state.nvdata[i].data, prop, NV_DATA_SIZE); + g_state.nvdata[i].present = true; + } } + g_state.valid = true; return 0; } @@ -110,9 +127,11 @@ static int sandbox_tpm_write_state(void *blob, int node) for (i = 0; i < NV_SEQ_COUNT; i++) { char prop_name[20]; - sprintf(prop_name, "nvdata%d", i); - fdt_setprop(blob, node, prop_name, g_state.nvdata[i], - NV_DATA_SIZE); + if (g_state.nvdata[i].present) { + sprintf(prop_name, "nvdata%d", i); + fdt_setprop(blob, node, prop_name, + g_state.nvdata[i].data, NV_DATA_SIZE); + } } return 0; @@ -128,6 +147,12 @@ static int index_to_seq(uint32_t index) return NV_SEQ_FIRMWARE; case KERNEL_NV_INDEX: return NV_SEQ_KERNEL; + case BACKUP_NV_INDEX: + return NV_SEQ_BACKUP; + case FWMP_NV_INDEX: + return NV_SEQ_FWMP; + case REC_HASH_NV_INDEX: + return NV_SEQ_REC_HASH; case 0: return NV_GLOBAL_LOCK; } @@ -136,6 +161,21 @@ static int index_to_seq(uint32_t index) return -1; } +static void handle_cap_flag_space(u8 **datap, uint index) +{ + struct tpm_nv_data_public pub; + + /* TPM_NV_PER_PPWRITE */ + memset(&pub, '\0', sizeof(pub)); + pub.nv_index = __cpu_to_be32(index); + pub.pcr_info_read.pcr_selection.size_of_select = __cpu_to_be16( + sizeof(pub.pcr_info_read.pcr_selection.pcr_select)); + pub.permission.attributes = __cpu_to_be32(1); + pub.pcr_info_write = pub.pcr_info_read; + memcpy(*datap, &pub, sizeof(pub)); + *datap += sizeof(pub); +} + static int sandbox_tpm_xfer(struct udevice *dev, const uint8_t *sendbuf, size_t send_size, uint8_t *recvbuf, size_t *recv_len) @@ -151,29 +191,45 @@ static int sandbox_tpm_xfer(struct udevice *dev, const uint8_t *sendbuf, *recv_len, code); print_buffer(0, sendbuf, 1, send_size, 0); switch (code) { - case 0x65: /* get flags */ + case TPM_CMD_GET_CAPABILITY: type = get_unaligned_be32(sendbuf + 14); switch (type) { - case 4: + case TPM_CAP_FLAG: index = get_unaligned_be32(sendbuf + 18); printf("Get flags index %#02x\n", index); *recv_len = 22; memset(recvbuf, '\0', *recv_len); - put_unaligned_be32(22, recvbuf + - TPM_RESPONSE_HEADER_LENGTH); data = recvbuf + TPM_RESPONSE_HEADER_LENGTH + sizeof(uint32_t); switch (index) { case FIRMWARE_NV_INDEX: break; case KERNEL_NV_INDEX: - /* TPM_NV_PER_PPWRITE */ - put_unaligned_be32(1, data + - NV_DATA_PUBLIC_PERMISSIONS_OFFSET); + handle_cap_flag_space(&data, index); + *recv_len = data - recvbuf - + TPM_RESPONSE_HEADER_LENGTH - + sizeof(uint32_t); + break; + case TPM_CAP_FLAG_PERMANENT: { + struct tpm_permanent_flags *pflags; + + pflags = (struct tpm_permanent_flags *)data; + memset(pflags, '\0', sizeof(*pflags)); + put_unaligned_be32(TPM_TAG_PERMANENT_FLAGS, + &pflags->tag); + *recv_len = TPM_HEADER_SIZE + 4 + + sizeof(*pflags); break; } + default: + printf(" ** Unknown flags index %x\n", index); + return -ENOSYS; + } + put_unaligned_be32(*recv_len, + recvbuf + + TPM_RESPONSE_HEADER_LENGTH); break; - case 0x11: /* TPM_CAP_NV_INDEX */ + case TPM_CAP_NV_INDEX: index = get_unaligned_be32(sendbuf + 18); printf("Get cap nv index %#02x\n", index); put_unaligned_be32(22, recvbuf + @@ -182,27 +238,29 @@ static int sandbox_tpm_xfer(struct udevice *dev, const uint8_t *sendbuf, default: printf(" ** Unknown 0x65 command type %#02x\n", type); - return -1; + return -ENOSYS; } break; - case 0xcd: /* nvwrite */ + case TPM_CMD_NV_WRITE_VALUE: index = get_unaligned_be32(sendbuf + 10); length = get_unaligned_be32(sendbuf + 18); seq = index_to_seq(index); if (seq < 0) - return -1; + return -EINVAL; printf("tpm: nvwrite index=%#02x, len=%#02x\n", index, length); - memcpy(&tpm->nvdata[seq], sendbuf + 22, length); + memcpy(&tpm->nvdata[seq].data, sendbuf + 22, length); + tpm->nvdata[seq].present = true; *recv_len = 12; memset(recvbuf, '\0', *recv_len); break; - case 0xcf: /* nvread */ + case TPM_CMD_NV_READ_VALUE: /* nvread */ index = get_unaligned_be32(sendbuf + 10); length = get_unaligned_be32(sendbuf + 18); seq = index_to_seq(index); if (seq < 0) - return -1; - printf("tpm: nvread index=%#02x, len=%#02x\n", index, length); + return -EINVAL; + printf("tpm: nvread index=%#02x, len=%#02x, seq=%#02x\n", index, + length, seq); *recv_len = TPM_RESPONSE_HEADER_LENGTH + sizeof(uint32_t) + length; memset(recvbuf, '\0', *recv_len); @@ -220,24 +278,33 @@ static int sandbox_tpm_xfer(struct udevice *dev, const uint8_t *sendbuf, offsetof(struct rollback_space_kernel, crc8)); memcpy(data, &rsk, sizeof(rsk)); + } else if (!tpm->nvdata[seq].present) { + put_unaligned_be32(TPM_BADINDEX, recvbuf + + sizeof(uint16_t) + sizeof(uint32_t)); } else { memcpy(recvbuf + TPM_RESPONSE_HEADER_LENGTH + - sizeof(uint32_t), &tpm->nvdata[seq], length); + sizeof(uint32_t), &tpm->nvdata[seq].data, + length); } break; - case 0x14: /* tpm extend */ + case TPM_CMD_EXTEND: + *recv_len = 30; + memset(recvbuf, '\0', *recv_len); + break; + case TPM_CMD_NV_DEFINE_SPACE: case 0x15: /* pcr read */ case 0x5d: /* force clear */ case 0x6f: /* physical enable */ case 0x72: /* physical set deactivated */ case 0x99: /* startup */ + case 0x50: /* self test full */ case 0x4000000a: /* assert physical presence */ *recv_len = 12; memset(recvbuf, '\0', *recv_len); break; default: printf("Unknown tpm command %02x\n", code); - return -1; + return -ENOSYS; } return 0; diff --git a/drivers/usb/eth/lan7x.h b/drivers/usb/eth/lan7x.h index d1b1047935..7af610be37 100644 --- a/drivers/usb/eth/lan7x.h +++ b/drivers/usb/eth/lan7x.h @@ -94,7 +94,7 @@ #define LAN7X_MAC_RX_MAX_SIZE(mtu) \ ((mtu) << 16) /* Max frame size */ #define LAN7X_MAC_RX_MAX_SIZE_DEFAULT \ - LAN7X_MAC_RX_MAX_SIZE(ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */) + LAN7X_MAC_RX_MAX_SIZE(PKTSIZE_ALIGN + 4 /* VLAN */ + 4 /* CRC */) /* Timeouts */ #define USB_CTRL_SET_TIMEOUT_MS 5000 diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 8ab9b9fe56..90ef1f055f 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -71,11 +71,6 @@ unsigned packet_received, packet_sent; * RNDIS specs are ambiguous and appear to be incomplete, and are also * needlessly complex. They borrow more from CDC ACM than CDC ECM. */ -#define ETH_ALEN 6 /* Octets in one ethernet addr */ -#define ETH_HLEN 14 /* Total octets in header. */ -#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */ -#define ETH_DATA_LEN 1500 /* Max. octets in payload */ -#define ETH_FRAME_LEN PKTSIZE_ALIGN /* Max. octets in frame sans FCS */ #define DRIVER_DESC "Ethernet Gadget" /* Based on linux 2.6.27 version */ @@ -529,7 +524,7 @@ static const struct usb_cdc_ether_desc ether_desc = { /* this descriptor actually adds value, surprise! */ .iMACAddress = STRING_ETHADDR, .bmEthernetStatistics = __constant_cpu_to_le32(0), /* no statistics */ - .wMaxSegmentSize = __constant_cpu_to_le16(ETH_FRAME_LEN), + .wMaxSegmentSize = __constant_cpu_to_le16(PKTSIZE_ALIGN), .wNumberMCFilters = __constant_cpu_to_le16(0), .bNumberPowerFilters = 0, }; @@ -1575,7 +1570,7 @@ static void rx_complete(struct usb_ep *ep, struct usb_request *req) req->length -= length; req->actual -= length; } - if (req->actual < ETH_HLEN || ETH_FRAME_LEN < req->actual) { + if (req->actual < ETH_HLEN || PKTSIZE_ALIGN < req->actual) { length_err: dev->stats.rx_errors++; dev->stats.rx_length_errors++; diff --git a/drivers/usb/gadget/rndis.c b/drivers/usb/gadget/rndis.c index d47e29e447..eec639f8c0 100644 --- a/drivers/usb/gadget/rndis.c +++ b/drivers/usb/gadget/rndis.c @@ -35,12 +35,6 @@ #include "rndis.h" -#define ETH_ALEN 6 /* Octets in one ethernet addr */ -#define ETH_HLEN 14 /* Total octets in header. */ -#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */ -#define ETH_DATA_LEN 1500 /* Max. octets in payload */ -#define ETH_FRAME_LEN PKTSIZE_ALIGN /* Max. octets in frame sans FCS */ - /* * The driver for your USB chip needs to support ep0 OUT to work with * RNDIS, plus all three CDC Ethernet endpoints (interrupt not optional). diff --git a/drivers/video/backlight-uclass.c b/drivers/video/backlight-uclass.c index 92715e2f13..0aadf8a1f9 100644 --- a/drivers/video/backlight-uclass.c +++ b/drivers/video/backlight-uclass.c @@ -18,6 +18,16 @@ int backlight_enable(struct udevice *dev) return ops->enable(dev); } +int backlight_set_brightness(struct udevice *dev, int percent) +{ + const struct backlight_ops *ops = backlight_get_ops(dev); + + if (!ops->set_brightness) + return -ENOSYS; + + return ops->set_brightness(dev, percent); +} + UCLASS_DRIVER(backlight) = { .id = UCLASS_PANEL_BACKLIGHT, .name = "backlight", diff --git a/drivers/video/panel-uclass.c b/drivers/video/panel-uclass.c index aec44a8bf7..246d1b2836 100644 --- a/drivers/video/panel-uclass.c +++ b/drivers/video/panel-uclass.c @@ -18,6 +18,24 @@ int panel_enable_backlight(struct udevice *dev) return ops->enable_backlight(dev); } +/** + * panel_set_backlight - Set brightness for the panel backlight + * + * @dev: Panel device containing the backlight to update + * @percent: Brightness value (0=off, 1=min brightness, + * 100=full brightness) + * @return 0 if OK, -ve on error + */ +int panel_set_backlight(struct udevice *dev, int percent) +{ + struct panel_ops *ops = panel_get_ops(dev); + + if (!ops->set_backlight) + return -ENOSYS; + + return ops->set_backlight(dev, percent); +} + int panel_get_display_timing(struct udevice *dev, struct display_timing *timings) { diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c index 53953179bf..c13a907709 100644 --- a/drivers/video/pwm_backlight.c +++ b/drivers/video/pwm_backlight.c @@ -4,6 +4,8 @@ * Written by Simon Glass <sjg@chromium.org> */ +#define LOG_CATEGORY UCLASS_PANEL_BACKLIGHT + #include <common.h> #include <dm.h> #include <backlight.h> @@ -11,48 +13,156 @@ #include <asm/gpio.h> #include <power/regulator.h> +/** + * Private information for the PWM backlight + * + * If @num_levels is 0 then the levels are simple values with the backlight + * value going between the minimum (default 0) and the maximum (default 255). + * Otherwise the levels are an index into @levels (0..n-1). + * + * @reg: Regulator to enable to turn the backlight on (NULL if none) + * @enable, GPIO to set to enable the backlight (can be missing) + * @pwm: PWM to use to change the backlight brightness + * @channel: PWM channel to use + * @period_ns: Period of the backlight in nanoseconds + * @levels: Levels for the backlight, or NULL if not using indexed levels + * @num_levels: Number of levels + * @cur_level: Current level for the backlight (index or value) + * @default_level: Default level for the backlight (index or value) + * @min_level: Minimum level of the backlight (full off) + * @min_level: Maximum level of the backlight (full on) + * @enabled: true if backlight is enabled + */ struct pwm_backlight_priv { struct udevice *reg; struct gpio_desc enable; struct udevice *pwm; uint channel; uint period_ns; + u32 *levels; + int num_levels; uint default_level; + int cur_level; uint min_level; uint max_level; + bool enabled; }; -static int pwm_backlight_enable(struct udevice *dev) +static int set_pwm(struct pwm_backlight_priv *priv) { - struct pwm_backlight_priv *priv = dev_get_priv(dev); - struct dm_regulator_uclass_platdata *plat; uint duty_cycle; int ret; - if (priv->reg) { - plat = dev_get_uclass_platdata(priv->reg); - debug("%s: Enable '%s', regulator '%s'/'%s'\n", __func__, - dev->name, priv->reg->name, plat->name); - ret = regulator_set_enable(priv->reg, true); - if (ret) { - debug("%s: Cannot enable regulator for PWM '%s'\n", - __func__, dev->name); - return ret; - } - mdelay(120); - } - - duty_cycle = priv->period_ns * (priv->default_level - priv->min_level) / + duty_cycle = priv->period_ns * (priv->cur_level - priv->min_level) / (priv->max_level - priv->min_level + 1); ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns, duty_cycle); + + return log_ret(ret); +} + +static int enable_sequence(struct udevice *dev, int seq) +{ + struct pwm_backlight_priv *priv = dev_get_priv(dev); + int ret; + + switch (seq) { + case 0: + if (priv->reg) { + __maybe_unused struct dm_regulator_uclass_platdata + *plat; + + plat = dev_get_uclass_platdata(priv->reg); + log_debug("Enable '%s', regulator '%s'/'%s'\n", + dev->name, priv->reg->name, plat->name); + ret = regulator_set_enable(priv->reg, true); + if (ret) { + log_debug("Cannot enable regulator for PWM '%s'\n", + __func__, dev->name); + return log_ret(ret); + } + mdelay(120); + } + break; + case 1: + mdelay(10); + dm_gpio_set_value(&priv->enable, 1); + break; + } + + return 0; +} + +static int pwm_backlight_enable(struct udevice *dev) +{ + struct pwm_backlight_priv *priv = dev_get_priv(dev); + int ret; + + ret = enable_sequence(dev, 0); + if (ret) + return log_ret(ret); + ret = set_pwm(priv); if (ret) - return ret; + return log_ret(ret); ret = pwm_set_enable(priv->pwm, priv->channel, true); if (ret) - return ret; - mdelay(10); - dm_gpio_set_value(&priv->enable, 1); + return log_ret(ret); + ret = enable_sequence(dev, 1); + if (ret) + return log_ret(ret); + priv->enabled = true; + + return 0; +} + +static int pwm_backlight_set_brightness(struct udevice *dev, int percent) +{ + struct pwm_backlight_priv *priv = dev_get_priv(dev); + bool disable = false; + int level; + int ret; + + if (!priv->enabled) { + ret = enable_sequence(dev, 0); + if (ret) + return log_ret(ret); + } + if (percent == BACKLIGHT_OFF) { + disable = true; + percent = 0; + } + if (percent == BACKLIGHT_DEFAULT) { + level = priv->default_level; + } else { + if (priv->levels) { + level = priv->levels[percent * (priv->num_levels - 1) + / 100]; + } else { + level = priv->min_level + + (priv->max_level - priv->min_level) * + percent / 100; + } + } + priv->cur_level = level; + + ret = set_pwm(priv); + if (ret) + return log_ret(ret); + if (!priv->enabled) { + ret = enable_sequence(dev, 1); + if (ret) + return log_ret(ret); + priv->enabled = true; + } + if (disable) { + dm_gpio_set_value(&priv->enable, 0); + if (priv->reg) { + ret = regulator_set_enable(priv->reg, false); + if (ret) + return log_ret(ret); + } + priv->enabled = false; + } return 0; } @@ -64,31 +174,32 @@ static int pwm_backlight_ofdata_to_platdata(struct udevice *dev) int index, ret, count, len; const u32 *cell; - debug("%s: start\n", __func__); + log_debug("start\n"); ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev, "power-supply", &priv->reg); if (ret) - debug("%s: Cannot get power supply: ret=%d\n", __func__, ret); + log_debug("Cannot get power supply: ret=%d\n", ret); ret = gpio_request_by_name(dev, "enable-gpios", 0, &priv->enable, GPIOD_IS_OUT); if (ret) { - debug("%s: Warning: cannot get enable GPIO: ret=%d\n", - __func__, ret); + log_debug("Warning: cannot get enable GPIO: ret=%d\n", ret); if (ret != -ENOENT) - return ret; + return log_ret(ret); } ret = dev_read_phandle_with_args(dev, "pwms", "#pwm-cells", 0, 0, &args); if (ret) { - debug("%s: Cannot get PWM phandle: ret=%d\n", __func__, ret); - return ret; + log_debug("Cannot get PWM phandle: ret=%d\n", ret); + return log_ret(ret); } ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm); if (ret) { - debug("%s: Cannot get PWM: ret=%d\n", __func__, ret); - return ret; + log_debug("Cannot get PWM: ret=%d\n", ret); + return log_ret(ret); } + if (args.args_count < 2) + return log_msg_ret("Not enough arguments to pwm\n", -EINVAL); priv->channel = args.args[0]; priv->period_ns = args.args[1]; @@ -96,13 +207,20 @@ static int pwm_backlight_ofdata_to_platdata(struct udevice *dev) cell = dev_read_prop(dev, "brightness-levels", &len); count = len / sizeof(u32); if (cell && count > index) { - priv->default_level = fdt32_to_cpu(cell[index]); - priv->max_level = fdt32_to_cpu(cell[count - 1]); + priv->levels = malloc(len); + if (!priv->levels) + return log_ret(-ENOMEM); + dev_read_u32_array(dev, "brightness-levels", priv->levels, + count); + priv->num_levels = count; + priv->default_level = priv->levels[index]; + priv->max_level = priv->levels[count - 1]; } else { priv->default_level = index; priv->max_level = 255; } - debug("%s: done\n", __func__); + priv->cur_level = priv->default_level; + log_debug("done\n"); return 0; @@ -114,7 +232,8 @@ static int pwm_backlight_probe(struct udevice *dev) } static const struct backlight_ops pwm_backlight_ops = { - .enable = pwm_backlight_enable, + .enable = pwm_backlight_enable, + .set_brightness = pwm_backlight_set_brightness, }; static const struct udevice_id pwm_backlight_ids[] = { diff --git a/drivers/video/simple_panel.c b/drivers/video/simple_panel.c index 6c604f9bed..7a968e740c 100644 --- a/drivers/video/simple_panel.c +++ b/drivers/video/simple_panel.c @@ -32,6 +32,21 @@ static int simple_panel_enable_backlight(struct udevice *dev) return 0; } +static int simple_panel_set_backlight(struct udevice *dev, int percent) +{ + struct simple_panel_priv *priv = dev_get_priv(dev); + int ret; + + debug("%s: start, backlight = '%s'\n", __func__, priv->backlight->name); + dm_gpio_set_value(&priv->enable, 1); + ret = backlight_set_brightness(priv->backlight, percent); + debug("%s: done, ret = %d\n", __func__, ret); + if (ret) + return ret; + + return 0; +} + static int simple_panel_ofdata_to_platdata(struct udevice *dev) { struct simple_panel_priv *priv = dev_get_priv(dev); @@ -51,7 +66,7 @@ static int simple_panel_ofdata_to_platdata(struct udevice *dev) "backlight", &priv->backlight); if (ret) { debug("%s: Cannot get backlight: ret=%d\n", __func__, ret); - return ret; + return log_ret(ret); } ret = gpio_request_by_name(dev, "enable-gpios", 0, &priv->enable, GPIOD_IS_OUT); @@ -59,7 +74,7 @@ static int simple_panel_ofdata_to_platdata(struct udevice *dev) debug("%s: Warning: cannot get enable GPIO: ret=%d\n", __func__, ret); if (ret != -ENOENT) - return ret; + return log_ret(ret); } return 0; @@ -82,6 +97,7 @@ static int simple_panel_probe(struct udevice *dev) static const struct panel_ops simple_panel_ops = { .enable_backlight = simple_panel_enable_backlight, + .set_backlight = simple_panel_set_backlight, }; static const struct udevice_id simple_panel_ids[] = { diff --git a/drivers/video/tegra124/sor.c b/drivers/video/tegra124/sor.c index 91e61b5852..172bb14d6c 100644 --- a/drivers/video/tegra124/sor.c +++ b/drivers/video/tegra124/sor.c @@ -533,7 +533,8 @@ static int tegra_dc_sor_power_up(struct udevice *dev, int is_lvds) #if DEBUG_SOR static void dump_sor_reg(struct tegra_dc_sor_data *sor) { -#define DUMP_REG(a) printk(BIOS_INFO, "%-32s %03x %08x\n", \ +#define DUMP_REG(a) printk(BIOS_INFO, \ + "%-32s %03x %08x\n", \ #a, a, tegra_sor_readl(sor, a)); DUMP_REG(SUPER_STATE0); diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c index 7f95e9c6e5..1874887f2f 100644 --- a/drivers/video/vidconsole-uclass.c +++ b/drivers/video/vidconsole-uclass.c @@ -86,7 +86,7 @@ static int vidconsole_back(struct udevice *dev) if (priv->ycur < 0) priv->ycur = 0; } - video_sync(dev->parent); + video_sync(dev->parent, false); return 0; } @@ -113,7 +113,7 @@ static void vidconsole_newline(struct udevice *dev) } priv->last_ch = 0; - video_sync(dev->parent); + video_sync(dev->parent, false); } static const struct vid_rgb colors[VID_COLOR_COUNT] = { @@ -293,7 +293,7 @@ static void vidconsole_escape_char(struct udevice *dev, char ch) if (mode == 2) { video_clear(dev->parent); - video_sync(dev->parent); + video_sync(dev->parent, false); priv->ycur = 0; priv->xcur_frac = priv->xstart_frac; } else { @@ -449,7 +449,7 @@ static void vidconsole_putc(struct stdio_dev *sdev, const char ch) struct udevice *dev = sdev->priv; vidconsole_put_char(dev, ch); - video_sync(dev->parent); + video_sync(dev->parent, false); } static void vidconsole_puts(struct stdio_dev *sdev, const char *s) @@ -458,7 +458,7 @@ static void vidconsole_puts(struct stdio_dev *sdev, const char *s) while (*s) vidconsole_put_char(dev, *s++); - video_sync(dev->parent); + video_sync(dev->parent, false); } /* Set up the number of rows and colours (rotated drivers override this) */ @@ -511,6 +511,8 @@ void vidconsole_position_cursor(struct udevice *dev, unsigned col, unsigned row) struct udevice *vid_dev = dev->parent; struct video_priv *vid_priv = dev_get_uclass_priv(vid_dev); + col *= priv->x_charsize; + row *= priv->y_charsize; priv->xcur_frac = VID_TO_POS(min_t(short, col, vid_priv->xsize - 1)); priv->ycur = min_t(short, row, vid_priv->ysize - 1); } @@ -547,7 +549,7 @@ static int do_video_puts(cmd_tbl_t *cmdtp, int flag, int argc, for (s = argv[1]; *s; s++) vidconsole_put_char(dev, *s); - video_sync(dev->parent); + video_sync(dev->parent, false); return 0; } diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index dd0873767b..44dfa71b6f 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -86,7 +86,7 @@ int video_reserve(ulong *addrp) return 0; } -void video_clear(struct udevice *dev) +int video_clear(struct udevice *dev) { struct video_priv *priv = dev_get_uclass_priv(dev); @@ -111,6 +111,8 @@ void video_clear(struct udevice *dev) memset(priv->fb, priv->colour_bg, priv->fb_size); break; } + + return 0; } void video_set_default_colors(struct video_priv *priv) @@ -128,7 +130,7 @@ void video_set_default_colors(struct video_priv *priv) } /* Flush video activity to the caches */ -void video_sync(struct udevice *vid) +void video_sync(struct udevice *vid, bool force) { /* * flush_dcache_range() is declared in common.h but it seems that some @@ -147,7 +149,7 @@ void video_sync(struct udevice *vid) struct video_priv *priv = dev_get_uclass_priv(vid); static ulong last_sync; - if (get_timer(last_sync) > 10) { + if (force || get_timer(last_sync) > 10) { sandbox_sdl_sync(priv->fb); last_sync = get_timer(0); } @@ -162,7 +164,7 @@ void video_sync_all(void) dev; uclass_find_next_device(&dev)) { if (device_active(dev)) - video_sync(dev); + video_sync(dev, true); } } diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c index aeff65648c..1377e19081 100644 --- a/drivers/video/video_bmp.c +++ b/drivers/video/video_bmp.c @@ -345,7 +345,7 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, break; }; - video_sync(dev); + video_sync(dev, false); return 0; } diff --git a/drivers/watchdog/ast_wdt.c b/drivers/watchdog/ast_wdt.c index 477605e722..59afa21efa 100644 --- a/drivers/watchdog/ast_wdt.c +++ b/drivers/watchdog/ast_wdt.c @@ -50,6 +50,7 @@ static int ast_wdt_stop(struct udevice *dev) clrbits_le32(&priv->regs->ctrl, WDT_CTRL_EN); + writel(WDT_RESET_DEFAULT, &priv->regs->reset_mask); return 0; } diff --git a/env/Kconfig b/env/Kconfig index f23be00a54..9011109b47 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -431,7 +431,7 @@ config ENV_EXT4_FILE It's a string of the EXT4 file name. This file use to store the environment (explicit path to the file) -if ARCH_ROCKCHIP || ARCH_SUNXI || ARCH_ZYNQ || ARCH_ZYNQMP +if ARCH_ROCKCHIP || ARCH_SUNXI || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL config ENV_OFFSET hex "Environment Offset" @@ -448,7 +448,7 @@ config ENV_SIZE hex "Environment Size" default 0x40000 if ENV_IS_IN_SPI_FLASH && ARCH_ZYNQMP default 0x20000 if ARCH_SUNXI || ARCH_ZYNQ - default 0x8000 if ARCH_ROCKCHIP || ARCH_ZYNQMP + default 0x8000 if ARCH_ROCKCHIP || ARCH_ZYNQMP || ARCH_VERSAL help Size of the environment storage area diff --git a/fs/btrfs/ctree.c b/fs/btrfs/ctree.c index 18b47d92fe..d248d79932 100644 --- a/fs/btrfs/ctree.c +++ b/fs/btrfs/ctree.c @@ -272,7 +272,7 @@ int btrfs_next_slot(struct btrfs_path *p) { struct btrfs_leaf *leaf = &p->nodes[0]->leaf; - if (p->slots[0] >= leaf->header.nritems) + if (p->slots[0] + 1 >= leaf->header.nritems) return jump_leaf(p, 1); p->slots[0]++; diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c index 9fcf3bcb48..3272412ca9 100644 --- a/fs/fat/fat_write.c +++ b/fs/fat/fat_write.c @@ -1012,7 +1012,7 @@ again: static int normalize_longname(char *l_filename, const char *filename) { const char *p, legal[] = "!#$%&\'()-.@^`_{}~"; - char c; + unsigned char c; int name_len; /* Check that the filename is valid */ diff --git a/include/backlight.h b/include/backlight.h index a304c36e01..ac59eb293b 100644 --- a/include/backlight.h +++ b/include/backlight.h @@ -7,6 +7,13 @@ #ifndef _BACKLIGHT_H #define _BACKLIGHT_H +enum { + BACKLIGHT_MAX = 100, + BACKLIGHT_MIN = 0, + BACKLIGHT_OFF = -1, + BACKLIGHT_DEFAULT = -2, +}; + struct backlight_ops { /** * enable() - Enable a backlight @@ -15,6 +22,15 @@ struct backlight_ops { * @return 0 if OK, -ve on error */ int (*enable)(struct udevice *dev); + + /** + * set_brightness - Set brightness + * + * @dev: Backlight device to update + * @percent: Brightness value (0 to 100, or BACKLIGHT_... value) + * @return 0 if OK, -ve on error + */ + int (*set_brightness)(struct udevice *dev, int percent); }; #define backlight_get_ops(dev) ((struct backlight_ops *)(dev)->driver->ops) @@ -27,4 +43,13 @@ struct backlight_ops { */ int backlight_enable(struct udevice *dev); +/** + * backlight_set_brightness - Set brightness + * + * @dev: Backlight device to update + * @percent: Brightness value (0 to 100, or BACKLIGHT_... value) + * @return 0 if OK, -ve on error + */ +int backlight_set_brightness(struct udevice *dev, int percent); + #endif diff --git a/include/command.h b/include/command.h index 5b1577f3b4..200c7a5e9f 100644 --- a/include/command.h +++ b/include/command.h @@ -67,7 +67,7 @@ extern int cmd_auto_complete(const char *const prompt, char *buf, int *np, int * * * @cmdtp: Command which caused the error * @err: Error code (0 if none, -ve for error, like -EIO) - * @return 0 (CMD_RET_SUCCESX) if there is not error, + * @return 0 (CMD_RET_SUCCESS) if there is not error, * 1 (CMD_RET_FAILURE) if an error is found * -1 (CMD_RET_USAGE) if 'usage' error is found */ diff --git a/include/common.h b/include/common.h index 83b3bdc58d..8b9f859c07 100644 --- a/include/common.h +++ b/include/common.h @@ -385,7 +385,6 @@ uint dpram_alloc(uint size); uint dpram_alloc_align(uint size,uint align); void bootcount_store (ulong); ulong bootcount_load (void); -#define BOOTCOUNT_MAGIC 0xB001C041 /* $(CPU)/.../<eth> */ void mii_init (void); diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index 86fbec5ea2..f6ce4303a4 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -19,11 +19,7 @@ /* * CFI Flash */ -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* fix amd flash issue */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #define CONFIG_SYS_MAX_FLASH_SECT 512 diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index d086bd71f8..f758ea7dbe 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -98,13 +98,6 @@ #define CONFIG_ENV_OVERWRITE -#ifndef CONFIG_MTD_NOR_FLASH -#else -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index fb076b1199..49bb38279a 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -232,10 +232,7 @@ combinations. this should be removed later #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ /* CFI for NOR Flash */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* NAND Flash on IFC */ #define CONFIG_SYS_NAND_BASE 0xff800000 @@ -505,9 +502,6 @@ combinations. this should be removed later /* * Dynamic MTD Partition support with mtdparts */ -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_MTD -#endif /* * Environment Configuration */ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 8476e6be88..caeb34cf0a 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -175,10 +175,7 @@ #define CONFIG_SYS_NOR_FTIM3 0x0 /* CFI for NOR Flash */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* NAND Flash on IFC */ #define CONFIG_NAND_FSL_IFC diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index a548af687d..0a356f483e 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -128,14 +128,11 @@ #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) /* FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 254 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ #endif #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index 1f79c1505a..11cb3955da 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -201,16 +201,12 @@ # define CONFIG_ENV_SECT_SIZE 0x8000 #endif -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 # define CONFIG_FLASH_SPANSION_S29WS_N 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ # define CONFIG_SYS_FLASH_CHECKSUM # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE } #endif diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 92d4c22741..a197c3a853 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -139,9 +139,7 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ #ifdef NORFLASH_PS32BIT # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT @@ -150,7 +148,6 @@ #endif # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ #endif #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 1f8182074f..49ed668f17 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -105,15 +105,12 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ # define CONFIG_SYS_FLASH_CHECKSUM # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } #endif diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index ce2af4ed0f..1199fa3151 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -156,14 +156,12 @@ #define FLASH_SST6401B 0x200 #define SST_ID_xF6401B 0x236D236D -#undef CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI /* * Unable to use CFI driver, due to incompatible sector erase command by SST. * Amd/Atmel use 0x30 for sector erase, SST use 0x50. * 0x30 is block erase in SST */ -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x800000 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_FLASH_CFI_LEGACY diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index bd5e57c8f0..9d3bf42974 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -142,14 +142,11 @@ /* * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ #endif /*----------------------------------------------------------------------- diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 57bc1cf77c..682e2e3979 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -157,8 +157,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_SIZE 0x200000 /*----------------------------------------------------------------------- diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 2ce9b11af7..a068726681 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -143,15 +143,12 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ # define CONFIG_SYS_FLASH_CHECKSUM # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } #endif diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index dee7913fe2..39e2748373 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -148,16 +148,12 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 # define CONFIG_FLASH_SPANSION_S29WS_N 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ #endif #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 228471cbac..7a96dd1b71 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -142,14 +142,11 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ #endif #ifdef CONFIG_NANDFLASH_SIZE diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 274f4db3ef..f62fb5ac63 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -142,14 +142,11 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ #endif #ifdef CONFIG_NANDFLASH_SIZE diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index 0d829b4e74..f08896ef0a 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -254,10 +254,8 @@ /* FLASH organization */ #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE -#undef CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER 1 /* Max size that the board might have */ #define CONFIG_SYS_FLASH_SIZE 0x1000000 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT @@ -266,7 +264,6 @@ /* max number of sectors on one chip */ #define CONFIG_SYS_MAX_FLASH_SECT 270 /* "Real" (hardware) sectors protection */ -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_FLASH_CHECKSUM #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE } #else diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h index 5bd1d4f240..16becbdbed 100644 --- a/include/configs/M54451EVB.h +++ b/include/configs/M54451EVB.h @@ -213,16 +213,12 @@ /* FLASH organization */ #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ # define CONFIG_SYS_FLASH_CHECKSUM # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE } diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 2de51d91a3..99b60d5d82 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -281,16 +281,12 @@ # define CONFIG_ENV_SECT_SIZE 0x20000 #endif -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT # define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ # define CONFIG_SYS_FLASH_CHECKSUM # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE, CONFIG_SYS_CS1_BASE } # define CONFIG_FLASH_CFI_LEGACY diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h index 0c42b85438..7cc09ab7cc 100644 --- a/include/configs/M5475EVB.h +++ b/include/configs/M5475EVB.h @@ -189,14 +189,10 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #ifdef CONFIG_SYS_NOR1SZ # define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ # define CONFIG_SYS_FLASH_SIZE ((CONFIG_SYS_NOR1SZ + CONFIG_SYS_BOOTSZ) << 20) diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h index b4069db36c..3f5ced28ec 100644 --- a/include/configs/M5485EVB.h +++ b/include/configs/M5485EVB.h @@ -177,14 +177,10 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #ifdef CONFIG_SYS_NOR1SZ # define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ # define CONFIG_SYS_FLASH_SIZE ((CONFIG_SYS_NOR1SZ + CONFIG_SYS_BOOTSZ) << 20) diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 4429f135d5..3c46ae0396 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -76,8 +76,6 @@ /* FLASH organization */ #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 35 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index e5a164d4d1..3827ea464b 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -210,13 +210,10 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is 8M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 5b5c38f2c9..cfa5b56524 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -182,13 +182,9 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* start of FLASH */ #define CONFIG_SYS_FLASH_SIZE 8 /* flash size in MB */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* display empty sectors */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffer up multiple bytes */ #define CONFIG_SYS_NOR_BR_PRELIM (CONFIG_SYS_FLASH_BASE \ | BR_PS_16 /* 16 bit port */ \ diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index 9de3744759..0ccf4acb82 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -184,13 +184,10 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is 8M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 85ea171175..578202f3be 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -172,11 +172,8 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 16 /* FLASH size is 16M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index e92a8c0148..8f11d9b3a4 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -182,11 +182,8 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 16 /* FLASH size is 16M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index cf2a6bda7e..bda477cc16 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -143,12 +143,8 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* start of FLASH */ #define CONFIG_SYS_FLASH_SIZE 32 /* max flash size in MB */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ -/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ | BR_PS_16 /* 16 bit port */ \ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 77174e3b7e..111023b7be 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -186,8 +186,6 @@ *Flash on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* start of FLASH */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* 127 64KB sectors + 8 8KB sectors per device */ @@ -203,7 +201,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_SYS_FLASH_BANKS_LIST \ {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE + 0x800000} #define CONFIG_SYS_FLASH_SIZE 16 /* FLASH size in MB */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Vitesse 7385 */ @@ -443,7 +440,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K (one sector) for environment */ #define CONFIG_ENV_SIZE 0x2000 #else - #undef CONFIG_FLASH_CFI_DRIVER #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) #define CONFIG_ENV_SIZE 0x2000 #endif diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 3fdf34669f..50f6df5844 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -216,11 +216,8 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 32 /* max FLASH size is 32M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index aae777db95..4ddd62ddbb 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -239,14 +239,10 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 8 /* max FLASH size is 32M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* display empty sectors */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffer up multiple bytes */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 943ad36496..524a10fc95 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -185,8 +185,6 @@ #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index b4178b11e0..b8a9b5c638 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -114,8 +114,6 @@ #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #undef CONFIG_CLOCKS_IN_MHZ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 1201f468a0..13ad04e279 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -114,8 +114,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index d825f0fc33..6ad0849cec 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -119,8 +119,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_LBC_NONCACHE_BASE 0xf8000000 diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index a62d4f7eee..b09cbab292 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -169,8 +169,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_HWCONFIG /* enable hwconfig */ diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index f45270f9c4..bac8456825 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -112,8 +112,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 724575ac59..d28a35f87b 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -113,8 +113,6 @@ #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #undef CONFIG_CLOCKS_IN_MHZ diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 219cda936a..5da70bb83e 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -121,8 +121,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index d3367280a0..0edcc2ed72 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -151,8 +151,6 @@ extern unsigned long get_clock_freq(void); #undef CONFIG_SYS_RAMBOOT -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* Chip select 3 - NAND */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index dd081e8c12..cff3ca9bce 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -172,8 +172,6 @@ #undef CONFIG_SYS_RAMBOOT -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 02fd864727..a3f29c5f9e 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -166,8 +166,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index bc69efbbe6..bb6dd95d59 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -211,8 +211,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h index 1ff04c3794..e4ebd339de 100644 --- a/include/configs/MigoR.h +++ b/include/configs/MigoR.h @@ -53,8 +53,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_QUIET_TEST /* print 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_EMPTY_INFO @@ -77,7 +75,6 @@ #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Use hardware flash sectors protection instead of U-Boot software protection */ -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* ENV setting */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index e14e8bda17..18f70f04af 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -321,10 +321,7 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ /* CFI for NOR Flash */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* NAND Flash on IFC */ #define CONFIG_SYS_NAND_BASE 0xff800000 diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 24bec8541d..c9ed70ca4c 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -220,8 +220,6 @@ #endif #endif -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* Nand Flash */ @@ -507,7 +505,6 @@ /* * Dynamic MTD Partition support with mtdparts */ -#define CONFIG_FLASH_CFI_MTD /* * Environment diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index 8279452906..ada00ae8bb 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -92,8 +92,6 @@ extern unsigned long get_clock_freq(void); | BR_PS_16 | BR_V) #define CONFIG_FLASH_OR_PRELIM 0xfc000ff7 -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 2d4d56672f..bd2913e8d4 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -48,13 +48,6 @@ #define CONFIG_ENV_OVERWRITE -#ifndef CONFIG_MTD_NOR_FLASH -#else -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index cb8246a457..42bfd07f58 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -85,12 +85,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - /* PCIe Boot - Master */ #define CONFIG_SRIO_PCIE_BOOT_MASTER /* @@ -721,9 +715,6 @@ unsigned long get_board_ddr_clk(void); /* * Dynamic MTD Partition support with mtdparts */ -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_MTD -#endif /* * Environment diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 93745253f0..e30779f9a9 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -100,12 +100,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - /* PCIe Boot - Master */ #define CONFIG_SRIO_PCIE_BOOT_MASTER /* @@ -737,9 +731,6 @@ unsigned long get_board_ddr_clk(void); /* * Dynamic MTD Partition support with mtdparts */ -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_MTD -#endif /* * Environment diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index c7d173fcd3..7d90797b08 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -57,13 +57,6 @@ #define CONFIG_ENV_OVERWRITE -#ifndef CONFIG_MTD_NOR_FLASH -#else -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #ifdef CONFIG_MTD_NOR_FLASH #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 @@ -606,9 +599,6 @@ unsigned long get_board_ddr_clk(void); /* * Dynamic MTD Partition support with mtdparts */ -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_MTD -#endif /* * Environment diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 863907515c..7375d6ff46 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -163,12 +163,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_ENV_OVERWRITE -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ @@ -756,9 +750,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg /* * Dynamic MTD Partition support with mtdparts */ -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_MTD -#endif /* * Environment Configuration diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index e4da26b0be..286db0204d 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -124,12 +124,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 @@ -690,9 +684,6 @@ unsigned long get_board_ddr_clk(void); /* * Dynamic MTD Partition support with mtdparts */ -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_MTD -#endif /* * Environment diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 958ac70f0e..d076d6ebe4 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -109,12 +109,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00400000 -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 @@ -640,9 +634,6 @@ unsigned long get_board_ddr_clk(void); /* * Dynamic MTD Partition support with mtdparts */ -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_MTD -#endif /* * Environment diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 71fa722819..34b3b056ec 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -73,13 +73,6 @@ #include "t4qds.h" -#ifndef CONFIG_MTD_NOR_FLASH -#else -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 8f0bfdd5c6..f5eed0923f 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -280,13 +280,6 @@ "setenv bootargs config-addr=0x60000000; " \ "bootm 0x01000000 - 0x00f00000" -#ifndef CONFIG_MTD_NOR_FLASH -#else -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index fc1fa0c089..0942b872ac 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -58,13 +58,10 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #undef CONFIG_SYS_FLASH_CHECKSUM #define CONFIG_SYS_FLASH_BASE 0x80000000 /* start of FLASH */ #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size in MB */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sectors */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* * FLASH bank number detection @@ -474,7 +471,6 @@ * JFFS2 partitions */ /* mtdparts command line support */ -#define CONFIG_FLASH_CFI_MTD /* default mtd partition table */ #endif /* __CONFIG_H */ diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index fca607cde8..423ecd71c2 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -217,10 +217,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */ diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h index 9395e618fa..915f4164ee 100644 --- a/include/configs/adp-ae3xx.h +++ b/include/configs/adp-ae3xx.h @@ -168,11 +168,8 @@ * FLASH and environment organization */ /* use CFI framework */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* support JEDEC */ diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index 6f9f82178d..6cf494e73f 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -280,11 +280,8 @@ * FLASH and environment organization */ /* use CFI framework */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* support JEDEC */ diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index f1aa653a9a..5d5b09bbd1 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -327,11 +327,6 @@ * 0x4C0000 - 0xFFFFFF : Userland (11 MiB + 256 KiB) */ #if defined(CONFIG_NOR) -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_FLASH_CFI_MTD #define CONFIG_SYS_MAX_FLASH_SECT 128 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_FLASH_BASE (0x08000000) diff --git a/include/configs/amcore.h b/include/configs/amcore.h index ea04f91d0c..4daa0bafe8 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -58,9 +58,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT 1024 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* amcore design has flash data bytes wired swapped */ #define CONFIG_SYS_WRITE_SWAPPED_DATA /* reserve 128-4KB */ diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h index 40a843a95e..901ce4da61 100644 --- a/include/configs/ap325rxa.h +++ b/include/configs/ap325rxa.h @@ -57,8 +57,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_SYS_FLASH_CFI #undef CONFIG_SYS_FLASH_QUIET_TEST /* print 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_EMPTY_INFO @@ -98,7 +96,6 @@ * Use hardware flash sectors protection instead * of U-Boot software protection */ -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* ENV setting */ diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h index b9ff965b92..edcc0cbc8a 100644 --- a/include/configs/ap_sh4a_4a.h +++ b/include/configs/ap_sh4a_4a.h @@ -50,8 +50,6 @@ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* FLASH */ -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_SYS_FLASH_CFI #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BASE (0xA0000000) @@ -74,7 +72,6 @@ * Use hardware flash sectors protection instead * of U-Boot software protection */ -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index 3c6b2c3cd7..771189d877 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -61,7 +61,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_BASE 0x00000000 #define CONFIG_SYS_MAX_FLASH_SECT 512 diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index e241c9858d..2e7fbfb396 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -265,11 +265,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 259 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_SIZE 0x2000000 -#define CONFIG_SYS_FLASH_PROTECTION 1 -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 #define CONFIG_SYS_FLASH_CFI_NONBLOCK 1 #define LDS_BOARD_TEXT \ diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index d9bb1fc52c..e2a2f3b893 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -118,14 +118,11 @@ /* * NOR Flash */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_BASE 0x10000000 #define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE #define PHYS_FLASH_SIZE SZ_8M #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 -#define CONFIG_SYS_FLASH_PROTECTION /* * USB Config diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index f0dfc99d5b..856e0328e7 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -60,8 +60,6 @@ /* NOR flash, if populated */ #ifdef CONFIG_SYS_USE_NORFLASH -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define PHYS_FLASH_1 0x10000000 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 99fb80d53e..e3eb92832a 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -82,11 +82,8 @@ */ /* use CFI framework */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* support JEDEC */ diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index fb896fee27..df5d5bdc4a 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -484,11 +484,6 @@ DEFAULT_LINUX_BOOT_ENV \ * 0x4C0000 - 0xFFFFFF : Userland (11 MiB + 256 KiB) */ #if defined(CONFIG_NOR) -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_FLASH_CFI_MTD #define CONFIG_SYS_MAX_FLASH_SECT 128 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_FLASH_BASE (0x08000000) diff --git a/include/configs/blanche.h b/include/configs/blanche.h index e0acde3f91..8774bde331 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -29,9 +29,7 @@ #if !defined(CONFIG_MTD_NOR_FLASH) #define CONFIG_SH_QSPI_BASE 0xE6B10000 #else -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_BASE 0x00000000 diff --git a/include/configs/bmips_bcm6338.h b/include/configs/bmips_bcm6338.h index 2a02854f25..83050c94a6 100644 --- a/include/configs/bmips_bcm6338.h +++ b/include/configs/bmips_bcm6338.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_FLASH_BASE 0xbfc00000 #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #endif /* __CONFIG_BMIPS_BCM6338_H */ diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h index 647f630fbb..5eb8b0f9d0 100644 --- a/include/configs/bmips_bcm6348.h +++ b/include/configs/bmips_bcm6348.h @@ -27,7 +27,6 @@ #define CONFIG_SYS_FLASH_BASE 0xbfc00000 #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #endif /* __CONFIG_BMIPS_BCM6348_H */ diff --git a/include/configs/bmips_bcm6358.h b/include/configs/bmips_bcm6358.h index 6cb99e854f..7becf3fcb9 100644 --- a/include/configs/bmips_bcm6358.h +++ b/include/configs/bmips_bcm6358.h @@ -29,7 +29,6 @@ #define CONFIG_SYS_FLASH_BASE 0xbe000000 #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #endif /* __CONFIG_BMIPS_BCM6358_H */ diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h index 142379c768..1a57476e05 100644 --- a/include/configs/bmips_bcm6368.h +++ b/include/configs/bmips_bcm6368.h @@ -29,7 +29,6 @@ #define CONFIG_SYS_FLASH_BASE 0xb8000000 #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #endif /* __CONFIG_BMIPS_BCM6368_H */ diff --git a/include/configs/boston.h b/include/configs/boston.h index e19c94be68..61aaa26989 100644 --- a/include/configs/boston.h +++ b/include/configs/boston.h @@ -47,10 +47,6 @@ /* * Flash */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #define CONFIG_SYS_MAX_FLASH_SECT 1024 diff --git a/include/configs/calimain.h b/include/configs/calimain.h index 7f2b751404..e77218466f 100644 --- a/include/configs/calimain.h +++ b/include/configs/calimain.h @@ -129,10 +129,6 @@ #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ #define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 7b10ac8cf1..622b02492d 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -105,8 +105,6 @@ #define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT #define CONFIG_SYS_MAX_FLASH_SECT (4 + 255) @@ -116,9 +114,6 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT (25 * CONFIG_SYS_HZ) #define CONFIG_SYS_FLASH_LOCK_TOUT (25 * CONFIG_SYS_HZ) #define CONFIG_SYS_FLASH_UNLOCK_TOUT (25 * CONFIG_SYS_HZ) - -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 -#define CONFIG_SYS_FLASH_PROTECTION 1 #endif #define CONFIG_SYS_MONITOR_BASE 0x0 diff --git a/include/configs/comtrend_ct5361.h b/include/configs/comtrend_ct5361.h index 565141cf33..da70592306 100644 --- a/include/configs/comtrend_ct5361.h +++ b/include/configs/comtrend_ct5361.h @@ -10,5 +10,3 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 diff --git a/include/configs/comtrend_wap5813n.h b/include/configs/comtrend_wap5813n.h index 811672b598..7070a1c757 100644 --- a/include/configs/comtrend_wap5813n.h +++ b/include/configs/comtrend_wap5813n.h @@ -10,5 +10,3 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 664ca12c00..cd791507ee 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -59,13 +59,6 @@ #define CONFIG_ENV_OVERWRITE -#ifndef CONFIG_MTD_NOR_FLASH -#else -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 319f6aadf5..ba878eb13b 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -23,8 +23,6 @@ * DM support in SPL */ #ifdef CONFIG_SPL_BUILD -#undef CONFIG_DM_SPI -#undef CONFIG_DM_SPI_FLASH #undef CONFIG_DM_I2C #undef CONFIG_DM_I2C_COMPAT #endif @@ -118,7 +116,6 @@ #if !CONFIG_IS_ENABLED(DM_SERIAL) #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ #endif #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) @@ -198,9 +195,6 @@ #endif #ifdef CONFIG_USE_NOR -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ #define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3) diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index ae2b81ba73..2f8c655b2c 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -78,7 +78,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT 71 #define CONFIG_SYS_FLASH_BASE EMC_CS0_BASE #define CONFIG_SYS_FLASH_SIZE SZ_4M -#define CONFIG_SYS_FLASH_CFI /* * NAND controller diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index d8d6d2f6b0..2d8758db75 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -151,11 +151,6 @@ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ /* #define CONFIG_INIT_IGNORE_ERROR */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_FLASH_CFI_MTD #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_FLASH_BASE (0x08000000) #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE diff --git a/include/configs/draak.h b/include/configs/draak.h index 5d1da21e99..9a8d6a4e79 100644 --- a/include/configs/draak.h +++ b/include/configs/draak.h @@ -24,15 +24,11 @@ #define CONFIG_SYS_MMC_ENV_PART 2 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_FLASH_CFI_MTD #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_WRITE_SWAPPED_DATA -#define CONFIG_CMD_CACHE #endif /* __DRAAK_H */ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index fd5c9b1dae..e266e1f542 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -140,10 +140,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 128 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_FLASH_ERASE_TOUT 10000000 -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_SIZE 16*1024*1024 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h index 1e358ec6ad..be03bf1627 100644 --- a/include/configs/ecovec.h +++ b/include/configs/ecovec.h @@ -85,8 +85,6 @@ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* FLASH */ -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_SYS_FLASH_CFI #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BASE (0xA0000000) @@ -109,7 +107,6 @@ * Use hardware flash sectors protection instead * of U-Boot software protection */ -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ diff --git a/include/configs/edb93xx.h b/include/configs/edb93xx.h index a175f9eee9..3d90dbcf93 100644 --- a/include/configs/edb93xx.h +++ b/include/configs/edb93xx.h @@ -169,11 +169,7 @@ * 0x600C0000 - 0x00FFFFFF unused unused * 0x61000000 - 0x01FFFFFF not present unused */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT (256+8) diff --git a/include/configs/edison.h b/include/configs/edison.h index 476f5e38b4..86c584d73d 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -48,6 +48,5 @@ /* RTC */ #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 -#define CONFIG_RTC_MC146818 #endif diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 644f42a8bb..89aa11c0ed 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -90,8 +90,6 @@ * FLASH configuration */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */ #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max num of sects on one chip */ #define CONFIG_SYS_FLASH_BASE 0xfff80000 diff --git a/include/configs/espt.h b/include/configs/espt.h index 6bb23c6ad4..0339de4081 100644 --- a/include/configs/espt.h +++ b/include/configs/espt.h @@ -44,8 +44,6 @@ #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ /* Timeout for Flash erase operations (in ms) */ @@ -57,7 +55,6 @@ /* Timeout for Flash clear lock bit operations (in ms) */ #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Use hardware flash sectors protection instead of U-Boot software protection */ -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP #define CONFIG_ENV_SECT_SIZE (128 * 1024) #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 944cdbbeb2..0d84c97b98 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -47,7 +47,6 @@ # define CONFIG_SYS_FLASH_BASE 0x00200000 /* AT91SAM9XE_FLASH_BASE */ # define CONFIG_AT91_EFLASH # define CONFIG_SYS_MAX_FLASH_SECT 32 -# define CONFIG_SYS_FLASH_PROTECTION /* First stage loader in sector 0 */ # define CONFIG_EFLASH_PROTSECTORS 1 diff --git a/include/configs/flea3.h b/include/configs/flea3.h index 6c231630b6..e7f8b7a2ae 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -103,7 +103,6 @@ /* * MTD Command for mtdparts */ -#define CONFIG_FLASH_CFI_MTD /* * FLASH and environment organization @@ -128,12 +127,8 @@ /* * CFI FLASH driver setup */ -#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ -#define CONFIG_FLASH_CFI_DRIVER /* A non-standard buffered write algorithm */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ -#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ /* * NAND FLASH driver setup diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h index c292c258c6..52e62778a3 100644 --- a/include/configs/hrcon.h +++ b/include/configs/hrcon.h @@ -202,8 +202,6 @@ * FLASH on the Local Bus */ #if 1 -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_FLASH_CFI_LEGACY #define CONFIG_SYS_FLASH_LEGACY_512Kx16 @@ -211,7 +209,6 @@ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/huawei_hg556a.h b/include/configs/huawei_hg556a.h index 0a33220ea7..1c9bee6d58 100644 --- a/include/configs/huawei_hg556a.h +++ b/include/configs/huawei_hg556a.h @@ -10,5 +10,3 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index afa7e10778..28124dd4b1 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -164,15 +164,11 @@ /* * NOR FLASH setup */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT #define CONFIG_FLASH_SHOW_PROGRESS 50 -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_BASE 0xFF800000 #define CONFIG_SYS_FLASH_SIZE 8 -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_LBLAWAR0_PRELIM 0x80000016 @@ -456,7 +452,6 @@ #define CONFIG_JFFS2_DEV "0" /* mtdparts command line support */ -#define CONFIG_FLASH_CFI_MTD #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=" __stringify(CONFIG_NETDEV) "\0" \ diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index cd89fadb39..730e874c9f 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -84,12 +84,8 @@ /* * Flash & Environment */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI /* Use buffered writes (~10x faster) */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use hardware sector protection */ -#define CONFIG_SYS_FLASH_PROTECTION 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ /* CS2 Base address */ #define PHYS_FLASH_1 0xc0000000 @@ -113,7 +109,6 @@ /* * MTD */ -#define CONFIG_FLASH_CFI_MTD /* * NAND diff --git a/include/configs/integrator-common.h b/include/configs/integrator-common.h index 952993f8ea..9223fc2cde 100644 --- a/include/configs/integrator-common.h +++ b/include/configs/integrator-common.h @@ -81,13 +81,10 @@ * - SIB block * - U-Boot environment */ -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_BASE 0x24000000 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Timeout values in ticks */ #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ -#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ diff --git a/include/configs/khadas-vim2.h b/include/configs/khadas-vim2.h new file mode 100644 index 0000000000..7ef8f42bd2 --- /dev/null +++ b/include/configs/khadas-vim2.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration for Khadas VIM2 + * + * Copyright (C) 2017 Baylibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_MISC_INIT_R + +#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxm-khadas-vim2.dtb\0" + +#include <configs/meson-gx-common.h> + +#endif /* __CONFIG_H */ diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index f72cc0a012..a83782e1cf 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -33,8 +33,6 @@ #define CONFIG_SYS_IVM_EEPROM_MAX_LEN 0x400 #define CONFIG_SYS_IVM_EEPROM_PAGE_LEN 0x100 -#define CONFIG_SYS_FLASH_PROTECTION - /* * BOOTP options */ diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h index 3b45e27bf5..16b11d82a2 100644 --- a/include/configs/km/km-powerpc.h +++ b/include/configs/km/km-powerpc.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 #define CONFIG_ENV_SIZE 0x04000 /* Size of Environment */ -#define CONFIG_FLASH_CFI_MTD #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ diff --git a/include/configs/km/km83xx-common.h b/include/configs/km/km83xx-common.h index 337a9cec66..a76f606e3e 100644 --- a/include/configs/km/km83xx-common.h +++ b/include/configs/km/km83xx-common.h @@ -84,11 +84,7 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_256MB) diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index e3dbbc83e6..e2585171af 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -254,7 +254,6 @@ int get_scl(void); "" #if !defined(CONFIG_MTD_NOR_FLASH) -#undef CONFIG_FLASH_CFI_MTD #undef CONFIG_JFFS2_CMDLINE #endif diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 08e08abb94..a8f7300c1e 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -350,7 +350,6 @@ int get_scl(void); */ /* we don't need flash support */ -#undef CONFIG_FLASH_CFI_MTD #undef CONFIG_JFFS2_CMDLINE /* diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index dd7ad3e659..071d9289ef 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -63,8 +63,6 @@ #define CONFIG_STANDALONE_LOAD_ADDR 0x41000000 /* FLASH */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO #define FLASH_SECTOR_SIZE (256 * 1024) /* 256 KB sectors */ @@ -81,7 +79,6 @@ /* Timeout for Flash clear lock bit operations (in ms) */ #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* GPIO / PFC */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 7f7ffdede1..4ad98c69e6 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -145,9 +145,6 @@ unsigned long get_board_ddr_clk(void); FTIM2_NOR_TWP(0x1c)) #define CONFIG_SYS_NOR_FTIM3 0 -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index ddd024e8c0..2c91ae783b 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -140,9 +140,6 @@ FTIM2_NOR_TWPH(0x0e)) #define CONFIG_SYS_NOR_FTIM3 0 -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 656d10dffb..4279d53549 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -132,9 +132,6 @@ #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ #endif diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 8edaf190d0..9ae0953940 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -110,9 +110,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ #endif diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 25f680c864..f4e350d207 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -99,9 +99,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_IFC_CCR 0x01000000 #ifndef SYS_NO_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 363154a40b..421d44716e 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -78,9 +78,6 @@ #define CONFIG_SYS_IFC_CCR 0x01000000 #ifndef SYS_NO_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ diff --git a/include/configs/ls2080a_simu.h b/include/configs/ls2080a_simu.h index f44b9e49c1..a526658840 100644 --- a/include/configs/ls2080a_simu.h +++ b/include/configs/ls2080a_simu.h @@ -25,9 +25,6 @@ #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #endif diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index c04448d0c2..f192839fa9 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -96,9 +96,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_IFC_CCR 0x01000000 #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 05c02df52e..6641a1bed9 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -102,9 +102,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_IFC_CCR 0x01000000 #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ diff --git a/include/configs/malta.h b/include/configs/malta.h index ba3639d177..f536234f48 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -19,7 +19,6 @@ #define CONFIG_PCNET_79C973 #define PCNET_HAS_PROM -#define CONFIG_RTC_MC146818 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 /* @@ -65,9 +64,6 @@ #endif #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 128 -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* * Environment diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 0cda1f6248..644f339993 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -61,17 +61,11 @@ /* NOR 16-bit mode */ #define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/ #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */ #define CONFIG_FLASH_VERIFY /* NOR Flash MTD */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_FLASH_CFI_MTD #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } #define CONFIG_SYS_FLASH_BANKS_SIZES { (32 * SZ_1M) } diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 2562bb05d6..ba0952c73c 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -59,8 +59,6 @@ #ifdef FLASH # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE -# define CONFIG_SYS_FLASH_CFI 1 -# define CONFIG_FLASH_CFI_DRIVER 1 /* ?empty sector */ # define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* max number of memory banks */ @@ -68,9 +66,7 @@ /* max number of sectors on one chip */ # define CONFIG_SYS_MAX_FLASH_SECT 512 /* hardware flash protection */ -# define CONFIG_SYS_FLASH_PROTECTION /* use buffered writes (20x faster) */ -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 # ifdef RAMENV # define CONFIG_ENV_SIZE 0x1000 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) @@ -134,7 +130,6 @@ #if defined(CONFIG_MTD_PARTITIONS) /* MTD partitions */ -#define CONFIG_FLASH_CFI_MTD /* default mtd partition table */ #endif diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h index 6752ef66da..98f030388c 100644 --- a/include/configs/mpc8308_p1m.h +++ b/include/configs/mpc8308_p1m.h @@ -214,13 +214,10 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_BASE 0xFC000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 64 /* FLASH size is 64M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/mpr2.h b/include/configs/mpr2.h index 901a302873..e8594966e0 100644 --- a/include/configs/mpr2.h +++ b/include/configs/mpr2.h @@ -34,8 +34,6 @@ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) /* Flash */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BASE 0xA0000000 #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h index b159c10bbf..f582b5a8e4 100644 --- a/include/configs/ms7720se.h +++ b/include/configs/ms7720se.h @@ -41,8 +41,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index 230b86b821..241ba69fa0 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -47,8 +47,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ @@ -68,8 +66,6 @@ #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) /* Timeout for Flash set sector lock bit operations (in ms) */ #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Timeout for Flash clear lock bit operations (in ms) */ -#undef CONFIG_SYS_FLASH_PROTECTION /* Use hardware flash sectors protection instead of U-Boot software protection */ - #undef CONFIG_SYS_DIRECT_FLASH_TFTP #define CONFIG_ENV_OVERWRITE 1 diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index 35849069eb..949fc04cc8 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -48,8 +48,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) #define CONFIG_SYS_RX_ETH_BUFFER (8) -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index 383ba9bbf0..e153dfb199 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -117,7 +117,6 @@ /* * MTD Command for mtdparts */ -#define CONFIG_FLASH_CFI_MTD /* * FLASH and environment organization @@ -146,13 +145,9 @@ /* * CFI FLASH driver setup */ -#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ -#define CONFIG_FLASH_CFI_DRIVER /* A non-standard buffered write algorithm */ #define CONFIG_FLASH_SPANSION_S29WS_N -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ -#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ /* * NAND FLASH driver setup diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index 143e9ed5ee..e444930dc8 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -44,9 +44,6 @@ #define CONFIG_SYS_FLASH_SECT_SIZE (128 * 1024) #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ -#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ -#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/ #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #endif diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 8644e16830..fe557f91ca 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -183,9 +183,14 @@ /* **** PISMO SUPPORT *** */ #if defined(CONFIG_CMD_NAND) -#define CONFIG_SYS_FLASH_BASE NAND_BASE +#define CONFIG_SYS_FLASH_BASE 0x10000000 #endif +#define CONFIG_SYS_MAX_FLASH_SECT 256 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_SYS_FLASH_SIZE 0x4000000 + /* Monitor at start of flash */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 39fdf063f2..2002444e42 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -178,9 +178,6 @@ #endif #ifdef CONFIG_SYS_USE_NOR -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ #define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index aa3f2277d6..9465fb4702 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -69,7 +69,6 @@ /* * Dynamic MTD Partition support with mtdparts */ -#define CONFIG_FLASH_CFI_MTD #endif #if defined(CONFIG_TARGET_P1021RDB) @@ -89,7 +88,6 @@ /* * Dynamic MTD Partition support with mtdparts */ -#define CONFIG_FLASH_CFI_MTD #endif #if defined(CONFIG_TARGET_P1024RDB) @@ -134,7 +132,6 @@ /* * Dynamic MTD Partition support with mtdparts */ -#define CONFIG_FLASH_CFI_MTD #endif #ifdef CONFIG_SDCARD @@ -370,10 +367,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Nand Flash */ #ifdef CONFIG_NAND_FSL_ELBC diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index 5c32952cfb..d018c22afd 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -156,10 +156,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 @@ -327,7 +324,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Dynamic MTD Partition support with mtdparts */ -#define CONFIG_FLASH_CFI_MTD /* * Environment diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 9dcb3b0c1b..e88948c7f5 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -169,8 +169,6 @@ #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(16) /* NOR flash */ -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define PHYS_FLASH_1 0x10000000 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 803de1c02c..f11879b4e9 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -172,8 +172,6 @@ #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ /* NOR flash, if populated */ -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define PHYS_FLASH_1 0x10000000 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index e5e192d11e..1937829394 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -88,9 +88,6 @@ #define CONFIG_SYS_FLASH_BASE 0xbfc00000 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 128 -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Address and size of Primary Environment Sector */ #define CONFIG_ENV_SIZE 0x8000 diff --git a/include/configs/qemu-mips64.h b/include/configs/qemu-mips64.h index b19b8a5a26..fe384ec84e 100644 --- a/include/configs/qemu-mips64.h +++ b/include/configs/qemu-mips64.h @@ -88,9 +88,6 @@ #define CONFIG_SYS_FLASH_BASE 0xffffffffbfc00000 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 128 -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Address and size of Primary Environment Sector */ #define CONFIG_ENV_SIZE 0x8000 diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h index 88476850ff..3e4ef763c9 100644 --- a/include/configs/r0p7734.h +++ b/include/configs/r0p7734.h @@ -48,8 +48,6 @@ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* FLASH */ -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_SYS_FLASH_CFI #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BASE (0xA0000000) @@ -72,7 +70,6 @@ * Use hardware flash sectors protection instead * of U-Boot software protection */ -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index b39b13b7cd..e10de1b920 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -31,8 +31,6 @@ /* * NOR Flash ( Spantion S29GL256P ) */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_BASE (0xA0000000) #define CONFIG_SYS_MAX_FLASH_BANKS (1) #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index a819e1bfb3..6ea7f38a17 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -56,8 +56,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) #define CONFIG_SYS_RX_ETH_BUFFER (8) -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE #undef CONFIG_SYS_FLASH_QUIET_TEST /* print 'E' for empty sector on flinfo */ diff --git a/include/configs/rsk7203.h b/include/configs/rsk7203.h index ef2b79e2e0..941dbc1046 100644 --- a/include/configs/rsk7203.h +++ b/include/configs/rsk7203.h @@ -40,8 +40,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h index 54ca87996b..e91e4bd416 100644 --- a/include/configs/rsk7264.h +++ b/include/configs/rsk7264.h @@ -33,8 +33,6 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024) /* Flash */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 diff --git a/include/configs/rsk7269.h b/include/configs/rsk7269.h index f8e66e67da..fc45f46cc6 100644 --- a/include/configs/rsk7269.h +++ b/include/configs/rsk7269.h @@ -32,8 +32,6 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024) /* NOR Flash */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index 9987484a00..4d3c3b8314 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -30,9 +30,6 @@ /* NOR flash */ #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_FLASH_BASE 0x10000000 #define CONFIG_SYS_MAX_FLASH_SECT 131 #define CONFIG_SYS_MAX_FLASH_BANKS 1 diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 9c5d05de3e..9074be80f1 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -119,11 +119,8 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFF800000 /* start of FLASH */ #define CONFIG_SYS_FLASH_SIZE 8 /* flash size in MB */ -/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ | BR_PS_16 /* 16 bit port */ \ diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index dfcf8491cb..f0b165591c 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -245,8 +245,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* CS5 = Local bus peripherals controlled by the EPLD */ diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index d777e7a36a..e9e264b40b 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -206,11 +206,8 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_WRITE_SWAPPED_DATA #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_CLOCKS_IN_MHZ diff --git a/include/configs/sfr_nb4_ser.h b/include/configs/sfr_nb4_ser.h index 0a33220ea7..1c9bee6d58 100644 --- a/include/configs/sfr_nb4_ser.h +++ b/include/configs/sfr_nb4_ser.h @@ -10,5 +10,3 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index 2aefc69606..d857fcbd9a 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -44,8 +44,6 @@ #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ /* Timeout for Flash erase operations (in ms) */ @@ -57,7 +55,6 @@ /* Timeout for Flash clear lock bit operations (in ms) */ #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Use hardware flash sectors protection instead of U-Boot software protection */ -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP #define CONFIG_ENV_SECT_SIZE (128 * 1024) #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 6cb0ef3389..f27f665fb6 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -59,8 +59,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BASE (SH7785LCR_FLASH_BASE_1) @@ -75,7 +73,6 @@ #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* R8A66597 */ diff --git a/include/configs/shmin.h b/include/configs/shmin.h index 5eabdf5bb0..9aeca97bec 100644 --- a/include/configs/shmin.h +++ b/include/configs/shmin.h @@ -45,8 +45,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_BASE SHMIN_FLASH_BASE_1 diff --git a/include/configs/socrates.h b/include/configs/socrates.h index dd950f3473..9fa8917a9b 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -109,9 +109,6 @@ #define CONFIG_SYS_BR1_PRELIM 0xfc001001 /* port size 16bit */ #define CONFIG_SYS_OR1_PRELIM 0xfe000030 /* 32MB Flash */ -#define CONFIG_SYS_FLASH_CFI /* flash is CFI compat. */ -#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver*/ - #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 256 /* sectors per device */ #undef CONFIG_SYS_FLASH_CHECKSUM diff --git a/include/configs/spear3xx_evb.h b/include/configs/spear3xx_evb.h index 5c8626e6cf..2f642b1a4a 100644 --- a/include/configs/spear3xx_evb.h +++ b/include/configs/spear3xx_evb.h @@ -80,12 +80,7 @@ #endif #if defined(CONFIG_SPEAR_EMI) - -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER - #if defined(CONFIG_SPEAR310) -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_FLASH_BASE 0x50000000 #define CONFIG_SYS_CS1_FLASH_BASE 0x60000000 #define CONFIG_SYS_CS2_FLASH_BASE 0x70000000 @@ -101,7 +96,6 @@ #define CONFIG_SYS_MAX_FLASH_BANKS 6 #elif defined(CONFIG_SPEAR320) -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_FLASH_BASE 0x44000000 #define CONFIG_SYS_CS1_FLASH_BASE 0x45000000 #define CONFIG_SYS_CS2_FLASH_BASE 0x46000000 diff --git a/include/configs/strider.h b/include/configs/strider.h index 9b89031965..972543d6bd 100644 --- a/include/configs/strider.h +++ b/include/configs/strider.h @@ -201,15 +201,12 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_FLASH_CFI_LEGACY #define CONFIG_SYS_FLASH_LEGACY_512Kx16 #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/udoo.h b/include/configs/udoo.h index 985f306813..3378b4a601 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -45,100 +45,34 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "image=zImage\0" \ - "console=ttymxc1\0" \ - "splashpos=m,m\0" \ + "console=ttymxc1,115200\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ - "fdt_file=undefined\0" \ + "fdtfile=undefined\0" \ "fdt_addr=0x18000000\0" \ - "boot_fdt=try\0" \ + "fdt_addr_r=0x18000000\0" \ "ip_dyn=yes\0" \ "mmcdev=0\0" \ - "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ - "update_sd_firmware_filename=u-boot.imx\0" \ - "update_sd_firmware=" \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "if mmc dev ${mmcdev}; then " \ - "if ${get_cmd} ${update_sd_firmware_filename}; then " \ - "setexpr fw_sz ${filesize} / 0x200; " \ - "setexpr fw_sz ${fw_sz} + 1; " \ - "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ - "fi; " \ - "fi\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ - "loadbootscript=" \ - "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "${get_cmd} ${image}; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - "findfdt=" \ - "if test $board_rev = MX6Q ; then " \ - "setenv fdt_file imx6q-udoo.dtb; fi; " \ - "if test $board_rev = MX6DL ; then " \ - "setenv fdt_file imx6dl-udoo.dtb; fi; " \ - "if test $fdt_file = undefined; then " \ - "echo WARNING: Could not determine dtb to use; fi; \0" - -#define CONFIG_BOOTCOMMAND \ - "run findfdt; " \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" + "mmcrootfstype=ext4\0" \ + "findfdt="\ + "if test ${board_rev} = MX6Q; then " \ + "setenv fdtfile imx6q-udoo.dtb; fi; " \ + "if test ${board_rev} = MX6DL; then " \ + "setenv fdtfile imx6dl-udoo.dtb; fi; " \ + "if test ${fdtfile} = undefined; then " \ + "echo WARNING: Could not determine dtb to use; fi\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "ramdisk_addr_r=0x13000000\0" \ + "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ + BOOTENV + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(SATA, sata, 0) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index ff44749133..70f8712b60 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -55,9 +55,6 @@ /* FLASH related */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI - #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_MONITOR_BASE 0 #define CONFIG_SYS_MONITOR_LEN 0x000d0000 /* 832KB */ diff --git a/include/configs/vct.h b/include/configs/vct.h index 0e347a4c18..571071593a 100644 --- a/include/configs/vct.h +++ b/include/configs/vct.h @@ -116,8 +116,6 @@ /* * CFI driver settings */ -#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ -#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */ diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h index 90554dacf8..85f678e5c4 100644 --- a/include/configs/ve8313.h +++ b/include/configs/ve8313.h @@ -113,12 +113,9 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 #define CONFIG_SYS_FLASH_SIZE 32 /* size in MB */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* display empty sectors */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffer up multiple bytes */ #define CONFIG_SYS_NOR_BR_PRELIM (CONFIG_SYS_FLASH_BASE \ | BR_PS_16 /* 16 bit */ \ diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 36f535e9a4..2354f4e958 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -228,13 +228,9 @@ #define CONFIG_ENV_SECT_SIZE 0x00040000 #endif -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT #define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ -#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ #define FLASH_MAX_SECTOR_SIZE 0x00040000 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 2ad3338a2b..267b230fda 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -211,8 +211,6 @@ /* FLASH and environment organization */ #define PHYS_FLASH_SIZE 0x04000000 /* 64MB */ -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_SIZE 0x04000000 #define CONFIG_SYS_MAX_FLASH_BANKS 2 #define CONFIG_SYS_FLASH_BASE0 V2M_NOR0 @@ -230,8 +228,6 @@ /* Room required on the stack for the environment data */ #define CONFIG_ENV_SIZE FLASH_MAX_SECTOR_SIZE -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ - /* * Amount of flash used for environment: * We don't know which end has the small erase blocks so we use the penultimate @@ -245,7 +241,6 @@ (2 * CONFIG_ENV_SECT_SIZE)) #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE1 + \ CONFIG_ENV_OFFSET) -#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE0, \ CONFIG_SYS_FLASH_BASE1 } diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index 7fc89e8e71..805f7d3df6 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -94,8 +94,6 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #ifdef VME_CADDY2 #define CONFIG_SYS_FLASH_BASE 0xffc00000 /* start of FLASH */ #define CONFIG_SYS_FLASH_SIZE 4 /* flash size in MB */ @@ -137,7 +135,6 @@ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_128MB) #endif -/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ #define CONFIG_SYS_WINDOW1_BASE 0xf0000000 #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_WINDOW1_BASE \ diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h index c0bc23d963..82c57b65e6 100644 --- a/include/configs/woodburn_common.h +++ b/include/configs/woodburn_common.h @@ -110,7 +110,6 @@ /* * MTD Command for mtdparts */ -#define CONFIG_FLASH_CFI_MTD /* * FLASH and environment organization @@ -135,12 +134,8 @@ /* * CFI FLASH driver setup */ -#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ -#define CONFIG_FLASH_CFI_DRIVER /* A non-standard buffered write algorithm */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ -#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ /* * NAND FLASH driver setup diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index f453f01675..67b5e9aa11 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -25,9 +25,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #endif -/* generate LPC32XX-specific SPL image */ -#define CONFIG_LPC32XX_SPL - /* * Memory configurations */ @@ -149,7 +146,6 @@ /* SPL will load U-Boot from NAND offset 0x40000 */ #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE -#define CONFIG_SPL_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00040000 #define CONFIG_SPL_PAD_TO 0x20000 /* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */ diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h new file mode 100644 index 0000000000..bfe4c43449 --- /dev/null +++ b/include/configs/xilinx_versal.h @@ -0,0 +1,91 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration for Xilinx Versal + * (C) Copyright 2016 - 2018 Xilinx, Inc. + * Michal Simek <michal.simek@xilinx.com> + * + * Based on Configuration for Xilinx ZynqMP + */ + +#ifndef __XILINX_VERSAL_H +#define __XILINX_VERSAL_H + +#define CONFIG_REMAKE_ELF + +/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */ + +/* Generic Interrupt Controller Definitions */ +#define GICD_BASE 0xF9000000 +#define GICR_BASE 0xF9080000 + +#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000 + +#define CONFIG_SYS_MEMTEST_START 0 +#define CONFIG_SYS_MEMTEST_END 1000 + +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE + +/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */ +#if CONFIG_COUNTER_FREQUENCY +# define COUNTER_FREQUENCY CONFIG_COUNTER_FREQUENCY +#endif + +/* Serial setup */ +#define CONFIG_ARM_DCC +#define CONFIG_CPU_ARMV8 + +#define CONFIG_SYS_BAUDRATE_TABLE \ + { 4800, 9600, 19200, 38400, 57600, 115200 } + +/* BOOTP options */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_MAY_FAIL + +#define CONFIG_IP_DEFRAG +#define CONFIG_TFTP_BLOCKSIZE 4096 + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LOAD_ADDR 0x8000000 + +/* Monitor Command Prompt */ +/* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 2048 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_MAXARGS 64 + +/* Ethernet driver */ +#if defined(CONFIG_ZYNQ_GEM) +# define CONFIG_NET_MULTI +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# define PHY_ANEG_TIMEOUT 20000 +#endif + +#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) + +#define CONFIG_CLOCKS + +#define ENV_MEM_LAYOUT_SETTINGS \ + "fdt_high=10000000\0" \ + "initrd_high=10000000\0" \ + "fdt_addr_r=0x40000000\0" \ + "pxefile_addr_r=0x10000000\0" \ + "kernel_addr_r=0x18000000\0" \ + "scriptaddr=0x02000000\0" \ + "ramdisk_addr_r=0x02100000\0" + +#define BOOT_TARGET_DEVICES(func) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> + +/* Initial environment variables */ +#ifndef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + ENV_MEM_LAYOUT_SETTINGS \ + BOOTENV +#endif + +#endif /* __XILINX_VERSAL_H */ diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index 4816bf5fef..2d2a87a719 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -124,9 +124,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff00000, 0xc0000}, \ {0xf7f00000, 0xc0000} } #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index 86ed58611c..206f0c13a4 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -99,9 +99,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ {0xfbf40000, 0xc0000} } #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index 2f7fc5a6eb..e6eea8dfc2 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -113,9 +113,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ {0xf7f40000, 0xc0000} } #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index d98062f491..a7c8dc4e33 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -114,9 +114,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ {0xf7f40000, 0xc0000} } #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 90310c46ac..33255a3fe9 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -194,8 +194,6 @@ /* Flash & Environment */ /*=====================*/ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER /* use generic CFI driver */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MAX_FLASH_BANKS 1 #ifdef CONFIG_XTFPGA_LX60 @@ -220,7 +218,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT \ (CONFIG_SYS_FLASH_SECT_SZ/CONFIG_SYS_FLASH_PARMSECT_SZ + \ CONFIG_SYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ - 1) -#define CONFIG_SYS_FLASH_PROTECTION /* hw flash protection */ /* * Put environment in top block (64kB) diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 17b9a5987a..24fea68a11 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -113,8 +113,6 @@ unsigned char zipitz2_spi_read(void); #define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 @@ -123,13 +121,10 @@ unsigned char zipitz2_spi_read(void); #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 - #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 #define CONFIG_SYS_FLASH_WRITE_TOUT 240000 #define CONFIG_SYS_FLASH_LOCK_TOUT 240000 #define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000 -#define CONFIG_SYS_FLASH_PROTECTION /* * GPIO settings diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h index 05b42db265..c8b6161a29 100644 --- a/include/configs/zmx25.h +++ b/include/configs/zmx25.h @@ -92,9 +92,6 @@ /* * CFI FLASH driver setup */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* ~10x faster */ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index f99c2cbf0d..98411c4e9f 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -53,11 +53,7 @@ # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 # define CONFIG_FLASH_SHOW_PROGRESS 10 -# define CONFIG_SYS_FLASH_CFI # undef CONFIG_SYS_FLASH_EMPTY_INFO -# define CONFIG_FLASH_CFI_DRIVER -# undef CONFIG_SYS_FLASH_PROTECTION -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #endif #ifdef CONFIG_NAND_ZYNQ diff --git a/include/cros_ec.h b/include/cros_ec.h index 60ecefbd40..4771e6b7d1 100644 --- a/include/cros_ec.h +++ b/include/cros_ec.h @@ -69,7 +69,7 @@ struct fdt_cros_ec { * @param maxlen Maximum length of the ID field * @return 0 if ok, -1 on error */ -int cros_ec_read_id(struct cros_ec_dev *dev, char *id, int maxlen); +int cros_ec_read_id(struct udevice *dev, char *id, int maxlen); /** * Read a keyboard scan from the CROS-EC device @@ -89,18 +89,19 @@ int cros_ec_scan_keyboard(struct udevice *dev, struct mbkp_keyscan *scan); * @param image Destination for image identifier * @return 0 if ok, <0 on error */ -int cros_ec_read_current_image(struct cros_ec_dev *dev, - enum ec_current_image *image); +int cros_ec_read_current_image(struct udevice *dev, + enum ec_current_image *image); /** * Read the hash of the CROS-EC device firmware. * * @param dev CROS-EC device + * @param hash_offset Offset in flash to read from * @param hash Destination for hash information * @return 0 if ok, <0 on error */ -int cros_ec_read_hash(struct cros_ec_dev *dev, - struct ec_response_vboot_hash *hash); +int cros_ec_read_hash(struct udevice *dev, uint hash_offset, + struct ec_response_vboot_hash *hash); /** * Send a reboot command to the CROS-EC device. @@ -112,8 +113,7 @@ int cros_ec_read_hash(struct cros_ec_dev *dev, * @param flags Flags for reboot command (EC_REBOOT_FLAG_*) * @return 0 if ok, <0 on error */ -int cros_ec_reboot(struct cros_ec_dev *dev, enum ec_reboot_cmd cmd, - uint8_t flags); +int cros_ec_reboot(struct udevice *dev, enum ec_reboot_cmd cmd, uint8_t flags); /** * Check if the CROS-EC device has an interrupt pending. @@ -144,7 +144,7 @@ enum { * expected), -ve if we should have an cros_ec device but failed to find * one, or init failed (-CROS_EC_ERR_...). */ -int cros_ec_init(const void *blob, struct cros_ec_dev **cros_ecp); +int cros_ec_init(const void *blob, struct udevice**cros_ecp); /** * Read information about the keyboard matrix @@ -152,8 +152,7 @@ int cros_ec_init(const void *blob, struct cros_ec_dev **cros_ecp); * @param dev CROS-EC device * @param info Place to put the info structure */ -int cros_ec_info(struct cros_ec_dev *dev, - struct ec_response_mkbp_info *info); +int cros_ec_info(struct udevice *dev, struct ec_response_mkbp_info *info); /** * Read the host event flags @@ -162,7 +161,7 @@ int cros_ec_info(struct cros_ec_dev *dev, * @param events_ptr Destination for event flags. Not changed on error. * @return 0 if ok, <0 on error */ -int cros_ec_get_host_events(struct cros_ec_dev *dev, uint32_t *events_ptr); +int cros_ec_get_host_events(struct udevice *dev, uint32_t *events_ptr); /** * Clear the specified host event flags @@ -171,7 +170,7 @@ int cros_ec_get_host_events(struct cros_ec_dev *dev, uint32_t *events_ptr); * @param events Event flags to clear * @return 0 if ok, <0 on error */ -int cros_ec_clear_host_events(struct cros_ec_dev *dev, uint32_t events); +int cros_ec_clear_host_events(struct udevice *dev, uint32_t events); /** * Get/set flash protection @@ -184,9 +183,9 @@ int cros_ec_clear_host_events(struct cros_ec_dev *dev, uint32_t events); * @param prot Destination for updated protection state from EC. * @return 0 if ok, <0 on error */ -int cros_ec_flash_protect(struct cros_ec_dev *dev, - uint32_t set_mask, uint32_t set_flags, - struct ec_response_flash_protect *resp); +int cros_ec_flash_protect(struct udevice *dev, uint32_t set_mask, + uint32_t set_flags, + struct ec_response_flash_protect *resp); /** @@ -195,7 +194,7 @@ int cros_ec_flash_protect(struct cros_ec_dev *dev, * @param dev CROS-EC device * @return 0 if ok, <0 if the test failed */ -int cros_ec_test(struct cros_ec_dev *dev); +int cros_ec_test(struct udevice *dev); /** * Update the EC RW copy. @@ -205,17 +204,15 @@ int cros_ec_test(struct cros_ec_dev *dev); * @param imafge_size content length * @return 0 if ok, <0 if the test failed */ -int cros_ec_flash_update_rw(struct cros_ec_dev *dev, - const uint8_t *image, int image_size); +int cros_ec_flash_update_rw(struct udevice *dev, const uint8_t *image, + int image_size); /** * Return a pointer to the board's CROS-EC device * - * This should be implemented by board files. - * * @return pointer to CROS-EC device, or NULL if none is available */ -struct cros_ec_dev *board_get_cros_ec_dev(void); +struct udevice *board_get_cros_ec_dev(void); struct dm_cros_ec_ops { int (*check_version)(struct udevice *dev); @@ -249,8 +246,7 @@ void cros_ec_dump_data(const char *name, int cmd, const uint8_t *data, int len); */ int cros_ec_calc_checksum(const uint8_t *data, int size); -int cros_ec_flash_erase(struct cros_ec_dev *dev, uint32_t offset, - uint32_t size); +int cros_ec_flash_erase(struct udevice *dev, uint32_t offset, uint32_t size); /** * Read data from the flash @@ -267,8 +263,8 @@ int cros_ec_flash_erase(struct cros_ec_dev *dev, uint32_t offset, * @param size Number of bytes to read * @return 0 if ok, -1 on error */ -int cros_ec_flash_read(struct cros_ec_dev *dev, uint8_t *data, uint32_t offset, - uint32_t size); +int cros_ec_flash_read(struct udevice *dev, uint8_t *data, uint32_t offset, + uint32_t size); /** * Read back flash parameters @@ -278,8 +274,8 @@ int cros_ec_flash_read(struct cros_ec_dev *dev, uint8_t *data, uint32_t offset, * @param dev Pointer to device * @param info Pointer to output flash info struct */ -int cros_ec_read_flashinfo(struct cros_ec_dev *dev, - struct ec_response_flash_info *info); +int cros_ec_read_flashinfo(struct udevice *dev, + struct ec_response_flash_info *info); /** * Write data to the flash @@ -299,8 +295,8 @@ int cros_ec_read_flashinfo(struct cros_ec_dev *dev, * @param size Number of bytes to write * @return 0 if ok, -1 on error */ -int cros_ec_flash_write(struct cros_ec_dev *dev, const uint8_t *data, - uint32_t offset, uint32_t size); +int cros_ec_flash_write(struct udevice *dev, const uint8_t *data, + uint32_t offset, uint32_t size); /** * Obtain position and size of a flash region @@ -311,18 +307,18 @@ int cros_ec_flash_write(struct cros_ec_dev *dev, const uint8_t *data, * @param size Returns size of flash region * @return 0 if ok, -1 on error */ -int cros_ec_flash_offset(struct cros_ec_dev *dev, enum ec_flash_region region, - uint32_t *offset, uint32_t *size); +int cros_ec_flash_offset(struct udevice *dev, enum ec_flash_region region, + uint32_t *offset, uint32_t *size); /** - * Read/write VbNvContext from/to a CROS-EC device. + * Read/write non-volatile data from/to a CROS-EC device. * * @param dev CROS-EC device * @param block Buffer of VbNvContext to be read/write * @return 0 if ok, -1 on error */ -int cros_ec_read_vbnvcontext(struct cros_ec_dev *dev, uint8_t *block); -int cros_ec_write_vbnvcontext(struct cros_ec_dev *dev, const uint8_t *block); +int cros_ec_read_nvdata(struct udevice *dev, uint8_t *block, int size); +int cros_ec_write_nvdata(struct udevice *dev, const uint8_t *block, int size); /** * Read the version information for the EC images @@ -331,8 +327,8 @@ int cros_ec_write_vbnvcontext(struct cros_ec_dev *dev, const uint8_t *block); * @param versionp This is set to point to the version information * @return 0 if ok, -1 on error */ -int cros_ec_read_version(struct cros_ec_dev *dev, - struct ec_response_get_version **versionp); +int cros_ec_read_version(struct udevice *dev, + struct ec_response_get_version **versionp); /** * Read the build information for the EC @@ -341,7 +337,7 @@ int cros_ec_read_version(struct cros_ec_dev *dev, * @param versionp This is set to point to the build string * @return 0 if ok, -1 on error */ -int cros_ec_read_build_info(struct cros_ec_dev *dev, char **strp); +int cros_ec_read_build_info(struct udevice *dev, char **strp); /** * Switch on/off a LDO / FET. @@ -387,7 +383,7 @@ int cros_ec_decode_ec_flash(struct udevice *dev, struct fdt_cros_ec *config); * * @param ec CROS-EC device */ -void cros_ec_check_keyboard(struct cros_ec_dev *dev); +void cros_ec_check_keyboard(struct udevice *dev); struct i2c_msg; /* diff --git a/include/dm/device.h b/include/dm/device.h index 9812d86f08..847934425b 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -270,7 +270,7 @@ struct driver { * @dev Device to check * @return platform data, or NULL if none */ -void *dev_get_platdata(struct udevice *dev); +void *dev_get_platdata(const struct udevice *dev); /** * dev_get_parent_platdata() - Get the parent platform data for a device @@ -280,7 +280,7 @@ void *dev_get_platdata(struct udevice *dev); * @dev Device to check * @return parent's platform data, or NULL if none */ -void *dev_get_parent_platdata(struct udevice *dev); +void *dev_get_parent_platdata(const struct udevice *dev); /** * dev_get_uclass_platdata() - Get the uclass platform data for a device @@ -290,7 +290,7 @@ void *dev_get_parent_platdata(struct udevice *dev); * @dev Device to check * @return uclass's platform data, or NULL if none */ -void *dev_get_uclass_platdata(struct udevice *dev); +void *dev_get_uclass_platdata(const struct udevice *dev); /** * dev_get_priv() - Get the private data for a device @@ -300,7 +300,7 @@ void *dev_get_uclass_platdata(struct udevice *dev); * @dev Device to check * @return private data, or NULL if none */ -void *dev_get_priv(struct udevice *dev); +void *dev_get_priv(const struct udevice *dev); /** * dev_get_parent_priv() - Get the parent private data for a device @@ -314,7 +314,7 @@ void *dev_get_priv(struct udevice *dev); * @dev Device to check * @return parent data, or NULL if none */ -void *dev_get_parent_priv(struct udevice *dev); +void *dev_get_parent_priv(const struct udevice *dev); /** * dev_get_uclass_priv() - Get the private uclass data for a device @@ -324,7 +324,7 @@ void *dev_get_parent_priv(struct udevice *dev); * @dev Device to check * @return private uclass data for this device, or NULL if none */ -void *dev_get_uclass_priv(struct udevice *dev); +void *dev_get_uclass_priv(const struct udevice *dev); /** * struct dev_get_parent() - Get the parent of a device @@ -332,7 +332,7 @@ void *dev_get_uclass_priv(struct udevice *dev); * @child: Child to check * @return parent of child, or NULL if this is the root device */ -struct udevice *dev_get_parent(struct udevice *child); +struct udevice *dev_get_parent(const struct udevice *child); /** * dev_get_driver_data() - get the driver data used to bind a device @@ -359,7 +359,7 @@ struct udevice *dev_get_parent(struct udevice *child); * @dev: Device to check * @return driver data (0 if none is provided) */ -ulong dev_get_driver_data(struct udevice *dev); +ulong dev_get_driver_data(const struct udevice *dev); /** * dev_get_driver_ops() - get the device's driver's operations @@ -370,7 +370,7 @@ ulong dev_get_driver_data(struct udevice *dev); * @dev: Device to check * @return void pointer to driver's operations or NULL for NULL-dev or NULL-ops */ -const void *dev_get_driver_ops(struct udevice *dev); +const void *dev_get_driver_ops(const struct udevice *dev); /** * device_get_uclass_id() - return the uclass ID of a device @@ -378,7 +378,7 @@ const void *dev_get_driver_ops(struct udevice *dev); * @dev: Device to check * @return uclass ID for the device */ -enum uclass_id device_get_uclass_id(struct udevice *dev); +enum uclass_id device_get_uclass_id(const struct udevice *dev); /** * dev_get_uclass_name() - return the uclass name of a device @@ -388,7 +388,7 @@ enum uclass_id device_get_uclass_id(struct udevice *dev); * @dev: Device to check * @return pointer to the uclass name for the device */ -const char *dev_get_uclass_name(struct udevice *dev); +const char *dev_get_uclass_name(const struct udevice *dev); /** * device_get_child() - Get the child of a device by index @@ -520,12 +520,27 @@ int device_find_first_child(struct udevice *parent, struct udevice **devp); int device_find_next_child(struct udevice **devp); /** + * device_find_first_inactive_child() - Find the first inactive child + * + * This is used to locate an existing child of a device which is of a given + * uclass. + * + * @parent: Parent device to search + * @uclass_id: Uclass to look for + * @devp: Returns device found, if any + * @return 0 if found, else -ENODEV + */ +int device_find_first_inactive_child(struct udevice *parent, + enum uclass_id uclass_id, + struct udevice **devp); + +/** * device_has_children() - check if a device has any children * * @dev: Device to check * @return true if the device has one or more children */ -bool device_has_children(struct udevice *dev); +bool device_has_children(const struct udevice *dev); /** * device_has_active_children() - check if a device has any active children diff --git a/include/dm/of_extra.h b/include/dm/of_extra.h index 97988b6663..ca15df21b0 100644 --- a/include/dm/of_extra.h +++ b/include/dm/of_extra.h @@ -11,7 +11,7 @@ enum fmap_compress_t { FMAP_COMPRESS_NONE, - FMAP_COMPRESS_LZO, + FMAP_COMPRESS_LZ4, }; enum fmap_hash_t { @@ -26,6 +26,7 @@ struct fmap_entry { uint32_t length; uint32_t used; /* Number of bytes used in region */ enum fmap_compress_t compress_algo; /* Compression type */ + uint32_t unc_length; /* Uncompressed length */ enum fmap_hash_t hash_algo; /* Hash algorithm */ const uint8_t *hash; /* Hash value */ int hash_size; /* Hash size */ diff --git a/include/dm/platform_data/spi_davinci.h b/include/dm/platform_data/spi_davinci.h new file mode 100644 index 0000000000..fbc62c262a --- /dev/null +++ b/include/dm/platform_data/spi_davinci.h @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __spi_davinci_h +#define __spi_davinci_h + +struct davinci_spi_platdata { + struct davinci_spi_regs *regs; + u8 num_cs; /* total no. of CS available */ +}; + +#endif /* __spi_davinci_h */ diff --git a/include/dm/uclass.h b/include/dm/uclass.h index 6e7c1cd3e8..eebf2d5614 100644 --- a/include/dm/uclass.h +++ b/include/dm/uclass.h @@ -44,6 +44,9 @@ struct udevice; /* Members of this uclass sequence themselves with aliases */ #define DM_UC_FLAG_SEQ_ALIAS (1 << 0) +/* Same as DM_FLAG_ALLOC_PRIV_DMA */ +#define DM_UC_FLAG_ALLOC_PRIV_DMA (1 << 5) + /** * struct uclass_driver - Driver for the uclass * diff --git a/include/dt-bindings/net/ti-dp83867.h b/include/dt-bindings/net/ti-dp83867.h index b8e5df615d..85d08f6974 100644 --- a/include/dt-bindings/net/ti-dp83867.h +++ b/include/dt-bindings/net/ti-dp83867.h @@ -31,4 +31,19 @@ #define DP83867_RGMIIDCTL_3_75_NS 0xe #define DP83867_RGMIIDCTL_4_00_NS 0xf +/* IO_MUX_CFG - Clock output selection */ +#define DP83867_CLK_O_SEL_CHN_A_RCLK 0x0 +#define DP83867_CLK_O_SEL_CHN_B_RCLK 0x1 +#define DP83867_CLK_O_SEL_CHN_C_RCLK 0x2 +#define DP83867_CLK_O_SEL_CHN_D_RCLK 0x3 +#define DP83867_CLK_O_SEL_CHN_A_RCLK_DIV5 0x4 +#define DP83867_CLK_O_SEL_CHN_B_RCLK_DIV5 0x5 +#define DP83867_CLK_O_SEL_CHN_C_RCLK_DIV5 0x6 +#define DP83867_CLK_O_SEL_CHN_D_RCLK_DIV5 0x7 +#define DP83867_CLK_O_SEL_CHN_A_TCLK 0x8 +#define DP83867_CLK_O_SEL_CHN_B_TCLK 0x9 +#define DP83867_CLK_O_SEL_CHN_C_TCLK 0xA +#define DP83867_CLK_O_SEL_CHN_D_TCLK 0xB +#define DP83867_CLK_O_SEL_REF_CLK 0xC + #endif diff --git a/include/dt-bindings/power/r8a77990-sysc.h b/include/dt-bindings/power/r8a77990-sysc.h new file mode 100644 index 0000000000..1409c73a57 --- /dev/null +++ b/include/dt-bindings/power/r8a77990-sysc.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 Renesas Electronics Corp. + */ +#ifndef __DT_BINDINGS_POWER_R8A77990_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A77990_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + */ + +#define R8A77990_PD_CA53_CPU0 5 +#define R8A77990_PD_CA53_SCU 21 + +/* Always-on power area */ +#define R8A77990_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A77990_SYSC_H__ */ diff --git a/include/ec_commands.h b/include/ec_commands.h index 7605066437..392c1f1a43 100644 --- a/include/ec_commands.h +++ b/include/ec_commands.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved. +/* Copyright (c) 2018 The Chromium OS Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -27,7 +27,13 @@ * On I2C, all bytes are sent serially in the same message. */ -/* Current version of this protocol */ +/* + * Current version of this protocol + * + * TODO(crosbug.com/p/11223): This is effectively useless; protocol is + * determined in other ways. Remove this once the kernel code no longer + * depends on it. + */ #define EC_PROTO_VERSION 0x00000002 /* Command version mask */ @@ -70,18 +76,22 @@ #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ /* The offset address of each type of data in mapped memory. */ -#define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors */ -#define EC_MEMMAP_FAN 0x10 /* Fan speeds */ -#define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* Temp sensors (second set) */ -#define EC_MEMMAP_ID 0x20 /* 'E' 'C' */ +#define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ +#define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */ +#define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */ +#define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */ #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ -#define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host command interface flags */ -#define EC_MEMMAP_SWITCHES 0x30 -#define EC_MEMMAP_HOST_EVENTS 0x34 +#define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */ +/* Unused 0x28 - 0x2f */ +#define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ +/* Unused 0x31 - 0x33 */ +#define EC_MEMMAP_HOST_EVENTS 0x34 /* 32 bits */ +/* Reserve 0x38 - 0x3f for additional host event-related stuff */ +/* Battery values are all 32 bits */ #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ @@ -90,10 +100,33 @@ #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ +/* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */ #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ +#define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */ +/* Unused 0x84 - 0x8f */ +#define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ +/* Unused 0x91 */ +#define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ +/* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ +/* 0x94 - 0x99: 1st Accelerometer */ +/* 0x9a - 0x9f: 2nd Accelerometer */ +#define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ +/* Unused 0xa6 - 0xdf */ + +/* + * ACPI is unable to access memory mapped data at or above this offset due to + * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe + * which might be needed by ACPI. + */ +#define EC_MEMMAP_NO_ACPI 0xe0 + +/* Define the format of the accelerometer mapped memory status byte. */ +#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f +#define EC_MEMMAP_ACC_STATUS_BUSY_BIT (1 << 4) +#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT (1 << 7) /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ #define EC_TEMP_SENSOR_ENTRIES 16 @@ -103,6 +136,8 @@ * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. */ #define EC_TEMP_SENSOR_B_ENTRIES 8 + +/* Special values for mapped temperature sensors */ #define EC_TEMP_SENSOR_NOT_PRESENT 0xff #define EC_TEMP_SENSOR_ERROR 0xfe #define EC_TEMP_SENSOR_NOT_POWERED 0xfd @@ -113,6 +148,18 @@ */ #define EC_TEMP_SENSOR_OFFSET 200 +/* + * Number of ALS readings at EC_MEMMAP_ALS + */ +#define EC_ALS_ENTRIES 2 + +/* + * The default value a temperature sensor will return when it is present but + * has not been read this boot. This is a reasonable number to avoid + * triggering alarms on the host. + */ +#define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET) + #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ @@ -142,9 +189,158 @@ #define EC_HOST_CMD_FLAG_VERSION_3 0x02 /* Wireless switch flags */ -#define EC_WIRELESS_SWITCH_WLAN 0x01 -#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 -#define EC_WIRELESS_SWITCH_WWAN 0x04 +#define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */ +#define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */ +#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */ +#define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ +#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ + +/*****************************************************************************/ +/* + * ACPI commands + * + * These are valid ONLY on the ACPI command/data port. + */ + +/* + * ACPI Read Embedded Controller + * + * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). + * + * Use the following sequence: + * + * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD + * - Wait for EC_LPC_CMDR_PENDING bit to clear + * - Write address to EC_LPC_ADDR_ACPI_DATA + * - Wait for EC_LPC_CMDR_DATA bit to set + * - Read value from EC_LPC_ADDR_ACPI_DATA + */ +#define EC_CMD_ACPI_READ 0x0080 + +/* + * ACPI Write Embedded Controller + * + * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). + * + * Use the following sequence: + * + * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD + * - Wait for EC_LPC_CMDR_PENDING bit to clear + * - Write address to EC_LPC_ADDR_ACPI_DATA + * - Wait for EC_LPC_CMDR_PENDING bit to clear + * - Write value to EC_LPC_ADDR_ACPI_DATA + */ +#define EC_CMD_ACPI_WRITE 0x0081 + +/* + * ACPI Burst Enable Embedded Controller + * + * This enables burst mode on the EC to allow the host to issue several + * commands back-to-back. While in this mode, writes to mapped multi-byte + * data are locked out to ensure data consistency. + */ +#define EC_CMD_ACPI_BURST_ENABLE 0x0082 + +/* + * ACPI Burst Disable Embedded Controller + * + * This disables burst mode on the EC and stops preventing EC writes to mapped + * multi-byte data. + */ +#define EC_CMD_ACPI_BURST_DISABLE 0x0083 + +/* + * ACPI Query Embedded Controller + * + * This clears the lowest-order bit in the currently pending host events, and + * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, + * event 0x80000000 = 32), or 0 if no event was pending. + */ +#define EC_CMD_ACPI_QUERY_EVENT 0x0084 + +/* Valid addresses in ACPI memory space, for read/write commands */ + +/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ +#define EC_ACPI_MEM_VERSION 0x00 +/* + * Test location; writing value here updates test compliment byte to (0xff - + * value). + */ +#define EC_ACPI_MEM_TEST 0x01 +/* Test compliment; writes here are ignored. */ +#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 + +/* Keyboard backlight brightness percent (0 - 100) */ +#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 +/* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ +#define EC_ACPI_MEM_FAN_DUTY 0x04 + +/* + * DPTF temp thresholds. Any of the EC's temp sensors can have up to two + * independent thresholds attached to them. The current value of the ID + * register determines which sensor is affected by the THRESHOLD and COMMIT + * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme + * as the memory-mapped sensors. The COMMIT register applies those settings. + * + * The spec does not mandate any way to read back the threshold settings + * themselves, but when a threshold is crossed the AP needs a way to determine + * which sensor(s) are responsible. Each reading of the ID register clears and + * returns one sensor ID that has crossed one of its threshold (in either + * direction) since the last read. A value of 0xFF means "no new thresholds + * have tripped". Setting or enabling the thresholds for a sensor will clear + * the unread event count for that sensor. + */ +#define EC_ACPI_MEM_TEMP_ID 0x05 +#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 +#define EC_ACPI_MEM_TEMP_COMMIT 0x07 +/* + * Here are the bits for the COMMIT register: + * bit 0 selects the threshold index for the chosen sensor (0/1) + * bit 1 enables/disables the selected threshold (0 = off, 1 = on) + * Each write to the commit register affects one threshold. + */ +#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0) +#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1) +/* + * Example: + * + * Set the thresholds for sensor 2 to 50 C and 60 C: + * write 2 to [0x05] -- select temp sensor 2 + * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET + * write 0x2 to [0x07] -- enable threshold 0 with this value + * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET + * write 0x3 to [0x07] -- enable threshold 1 with this value + * + * Disable the 60 C threshold, leaving the 50 C threshold unchanged: + * write 2 to [0x05] -- select temp sensor 2 + * write 0x1 to [0x07] -- disable threshold 1 + */ + +/* DPTF battery charging current limit */ +#define EC_ACPI_MEM_CHARGING_LIMIT 0x08 + +/* Charging limit is specified in 64 mA steps */ +#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 +/* Value to disable DPTF battery charging limit */ +#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff + +/* + * Report device orientation + * bit 0 device is tablet mode + */ +#define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 +#define EC_ACPI_MEM_DEVICE_TABLET_MODE 0x01 + +/* + * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data + * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. + */ +#define EC_ACPI_MEM_MAPPED_BEGIN 0x20 +#define EC_ACPI_MEM_MAPPED_SIZE 0xe0 + +/* Current version of ACPI memory address space */ +#define EC_ACPI_MEM_VERSION_CURRENT 2 + /* * This header file is used in coreboot both in C and ACPI code. The ACPI code @@ -161,6 +357,92 @@ #define __packed __attribute__((packed)) #endif +#ifndef __aligned +#define __aligned(x) __attribute__((aligned(x))) +#endif + +/* + * Attributes for EC request and response packets. Just defining __packed + * results in inefficient assembly code on ARM, if the structure is actually + * 32-bit aligned, as it should be for all buffers. + * + * Be very careful when adding these to existing structures. They will round + * up the structure size to the specified boundary. + * + * Also be very careful to make that if a structure is included in some other + * parent structure that the alignment will still be true given the packing of + * the parent structure. This is particularly important if the sub-structure + * will be passed as a pointer to another function, since that function will + * not know about the misaligment caused by the parent structure's packing. + * + * Also be very careful using __packed - particularly when nesting non-packed + * structures inside packed ones. In fact, DO NOT use __packed directly; + * always use one of these attributes. + * + * Once everything is annotated properly, the following search strings should + * not return ANY matches in this file other than right here: + * + * "__packed" - generates inefficient code; all sub-structs must also be packed + * + * "struct [^_]" - all structs should be annotated, except for structs that are + * members of other structs/unions (and their original declarations should be + * annotated). + */ +#ifdef CONFIG_HOSTCMD_ALIGNED + +/* + * Packed structures where offset and size are always aligned to 1, 2, or 4 + * byte boundary. + */ +#define __ec_align1 __packed +#define __ec_align2 __packed __aligned(2) +#define __ec_align4 __packed __aligned(4) + +/* + * Packed structure which must be under-aligned, because its size is not a + * 4-byte multiple. This is sub-optimal because it forces byte-wise access + * of all multi-byte fields in it, even though they are themselves aligned. + * + * In theory, we could duplicate the structure with __aligned(4) for accessing + * its members, but use the __packed version for sizeof(). + */ +#define __ec_align_size1 __packed + +/* + * Packed structure which must be under-aligned, because its offset inside a + * parent structure is not a 4-byte multiple. + */ +#define __ec_align_offset1 __packed +#define __ec_align_offset2 __packed __aligned(2) + +/* + * Structures which are complicated enough that I'm skipping them on the first + * pass. They are effectively unchanged from their previous definitions. + * + * TODO(rspangler): Figure out what to do with these. It's likely necessary + * to work out the size and offset of each member and add explicit padding to + * maintain those. + */ +#define __ec_todo_packed __packed +#define __ec_todo_unpacked + +#else /* !CONFIG_HOSTCMD_ALIGNED */ + +/* + * Packed structures make no assumption about alignment, so they do inefficient + * byte-wise reads. + */ +#define __ec_align1 __packed +#define __ec_align2 __packed +#define __ec_align4 __packed +#define __ec_align_size1 __packed +#define __ec_align_offset1 __packed +#define __ec_align_offset2 __packed +#define __ec_todo_packed __packed +#define __ec_todo_unpacked + +#endif /* !CONFIG_HOSTCMD_ALIGNED */ + /* LPC command status byte masks */ /* EC has written a byte in the data register and host hasn't read it yet */ #define EC_LPC_STATUS_TO_HOST 0x01 @@ -170,7 +452,7 @@ #define EC_LPC_STATUS_PROCESSING 0x04 /* Last write to EC was a command, not data */ #define EC_LPC_STATUS_LAST_CMD 0x08 -/* EC is in burst mode. Unsupported by Chrome EC, so this bit is never set */ +/* EC is in burst mode */ #define EC_LPC_STATUS_BURST_MODE 0x10 /* SCI event is pending (requesting SCI query) */ #define EC_LPC_STATUS_SCI_PENDING 0x20 @@ -186,7 +468,9 @@ #define EC_LPC_STATUS_BUSY_MASK \ (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) -/* Host command response codes */ +/* Host command response codes (16-bit). Note that response codes should be + * stored in a uint16_t rather than directly in a value of this type. + */ enum ec_status { EC_RES_SUCCESS = 0, EC_RES_INVALID_COMMAND = 1, @@ -202,7 +486,9 @@ enum ec_status { EC_RES_OVERFLOW = 11, /* Table / data overflow */ EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ - EC_RES_RESPONSE_TOO_BIG = 14 /* Response was too big to handle */ + EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ + EC_RES_BUS_ERROR = 15, /* Communications bus error */ + EC_RES_BUSY = 16 /* Up but too busy. Should retry */ }; /* @@ -222,7 +508,8 @@ enum host_event_code { EC_HOST_EVENT_BATTERY_CRITICAL = 7, EC_HOST_EVENT_BATTERY = 8, EC_HOST_EVENT_THERMAL_THRESHOLD = 9, - EC_HOST_EVENT_THERMAL_OVERLOAD = 10, + /* Event generated by a device attached to the EC */ + EC_HOST_EVENT_DEVICE = 10, EC_HOST_EVENT_THERMAL = 11, EC_HOST_EVENT_USB_CHARGER = 12, EC_HOST_EVENT_KEY_PRESSED = 13, @@ -240,6 +527,49 @@ enum host_event_code { /* Shutdown due to battery level too low */ EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, + /* Suggest that the AP throttle itself */ + EC_HOST_EVENT_THROTTLE_START = 18, + /* Suggest that the AP resume normal speed */ + EC_HOST_EVENT_THROTTLE_STOP = 19, + + /* Hang detect logic detected a hang and host event timeout expired */ + EC_HOST_EVENT_HANG_DETECT = 20, + /* Hang detect logic detected a hang and warm rebooted the AP */ + EC_HOST_EVENT_HANG_REBOOT = 21, + + /* PD MCU triggering host event */ + EC_HOST_EVENT_PD_MCU = 22, + + /* Battery Status flags have changed */ + EC_HOST_EVENT_BATTERY_STATUS = 23, + + /* EC encountered a panic, triggering a reset */ + EC_HOST_EVENT_PANIC = 24, + + /* Keyboard fastboot combo has been pressed */ + EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, + + /* EC RTC event occurred */ + EC_HOST_EVENT_RTC = 26, + + /* Emulate MKBP event */ + EC_HOST_EVENT_MKBP = 27, + + /* EC desires to change state of host-controlled USB mux */ + EC_HOST_EVENT_USB_MUX = 28, + + /* TABLET/LAPTOP mode event*/ + EC_HOST_EVENT_MODE_CHANGE = 29, + + /* Keyboard recovery combo with hardware reinitialization */ + EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, + + /* + * Reserve this last bit to indicate that at least one bit in a + * secondary host event word is set. See crbug.com/633646. + */ + EC_HOST_EVENT_EXTENDED = 31, + /* * The high bit of the event mask is not used as a host event code. If * it reads back as set, then the entire event mask should be @@ -250,10 +580,10 @@ enum host_event_code { EC_HOST_EVENT_INVALID = 32 }; /* Host event mask */ -#define EC_HOST_EVENT_MASK(event_code) (1UL << ((event_code) - 1)) +#define EC_HOST_EVENT_MASK(event_code) (1ULL << ((event_code) - 1)) /* Arguments at EC_LPC_ADDR_HOST_ARGS */ -struct ec_lpc_host_args { +struct __ec_align4 ec_lpc_host_args { uint8_t flags; uint8_t command_version; uint8_t data_size; @@ -262,7 +592,7 @@ struct ec_lpc_host_args { * all params/response data bytes. */ uint8_t checksum; -} __packed; +}; /* Flags for ec_lpc_host_args.flags */ /* @@ -272,7 +602,7 @@ struct ec_lpc_host_args { * If EC gets a command and this flag is not set, this is an old-style command. * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with * unknown length. EC must respond with an old-style response (that is, - * withouth setting EC_HOST_ARGS_FLAG_TO_HOST). + * without setting EC_HOST_ARGS_FLAG_TO_HOST). */ #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 /* @@ -285,6 +615,89 @@ struct ec_lpc_host_args { #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 /*****************************************************************************/ +/* + * Byte codes returned by EC over SPI interface. + * + * These can be used by the AP to debug the EC interface, and to determine + * when the EC is not in a state where it will ever get around to responding + * to the AP. + * + * Example of sequence of bytes read from EC for a current good transfer: + * 1. - - AP asserts chip select (CS#) + * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request + * 3. - - EC starts handling CS# interrupt + * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request + * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in + * bytes looking for EC_SPI_FRAME_START + * 6. - - EC finishes processing and sets up response + * 7. EC_SPI_FRAME_START - AP reads frame byte + * 8. (response packet) - AP reads response packet + * 9. EC_SPI_PAST_END - Any additional bytes read by AP + * 10 - - AP deasserts chip select + * 11 - - EC processes CS# interrupt and sets up DMA for + * next request + * + * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than + * the following byte values: + * EC_SPI_OLD_READY + * EC_SPI_RX_READY + * EC_SPI_RECEIVING + * EC_SPI_PROCESSING + * + * Then the EC found an error in the request, or was not ready for the request + * and lost data. The AP should give up waiting for EC_SPI_FRAME_START, + * because the EC is unable to tell when the AP is done sending its request. + */ + +/* + * Framing byte which precedes a response packet from the EC. After sending a + * request, the AP will clock in bytes until it sees the framing byte, then + * clock in the response packet. + */ +#define EC_SPI_FRAME_START 0xec + +/* + * Padding bytes which are clocked out after the end of a response packet. + */ +#define EC_SPI_PAST_END 0xed + +/* + * EC is ready to receive, and has ignored the byte sent by the AP. EC expects + * that the AP will send a valid packet header (starting with + * EC_COMMAND_PROTOCOL_3) in the next 32 bytes. + */ +#define EC_SPI_RX_READY 0xf8 + +/* + * EC has started receiving the request from the AP, but hasn't started + * processing it yet. + */ +#define EC_SPI_RECEIVING 0xf9 + +/* EC has received the entire request from the AP and is processing it. */ +#define EC_SPI_PROCESSING 0xfa + +/* + * EC received bad data from the AP, such as a packet header with an invalid + * length. EC will ignore all data until chip select deasserts. + */ +#define EC_SPI_RX_BAD_DATA 0xfb + +/* + * EC received data from the AP before it was ready. That is, the AP asserted + * chip select and started clocking data before the EC was ready to receive it. + * EC will ignore all data until chip select deasserts. + */ +#define EC_SPI_NOT_READY 0xfc + +/* + * EC was ready to receive a request from the AP. EC has treated the byte sent + * by the AP as part of a request packet, or (for old-style ECs) is processing + * a fully received packet but is not ready to respond yet. + */ +#define EC_SPI_OLD_READY 0xfd + +/*****************************************************************************/ /* * Protocol version 2 for I2C and SPI send a request this way: @@ -332,8 +745,8 @@ struct ec_lpc_host_args { #define EC_HOST_REQUEST_VERSION 3 /* Version 3 request from host */ -struct ec_host_request { - /* Struct version (=3) +struct __ec_align4 ec_host_request { + /* Structure version (=3) * * EC will return EC_RES_INVALID_HEADER if it receives a header with a * version it doesn't know how to parse. @@ -357,13 +770,13 @@ struct ec_host_request { /* Length of data which follows this header */ uint16_t data_len; -} __packed; +}; #define EC_HOST_RESPONSE_VERSION 3 /* Version 3 response from EC */ -struct ec_host_response { - /* Struct version (=3) */ +struct __ec_align4 ec_host_response { + /* Structure version (=3) */ uint8_t struct_version; /* @@ -380,18 +793,21 @@ struct ec_host_response { /* Unused bytes in current protocol version; set to 0 */ uint16_t reserved; -} __packed; +}; /*****************************************************************************/ /* * Notes on commands: * - * Each command is an 8-byte command value. Commands which take params or - * return response data specify structs for that data. If no struct is + * Each command is an 16-bit command value. Commands which take params or + * return response data specify structures for that data. If no structure is * specified, the command does not input or output data, respectively. * Parameter/response length is implicit in the structs. Some underlying * communication protocols (I2C, SPI) may add length or checksum headers, but * those are implementation-dependent and not defined here. + * + * All commands MUST be #defined to be 4-digit UPPER CASE hex values + * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. */ /*****************************************************************************/ @@ -401,28 +817,28 @@ struct ec_host_response { * Get protocol version, used to deal with non-backward compatible protocol * changes. */ -#define EC_CMD_PROTO_VERSION 0x00 +#define EC_CMD_PROTO_VERSION 0x0000 -struct ec_response_proto_version { +struct __ec_align4 ec_response_proto_version { uint32_t version; -} __packed; +}; /* * Hello. This is a simple command to test the EC is responsive to * commands. */ -#define EC_CMD_HELLO 0x01 +#define EC_CMD_HELLO 0x0001 -struct ec_params_hello { +struct __ec_align4 ec_params_hello { uint32_t in_data; /* Pass anything here */ -} __packed; +}; -struct ec_response_hello { +struct __ec_align4 ec_response_hello { uint32_t out_data; /* Output will be in_data + 0x01020304 */ -} __packed; +}; /* Get version number */ -#define EC_CMD_GET_VERSION 0x02 +#define EC_CMD_GET_VERSION 0x0002 enum ec_current_image { EC_IMAGE_UNKNOWN = 0, @@ -430,49 +846,49 @@ enum ec_current_image { EC_IMAGE_RW }; -struct ec_response_get_version { +struct __ec_align4 ec_response_get_version { /* Null-terminated version strings for RO, RW */ char version_string_ro[32]; char version_string_rw[32]; char reserved[32]; /* Was previously RW-B string */ uint32_t current_image; /* One of ec_current_image */ -} __packed; +}; /* Read test */ -#define EC_CMD_READ_TEST 0x03 +#define EC_CMD_READ_TEST 0x0003 -struct ec_params_read_test { +struct __ec_align4 ec_params_read_test { uint32_t offset; /* Starting value for read buffer */ uint32_t size; /* Size to read in bytes */ -} __packed; +}; -struct ec_response_read_test { +struct __ec_align4 ec_response_read_test { uint32_t data[32]; -} __packed; +}; /* * Get build information * * Response is null-terminated string. */ -#define EC_CMD_GET_BUILD_INFO 0x04 +#define EC_CMD_GET_BUILD_INFO 0x0004 /* Get chip info */ -#define EC_CMD_GET_CHIP_INFO 0x05 +#define EC_CMD_GET_CHIP_INFO 0x0005 -struct ec_response_get_chip_info { +struct __ec_align4 ec_response_get_chip_info { /* Null-terminated strings */ char vendor[32]; char name[32]; char revision[32]; /* Mask version */ -} __packed; +}; /* Get board HW version */ -#define EC_CMD_GET_BOARD_VERSION 0x06 +#define EC_CMD_GET_BOARD_VERSION 0x0006 -struct ec_response_board_version { +struct __ec_align2 ec_response_board_version { uint16_t board_version; /* A monotonously incrementing number. */ -} __packed; +}; /* * Read memory-mapped data. @@ -482,72 +898,73 @@ struct ec_response_board_version { * * Response is params.size bytes of data. */ -#define EC_CMD_READ_MEMMAP 0x07 +#define EC_CMD_READ_MEMMAP 0x0007 -struct ec_params_read_memmap { +struct __ec_align1 ec_params_read_memmap { uint8_t offset; /* Offset in memmap (EC_MEMMAP_*) */ uint8_t size; /* Size to read in bytes */ -} __packed; +}; /* Read versions supported for a command */ -#define EC_CMD_GET_CMD_VERSIONS 0x08 +#define EC_CMD_GET_CMD_VERSIONS 0x0008 -struct ec_params_get_cmd_versions { +struct __ec_align1 ec_params_get_cmd_versions { uint8_t cmd; /* Command to check */ -} __packed; +}; + +struct __ec_align2 ec_params_get_cmd_versions_v1 { + uint16_t cmd; /* Command to check */ +}; -struct ec_response_get_cmd_versions { +struct __ec_align4 ec_response_get_cmd_versions { /* * Mask of supported versions; use EC_VER_MASK() to compare with a * desired version. */ uint32_t version_mask; -} __packed; +}; /* - * Check EC communcations status (busy). This is needed on i2c/spi but not + * Check EC communications status (busy). This is needed on i2c/spi but not * on lpc since it has its own out-of-band busy indicator. * * lpc must read the status from the command register. Attempting this on * lpc will overwrite the args/parameter space and corrupt its data. */ -#define EC_CMD_GET_COMMS_STATUS 0x09 +#define EC_CMD_GET_COMMS_STATUS 0x0009 /* Avoid using ec_status which is for return values */ enum ec_comms_status { EC_COMMS_STATUS_PROCESSING = 1 << 0, /* Processing cmd */ }; -struct ec_response_get_comms_status { +struct __ec_align4 ec_response_get_comms_status { uint32_t flags; /* Mask of enum ec_comms_status */ -} __packed; +}; -/* - * Fake a variety of responses, purely for testing purposes. - * FIXME: Would be nice to force checksum errors. - */ -#define EC_CMD_TEST_PROTOCOL 0x0a +/* Fake a variety of responses, purely for testing purposes. */ +#define EC_CMD_TEST_PROTOCOL 0x000A /* Tell the EC what to send back to us. */ -struct ec_params_test_protocol { +struct __ec_align4 ec_params_test_protocol { uint32_t ec_result; uint32_t ret_len; uint8_t buf[32]; -} __packed; +}; /* Here it comes... */ -struct ec_response_test_protocol { +struct __ec_align4 ec_response_test_protocol { uint8_t buf[32]; -} __packed; +}; -/* Get prococol information */ -#define EC_CMD_GET_PROTOCOL_INFO 0x0b +/* Get protocol information */ +#define EC_CMD_GET_PROTOCOL_INFO 0x000B /* Flags for ec_response_get_protocol_info.flags */ /* EC_RES_IN_PROGRESS may be returned if a command is slow */ #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0) -struct ec_response_get_protocol_info { +struct __ec_align4 ec_response_get_protocol_info { /* Fields which exist if at least protocol version 3 supported */ /* Bitmask of protocol versions supported (1 << n means version n)*/ @@ -561,15 +978,153 @@ struct ec_response_get_protocol_info { /* Flags; see EC_PROTOCOL_INFO_* */ uint32_t flags; -} __packed; +}; + + +/*****************************************************************************/ +/* Get/Set miscellaneous values */ + +/* The upper byte of .flags tells what to do (nothing means "get") */ +#define EC_GSV_SET 0x80000000 + +/* The lower three bytes of .flags identifies the parameter, if that has + meaning for an individual command. */ +#define EC_GSV_PARAM_MASK 0x00ffffff + +struct __ec_align4 ec_params_get_set_value { + uint32_t flags; + uint32_t value; +}; + +struct __ec_align4 ec_response_get_set_value { + uint32_t flags; + uint32_t value; +}; + +/* More than one command can use these structs to get/set parameters. */ +#define EC_CMD_GSV_PAUSE_IN_S5 0x000C + +/*****************************************************************************/ +/* List the features supported by the firmware */ +#define EC_CMD_GET_FEATURES 0x000D + +/* Supported features */ +enum ec_feature_code { + /* + * This image contains a limited set of features. Another image + * in RW partition may support more features. + */ + EC_FEATURE_LIMITED = 0, + /* + * Commands for probing/reading/writing/erasing the flash in the + * EC are present. + */ + EC_FEATURE_FLASH = 1, + /* + * Can control the fan speed directly. + */ + EC_FEATURE_PWM_FAN = 2, + /* + * Can control the intensity of the keyboard backlight. + */ + EC_FEATURE_PWM_KEYB = 3, + /* + * Support Google lightbar, introduced on Pixel. + */ + EC_FEATURE_LIGHTBAR = 4, + /* Control of LEDs */ + EC_FEATURE_LED = 5, + /* Exposes an interface to control gyro and sensors. + * The host goes through the EC to access these sensors. + * In addition, the EC may provide composite sensors, like lid angle. + */ + EC_FEATURE_MOTION_SENSE = 6, + /* The keyboard is controlled by the EC */ + EC_FEATURE_KEYB = 7, + /* The AP can use part of the EC flash as persistent storage. */ + EC_FEATURE_PSTORE = 8, + /* The EC monitors BIOS port 80h, and can return POST codes. */ + EC_FEATURE_PORT80 = 9, + /* + * Thermal management: include TMP specific commands. + * Higher level than direct fan control. + */ + EC_FEATURE_THERMAL = 10, + /* Can switch the screen backlight on/off */ + EC_FEATURE_BKLIGHT_SWITCH = 11, + /* Can switch the wifi module on/off */ + EC_FEATURE_WIFI_SWITCH = 12, + /* Monitor host events, through for example SMI or SCI */ + EC_FEATURE_HOST_EVENTS = 13, + /* The EC exposes GPIO commands to control/monitor connected devices. */ + EC_FEATURE_GPIO = 14, + /* The EC can send i2c messages to downstream devices. */ + EC_FEATURE_I2C = 15, + /* Command to control charger are included */ + EC_FEATURE_CHARGER = 16, + /* Simple battery support. */ + EC_FEATURE_BATTERY = 17, + /* + * Support Smart battery protocol + * (Common Smart Battery System Interface Specification) + */ + EC_FEATURE_SMART_BATTERY = 18, + /* EC can detect when the host hangs. */ + EC_FEATURE_HANG_DETECT = 19, + /* Report power information, for pit only */ + EC_FEATURE_PMU = 20, + /* Another Cros EC device is present downstream of this one */ + EC_FEATURE_SUB_MCU = 21, + /* Support USB Power delivery (PD) commands */ + EC_FEATURE_USB_PD = 22, + /* Control USB multiplexer, for audio through USB port for instance. */ + EC_FEATURE_USB_MUX = 23, + /* Motion Sensor code has an internal software FIFO */ + EC_FEATURE_MOTION_SENSE_FIFO = 24, + /* Support temporary secure vstore */ + EC_FEATURE_VSTORE = 25, + /* EC decides on USB-C SS mux state, muxes configured by host */ + EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, + /* EC has RTC feature that can be controlled by host commands */ + EC_FEATURE_RTC = 27, + /* The MCU exposes a Fingerprint sensor */ + EC_FEATURE_FINGERPRINT = 28, + /* The MCU exposes a Touchpad */ + EC_FEATURE_TOUCHPAD = 29, + /* The MCU has RWSIG task enabled */ + EC_FEATURE_RWSIG = 30, + /* EC has device events support */ + EC_FEATURE_DEVICE_EVENT = 31, + /* EC supports the unified wake masks for LPC/eSPI systems */ + EC_FEATURE_UNIFIED_WAKE_MASKS = 32, +}; + +#define EC_FEATURE_MASK_0(event_code) (1UL << (event_code % 32)) +#define EC_FEATURE_MASK_1(event_code) (1UL << (event_code - 32)) +struct __ec_align4 ec_response_get_features { + uint32_t flags[2]; +}; + +/*****************************************************************************/ +/* Get the board's SKU ID from EC */ +#define EC_CMD_GET_SKU_ID 0x000E + +/* Set SKU ID from AP */ +#define EC_CMD_SET_SKU_ID 0x000F + +struct __ec_align4 ec_sku_id_info { + uint32_t sku_id; +}; /*****************************************************************************/ /* Flash commands */ /* Get flash info */ -#define EC_CMD_FLASH_INFO 0x10 +#define EC_CMD_FLASH_INFO 0x0010 +#define EC_VER_FLASH_INFO 2 -struct ec_response_flash_info { +/* Version 0 returns these fields */ +struct __ec_align4 ec_response_flash_info { /* Usable flash size, in bytes */ uint32_t flash_size; /* @@ -587,40 +1142,157 @@ struct ec_response_flash_info { * multiple of this. */ uint32_t protect_block_size; -} __packed; +}; + +/* Flags for version 1+ flash info command */ +/* EC flash erases bits to 0 instead of 1 */ +#define EC_FLASH_INFO_ERASE_TO_0 (1 << 0) + +/* Flash must be selected for read/write/erase operations to succeed. This may + * be necessary on a chip where write/erase can be corrupted by other board + * activity, or where the chip needs to enable some sort of programming voltage, + * or where the read/write/erase operations require cleanly suspending other + * chip functionality. */ +#define EC_FLASH_INFO_SELECT_REQUIRED (1 << 1) + +/* + * Version 1 returns the same initial fields as version 0, with additional + * fields following. + * + * gcc anonymous structs don't seem to get along with the __packed directive; + * if they did we'd define the version 0 structure as a sub-structure of this + * one. + * + * Version 2 supports flash banks of different sizes: + * The caller specified the number of banks it has preallocated + * (num_banks_desc) + * The EC returns the number of banks describing the flash memory. + * It adds banks descriptions up to num_banks_desc. + */ +struct __ec_align4 ec_response_flash_info_1 { + /* Version 0 fields; see above for description */ + uint32_t flash_size; + uint32_t write_block_size; + uint32_t erase_block_size; + uint32_t protect_block_size; + + /* Version 1 adds these fields: */ + /* + * Ideal write size in bytes. Writes will be fastest if size is + * exactly this and offset is a multiple of this. For example, an EC + * may have a write buffer which can do half-page operations if data is + * aligned, and a slower word-at-a-time write mode. + */ + uint32_t write_ideal_size; + + /* Flags; see EC_FLASH_INFO_* */ + uint32_t flags; +}; + +struct __ec_align4 ec_params_flash_info_2 { + /* Number of banks to describe */ + uint16_t num_banks_desc; + /* Reserved; set 0; ignore on read */ + uint8_t reserved[2]; +}; + +struct ec_flash_bank { + /* Number of sector is in this bank. */ + uint16_t count; + /* Size in power of 2 of each sector (8 --> 256 bytes) */ + uint8_t size_exp; + /* Minimal write size for the sectors in this bank */ + uint8_t write_size_exp; + /* Erase size for the sectors in this bank */ + uint8_t erase_size_exp; + /* Size for write protection, usually identical to erase size. */ + uint8_t protect_size_exp; + /* Reserved; set 0; ignore on read */ + uint8_t reserved[2]; +}; + +struct __ec_align4 ec_response_flash_info_2 { + /* Total flash in the EC. */ + uint32_t flash_size; + /* Flags; see EC_FLASH_INFO_* */ + uint32_t flags; + /* Maximum size to use to send data to write to the EC. */ + uint32_t write_ideal_size; + /* Number of banks present in the EC. */ + uint16_t num_banks_total; + /* Number of banks described in banks array. */ + uint16_t num_banks_desc; + struct ec_flash_bank banks[0]; +}; /* * Read flash * * Response is params.size bytes of data. */ -#define EC_CMD_FLASH_READ 0x11 +#define EC_CMD_FLASH_READ 0x0011 -struct ec_params_flash_read { +struct __ec_align4 ec_params_flash_read { uint32_t offset; /* Byte offset to read */ uint32_t size; /* Size to read in bytes */ -} __packed; +}; /* Write flash */ -#define EC_CMD_FLASH_WRITE 0x12 +#define EC_CMD_FLASH_WRITE 0x0012 #define EC_VER_FLASH_WRITE 1 /* Version 0 of the flash command supported only 64 bytes of data */ #define EC_FLASH_WRITE_VER0_SIZE 64 -struct ec_params_flash_write { +struct __ec_align4 ec_params_flash_write { uint32_t offset; /* Byte offset to write */ uint32_t size; /* Size to write in bytes */ /* Followed by data to write */ -} __packed; +}; /* Erase flash */ -#define EC_CMD_FLASH_ERASE 0x13 +#define EC_CMD_FLASH_ERASE 0x0013 -struct ec_params_flash_erase { +/* v0 */ +struct __ec_align4 ec_params_flash_erase { uint32_t offset; /* Byte offset to erase */ uint32_t size; /* Size to erase in bytes */ -} __packed; +}; + + +#define EC_VER_FLASH_WRITE 1 +/* v1 add async erase: + * subcommands can returns: + * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). + * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. + * EC_RES_ERROR : other errors. + * EC_RES_BUSY : an existing erase operation is in progress. + * EC_RES_ACCESS_DENIED: Trying to erase running image. + * + * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just + * properly queued. The user must call ERASE_GET_RESULT subcommand to get + * the proper result. + * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send + * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. + * ERASE_GET_RESULT command may timeout on EC where flash access is not + * permitted while erasing. (For instance, STM32F4). + */ +enum ec_flash_erase_cmd { + FLASH_ERASE_SECTOR, /* Erase and wait for result */ + FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ + FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ +}; + +struct __ec_align4 ec_params_flash_erase_v1 { + /* One of ec_flash_erase_cmd. */ + uint8_t cmd; + /* Pad byte; currently always contains 0 */ + uint8_t reserved; + /* No flags defined yet; set to 0 */ + uint16_t flag; + /* Same as v0 parameters. */ + struct ec_params_flash_erase params; +}; /* * Get/set flash protection. @@ -632,7 +1304,7 @@ struct ec_params_flash_erase { * * If mask=0, simply returns the current flags state. */ -#define EC_CMD_FLASH_PROTECT 0x15 +#define EC_CMD_FLASH_PROTECT 0x0015 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ /* Flags for flash protection */ @@ -655,15 +1327,23 @@ struct ec_params_flash_erase { * re-requesting the desired flags, or by a hard reset if that fails. */ #define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5) -/* Entile flash code protected when the EC boots */ +/* Entire flash code protected when the EC boots */ #define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6) - -struct ec_params_flash_protect { +/* RW flash code protected when the EC boots */ +#define EC_FLASH_PROTECT_RW_AT_BOOT (1 << 7) +/* RW flash code protected now. */ +#define EC_FLASH_PROTECT_RW_NOW (1 << 8) +/* Rollback information flash region protected when the EC boots */ +#define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT (1 << 9) +/* Rollback information flash region protected now */ +#define EC_FLASH_PROTECT_ROLLBACK_NOW (1 << 10) + +struct __ec_align4 ec_params_flash_protect { uint32_t mask; /* Bits in flags to apply */ uint32_t flags; /* New flags to apply */ -} __packed; +}; -struct ec_response_flash_protect { +struct __ec_align4 ec_response_flash_protect { /* Current value of flash protect flags */ uint32_t flags; /* @@ -674,7 +1354,7 @@ struct ec_response_flash_protect { uint32_t valid_flags; /* Flags which can be changed given the current protection state */ uint32_t writable_flags; -} __packed; +}; /* * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash @@ -682,89 +1362,166 @@ struct ec_response_flash_protect { */ /* Get the region offset/size */ -#define EC_CMD_FLASH_REGION_INFO 0x16 +#define EC_CMD_FLASH_REGION_INFO 0x0016 #define EC_VER_FLASH_REGION_INFO 1 enum ec_flash_region { /* Region which holds read-only EC image */ EC_FLASH_REGION_RO = 0, - /* Region which holds rewritable EC image */ - EC_FLASH_REGION_RW, + /* Region which holds active rewritable EC image */ + EC_FLASH_REGION_ACTIVE, /* * Region which should be write-protected in the factory (a superset of * EC_FLASH_REGION_RO) */ EC_FLASH_REGION_WP_RO, + /* Region which holds updatable image */ + EC_FLASH_REGION_UPDATE, /* Number of regions */ EC_FLASH_REGION_COUNT, }; -struct ec_params_flash_region_info { +struct __ec_align4 ec_params_flash_region_info { uint32_t region; /* enum ec_flash_region */ -} __packed; +}; -struct ec_response_flash_region_info { +struct __ec_align4 ec_response_flash_region_info { uint32_t offset; uint32_t size; -} __packed; +}; /* Read/write VbNvContext */ -#define EC_CMD_VBNV_CONTEXT 0x17 +#define EC_CMD_VBNV_CONTEXT 0x0017 #define EC_VER_VBNV_CONTEXT 1 #define EC_VBNV_BLOCK_SIZE 16 +#define EC_VBNV_BLOCK_SIZE_V2 64 enum ec_vbnvcontext_op { EC_VBNV_CONTEXT_OP_READ, EC_VBNV_CONTEXT_OP_WRITE, }; -struct ec_params_vbnvcontext { +struct __ec_align4 ec_params_vbnvcontext { uint32_t op; - uint8_t block[EC_VBNV_BLOCK_SIZE]; -} __packed; + uint8_t block[EC_VBNV_BLOCK_SIZE_V2]; +}; + +struct __ec_align4 ec_response_vbnvcontext { + uint8_t block[EC_VBNV_BLOCK_SIZE_V2]; +}; + -struct ec_response_vbnvcontext { - uint8_t block[EC_VBNV_BLOCK_SIZE]; -} __packed; +/* Get SPI flash information */ +#define EC_CMD_FLASH_SPI_INFO 0x0018 + +struct __ec_align1 ec_response_flash_spi_info { + /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ + uint8_t jedec[3]; + + /* Pad byte; currently always contains 0 */ + uint8_t reserved0; + + /* Manufacturer / device ID from command 0x90 */ + uint8_t mfr_dev_id[2]; + + /* Status registers from command 0x05 and 0x35 */ + uint8_t sr1, sr2; +}; + + +/* Select flash during flash operations */ +#define EC_CMD_FLASH_SELECT 0x0019 + +struct __ec_align4 ec_params_flash_select { + /* 1 to select flash, 0 to deselect flash */ + uint8_t select; +}; /*****************************************************************************/ /* PWM commands */ /* Get fan target RPM */ -#define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x20 +#define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 -struct ec_response_pwm_get_fan_rpm { +struct __ec_align4 ec_response_pwm_get_fan_rpm { uint32_t rpm; -} __packed; +}; /* Set target fan RPM */ -#define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x21 +#define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 -struct ec_params_pwm_set_fan_target_rpm { +/* Version 0 of input params */ +struct __ec_align4 ec_params_pwm_set_fan_target_rpm_v0 { uint32_t rpm; -} __packed; +}; + +/* Version 1 of input params */ +struct __ec_align_size1 ec_params_pwm_set_fan_target_rpm_v1 { + uint32_t rpm; + uint8_t fan_idx; +}; /* Get keyboard backlight */ -#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x22 +/* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ +#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 -struct ec_response_pwm_get_keyboard_backlight { +struct __ec_align1 ec_response_pwm_get_keyboard_backlight { uint8_t percent; uint8_t enabled; -} __packed; +}; /* Set keyboard backlight */ -#define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x23 +/* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ +#define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 -struct ec_params_pwm_set_keyboard_backlight { +struct __ec_align1 ec_params_pwm_set_keyboard_backlight { uint8_t percent; -} __packed; +}; /* Set target fan PWM duty cycle */ -#define EC_CMD_PWM_SET_FAN_DUTY 0x24 +#define EC_CMD_PWM_SET_FAN_DUTY 0x0024 + +/* Version 0 of input params */ +struct __ec_align4 ec_params_pwm_set_fan_duty_v0 { + uint32_t percent; +}; -struct ec_params_pwm_set_fan_duty { +/* Version 1 of input params */ +struct __ec_align_size1 ec_params_pwm_set_fan_duty_v1 { uint32_t percent; -} __packed; + uint8_t fan_idx; +}; + +#define EC_CMD_PWM_SET_DUTY 0x0025 +/* 16 bit duty cycle, 0xffff = 100% */ +#define EC_PWM_MAX_DUTY 0xffff + +enum ec_pwm_type { + /* All types, indexed by board-specific enum pwm_channel */ + EC_PWM_TYPE_GENERIC = 0, + /* Keyboard backlight */ + EC_PWM_TYPE_KB_LIGHT, + /* Display backlight */ + EC_PWM_TYPE_DISPLAY_LIGHT, + EC_PWM_TYPE_COUNT, +}; + +struct __ec_align4 ec_params_pwm_set_duty { + uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ + uint8_t pwm_type; /* ec_pwm_type */ + uint8_t index; /* Type-specific index, or 0 if unique */ +}; + +#define EC_CMD_PWM_GET_DUTY 0x0026 + +struct __ec_align1 ec_params_pwm_get_duty { + uint8_t pwm_type; /* ec_pwm_type */ + uint8_t index; /* Type-specific index, or 0 if unique */ +}; + +struct __ec_align2 ec_response_pwm_get_duty { + uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ +}; /*****************************************************************************/ /* @@ -773,9 +1530,9 @@ struct ec_params_pwm_set_fan_duty { * into a subcommand. We'll make separate structs for subcommands with * different input args, so that we know how much to expect. */ -#define EC_CMD_LIGHTBAR_CMD 0x28 +#define EC_CMD_LIGHTBAR_CMD 0x0028 -struct rgb_s { +struct __ec_todo_unpacked rgb_s { uint8_t r, g, b; }; @@ -783,17 +1540,17 @@ struct rgb_s { /* List of tweakable parameters. NOTE: It's __packed so it can be sent in a * host command, but the alignment is the same regardless. Keep it that way. */ -struct lightbar_params { +struct __ec_todo_packed lightbar_params_v0 { /* Timing */ - int google_ramp_up; - int google_ramp_down; - int s3s0_ramp_up; - int s0_tick_delay[2]; /* AC=0/1 */ - int s0a_tick_delay[2]; /* AC=0/1 */ - int s0s3_ramp_down; - int s3_sleep_for; - int s3_ramp_up; - int s3_ramp_down; + int32_t google_ramp_up; + int32_t google_ramp_down; + int32_t s3s0_ramp_up; + int32_t s0_tick_delay[2]; /* AC=0/1 */ + int32_t s0a_tick_delay[2]; /* AC=0/1 */ + int32_t s0s3_ramp_down; + int32_t s3_sleep_for; + int32_t s3_ramp_up; + int32_t s3_ramp_down; /* Oscillation */ uint8_t new_s0; @@ -815,52 +1572,221 @@ struct lightbar_params { /* Color palette */ struct rgb_s color[8]; /* 0-3 are Google colors */ -} __packed; +}; + +struct __ec_todo_packed lightbar_params_v1 { + /* Timing */ + int32_t google_ramp_up; + int32_t google_ramp_down; + int32_t s3s0_ramp_up; + int32_t s0_tick_delay[2]; /* AC=0/1 */ + int32_t s0a_tick_delay[2]; /* AC=0/1 */ + int32_t s0s3_ramp_down; + int32_t s3_sleep_for; + int32_t s3_ramp_up; + int32_t s3_ramp_down; + int32_t s5_ramp_up; + int32_t s5_ramp_down; + int32_t tap_tick_delay; + int32_t tap_gate_delay; + int32_t tap_display_time; + + /* Tap-for-battery params */ + uint8_t tap_pct_red; + uint8_t tap_pct_green; + uint8_t tap_seg_min_on; + uint8_t tap_seg_max_on; + uint8_t tap_seg_osc; + uint8_t tap_idx[3]; + + /* Oscillation */ + uint8_t osc_min[2]; /* AC=0/1 */ + uint8_t osc_max[2]; /* AC=0/1 */ + uint8_t w_ofs[2]; /* AC=0/1 */ + + /* Brightness limits based on the backlight and AC. */ + uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ + uint8_t bright_bl_on_min[2]; /* AC=0/1 */ + uint8_t bright_bl_on_max[2]; /* AC=0/1 */ + + /* Battery level thresholds */ + uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; + + /* Map [AC][battery_level] to color index */ + uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ + uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ + + /* s5: single color pulse on inhibited power-up */ + uint8_t s5_idx; + + /* Color palette */ + struct rgb_s color[8]; /* 0-3 are Google colors */ +}; + +/* Lightbar command params v2 + * crbug.com/467716 + * + * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by + * logical groups to make it more manageable ( < 120 bytes). + * + * NOTE: Each of these groups must be less than 120 bytes. + */ + +struct __ec_todo_packed lightbar_params_v2_timing { + /* Timing */ + int32_t google_ramp_up; + int32_t google_ramp_down; + int32_t s3s0_ramp_up; + int32_t s0_tick_delay[2]; /* AC=0/1 */ + int32_t s0a_tick_delay[2]; /* AC=0/1 */ + int32_t s0s3_ramp_down; + int32_t s3_sleep_for; + int32_t s3_ramp_up; + int32_t s3_ramp_down; + int32_t s5_ramp_up; + int32_t s5_ramp_down; + int32_t tap_tick_delay; + int32_t tap_gate_delay; + int32_t tap_display_time; +}; + +struct __ec_todo_packed lightbar_params_v2_tap { + /* Tap-for-battery params */ + uint8_t tap_pct_red; + uint8_t tap_pct_green; + uint8_t tap_seg_min_on; + uint8_t tap_seg_max_on; + uint8_t tap_seg_osc; + uint8_t tap_idx[3]; +}; + +struct __ec_todo_packed lightbar_params_v2_oscillation { + /* Oscillation */ + uint8_t osc_min[2]; /* AC=0/1 */ + uint8_t osc_max[2]; /* AC=0/1 */ + uint8_t w_ofs[2]; /* AC=0/1 */ +}; + +struct __ec_todo_packed lightbar_params_v2_brightness { + /* Brightness limits based on the backlight and AC. */ + uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ + uint8_t bright_bl_on_min[2]; /* AC=0/1 */ + uint8_t bright_bl_on_max[2]; /* AC=0/1 */ +}; + +struct __ec_todo_packed lightbar_params_v2_thresholds { + /* Battery level thresholds */ + uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; +}; + +struct __ec_todo_packed lightbar_params_v2_colors { + /* Map [AC][battery_level] to color index */ + uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ + uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ + + /* s5: single color pulse on inhibited power-up */ + uint8_t s5_idx; + + /* Color palette */ + struct rgb_s color[8]; /* 0-3 are Google colors */ +}; + +/* Lightbyte program. */ +#define EC_LB_PROG_LEN 192 +struct __ec_todo_unpacked lightbar_program { + uint8_t size; + uint8_t data[EC_LB_PROG_LEN]; +}; -struct ec_params_lightbar { +struct __ec_todo_packed ec_params_lightbar { uint8_t cmd; /* Command (see enum lightbar_command) */ union { - struct { + struct __ec_todo_unpacked { /* no args */ - } dump, off, on, init, get_seq, get_params; + } dump, off, on, init, get_seq, get_params_v0, get_params_v1, + version, get_brightness, get_demo, suspend, resume, + get_params_v2_timing, get_params_v2_tap, + get_params_v2_osc, get_params_v2_bright, + get_params_v2_thlds, get_params_v2_colors; - struct num { + struct __ec_todo_unpacked { uint8_t num; - } brightness, seq, demo; + } set_brightness, seq, demo; - struct reg { + struct __ec_todo_unpacked { uint8_t ctrl, reg, value; } reg; - struct rgb { + struct __ec_todo_unpacked { uint8_t led, red, green, blue; - } rgb; + } set_rgb; + + struct __ec_todo_unpacked { + uint8_t led; + } get_rgb; + + struct __ec_todo_unpacked { + uint8_t enable; + } manual_suspend_ctrl; + + struct lightbar_params_v0 set_params_v0; + struct lightbar_params_v1 set_params_v1; + + struct lightbar_params_v2_timing set_v2par_timing; + struct lightbar_params_v2_tap set_v2par_tap; + struct lightbar_params_v2_oscillation set_v2par_osc; + struct lightbar_params_v2_brightness set_v2par_bright; + struct lightbar_params_v2_thresholds set_v2par_thlds; + struct lightbar_params_v2_colors set_v2par_colors; - struct lightbar_params set_params; + struct lightbar_program set_program; }; -} __packed; +}; -struct ec_response_lightbar { +struct __ec_todo_packed ec_response_lightbar { union { - struct dump { - struct { + struct __ec_todo_unpacked { + struct __ec_todo_unpacked { uint8_t reg; uint8_t ic0; uint8_t ic1; } vals[23]; } dump; - struct get_seq { + struct __ec_todo_unpacked { uint8_t num; - } get_seq; + } get_seq, get_brightness, get_demo; + + struct lightbar_params_v0 get_params_v0; + struct lightbar_params_v1 get_params_v1; + + + struct lightbar_params_v2_timing get_params_v2_timing; + struct lightbar_params_v2_tap get_params_v2_tap; + struct lightbar_params_v2_oscillation get_params_v2_osc; + struct lightbar_params_v2_brightness get_params_v2_bright; + struct lightbar_params_v2_thresholds get_params_v2_thlds; + struct lightbar_params_v2_colors get_params_v2_colors; + + struct __ec_todo_unpacked { + uint32_t num; + uint32_t flags; + } version; - struct lightbar_params get_params; + struct __ec_todo_unpacked { + uint8_t red, green, blue; + } get_rgb; - struct { + struct __ec_todo_unpacked { /* no return params */ - } off, on, init, brightness, seq, reg, rgb, demo, set_params; + } off, on, init, set_brightness, seq, reg, set_rgb, + demo, set_params_v0, set_params_v1, + set_program, manual_suspend_ctrl, suspend, resume, + set_v2par_timing, set_v2par_tap, + set_v2par_osc, set_v2par_bright, set_v2par_thlds, + set_v2par_colors; }; -} __packed; +}; /* Lightbar commands */ enum lightbar_command { @@ -868,26 +1794,64 @@ enum lightbar_command { LIGHTBAR_CMD_OFF = 1, LIGHTBAR_CMD_ON = 2, LIGHTBAR_CMD_INIT = 3, - LIGHTBAR_CMD_BRIGHTNESS = 4, + LIGHTBAR_CMD_SET_BRIGHTNESS = 4, LIGHTBAR_CMD_SEQ = 5, LIGHTBAR_CMD_REG = 6, - LIGHTBAR_CMD_RGB = 7, + LIGHTBAR_CMD_SET_RGB = 7, LIGHTBAR_CMD_GET_SEQ = 8, LIGHTBAR_CMD_DEMO = 9, - LIGHTBAR_CMD_GET_PARAMS = 10, - LIGHTBAR_CMD_SET_PARAMS = 11, + LIGHTBAR_CMD_GET_PARAMS_V0 = 10, + LIGHTBAR_CMD_SET_PARAMS_V0 = 11, + LIGHTBAR_CMD_VERSION = 12, + LIGHTBAR_CMD_GET_BRIGHTNESS = 13, + LIGHTBAR_CMD_GET_RGB = 14, + LIGHTBAR_CMD_GET_DEMO = 15, + LIGHTBAR_CMD_GET_PARAMS_V1 = 16, + LIGHTBAR_CMD_SET_PARAMS_V1 = 17, + LIGHTBAR_CMD_SET_PROGRAM = 18, + LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, + LIGHTBAR_CMD_SUSPEND = 20, + LIGHTBAR_CMD_RESUME = 21, + LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, + LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, + LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, + LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, + LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, + LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, + LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, + LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, + LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, + LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, + LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, + LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, LIGHTBAR_NUM_CMDS }; /*****************************************************************************/ /* LED control commands */ -#define EC_CMD_LED_CONTROL 0x29 +#define EC_CMD_LED_CONTROL 0x0029 enum ec_led_id { + /* LED to indicate battery state of charge */ EC_LED_ID_BATTERY_LED = 0, - EC_LED_ID_POWER_BUTTON_LED, + /* + * LED to indicate system power state (on or in suspend). + * May be on power button or on C-panel. + */ + EC_LED_ID_POWER_LED, + /* LED on power adapter or its plug */ EC_LED_ID_ADAPTER_LED, + /* LED to indicate left side */ + EC_LED_ID_LEFT_LED, + /* LED to indicate right side */ + EC_LED_ID_RIGHT_LED, + /* LED to indicate recovery mode with HW_REINIT */ + EC_LED_ID_RECOVERY_HW_REINIT_LED, + /* LED to indicate sysrq debug mode. */ + EC_LED_ID_SYSRQ_DEBUG_LED, + + EC_LED_ID_COUNT }; /* LED control flags */ @@ -900,18 +1864,19 @@ enum ec_led_colors { EC_LED_COLOR_BLUE, EC_LED_COLOR_YELLOW, EC_LED_COLOR_WHITE, + EC_LED_COLOR_AMBER, EC_LED_COLOR_COUNT }; -struct ec_params_led_control { +struct __ec_align1 ec_params_led_control { uint8_t led_id; /* Which LED to control */ uint8_t flags; /* Control flags */ uint8_t brightness[EC_LED_COLOR_COUNT]; -} __packed; +}; -struct ec_response_led_control { +struct __ec_align1 ec_response_led_control { /* * Available brightness value range. * @@ -920,7 +1885,7 @@ struct ec_response_led_control { * Other values means the LED is control by PWM. */ uint8_t brightness_range[EC_LED_COLOR_COUNT]; -} __packed; +}; /*****************************************************************************/ /* Verified boot commands */ @@ -931,9 +1896,9 @@ struct ec_response_led_control { */ /* Verified boot hash command */ -#define EC_CMD_VBOOT_HASH 0x2A +#define EC_CMD_VBOOT_HASH 0x002A -struct ec_params_vboot_hash { +struct __ec_align4 ec_params_vboot_hash { uint8_t cmd; /* enum ec_vboot_hash_cmd */ uint8_t hash_type; /* enum ec_vboot_hash_type */ uint8_t nonce_size; /* Nonce size; may be 0 */ @@ -941,9 +1906,9 @@ struct ec_params_vboot_hash { uint32_t offset; /* Offset in flash to hash */ uint32_t size; /* Number of bytes to hash */ uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ -} __packed; +}; -struct ec_response_vboot_hash { +struct __ec_align4 ec_response_vboot_hash { uint8_t status; /* enum ec_vboot_hash_status */ uint8_t hash_type; /* enum ec_vboot_hash_type */ uint8_t digest_size; /* Size of hash digest in bytes */ @@ -951,7 +1916,7 @@ struct ec_response_vboot_hash { uint32_t offset; /* Offset in flash which was hashed */ uint32_t size; /* Number of bytes hashed */ uint8_t hash_digest[64]; /* Hash digest data */ -} __packed; +}; enum ec_vboot_hash_cmd { EC_VBOOT_HASH_GET = 0, /* Get current hash status */ @@ -975,19 +1940,515 @@ enum ec_vboot_hash_status { * If one of these is specified, the EC will automatically update offset and * size to the correct values for the specified image (RO or RW). */ -#define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe -#define EC_VBOOT_HASH_OFFSET_RW 0xfffffffd +#define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe +#define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd +#define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc + +/*****************************************************************************/ +/* + * Motion sense commands. We'll make separate structs for sub-commands with + * different input args, so that we know how much to expect. + */ +#define EC_CMD_MOTION_SENSE_CMD 0x002B + +/* Motion sense commands */ +enum motionsense_command { + /* + * Dump command returns all motion sensor data including motion sense + * module flags and individual sensor flags. + */ + MOTIONSENSE_CMD_DUMP = 0, + + /* + * Info command returns data describing the details of a given sensor, + * including enum motionsensor_type, enum motionsensor_location, and + * enum motionsensor_chip. + */ + MOTIONSENSE_CMD_INFO = 1, + + /* + * EC Rate command is a setter/getter command for the EC sampling rate + * in milliseconds. + * It is per sensor, the EC run sample task at the minimum of all + * sensors EC_RATE. + * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR + * to collect all the sensor samples. + * For sensor with hardware FIFO, EC_RATE is used as the maximal delay + * to process of all motion sensors in milliseconds. + */ + MOTIONSENSE_CMD_EC_RATE = 2, + + /* + * Sensor ODR command is a setter/getter command for the output data + * rate of a specific motion sensor in millihertz. + */ + MOTIONSENSE_CMD_SENSOR_ODR = 3, + + /* + * Sensor range command is a setter/getter command for the range of + * a specified motion sensor in +/-G's or +/- deg/s. + */ + MOTIONSENSE_CMD_SENSOR_RANGE = 4, + + /* + * Setter/getter command for the keyboard wake angle. When the lid + * angle is greater than this value, keyboard wake is disabled in S3, + * and when the lid angle goes less than this value, keyboard wake is + * enabled. Note, the lid angle measurement is an approximate, + * un-calibrated value, hence the wake angle isn't exact. + */ + MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5, + + /* + * Returns a single sensor data. + */ + MOTIONSENSE_CMD_DATA = 6, + + /* + * Return sensor fifo info. + */ + MOTIONSENSE_CMD_FIFO_INFO = 7, + + /* + * Insert a flush element in the fifo and return sensor fifo info. + * The host can use that element to synchronize its operation. + */ + MOTIONSENSE_CMD_FIFO_FLUSH = 8, + + /* + * Return a portion of the fifo. + */ + MOTIONSENSE_CMD_FIFO_READ = 9, + + /* + * Perform low level calibration. + * On sensors that support it, ask to do offset calibration. + */ + MOTIONSENSE_CMD_PERFORM_CALIB = 10, + + /* + * Sensor Offset command is a setter/getter command for the offset + * used for calibration. + * The offsets can be calculated by the host, or via + * PERFORM_CALIB command. + */ + MOTIONSENSE_CMD_SENSOR_OFFSET = 11, + + /* + * List available activities for a MOTION sensor. + * Indicates if they are enabled or disabled. + */ + MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, + + /* + * Activity management + * Enable/Disable activity recognition. + */ + MOTIONSENSE_CMD_SET_ACTIVITY = 13, + + /* + * Lid Angle + */ + MOTIONSENSE_CMD_LID_ANGLE = 14, + + /* + * Allow the FIFO to trigger interrupt via MKBP events. + * By default the FIFO does not send interrupt to process the FIFO + * until the AP is ready or it is coming from a wakeup sensor. + */ + MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, + + /* + * Spoof the readings of the sensors. The spoofed readings can be set + * to arbitrary values, or will lock to the last read actual values. + */ + MOTIONSENSE_CMD_SPOOF = 16, + + /* Number of motionsense sub-commands. */ + MOTIONSENSE_NUM_CMDS +}; + +/* List of motion sensor types. */ +enum motionsensor_type { + MOTIONSENSE_TYPE_ACCEL = 0, + MOTIONSENSE_TYPE_GYRO = 1, + MOTIONSENSE_TYPE_MAG = 2, + MOTIONSENSE_TYPE_PROX = 3, + MOTIONSENSE_TYPE_LIGHT = 4, + MOTIONSENSE_TYPE_ACTIVITY = 5, + MOTIONSENSE_TYPE_BARO = 6, + MOTIONSENSE_TYPE_MAX, +}; + +/* List of motion sensor locations. */ +enum motionsensor_location { + MOTIONSENSE_LOC_BASE = 0, + MOTIONSENSE_LOC_LID = 1, + MOTIONSENSE_LOC_MAX, +}; + +/* List of motion sensor chips. */ +enum motionsensor_chip { + MOTIONSENSE_CHIP_KXCJ9 = 0, + MOTIONSENSE_CHIP_LSM6DS0 = 1, + MOTIONSENSE_CHIP_BMI160 = 2, + MOTIONSENSE_CHIP_SI1141 = 3, + MOTIONSENSE_CHIP_SI1142 = 4, + MOTIONSENSE_CHIP_SI1143 = 5, + MOTIONSENSE_CHIP_KX022 = 6, + MOTIONSENSE_CHIP_L3GD20H = 7, + MOTIONSENSE_CHIP_BMA255 = 8, + MOTIONSENSE_CHIP_BMP280 = 9, + MOTIONSENSE_CHIP_OPT3001 = 10, +}; + +struct __ec_todo_packed ec_response_motion_sensor_data { + /* Flags for each sensor. */ + uint8_t flags; + /* sensor number the data comes from */ + uint8_t sensor_num; + /* Each sensor is up to 3-axis. */ + union { + int16_t data[3]; + struct __ec_todo_packed { + uint16_t reserved; + uint32_t timestamp; + }; + struct __ec_todo_unpacked { + uint8_t activity; /* motionsensor_activity */ + uint8_t state; + int16_t add_info[2]; + }; + }; +}; + +/* Note: used in ec_response_get_next_data */ +struct __ec_todo_packed ec_response_motion_sense_fifo_info { + /* Size of the fifo */ + uint16_t size; + /* Amount of space used in the fifo */ + uint16_t count; + /* Timestamp recorded in us */ + uint32_t timestamp; + /* Total amount of vector lost */ + uint16_t total_lost; + /* Lost events since the last fifo_info, per sensors */ + uint16_t lost[0]; +}; + +struct __ec_todo_packed ec_response_motion_sense_fifo_data { + uint32_t number_data; + struct ec_response_motion_sensor_data data[0]; +}; + +/* List supported activity recognition */ +enum motionsensor_activity { + MOTIONSENSE_ACTIVITY_RESERVED = 0, + MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, + MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, +}; + +struct __ec_todo_unpacked ec_motion_sense_activity { + uint8_t sensor_num; + uint8_t activity; /* one of enum motionsensor_activity */ + uint8_t enable; /* 1: enable, 0: disable */ + uint8_t reserved; + uint16_t parameters[3]; /* activity dependent parameters */ +}; + +/* Module flag masks used for the dump sub-command. */ +#define MOTIONSENSE_MODULE_FLAG_ACTIVE (1<<0) + +/* Sensor flag masks used for the dump sub-command. */ +#define MOTIONSENSE_SENSOR_FLAG_PRESENT (1<<0) + +/* + * Flush entry for synchronization. + * data contains time stamp + */ +#define MOTIONSENSE_SENSOR_FLAG_FLUSH (1<<0) +#define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP (1<<1) +#define MOTIONSENSE_SENSOR_FLAG_WAKEUP (1<<2) +#define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE (1<<3) + +/* + * Send this value for the data element to only perform a read. If you + * send any other value, the EC will interpret it as data to set and will + * return the actual value set. + */ +#define EC_MOTION_SENSE_NO_VALUE -1 + +#define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 + +/* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ +/* Set Calibration information */ +#define MOTION_SENSE_SET_OFFSET 1 + +#define LID_ANGLE_UNRELIABLE 500 + +enum motionsense_spoof_mode { + /* Disable spoof mode. */ + MOTIONSENSE_SPOOF_MODE_DISABLE = 0, + + /* Enable spoof mode, but use provided component values. */ + MOTIONSENSE_SPOOF_MODE_CUSTOM, + + /* Enable spoof mode, but use the current sensor values. */ + MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, + + /* Query the current spoof mode status for the sensor. */ + MOTIONSENSE_SPOOF_MODE_QUERY, +}; + +struct __ec_todo_packed ec_params_motion_sense { + uint8_t cmd; + union { + /* Used for MOTIONSENSE_CMD_DUMP */ + struct __ec_todo_unpacked { + /* + * Maximal number of sensor the host is expecting. + * 0 means the host is only interested in the number + * of sensors controlled by the EC. + */ + uint8_t max_sensor_count; + } dump; + + /* + * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. + */ + struct __ec_todo_unpacked { + /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. + * kb_wake_angle: angle to wakup AP. + */ + int16_t data; + } kb_wake_angle; + + /* Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA + * and MOTIONSENSE_CMD_PERFORM_CALIB. */ + struct __ec_todo_unpacked { + uint8_t sensor_num; + } info, info_3, data, fifo_flush, perform_calib, + list_activities; + + /* + * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR + * and MOTIONSENSE_CMD_SENSOR_RANGE. + */ + struct __ec_todo_unpacked { + uint8_t sensor_num; + + /* Rounding flag, true for round-up, false for down. */ + uint8_t roundup; + + uint16_t reserved; + + /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ + int32_t data; + } ec_rate, sensor_odr, sensor_range; + + /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ + struct __ec_todo_packed { + uint8_t sensor_num; + + /* + * bit 0: If set (MOTION_SENSE_SET_OFFSET), set + * the calibration information in the EC. + * If unset, just retrieve calibration information. + */ + uint16_t flags; + + /* + * Temperature at calibration, in units of 0.01 C + * 0x8000: invalid / unknown. + * 0x0: 0C + * 0x7fff: +327.67C + */ + int16_t temp; + + /* + * Offset for calibration. + * Unit: + * Accelerometer: 1/1024 g + * Gyro: 1/1024 deg/s + * Compass: 1/16 uT + */ + int16_t offset[3]; + } sensor_offset; + + /* Used for MOTIONSENSE_CMD_FIFO_INFO */ + struct __ec_todo_unpacked { + } fifo_info; + + /* Used for MOTIONSENSE_CMD_FIFO_READ */ + struct __ec_todo_unpacked { + /* + * Number of expected vector to return. + * EC may return less or 0 if none available. + */ + uint32_t max_data_vector; + } fifo_read; + + struct ec_motion_sense_activity set_activity; + + /* Used for MOTIONSENSE_CMD_LID_ANGLE */ + struct __ec_todo_unpacked { + } lid_angle; + + /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ + struct __ec_todo_unpacked { + /* + * 1: enable, 0 disable fifo, + * EC_MOTION_SENSE_NO_VALUE return value. + */ + int8_t enable; + } fifo_int_enable; + + /* Used for MOTIONSENSE_CMD_SPOOF */ + struct __ec_todo_packed { + uint8_t sensor_id; + + /* See enum motionsense_spoof_mode. */ + uint8_t spoof_enable; + + /* Ignored, used for alignment. */ + uint8_t reserved; + + /* Individual component values to spoof. */ + int16_t components[3]; + } spoof; + }; +}; + +struct __ec_todo_packed ec_response_motion_sense { + union { + /* Used for MOTIONSENSE_CMD_DUMP */ + struct __ec_todo_unpacked { + /* Flags representing the motion sensor module. */ + uint8_t module_flags; + + /* Number of sensors managed directly by the EC */ + uint8_t sensor_count; + + /* + * sensor data is truncated if response_max is too small + * for holding all the data. + */ + struct ec_response_motion_sensor_data sensor[0]; + } dump; + + /* Used for MOTIONSENSE_CMD_INFO. */ + struct __ec_todo_unpacked { + /* Should be element of enum motionsensor_type. */ + uint8_t type; + + /* Should be element of enum motionsensor_location. */ + uint8_t location; + + /* Should be element of enum motionsensor_chip. */ + uint8_t chip; + } info; + + /* Used for MOTIONSENSE_CMD_INFO version 3 */ + struct __ec_todo_unpacked { + /* Should be element of enum motionsensor_type. */ + uint8_t type; + + /* Should be element of enum motionsensor_location. */ + uint8_t location; + + /* Should be element of enum motionsensor_chip. */ + uint8_t chip; + + /* Minimum sensor sampling frequency */ + uint32_t min_frequency; + + /* Maximum sensor sampling frequency */ + uint32_t max_frequency; + + /* Max number of sensor events that could be in fifo */ + uint32_t fifo_max_event_count; + } info_3; + + /* Used for MOTIONSENSE_CMD_DATA */ + struct ec_response_motion_sensor_data data; + + /* + * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, + * MOTIONSENSE_CMD_SENSOR_RANGE, + * MOTIONSENSE_CMD_KB_WAKE_ANGLE, + * MOTIONSENSE_CMD_FIFO_INT_ENABLE and + * MOTIONSENSE_CMD_SPOOF. + */ + struct __ec_todo_unpacked { + /* Current value of the parameter queried. */ + int32_t ret; + } ec_rate, sensor_odr, sensor_range, kb_wake_angle, + fifo_int_enable, spoof; + + /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ + struct __ec_todo_unpacked { + int16_t temp; + int16_t offset[3]; + } sensor_offset, perform_calib; + + struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; + + struct ec_response_motion_sense_fifo_data fifo_read; + + struct __ec_todo_packed { + uint16_t reserved; + uint32_t enabled; + uint32_t disabled; + } list_activities; + + struct __ec_todo_unpacked { + } set_activity; + + /* Used for MOTIONSENSE_CMD_LID_ANGLE */ + struct __ec_todo_unpacked { + /* + * Angle between 0 and 360 degree if available, + * LID_ANGLE_UNRELIABLE otherwise. + */ + uint16_t value; + } lid_angle; + }; +}; + +/*****************************************************************************/ +/* Force lid open command */ + +/* Make lid event always open */ +#define EC_CMD_FORCE_LID_OPEN 0x002C + +struct __ec_align1 ec_params_force_lid_open { + uint8_t enabled; +}; + +/*****************************************************************************/ +/* Configure the behavior of the power button */ +#define EC_CMD_CONFIG_POWER_BUTTON 0x002D + +enum ec_config_power_button_flags { + /* Enable/Disable power button pulses for x86 devices */ + EC_POWER_BUTTON_ENABLE_PULSE = (1 << 0), +}; + +struct __ec_align1 ec_params_config_power_button { + /* See enum ec_config_power_button_flags */ + uint8_t flags; +}; /*****************************************************************************/ /* USB charging control commands */ /* Set USB port charging mode */ -#define EC_CMD_USB_CHARGE_SET_MODE 0x30 +#define EC_CMD_USB_CHARGE_SET_MODE 0x0030 -struct ec_params_usb_charge_set_mode { +struct __ec_align1 ec_params_usb_charge_set_mode { uint8_t usb_port_id; uint8_t mode; -} __packed; +}; /*****************************************************************************/ /* Persistent storage for host */ @@ -996,118 +2457,285 @@ struct ec_params_usb_charge_set_mode { #define EC_PSTORE_SIZE_MAX 64 /* Get persistent storage info */ -#define EC_CMD_PSTORE_INFO 0x40 +#define EC_CMD_PSTORE_INFO 0x0040 -struct ec_response_pstore_info { +struct __ec_align4 ec_response_pstore_info { /* Persistent storage size, in bytes */ uint32_t pstore_size; /* Access size; read/write offset and size must be a multiple of this */ uint32_t access_size; -} __packed; +}; /* * Read persistent storage * * Response is params.size bytes of data. */ -#define EC_CMD_PSTORE_READ 0x41 +#define EC_CMD_PSTORE_READ 0x0041 -struct ec_params_pstore_read { +struct __ec_align4 ec_params_pstore_read { uint32_t offset; /* Byte offset to read */ uint32_t size; /* Size to read in bytes */ -} __packed; +}; /* Write persistent storage */ -#define EC_CMD_PSTORE_WRITE 0x42 +#define EC_CMD_PSTORE_WRITE 0x0042 -struct ec_params_pstore_write { +struct __ec_align4 ec_params_pstore_write { uint32_t offset; /* Byte offset to write */ uint32_t size; /* Size to write in bytes */ uint8_t data[EC_PSTORE_SIZE_MAX]; -} __packed; +}; /*****************************************************************************/ /* Real-time clock */ /* RTC params and response structures */ -struct ec_params_rtc { +struct __ec_align4 ec_params_rtc { uint32_t time; -} __packed; +}; -struct ec_response_rtc { +struct __ec_align4 ec_response_rtc { uint32_t time; -} __packed; +}; /* These use ec_response_rtc */ -#define EC_CMD_RTC_GET_VALUE 0x44 -#define EC_CMD_RTC_GET_ALARM 0x45 +#define EC_CMD_RTC_GET_VALUE 0x0044 +#define EC_CMD_RTC_GET_ALARM 0x0045 /* These all use ec_params_rtc */ -#define EC_CMD_RTC_SET_VALUE 0x46 -#define EC_CMD_RTC_SET_ALARM 0x47 +#define EC_CMD_RTC_SET_VALUE 0x0046 +#define EC_CMD_RTC_SET_ALARM 0x0047 + +/* Pass as time param to SET_ALARM to clear the current alarm */ +#define EC_RTC_ALARM_CLEAR 0 /*****************************************************************************/ /* Port80 log access */ +/* Maximum entries that can be read/written in a single command */ +#define EC_PORT80_SIZE_MAX 32 + /* Get last port80 code from previous boot */ -#define EC_CMD_PORT80_LAST_BOOT 0x48 +#define EC_CMD_PORT80_LAST_BOOT 0x0048 +#define EC_CMD_PORT80_READ 0x0048 + +enum ec_port80_subcmd { + EC_PORT80_GET_INFO = 0, + EC_PORT80_READ_BUFFER, +}; + +struct __ec_todo_packed ec_params_port80_read { + uint16_t subcmd; + union { + struct __ec_todo_unpacked { + uint32_t offset; + uint32_t num_entries; + } read_buffer; + }; +}; -struct ec_response_port80_last_boot { +struct __ec_todo_packed ec_response_port80_read { + union { + struct __ec_todo_unpacked { + uint32_t writes; + uint32_t history_size; + uint32_t last_boot; + } get_info; + struct __ec_todo_unpacked { + uint16_t codes[EC_PORT80_SIZE_MAX]; + } data; + }; +}; + +struct __ec_align2 ec_response_port80_last_boot { uint16_t code; -} __packed; +}; /*****************************************************************************/ -/* Thermal engine commands */ +/* Temporary secure storage for host verified boot use */ + +/* Number of bytes in a vstore slot */ +#define EC_VSTORE_SLOT_SIZE 64 + +/* Maximum number of vstore slots */ +#define EC_VSTORE_SLOT_MAX 32 + +/* Get persistent storage info */ +#define EC_CMD_VSTORE_INFO 0x0049 +struct __ec_align_size1 ec_response_vstore_info { + /* Indicates which slots are locked */ + uint32_t slot_locked; + /* Total number of slots available */ + uint8_t slot_count; +}; + +/* + * Read temporary secure storage + * + * Response is EC_VSTORE_SLOT_SIZE bytes of data. + */ +#define EC_CMD_VSTORE_READ 0x004A + +struct __ec_align1 ec_params_vstore_read { + uint8_t slot; /* Slot to read from */ +}; + +struct __ec_align1 ec_response_vstore_read { + uint8_t data[EC_VSTORE_SLOT_SIZE]; +}; + +/* + * Write temporary secure storage and lock it. + */ +#define EC_CMD_VSTORE_WRITE 0x004B + +struct __ec_align1 ec_params_vstore_write { + uint8_t slot; /* Slot to write to */ + uint8_t data[EC_VSTORE_SLOT_SIZE]; +}; + +/*****************************************************************************/ +/* Thermal engine commands. Note that there are two implementations. We'll + * reuse the command number, but the data and behavior is incompatible. + * Version 0 is what originally shipped on Link. + * Version 1 separates the CPU thermal limits from the fan control. + */ + +#define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 +#define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 -/* Set thershold value */ -#define EC_CMD_THERMAL_SET_THRESHOLD 0x50 +/* The version 0 structs are opaque. You have to know what they are for + * the get/set commands to make any sense. + */ -struct ec_params_thermal_set_threshold { +/* Version 0 - set */ +struct __ec_align2 ec_params_thermal_set_threshold { uint8_t sensor_type; uint8_t threshold_id; uint16_t value; -} __packed; - -/* Get threshold value */ -#define EC_CMD_THERMAL_GET_THRESHOLD 0x51 +}; -struct ec_params_thermal_get_threshold { +/* Version 0 - get */ +struct __ec_align1 ec_params_thermal_get_threshold { uint8_t sensor_type; uint8_t threshold_id; -} __packed; +}; -struct ec_response_thermal_get_threshold { +struct __ec_align2 ec_response_thermal_get_threshold { uint16_t value; -} __packed; +}; + + +/* The version 1 structs are visible. */ +enum ec_temp_thresholds { + EC_TEMP_THRESH_WARN = 0, + EC_TEMP_THRESH_HIGH, + EC_TEMP_THRESH_HALT, + + EC_TEMP_THRESH_COUNT +}; + +/* + * Thermal configuration for one temperature sensor. Temps are in degrees K. + * Zero values will be silently ignored by the thermal task. + * + * Note that this structure is a sub-structure of + * ec_params_thermal_set_threshold_v1, but maintains its alignment there. + */ +struct __ec_align4 ec_thermal_config { + uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ + uint32_t temp_fan_off; /* no active cooling needed */ + uint32_t temp_fan_max; /* max active cooling needed */ +}; + +/* Version 1 - get config for one sensor. */ +struct __ec_align4 ec_params_thermal_get_threshold_v1 { + uint32_t sensor_num; +}; +/* This returns a struct ec_thermal_config */ + +/* Version 1 - set config for one sensor. + * Use read-modify-write for best results! */ +struct __ec_align4 ec_params_thermal_set_threshold_v1 { + uint32_t sensor_num; + struct ec_thermal_config cfg; +}; +/* This returns no data */ + +/****************************************************************************/ /* Toggle automatic fan control */ -#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x52 +#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 -/* Get TMP006 calibration data */ -#define EC_CMD_TMP006_GET_CALIBRATION 0x53 +/* Version 1 of input params */ +struct __ec_align1 ec_params_auto_fan_ctrl_v1 { + uint8_t fan_idx; +}; + +/* Get/Set TMP006 calibration data */ +#define EC_CMD_TMP006_GET_CALIBRATION 0x0053 +#define EC_CMD_TMP006_SET_CALIBRATION 0x0054 + +/* + * The original TMP006 calibration only needed four params, but now we need + * more. Since the algorithm is nothing but magic numbers anyway, we'll leave + * the params opaque. The v1 "get" response will include the algorithm number + * and how many params it requires. That way we can change the EC code without + * needing to update this file. We can also use a different algorithm on each + * sensor. + */ -struct ec_params_tmp006_get_calibration { +/* This is the same struct for both v0 and v1. */ +struct __ec_align1 ec_params_tmp006_get_calibration { uint8_t index; -} __packed; +}; -struct ec_response_tmp006_get_calibration { +/* Version 0 */ +struct __ec_align4 ec_response_tmp006_get_calibration_v0 { float s0; float b0; float b1; float b2; -} __packed; - -/* Set TMP006 calibration data */ -#define EC_CMD_TMP006_SET_CALIBRATION 0x54 +}; -struct ec_params_tmp006_set_calibration { +struct __ec_align4 ec_params_tmp006_set_calibration_v0 { uint8_t index; - uint8_t reserved[3]; /* Reserved; set 0 */ + uint8_t reserved[3]; float s0; float b0; float b1; float b2; -} __packed; +}; + +/* Version 1 */ +struct __ec_align4 ec_response_tmp006_get_calibration_v1 { + uint8_t algorithm; + uint8_t num_params; + uint8_t reserved[2]; + float val[0]; +}; + +struct __ec_align4 ec_params_tmp006_set_calibration_v1 { + uint8_t index; + uint8_t algorithm; + uint8_t num_params; + uint8_t reserved; + float val[0]; +}; + + +/* Read raw TMP006 data */ +#define EC_CMD_TMP006_GET_RAW 0x0055 + +struct __ec_align1 ec_params_tmp006_get_raw { + uint8_t index; +}; + +struct __ec_align4 ec_response_tmp006_get_raw { + int32_t t; /* In 1/100 K */ + int32_t v; /* In nV */ +}; /*****************************************************************************/ /* MKBP - Matrix KeyBoard Protocol */ @@ -1117,30 +2745,81 @@ struct ec_params_tmp006_set_calibration { * * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for * expected response size. + * + * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish + * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type + * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. */ -#define EC_CMD_MKBP_STATE 0x60 +#define EC_CMD_MKBP_STATE 0x0060 -/* Provide information about the matrix : number of rows and columns */ -#define EC_CMD_MKBP_INFO 0x61 +/* + * Provide information about various MKBP things. See enum ec_mkbp_info_type. + */ +#define EC_CMD_MKBP_INFO 0x0061 -struct ec_response_mkbp_info { +struct __ec_align_size1 ec_response_mkbp_info { uint32_t rows; uint32_t cols; - uint8_t switches; -} __packed; + /* Formerly "switches", which was 0. */ + uint8_t reserved; +}; + +struct __ec_align1 ec_params_mkbp_info { + uint8_t info_type; + uint8_t event_type; +}; + +enum ec_mkbp_info_type { + /* + * Info about the keyboard matrix: number of rows and columns. + * + * Returns struct ec_response_mkbp_info. + */ + EC_MKBP_INFO_KBD = 0, + + /* + * For buttons and switches, info about which specifically are + * supported. event_type must be set to one of the values in enum + * ec_mkbp_event. + * + * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte + * bitmask indicating which buttons or switches are present. See the + * bit inidices below. + */ + EC_MKBP_INFO_SUPPORTED = 1, + + /* + * Instantaneous state of buttons and switches. + * + * event_type must be set to one of the values in enum ec_mkbp_event. + * + * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13] + * indicating the current state of the keyboard matrix. + * + * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw + * event state. + * + * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the + * state of supported buttons. + * + * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the + * state of supported switches. + */ + EC_MKBP_INFO_CURRENT = 2, +}; /* Simulate key press */ -#define EC_CMD_MKBP_SIMULATE_KEY 0x62 +#define EC_CMD_MKBP_SIMULATE_KEY 0x0062 -struct ec_params_mkbp_simulate_key { +struct __ec_align1 ec_params_mkbp_simulate_key { uint8_t col; uint8_t row; uint8_t pressed; -} __packed; +}; /* Configure keyboard scanning */ -#define EC_CMD_MKBP_SET_CONFIG 0x64 -#define EC_CMD_MKBP_GET_CONFIG 0x65 +#define EC_CMD_MKBP_SET_CONFIG 0x0064 +#define EC_CMD_MKBP_GET_CONFIG 0x0065 /* flags */ enum mkbp_config_flags { @@ -1157,8 +2836,13 @@ enum mkbp_config_valid { EC_MKBP_VALID_FIFO_MAX_DEPTH = 1 << 7, }; -/* Configuration for our key scanning algorithm */ -struct ec_mkbp_config { +/* + * Configuration for our key scanning algorithm. + * + * Note that this is used as a sub-structure of + * ec_{params/response}_mkbp_get_config. + */ +struct __ec_align_size1 ec_mkbp_config { uint32_t valid_mask; /* valid fields */ uint8_t flags; /* some flags (enum mkbp_config_flags) */ uint8_t valid_flags; /* which flags are valid */ @@ -1177,18 +2861,18 @@ struct ec_mkbp_config { uint16_t debounce_up_us; /* time for debounce on key up */ /* maximum depth to allow for fifo (0 = no keyscan output) */ uint8_t fifo_max_depth; -} __packed; +}; -struct ec_params_mkbp_set_config { +struct __ec_align_size1 ec_params_mkbp_set_config { struct ec_mkbp_config config; -} __packed; +}; -struct ec_response_mkbp_get_config { +struct __ec_align_size1 ec_response_mkbp_get_config { struct ec_mkbp_config config; -} __packed; +}; /* Run the key scan emulation */ -#define EC_CMD_KEYSCAN_SEQ_CTRL 0x66 +#define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 enum ec_keyscan_seq_cmd { EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ @@ -1206,20 +2890,20 @@ enum ec_collect_flags { EC_KEYSCAN_SEQ_FLAG_DONE = 1 << 0, }; -struct ec_collect_item { +struct __ec_align1 ec_collect_item { uint8_t flags; /* some flags (enum ec_collect_flags) */ }; -struct ec_params_keyscan_seq_ctrl { +struct __ec_todo_packed ec_params_keyscan_seq_ctrl { uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ union { - struct { + struct __ec_align1 { uint8_t active; /* still active */ uint8_t num_items; /* number of items */ /* Current item being presented */ uint8_t cur_item; } status; - struct { + struct __ec_todo_unpacked { /* * Absolute time for this scan, measured from the * start of the sequence. @@ -1227,37 +2911,124 @@ struct ec_params_keyscan_seq_ctrl { uint32_t time_us; uint8_t scan[0]; /* keyscan data */ } add; - struct { + struct __ec_align1 { uint8_t start_item; /* First item to return */ uint8_t num_items; /* Number of items to return */ } collect; }; -} __packed; +}; -struct ec_result_keyscan_seq_ctrl { +struct __ec_todo_packed ec_result_keyscan_seq_ctrl { union { - struct { + struct __ec_todo_unpacked { uint8_t num_items; /* Number of items */ /* Data for each item */ struct ec_collect_item item[0]; } collect; }; -} __packed; +}; + +/* + * Get the next pending MKBP event. + * + * Returns EC_RES_UNAVAILABLE if there is no event pending. + */ +#define EC_CMD_GET_NEXT_EVENT 0x0067 + +enum ec_mkbp_event { + /* Keyboard matrix changed. The event data is the new matrix state. */ + EC_MKBP_EVENT_KEY_MATRIX = 0, + + /* New host event. The event data is 4 bytes of host event flags. */ + EC_MKBP_EVENT_HOST_EVENT = 1, + + /* New Sensor FIFO data. The event data is fifo_info structure. */ + EC_MKBP_EVENT_SENSOR_FIFO = 2, + + /* The state of the non-matrixed buttons have changed. */ + EC_MKBP_EVENT_BUTTON = 3, + + /* The state of the switches have changed. */ + EC_MKBP_EVENT_SWITCH = 4, + + /* New Fingerprint sensor event, the event data is fp_events bitmap. */ + EC_MKBP_EVENT_FINGERPRINT = 5, + + /* + * Sysrq event: send emulated sysrq. The event data is sysrq, + * corresponding to the key to be pressed. + */ + EC_MKBP_EVENT_SYSRQ = 6, + + /* Number of MKBP events */ + EC_MKBP_EVENT_COUNT, +}; + +union __ec_align_offset1 ec_response_get_next_data { + uint8_t key_matrix[13]; + + /* Unaligned */ + uint32_t host_event; + + struct __ec_todo_unpacked { + /* For aligning the fifo_info */ + uint8_t reserved[3]; + struct ec_response_motion_sense_fifo_info info; + } sensor_fifo; + + uint32_t buttons; + + uint32_t switches; + + uint32_t fp_events; + + uint32_t sysrq; +}; + +struct __ec_align1 ec_response_get_next_event { + uint8_t event_type; + /* Followed by event data if any */ + union ec_response_get_next_data data; +}; + +/* Bit indices for buttons and switches.*/ +/* Buttons */ +#define EC_MKBP_POWER_BUTTON 0 +#define EC_MKBP_VOL_UP 1 +#define EC_MKBP_VOL_DOWN 2 +#define EC_MKBP_RECOVERY 3 + +/* Switches */ +#define EC_MKBP_LID_OPEN 0 +#define EC_MKBP_TABLET_MODE 1 + +/* Run keyboard factory test scanning */ +#define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 + +struct __ec_align2 ec_response_keyboard_factory_test { + uint16_t shorted; /* Keyboard pins are shorted */ +}; + +/* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ +#define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) +#define EC_MKBP_FP_FINGER_DOWN (1 << 29) +#define EC_MKBP_FP_FINGER_UP (1 << 30) +#define EC_MKBP_FP_IMAGE_READY (1 << 31) /*****************************************************************************/ /* Temperature sensor commands */ /* Read temperature sensor info */ -#define EC_CMD_TEMP_SENSOR_GET_INFO 0x70 +#define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 -struct ec_params_temp_sensor_get_info { +struct __ec_align1 ec_params_temp_sensor_get_info { uint8_t id; -} __packed; +}; -struct ec_response_temp_sensor_get_info { +struct __ec_align1 ec_response_temp_sensor_get_info { char sensor_name[32]; uint8_t sensor_type; -} __packed; +}; /*****************************************************************************/ @@ -1270,129 +3041,314 @@ struct ec_response_temp_sensor_get_info { /*****************************************************************************/ /* Host event commands */ + +/* Obsolete. New implementation should use EC_CMD_PROGRAM_HOST_EVENT instead */ /* * Host event mask params and response structures, shared by all of the host * event commands below. */ -struct ec_params_host_event_mask { +struct __ec_align4 ec_params_host_event_mask { uint32_t mask; -} __packed; +}; -struct ec_response_host_event_mask { +struct __ec_align4 ec_response_host_event_mask { uint32_t mask; -} __packed; +}; /* These all use ec_response_host_event_mask */ -#define EC_CMD_HOST_EVENT_GET_B 0x87 -#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x88 -#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x89 -#define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x8d +#define EC_CMD_HOST_EVENT_GET_B 0x0087 +#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 +#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 +#define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D /* These all use ec_params_host_event_mask */ -#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x8a -#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x8b -#define EC_CMD_HOST_EVENT_CLEAR 0x8c -#define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x8e -#define EC_CMD_HOST_EVENT_CLEAR_B 0x8f +#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A +#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B +#define EC_CMD_HOST_EVENT_CLEAR 0x008C +#define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E +#define EC_CMD_HOST_EVENT_CLEAR_B 0x008F + +/* + * Unified host event programming interface - Should be used by newer versions + * of BIOS/OS to program host events and masks + */ + +struct __ec_align4 ec_params_host_event { + + /* Action requested by host - one of enum ec_host_event_action. */ + uint8_t action; + + /* + * Mask type that the host requested the action on - one of + * enum ec_host_event_mask_type. + */ + uint8_t mask_type; + + /* Set to 0, ignore on read */ + uint16_t reserved; + + /* Value to be used in case of set operations. */ + uint64_t value; +}; + +/* + * Response structure returned by EC_CMD_HOST_EVENT. + * Update the value on a GET request. Set to 0 on GET/CLEAR + */ + +struct __ec_align4 ec_response_host_event { + + /* Mask value in case of get operation */ + uint64_t value; +}; + +enum ec_host_event_action { + /* + * params.value is ignored. Value of mask_type populated + * in response.value + */ + EC_HOST_EVENT_GET, + + /* Bits in params.value are set */ + EC_HOST_EVENT_SET, + + /* Bits in params.value are cleared */ + EC_HOST_EVENT_CLEAR, +}; + +enum ec_host_event_mask_type { + + /* Main host event copy */ + EC_HOST_EVENT_MAIN, + + /* Copy B of host events */ + EC_HOST_EVENT_B, + + /* SCI Mask */ + EC_HOST_EVENT_SCI_MASK, + + /* SMI Mask */ + EC_HOST_EVENT_SMI_MASK, + + /* Mask of events that should be always reported in hostevents */ + EC_HOST_EVENT_ALWAYS_REPORT_MASK, + + /* Active wake mask */ + EC_HOST_EVENT_ACTIVE_WAKE_MASK, + + /* Lazy wake mask for S0ix */ + EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, + + /* Lazy wake mask for S3 */ + EC_HOST_EVENT_LAZY_WAKE_MASK_S3, + + /* Lazy wake mask for S5 */ + EC_HOST_EVENT_LAZY_WAKE_MASK_S5, +}; + +#define EC_CMD_HOST_EVENT 0x00A4 /*****************************************************************************/ /* Switch commands */ /* Enable/disable LCD backlight */ -#define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x90 +#define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 -struct ec_params_switch_enable_backlight { +struct __ec_align1 ec_params_switch_enable_backlight { uint8_t enabled; -} __packed; +}; /* Enable/disable WLAN/Bluetooth */ -#define EC_CMD_SWITCH_ENABLE_WIRELESS 0x91 +#define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 +#define EC_VER_SWITCH_ENABLE_WIRELESS 1 -struct ec_params_switch_enable_wireless { +/* Version 0 params; no response */ +struct __ec_align1 ec_params_switch_enable_wireless_v0 { uint8_t enabled; -} __packed; +}; + +/* Version 1 params */ +struct __ec_align1 ec_params_switch_enable_wireless_v1 { + /* Flags to enable now */ + uint8_t now_flags; + + /* Which flags to copy from now_flags */ + uint8_t now_mask; + + /* + * Flags to leave enabled in S3, if they're on at the S0->S3 + * transition. (Other flags will be disabled by the S0->S3 + * transition.) + */ + uint8_t suspend_flags; + + /* Which flags to copy from suspend_flags */ + uint8_t suspend_mask; +}; + +/* Version 1 response */ +struct __ec_align1 ec_response_switch_enable_wireless_v1 { + /* Flags to enable now */ + uint8_t now_flags; + + /* Flags to leave enabled in S3 */ + uint8_t suspend_flags; +}; /*****************************************************************************/ /* GPIO commands. Only available on EC if write protect has been disabled. */ /* Set GPIO output value */ -#define EC_CMD_GPIO_SET 0x92 +#define EC_CMD_GPIO_SET 0x0092 -struct ec_params_gpio_set { +struct __ec_align1 ec_params_gpio_set { char name[32]; uint8_t val; -} __packed; +}; /* Get GPIO value */ -#define EC_CMD_GPIO_GET 0x93 +#define EC_CMD_GPIO_GET 0x0093 -struct ec_params_gpio_get { +/* Version 0 of input params and response */ +struct __ec_align1 ec_params_gpio_get { char name[32]; -} __packed; -struct ec_response_gpio_get { +}; + +struct __ec_align1 ec_response_gpio_get { uint8_t val; -} __packed; +}; + +/* Version 1 of input params and response */ +struct __ec_align1 ec_params_gpio_get_v1 { + uint8_t subcmd; + union { + struct __ec_align1 { + char name[32]; + } get_value_by_name; + struct __ec_align1 { + uint8_t index; + } get_info; + }; +}; + +struct __ec_todo_packed ec_response_gpio_get_v1 { + union { + struct __ec_align1 { + uint8_t val; + } get_value_by_name, get_count; + struct __ec_todo_unpacked { + uint8_t val; + char name[32]; + uint32_t flags; + } get_info; + }; +}; + +enum gpio_get_subcmd { + EC_GPIO_GET_BY_NAME = 0, + EC_GPIO_GET_COUNT = 1, + EC_GPIO_GET_INFO = 2, +}; /*****************************************************************************/ /* I2C commands. Only available when flash write protect is unlocked. */ +/* + * CAUTION: These commands are deprecated, and are not supported anymore in EC + * builds >= 8398.0.0 (see crosbug.com/p/23570). + * + * Use EC_CMD_I2C_PASSTHRU instead. + */ + /* Read I2C bus */ -#define EC_CMD_I2C_READ 0x94 +#define EC_CMD_I2C_READ 0x0094 -struct ec_params_i2c_read { +struct __ec_align_size1 ec_params_i2c_read { uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ uint8_t read_size; /* Either 8 or 16. */ uint8_t port; uint8_t offset; -} __packed; -struct ec_response_i2c_read { +}; + +struct __ec_align2 ec_response_i2c_read { uint16_t data; -} __packed; +}; /* Write I2C bus */ -#define EC_CMD_I2C_WRITE 0x95 +#define EC_CMD_I2C_WRITE 0x0095 -struct ec_params_i2c_write { +struct __ec_align_size1 ec_params_i2c_write { uint16_t data; uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ uint8_t write_size; /* Either 8 or 16. */ uint8_t port; uint8_t offset; -} __packed; +}; /*****************************************************************************/ /* Charge state commands. Only available when flash write protect unlocked. */ -/* Force charge state machine to stop in idle mode */ -#define EC_CMD_CHARGE_FORCE_IDLE 0x96 +/* Force charge state machine to stop charging the battery or force it to + * discharge the battery. + */ +#define EC_CMD_CHARGE_CONTROL 0x0096 +#define EC_VER_CHARGE_CONTROL 1 -struct ec_params_force_idle { - uint8_t enabled; -} __packed; +enum ec_charge_control_mode { + CHARGE_CONTROL_NORMAL = 0, + CHARGE_CONTROL_IDLE, + CHARGE_CONTROL_DISCHARGE, +}; + +struct __ec_align4 ec_params_charge_control { + uint32_t mode; /* enum charge_control_mode */ +}; /*****************************************************************************/ /* Console commands. Only available when flash write protect is unlocked. */ /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ -#define EC_CMD_CONSOLE_SNAPSHOT 0x97 +#define EC_CMD_CONSOLE_SNAPSHOT 0x0097 /* - * Read next chunk of data from saved snapshot. + * Read data from the saved snapshot. If the subcmd parameter is + * CONSOLE_READ_NEXT, this will return data starting from the beginning of + * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the + * end of the previous snapshot. + * + * The params are only looked at in version >= 1 of this command. Prior + * versions will just default to CONSOLE_READ_NEXT behavior. * * Response is null-terminated string. Empty string, if there is no more * remaining output. */ -#define EC_CMD_CONSOLE_READ 0x98 +#define EC_CMD_CONSOLE_READ 0x0098 + +enum ec_console_read_subcmd { + CONSOLE_READ_NEXT = 0, + CONSOLE_READ_RECENT +}; + +struct __ec_align1 ec_params_console_read_v1 { + uint8_t subcmd; /* enum ec_console_read_subcmd */ +}; /*****************************************************************************/ /* - * Cut off battery power output if the battery supports. + * Cut off battery power immediately or after the host has shut down. * - * For unsupported battery, just don't implement this command and lets EC - * return EC_RES_INVALID_COMMAND. + * return EC_RES_INVALID_COMMAND if unsupported by a board/battery. + * EC_RES_SUCCESS if the command was successful. + * EC_RES_ERROR if the cut off command failed. */ -#define EC_CMD_BATTERY_CUT_OFF 0x99 +#define EC_CMD_BATTERY_CUT_OFF 0x0099 + +#define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN (1 << 0) + +struct __ec_align1 ec_params_battery_cutoff { + uint8_t flags; +}; /*****************************************************************************/ /* USB port mux control. */ @@ -1400,11 +3356,11 @@ struct ec_params_force_idle { /* * Switch USB mux or return to automatic switching. */ -#define EC_CMD_USB_MUX 0x9a +#define EC_CMD_USB_MUX 0x009A -struct ec_params_usb_mux { +struct __ec_align1 ec_params_usb_mux { uint8_t mux; -} __packed; +}; /*****************************************************************************/ /* LDOs / FETs control. */ @@ -1417,25 +3373,25 @@ enum ec_ldo_state { /* * Switch on/off a LDO. */ -#define EC_CMD_LDO_SET 0x9b +#define EC_CMD_LDO_SET 0x009B -struct ec_params_ldo_set { +struct __ec_align1 ec_params_ldo_set { uint8_t index; uint8_t state; -} __packed; +}; /* * Get LDO state. */ -#define EC_CMD_LDO_GET 0x9c +#define EC_CMD_LDO_GET 0x009C -struct ec_params_ldo_get { +struct __ec_align1 ec_params_ldo_get { uint8_t index; -} __packed; +}; -struct ec_response_ldo_get { +struct __ec_align1 ec_response_ldo_get { uint8_t state; -} __packed; +}; /*****************************************************************************/ /* Power info. */ @@ -1443,23 +3399,20 @@ struct ec_response_ldo_get { /* * Get power info. */ -#define EC_CMD_POWER_INFO 0x9d +#define EC_CMD_POWER_INFO 0x009D -struct ec_response_power_info { +struct __ec_align4 ec_response_power_info { uint32_t usb_dev_type; uint16_t voltage_ac; uint16_t voltage_system; uint16_t current_system; uint16_t usb_current_limit; -} __packed; +}; /*****************************************************************************/ /* I2C passthru command */ -#define EC_CMD_I2C_PASSTHRU 0x9e - -/* Slave address is 10 (not 7) bit */ -#define EC_I2C_FLAG_10BIT (1 << 16) +#define EC_CMD_I2C_PASSTHRU 0x009E /* Read data; if not present, message is a write */ #define EC_I2C_FLAG_READ (1 << 15) @@ -1473,111 +3426,434 @@ struct ec_response_power_info { /* Any error */ #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) -struct ec_params_i2c_passthru_msg { +struct __ec_align2 ec_params_i2c_passthru_msg { uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ uint16_t len; /* Number of bytes to read or write */ -} __packed; +}; -struct ec_params_i2c_passthru { +struct __ec_align2 ec_params_i2c_passthru { uint8_t port; /* I2C port number */ uint8_t num_msgs; /* Number of messages */ struct ec_params_i2c_passthru_msg msg[]; /* Data to write for all messages is concatenated here */ -} __packed; +}; -struct ec_response_i2c_passthru { +struct __ec_align1 ec_response_i2c_passthru { uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ uint8_t num_msgs; /* Number of messages processed */ uint8_t data[]; /* Data read by messages concatenated here */ -} __packed; +}; + +/*****************************************************************************/ +/* Power button hang detect */ + +#define EC_CMD_HANG_DETECT 0x009F + +/* Reasons to start hang detection timer */ +/* Power button pressed */ +#define EC_HANG_START_ON_POWER_PRESS (1 << 0) + +/* Lid closed */ +#define EC_HANG_START_ON_LID_CLOSE (1 << 1) + /* Lid opened */ +#define EC_HANG_START_ON_LID_OPEN (1 << 2) + +/* Start of AP S3->S0 transition (booting or resuming from suspend) */ +#define EC_HANG_START_ON_RESUME (1 << 3) + +/* Reasons to cancel hang detection */ + +/* Power button released */ +#define EC_HANG_STOP_ON_POWER_RELEASE (1 << 8) + +/* Any host command from AP received */ +#define EC_HANG_STOP_ON_HOST_COMMAND (1 << 9) + +/* Stop on end of AP S0->S3 transition (suspending or shutting down) */ +#define EC_HANG_STOP_ON_SUSPEND (1 << 10) + +/* + * If this flag is set, all the other fields are ignored, and the hang detect + * timer is started. This provides the AP a way to start the hang timer + * without reconfiguring any of the other hang detect settings. Note that + * you must previously have configured the timeouts. + */ +#define EC_HANG_START_NOW (1 << 30) + +/* + * If this flag is set, all the other fields are ignored (including + * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer + * without reconfiguring any of the other hang detect settings. + */ +#define EC_HANG_STOP_NOW (1 << 31) + +struct __ec_align4 ec_params_hang_detect { + /* Flags; see EC_HANG_* */ + uint32_t flags; + + /* Timeout in msec before generating host event, if enabled */ + uint16_t host_event_timeout_msec; + + /* Timeout in msec before generating warm reboot, if enabled */ + uint16_t warm_reboot_timeout_msec; +}; /*****************************************************************************/ -/* Temporary debug commands. TODO: remove this crosbug.com/p/13849 */ +/* Commands for battery charging */ /* - * Dump charge state machine context. - * - * Response is a binary dump of charge state machine context. + * This is the single catch-all host command to exchange data regarding the + * charge state machine (v2 and up). + */ +#define EC_CMD_CHARGE_STATE 0x00A0 + +/* Subcommands for this host command */ +enum charge_state_command { + CHARGE_STATE_CMD_GET_STATE, + CHARGE_STATE_CMD_GET_PARAM, + CHARGE_STATE_CMD_SET_PARAM, + CHARGE_STATE_NUM_CMDS +}; + +/* + * Known param numbers are defined here. Ranges are reserved for board-specific + * params, which are handled by the particular implementations. */ -#define EC_CMD_CHARGE_DUMP 0xa0 +enum charge_state_params { + CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */ + CS_PARAM_CHG_CURRENT, /* charger current limit */ + CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ + CS_PARAM_CHG_STATUS, /* charger-specific status */ + CS_PARAM_CHG_OPTION, /* charger-specific options */ + CS_PARAM_LIMIT_POWER, /* + * Check if power is limited due to + * low battery and / or a weak external + * charger. READ ONLY. + */ + /* How many so far? */ + CS_NUM_BASE_PARAMS, + + /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */ + CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, + CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, + + /* Other custom param ranges go here... */ +}; + +struct __ec_todo_packed ec_params_charge_state { + uint8_t cmd; /* enum charge_state_command */ + union { + struct __ec_align1 { + /* no args */ + } get_state; + + struct __ec_todo_unpacked { + uint32_t param; /* enum charge_state_param */ + } get_param; + + struct __ec_todo_unpacked { + uint32_t param; /* param to set */ + uint32_t value; /* value to set */ + } set_param; + }; +}; + +struct __ec_align4 ec_response_charge_state { + union { + struct __ec_align4 { + int ac; + int chg_voltage; + int chg_current; + int chg_input_current; + int batt_state_of_charge; + } get_state; + + struct __ec_align4 { + uint32_t value; + } get_param; + struct __ec_align4 { + /* no return values */ + } set_param; + }; +}; + /* * Set maximum battery charging current. */ -#define EC_CMD_CHARGE_CURRENT_LIMIT 0xa1 +#define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 -struct ec_params_current_limit { +struct __ec_align4 ec_params_current_limit { uint32_t limit; /* in mA */ -} __packed; +}; /* - * Set maximum external power current. + * Set maximum external voltage / current. */ -#define EC_CMD_EXT_POWER_CURRENT_LIMIT 0xa2 +#define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2 -struct ec_params_ext_power_current_limit { - uint32_t limit; /* in mA */ -} __packed; +/* Command v0 is used only on Spring and is obsolete + unsupported */ +struct __ec_align2 ec_params_external_power_limit_v1 { + uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ + uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ +}; + +#define EC_POWER_LIMIT_NONE 0xffff + +/* + * Set maximum voltage & current of a dedicated charge port + */ +#define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 + +struct __ec_align2 ec_params_dedicated_charger_limit { + uint16_t current_lim; /* in mA */ + uint16_t voltage_lim; /* in mV */ +}; + +/*****************************************************************************/ +/* Hibernate/Deep Sleep Commands */ + +/* Set the delay before going into hibernation. */ +#define EC_CMD_HIBERNATION_DELAY 0x00A8 + +struct __ec_align4 ec_params_hibernation_delay { + /* + * Seconds to wait in G3 before hibernate. Pass in 0 to read the + * current settings without changing them. + */ + uint32_t seconds; +}; + +struct __ec_align4 ec_response_hibernation_delay { + /* + * The current time in seconds in which the system has been in the G3 + * state. This value is reset if the EC transitions out of G3. + */ + uint32_t time_g3; + + /* + * The current time remaining in seconds until the EC should hibernate. + * This value is also reset if the EC transitions out of G3. + */ + uint32_t time_remaining; + + /* + * The current time in seconds that the EC should wait in G3 before + * hibernating. + */ + uint32_t hibernate_delay; +}; + +/* Inform the EC when entering a sleep state */ +#define EC_CMD_HOST_SLEEP_EVENT 0x00A9 + +enum host_sleep_event { + HOST_SLEEP_EVENT_S3_SUSPEND = 1, + HOST_SLEEP_EVENT_S3_RESUME = 2, + HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, + HOST_SLEEP_EVENT_S0IX_RESUME = 4 +}; + +struct __ec_align1 ec_params_host_sleep_event { + uint8_t sleep_event; +}; + +/*****************************************************************************/ +/* Device events */ +#define EC_CMD_DEVICE_EVENT 0x00AA + +enum ec_device_event { + EC_DEVICE_EVENT_TRACKPAD, + EC_DEVICE_EVENT_DSP, + EC_DEVICE_EVENT_WIFI, +}; + +enum ec_device_event_param { + /* Get and clear pending device events */ + EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS, + /* Get device event mask */ + EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS, + /* Set device event mask */ + EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS, +}; + +#define EC_DEVICE_EVENT_MASK(event_code) (1UL << (event_code % 32)) + +struct __ec_align_size1 ec_params_device_event { + uint32_t event_mask; + uint8_t param; +}; + +struct __ec_align4 ec_response_device_event { + uint32_t event_mask; +}; /*****************************************************************************/ /* Smart battery pass-through */ /* Get / Set 16-bit smart battery registers */ -#define EC_CMD_SB_READ_WORD 0xb0 -#define EC_CMD_SB_WRITE_WORD 0xb1 +#define EC_CMD_SB_READ_WORD 0x00B0 +#define EC_CMD_SB_WRITE_WORD 0x00B1 /* Get / Set string smart battery parameters * formatted as SMBUS "block". */ -#define EC_CMD_SB_READ_BLOCK 0xb2 -#define EC_CMD_SB_WRITE_BLOCK 0xb3 +#define EC_CMD_SB_READ_BLOCK 0x00B2 +#define EC_CMD_SB_WRITE_BLOCK 0x00B3 -struct ec_params_sb_rd { +struct __ec_align1 ec_params_sb_rd { uint8_t reg; -} __packed; +}; -struct ec_response_sb_rd_word { +struct __ec_align2 ec_response_sb_rd_word { uint16_t value; -} __packed; +}; -struct ec_params_sb_wr_word { +struct __ec_align1 ec_params_sb_wr_word { uint8_t reg; uint16_t value; -} __packed; +}; -struct ec_response_sb_rd_block { +struct __ec_align1 ec_response_sb_rd_block { uint8_t data[32]; -} __packed; +}; -struct ec_params_sb_wr_block { +struct __ec_align1 ec_params_sb_wr_block { uint8_t reg; uint16_t data[32]; -} __packed; +}; + +/*****************************************************************************/ +/* Battery vendor parameters + * + * Get or set vendor-specific parameters in the battery. Implementations may + * differ between boards or batteries. On a set operation, the response + * contains the actual value set, which may be rounded or clipped from the + * requested value. + */ + +#define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 + +enum ec_battery_vendor_param_mode { + BATTERY_VENDOR_PARAM_MODE_GET = 0, + BATTERY_VENDOR_PARAM_MODE_SET, +}; + +struct __ec_align_size1 ec_params_battery_vendor_param { + uint32_t param; + uint32_t value; + uint8_t mode; +}; + +struct __ec_align4 ec_response_battery_vendor_param { + uint32_t value; +}; + +/*****************************************************************************/ +/* + * Smart Battery Firmware Update Commands + */ +#define EC_CMD_SB_FW_UPDATE 0x00B5 + +enum ec_sb_fw_update_subcmd { + EC_SB_FW_UPDATE_PREPARE = 0x0, + EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */ + EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */ + EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */ + EC_SB_FW_UPDATE_END = 0x4, + EC_SB_FW_UPDATE_STATUS = 0x5, + EC_SB_FW_UPDATE_PROTECT = 0x6, + EC_SB_FW_UPDATE_MAX = 0x7, +}; + +#define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32 +#define SB_FW_UPDATE_CMD_STATUS_SIZE 2 +#define SB_FW_UPDATE_CMD_INFO_SIZE 8 + +struct __ec_align4 ec_sb_fw_update_header { + uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */ + uint16_t fw_id; /* firmware id */ +}; + +struct __ec_align4 ec_params_sb_fw_update { + struct ec_sb_fw_update_header hdr; + union { + /* EC_SB_FW_UPDATE_PREPARE = 0x0 */ + /* EC_SB_FW_UPDATE_INFO = 0x1 */ + /* EC_SB_FW_UPDATE_BEGIN = 0x2 */ + /* EC_SB_FW_UPDATE_END = 0x4 */ + /* EC_SB_FW_UPDATE_STATUS = 0x5 */ + /* EC_SB_FW_UPDATE_PROTECT = 0x6 */ + struct __ec_align4 { + /* no args */ + } dummy; + + /* EC_SB_FW_UPDATE_WRITE = 0x3 */ + struct __ec_align4 { + uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE]; + } write; + }; +}; + +struct __ec_align1 ec_response_sb_fw_update { + union { + /* EC_SB_FW_UPDATE_INFO = 0x1 */ + struct __ec_align1 { + uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE]; + } info; + + /* EC_SB_FW_UPDATE_STATUS = 0x5 */ + struct __ec_align1 { + uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE]; + } status; + }; +}; /* * Entering Verified Boot Mode Command * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. * Valid Modes are: normal, developer, and recovery. */ -#define EC_CMD_ENTERING_MODE 0xb6 +#define EC_CMD_ENTERING_MODE 0x00B6 -struct ec_params_entering_mode { +struct __ec_align4 ec_params_entering_mode { int vboot_mode; -} __packed; +}; #define VBOOT_MODE_NORMAL 0 #define VBOOT_MODE_DEVELOPER 1 #define VBOOT_MODE_RECOVERY 2 /*****************************************************************************/ +/* + * I2C passthru protection command: Protects I2C tunnels against access on + * certain addresses (board-specific). + */ +#define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7 + +enum ec_i2c_passthru_protect_subcmd { + EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0, + EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1, +}; + +struct __ec_align1 ec_params_i2c_passthru_protect { + uint8_t subcmd; + uint8_t port; /* I2C port number */ +}; + +struct __ec_align1 ec_response_i2c_passthru_protect { + uint8_t status; /* Status flags (0: unlocked, 1: locked) */ +}; + +/*****************************************************************************/ /* System commands */ /* - * TODO: this is a confusing name, since it doesn't necessarily reboot the EC. - * Rename to "set image" or something similar. + * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't + * necessarily reboot the EC. Rename to "image" or something similar? */ -#define EC_CMD_REBOOT_EC 0xd2 +#define EC_CMD_REBOOT_EC 0x00D2 /* Command */ enum ec_reboot_cmd { @@ -1587,17 +3863,19 @@ enum ec_reboot_cmd { /* (command 3 was jump to RW-B) */ EC_REBOOT_COLD = 4, /* Cold-reboot */ EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ - EC_REBOOT_HIBERNATE = 6 /* Hibernate EC */ + EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */ + EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */ }; /* Flags for ec_params_reboot_ec.reboot_flags */ #define EC_REBOOT_FLAG_RESERVED0 (1 << 0) /* Was recovery request */ #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1) /* Reboot after AP shutdown */ +#define EC_REBOOT_FLAG_SWITCH_RW_SLOT (1 << 2) /* Switch RW slot */ -struct ec_params_reboot_ec { +struct __ec_align1 ec_params_reboot_ec { uint8_t cmd; /* enum ec_reboot_cmd */ uint8_t flags; /* See EC_REBOOT_FLAG_* */ -} __packed; +}; /* * Get information on last EC panic. @@ -1605,111 +3883,719 @@ struct ec_params_reboot_ec { * Returns variable-length platform-dependent panic information. See panic.h * for details. */ -#define EC_CMD_GET_PANIC_INFO 0xd3 +#define EC_CMD_GET_PANIC_INFO 0x00D3 /*****************************************************************************/ /* - * ACPI commands + * Special commands * - * These are valid ONLY on the ACPI command/data port. + * These do not follow the normal rules for commands. See each command for + * details. */ /* - * ACPI Read Embedded Controller - * - * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). + * Reboot NOW * - * Use the following sequence: + * This command will work even when the EC LPC interface is busy, because the + * reboot command is processed at interrupt level. Note that when the EC + * reboots, the host will reboot too, so there is no response to this command. * - * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD - * - Wait for EC_LPC_CMDR_PENDING bit to clear - * - Write address to EC_LPC_ADDR_ACPI_DATA - * - Wait for EC_LPC_CMDR_DATA bit to set - * - Read value from EC_LPC_ADDR_ACPI_DATA + * Use EC_CMD_REBOOT_EC to reboot the EC more politely. */ -#define EC_CMD_ACPI_READ 0x80 +#define EC_CMD_REBOOT 0x00D1 /* Think "die" */ /* - * ACPI Write Embedded Controller + * Resend last response (not supported on LPC). * - * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). + * Returns EC_RES_UNAVAILABLE if there is no response available - for example, + * there was no previous command, or the previous command's response was too + * big to save. + */ +#define EC_CMD_RESEND_RESPONSE 0x00DB + +/* + * This header byte on a command indicate version 0. Any header byte less + * than this means that we are talking to an old EC which doesn't support + * versioning. In that case, we assume version 0. * - * Use the following sequence: + * Header bytes greater than this indicate a later version. For example, + * EC_CMD_VERSION0 + 1 means we are using version 1. * - * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD - * - Wait for EC_LPC_CMDR_PENDING bit to clear - * - Write address to EC_LPC_ADDR_ACPI_DATA - * - Wait for EC_LPC_CMDR_PENDING bit to clear - * - Write value to EC_LPC_ADDR_ACPI_DATA + * The old EC interface must not use commands 0xdc or higher. */ -#define EC_CMD_ACPI_WRITE 0x81 +#define EC_CMD_VERSION0 0x00DC +/*****************************************************************************/ /* - * ACPI Query Embedded Controller + * PD commands * - * This clears the lowest-order bit in the currently pending host events, and - * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, - * event 0x80000000 = 32), or 0 if no event was pending. + * These commands are for PD MCU communication. */ -#define EC_CMD_ACPI_QUERY_EVENT 0x84 -/* Valid addresses in ACPI memory space, for read/write commands */ -/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ -#define EC_ACPI_MEM_VERSION 0x00 +/* EC to PD MCU exchange status command */ +#define EC_CMD_PD_EXCHANGE_STATUS 0x0100 +#define EC_VER_PD_EXCHANGE_STATUS 2 + +enum pd_charge_state { + PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ + PD_CHARGE_NONE, /* No charging allowed */ + PD_CHARGE_5V, /* 5V charging only */ + PD_CHARGE_MAX /* Charge at max voltage */ +}; + +/* Status of EC being sent to PD */ +#define EC_STATUS_HIBERNATING (1 << 0) + +struct __ec_align1 ec_params_pd_status { + uint8_t status; /* EC status */ + int8_t batt_soc; /* battery state of charge */ + uint8_t charge_state; /* charging state (from enum pd_charge_state) */ +}; + +/* Status of PD being sent back to EC */ +#define PD_STATUS_HOST_EVENT (1 << 0) /* Forward host event to AP */ +#define PD_STATUS_IN_RW (1 << 1) /* Running RW image */ +#define PD_STATUS_JUMPED_TO_IMAGE (1 << 2) /* Current image was jumped to */ +#define PD_STATUS_TCPC_ALERT_0 (1 << 3) /* Alert active in port 0 TCPC */ +#define PD_STATUS_TCPC_ALERT_1 (1 << 4) /* Alert active in port 1 TCPC */ +#define PD_STATUS_TCPC_ALERT_2 (1 << 5) /* Alert active in port 2 TCPC */ +#define PD_STATUS_TCPC_ALERT_3 (1 << 6) /* Alert active in port 3 TCPC */ +#define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ + PD_STATUS_TCPC_ALERT_1 | \ + PD_STATUS_HOST_EVENT) +struct __ec_align_size1 ec_response_pd_status { + uint32_t curr_lim_ma; /* input current limit */ + uint16_t status; /* PD MCU status */ + int8_t active_charge_port; /* active charging port */ +}; + +/* AP to PD MCU host event status command, cleared on read */ +#define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 + +/* PD MCU host event status bits */ +#define PD_EVENT_UPDATE_DEVICE (1 << 0) +#define PD_EVENT_POWER_CHANGE (1 << 1) +#define PD_EVENT_IDENTITY_RECEIVED (1 << 2) +#define PD_EVENT_DATA_SWAP (1 << 3) +struct __ec_align4 ec_response_host_event_status { + uint32_t status; /* PD MCU host event status */ +}; + +/* Set USB type-C port role and muxes */ +#define EC_CMD_USB_PD_CONTROL 0x0101 + +enum usb_pd_control_role { + USB_PD_CTRL_ROLE_NO_CHANGE = 0, + USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */ + USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, + USB_PD_CTRL_ROLE_FORCE_SINK = 3, + USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, + USB_PD_CTRL_ROLE_COUNT +}; + +enum usb_pd_control_mux { + USB_PD_CTRL_MUX_NO_CHANGE = 0, + USB_PD_CTRL_MUX_NONE = 1, + USB_PD_CTRL_MUX_USB = 2, + USB_PD_CTRL_MUX_DP = 3, + USB_PD_CTRL_MUX_DOCK = 4, + USB_PD_CTRL_MUX_AUTO = 5, + USB_PD_CTRL_MUX_COUNT +}; + +enum usb_pd_control_swap { + USB_PD_CTRL_SWAP_NONE = 0, + USB_PD_CTRL_SWAP_DATA = 1, + USB_PD_CTRL_SWAP_POWER = 2, + USB_PD_CTRL_SWAP_VCONN = 3, + USB_PD_CTRL_SWAP_COUNT +}; + +struct __ec_align1 ec_params_usb_pd_control { + uint8_t port; + uint8_t role; + uint8_t mux; + uint8_t swap; +}; + +#define PD_CTRL_RESP_ENABLED_COMMS (1 << 0) /* Communication enabled */ +#define PD_CTRL_RESP_ENABLED_CONNECTED (1 << 1) /* Device connected */ +#define PD_CTRL_RESP_ENABLED_PD_CAPABLE (1 << 2) /* Partner is PD capable */ + +#define PD_CTRL_RESP_ROLE_POWER (1 << 0) /* 0=SNK/1=SRC */ +#define PD_CTRL_RESP_ROLE_DATA (1 << 1) /* 0=UFP/1=DFP */ +#define PD_CTRL_RESP_ROLE_VCONN (1 << 2) /* Vconn status */ +#define PD_CTRL_RESP_ROLE_DR_POWER (1 << 3) /* Partner is dualrole power */ +#define PD_CTRL_RESP_ROLE_DR_DATA (1 << 4) /* Partner is dualrole data */ +#define PD_CTRL_RESP_ROLE_USB_COMM (1 << 5) /* Partner USB comm capable */ +#define PD_CTRL_RESP_ROLE_EXT_POWERED (1 << 6) /* Partner externally powerd */ + +struct __ec_align1 ec_response_usb_pd_control { + uint8_t enabled; + uint8_t role; + uint8_t polarity; + uint8_t state; +}; + +struct __ec_align1 ec_response_usb_pd_control_v1 { + uint8_t enabled; + uint8_t role; + uint8_t polarity; + char state[32]; +}; + +#define EC_CMD_USB_PD_PORTS 0x0102 + +/* Maximum number of PD ports on a device, num_ports will be <= this */ +#define EC_USB_PD_MAX_PORTS 8 + +struct __ec_align1 ec_response_usb_pd_ports { + uint8_t num_ports; +}; + +#define EC_CMD_USB_PD_POWER_INFO 0x0103 + +#define PD_POWER_CHARGING_PORT 0xff +struct __ec_align1 ec_params_usb_pd_power_info { + uint8_t port; +}; + +enum usb_chg_type { + USB_CHG_TYPE_NONE, + USB_CHG_TYPE_PD, + USB_CHG_TYPE_C, + USB_CHG_TYPE_PROPRIETARY, + USB_CHG_TYPE_BC12_DCP, + USB_CHG_TYPE_BC12_CDP, + USB_CHG_TYPE_BC12_SDP, + USB_CHG_TYPE_OTHER, + USB_CHG_TYPE_VBUS, + USB_CHG_TYPE_UNKNOWN, +}; +enum usb_power_roles { + USB_PD_PORT_POWER_DISCONNECTED, + USB_PD_PORT_POWER_SOURCE, + USB_PD_PORT_POWER_SINK, + USB_PD_PORT_POWER_SINK_NOT_CHARGING, +}; + +struct __ec_align2 usb_chg_measures { + uint16_t voltage_max; + uint16_t voltage_now; + uint16_t current_max; + uint16_t current_lim; +}; + +struct __ec_align4 ec_response_usb_pd_power_info { + uint8_t role; + uint8_t type; + uint8_t dualrole; + uint8_t reserved1; + struct usb_chg_measures meas; + uint32_t max_power; +}; + +/* Write USB-PD device FW */ +#define EC_CMD_USB_PD_FW_UPDATE 0x0110 + +enum usb_pd_fw_update_cmds { + USB_PD_FW_REBOOT, + USB_PD_FW_FLASH_ERASE, + USB_PD_FW_FLASH_WRITE, + USB_PD_FW_ERASE_SIG, +}; + +struct __ec_align4 ec_params_usb_pd_fw_update { + uint16_t dev_id; + uint8_t cmd; + uint8_t port; + uint32_t size; /* Size to write in bytes */ + /* Followed by data to write */ +}; + +/* Write USB-PD Accessory RW_HASH table entry */ +#define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 +/* RW hash is first 20 bytes of SHA-256 of RW section */ +#define PD_RW_HASH_SIZE 20 +struct __ec_align1 ec_params_usb_pd_rw_hash_entry { + uint16_t dev_id; + uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; + uint8_t reserved; /* For alignment of current_image + * TODO(rspangler) but it's not aligned! + * Should have been reserved[2]. */ + uint32_t current_image; /* One of ec_current_image */ +}; + +/* Read USB-PD Accessory info */ +#define EC_CMD_USB_PD_DEV_INFO 0x0112 + +struct __ec_align1 ec_params_usb_pd_info_request { + uint8_t port; +}; + +/* Read USB-PD Device discovery info */ +#define EC_CMD_USB_PD_DISCOVERY 0x0113 +struct __ec_align_size1 ec_params_usb_pd_discovery_entry { + uint16_t vid; /* USB-IF VID */ + uint16_t pid; /* USB-IF PID */ + uint8_t ptype; /* product type (hub,periph,cable,ama) */ +}; + +/* Override default charge behavior */ +#define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 + +/* Negative port parameters have special meaning */ +enum usb_pd_override_ports { + OVERRIDE_DONT_CHARGE = -2, + OVERRIDE_OFF = -1, + /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */ +}; + +struct __ec_align2 ec_params_charge_port_override { + int16_t override_port; /* Override port# */ +}; + +/* Read (and delete) one entry of PD event log */ +#define EC_CMD_PD_GET_LOG_ENTRY 0x0115 + +struct __ec_align4 ec_response_pd_log { + uint32_t timestamp; /* relative timestamp in milliseconds */ + uint8_t type; /* event type : see PD_EVENT_xx below */ + uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ + uint16_t data; /* type-defined data payload */ + uint8_t payload[0]; /* optional additional data payload: 0..16 bytes */ +}; + + +/* The timestamp is the microsecond counter shifted to get about a ms. */ +#define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ + +#define PD_LOG_SIZE_MASK 0x1f +#define PD_LOG_PORT_MASK 0xe0 +#define PD_LOG_PORT_SHIFT 5 +#define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \ + ((size) & PD_LOG_SIZE_MASK)) +#define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT) +#define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK) + +/* PD event log : entry types */ +/* PD MCU events */ +#define PD_EVENT_MCU_BASE 0x00 +#define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0) +#define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1) +/* Reserved for custom board event */ +#define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2) +/* PD generic accessory events */ +#define PD_EVENT_ACC_BASE 0x20 +#define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0) +#define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1) +/* PD power supply events */ +#define PD_EVENT_PS_BASE 0x40 +#define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0) +/* PD video dongles events */ +#define PD_EVENT_VIDEO_BASE 0x60 +#define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0) +#define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1) +/* Returned in the "type" field, when there is no entry available */ +#define PD_EVENT_NO_ENTRY 0xff + /* - * Test location; writing value here updates test compliment byte to (0xff - - * value). + * PD_EVENT_MCU_CHARGE event definition : + * the payload is "struct usb_chg_measures" + * the data field contains the port state flags as defined below : */ -#define EC_ACPI_MEM_TEST 0x01 -/* Test compliment; writes here are ignored. */ -#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 -/* Keyboard backlight brightness percent (0 - 100) */ -#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 +/* Port partner is a dual role device */ +#define CHARGE_FLAGS_DUAL_ROLE (1 << 15) +/* Port is the pending override port */ +#define CHARGE_FLAGS_DELAYED_OVERRIDE (1 << 14) +/* Port is the override port */ +#define CHARGE_FLAGS_OVERRIDE (1 << 13) +/* Charger type */ +#define CHARGE_FLAGS_TYPE_SHIFT 3 +#define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT) +/* Power delivery role */ +#define CHARGE_FLAGS_ROLE_MASK (7 << 0) -/* Current version of ACPI memory address space */ -#define EC_ACPI_MEM_VERSION_CURRENT 1 +/* + * PD_EVENT_PS_FAULT data field flags definition : + */ +#define PS_FAULT_OCP 1 +#define PS_FAULT_FAST_OCP 2 +#define PS_FAULT_OVP 3 +#define PS_FAULT_DISCH 4 +/* + * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info". + */ +struct __ec_align4 mcdp_version { + uint8_t major; + uint8_t minor; + uint16_t build; +}; + +struct __ec_align4 mcdp_info { + uint8_t family[2]; + uint8_t chipid[2]; + struct mcdp_version irom; + struct mcdp_version fw; +}; + +/* struct mcdp_info field decoding */ +#define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) +#define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) + +/* Get/Set USB-PD Alternate mode info */ +#define EC_CMD_USB_PD_GET_AMODE 0x0116 +struct __ec_align_size1 ec_params_usb_pd_get_mode_request { + uint16_t svid_idx; /* SVID index to get */ + uint8_t port; /* port */ +}; + +struct __ec_align4 ec_params_usb_pd_get_mode_response { + uint16_t svid; /* SVID */ + uint16_t opos; /* Object Position */ + uint32_t vdo[6]; /* Mode VDOs */ +}; + +#define EC_CMD_USB_PD_SET_AMODE 0x0117 + +enum pd_mode_cmd { + PD_EXIT_MODE = 0, + PD_ENTER_MODE = 1, + /* Not a command. Do NOT remove. */ + PD_MODE_CMD_COUNT, +}; + +struct __ec_align4 ec_params_usb_pd_set_mode_request { + uint32_t cmd; /* enum pd_mode_cmd */ + uint16_t svid; /* SVID to set */ + uint8_t opos; /* Object Position */ + uint8_t port; /* port */ +}; + +/* Ask the PD MCU to record a log of a requested type */ +#define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 + +struct __ec_align1 ec_params_pd_write_log_entry { + uint8_t type; /* event type : see PD_EVENT_xx above */ + uint8_t port; /* port#, or 0 for events unrelated to a given port */ +}; + + +/* Control USB-PD chip */ +#define EC_CMD_PD_CONTROL 0x0119 + +enum ec_pd_control_cmd { + PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ + PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ + PD_RESET, /* Force reset the PD chip */ + PD_CONTROL_DISABLE /* Disable further calls to this command */ +}; + +struct __ec_align1 ec_params_pd_control { + uint8_t chip; /* chip id (should be 0) */ + uint8_t subcmd; +}; + +/* Get info about USB-C SS muxes */ +#define EC_CMD_USB_PD_MUX_INFO 0x011A + +struct __ec_align1 ec_params_usb_pd_mux_info { + uint8_t port; /* USB-C port number */ +}; + +/* Flags representing mux state */ +#define USB_PD_MUX_USB_ENABLED (1 << 0) +#define USB_PD_MUX_DP_ENABLED (1 << 1) +#define USB_PD_MUX_POLARITY_INVERTED (1 << 2) +#define USB_PD_MUX_HPD_IRQ (1 << 3) + +struct __ec_align1 ec_response_usb_pd_mux_info { + uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ +}; + +#define EC_CMD_PD_CHIP_INFO 0x011B + +struct __ec_align1 ec_params_pd_chip_info { + uint8_t port; /* USB-C port number */ + uint8_t renew; /* Force renewal */ +}; + +struct __ec_align2 ec_response_pd_chip_info { + uint16_t vendor_id; + uint16_t product_id; + uint16_t device_id; + union { + uint8_t fw_version_string[8]; + uint64_t fw_version_number; + }; +}; + +/* Run RW signature verification and get status */ +#define EC_CMD_RWSIG_CHECK_STATUS 0x011C + +struct __ec_align4 ec_response_rwsig_check_status { + uint32_t status; +}; + +/* For controlling RWSIG task */ +#define EC_CMD_RWSIG_ACTION 0x011D + +enum rwsig_action { + RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */ + RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */ +}; + +struct __ec_align4 ec_params_rwsig_action { + uint32_t action; +}; + +/* Run verification on a slot */ +#define EC_CMD_EFS_VERIFY 0x011E + +struct __ec_align1 ec_params_efs_verify { + uint8_t region; /* enum ec_flash_region */ +}; -/*****************************************************************************/ /* - * Special commands - * - * These do not follow the normal rules for commands. See each command for - * details. + * Retrieve info from Cros Board Info store. Response is based on the data + * type. Integers return a uint32. Strings return a string, using the response + * size to determine how big it is. + */ +#define EC_CMD_GET_CROS_BOARD_INFO 0x011F +/* + * Write info into Cros Board Info on EEPROM. Write fails if the board has + * hardware write-protect enabled. */ +#define EC_CMD_SET_CROS_BOARD_INFO 0x0120 + +enum cbi_data_tag { + CBI_TAG_BOARD_VERSION = 0, /* uint16_t or uint8_t[] = {minor,major} */ + CBI_TAG_OEM_ID = 1, /* uint8_t */ + CBI_TAG_SKU_ID = 2, /* uint8_t */ + CBI_TAG_COUNT, +}; /* - * Reboot NOW + * Flags to control read operation * - * This command will work even when the EC LPC interface is busy, because the - * reboot command is processed at interrupt level. Note that when the EC - * reboots, the host will reboot too, so there is no response to this command. + * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify + * write was successful without reboot. + */ +#define CBI_GET_RELOAD (1 << 0) + +struct __ec_align4 ec_params_get_cbi { + uint32_t type; /* enum cbi_data_tag */ + uint32_t flag; /* CBI_GET_* */ +}; + +/* + * Flags to control write behavior. * - * Use EC_CMD_REBOOT_EC to reboot the EC more politely. + * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's + * useful when writing multiple fields in a row. + * INIT: Needs to be set when creating a new CBI from scratch. All fields + * will be initialized to zero first. */ -#define EC_CMD_REBOOT 0xd1 /* Think "die" */ +#define CBI_SET_NO_SYNC (1 << 0) +#define CBI_SET_INIT (1 << 1) + +struct __ec_align1 ec_params_set_cbi { + uint32_t tag; /* enum cbi_data_tag */ + uint32_t flag; /* CBI_SET_* */ + uint32_t size; /* Data size */ + uint8_t data[]; /* For string and raw data */ +}; + +/*****************************************************************************/ +/* The command range 0x200-0x2FF is reserved for Rotor. */ +/*****************************************************************************/ /* - * Resend last response (not supported on LPC). + * Reserve a range of host commands for the CR51 firmware. + */ +#define EC_CMD_CR51_BASE 0x0300 +#define EC_CMD_CR51_LAST 0x03FF + +/*****************************************************************************/ +/* Fingerprint MCU commands: range 0x0400-0x040x */ + +/* Fingerprint SPI sensor passthru command: prototyping ONLY */ +#define EC_CMD_FP_PASSTHRU 0x0400 + +#define EC_FP_FLAG_NOT_COMPLETE 0x1 + +struct __ec_align2 ec_params_fp_passthru { + uint16_t len; /* Number of bytes to write then read */ + uint16_t flags; /* EC_FP_FLAG_xxx */ + uint8_t data[]; /* Data to send */ +}; + +/* Fingerprint sensor configuration command: prototyping ONLY */ +#define EC_CMD_FP_SENSOR_CONFIG 0x0401 + +#define EC_FP_SENSOR_CONFIG_MAX_REGS 16 + +struct __ec_align2 ec_params_fp_sensor_config { + uint8_t count; /* Number of setup registers */ + /* + * the value to send to each of the 'count' setup registers + * is stored in the 'data' array for 'len' bytes just after + * the previous one. + */ + uint8_t len[EC_FP_SENSOR_CONFIG_MAX_REGS]; + uint8_t data[]; +}; + +/* Configure the Fingerprint MCU behavior */ +#define EC_CMD_FP_MODE 0x0402 + +/* Put the sensor in its lowest power mode */ +#define FP_MODE_DEEPSLEEP (1<<0) +/* Wait to see a finger on the sensor */ +#define FP_MODE_FINGER_DOWN (1<<1) +/* Poll until the finger has left the sensor */ +#define FP_MODE_FINGER_UP (1<<2) +/* Capture the current finger image */ +#define FP_MODE_CAPTURE (1<<3) +/* special value: don't change anything just read back current mode */ +#define FP_MODE_DONT_CHANGE (1<<31) + +struct __ec_align4 ec_params_fp_mode { + uint32_t mode; /* as defined by FP_MODE_ constants */ + /* TBD */ +}; + +struct __ec_align4 ec_response_fp_mode { + uint32_t mode; /* as defined by FP_MODE_ constants */ + /* TBD */ +}; + +/* Retrieve Fingerprint sensor information */ +#define EC_CMD_FP_INFO 0x0403 + +struct __ec_align2 ec_response_fp_info { + /* Sensor identification */ + uint32_t vendor_id; + uint32_t product_id; + uint32_t model_id; + uint32_t version; + /* Image frame characteristics */ + uint32_t frame_size; + uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ + uint16_t width; + uint16_t height; + uint16_t bpp; +}; + +/* Get the last captured finger frame: TODO: will be AES-encrypted */ +#define EC_CMD_FP_FRAME 0x0404 + +struct __ec_align4 ec_params_fp_frame { + uint32_t offset; + uint32_t size; +}; + +/*****************************************************************************/ +/* Touchpad MCU commands: range 0x0500-0x05FF */ + +/* Perform touchpad self test */ +#define EC_CMD_TP_SELF_TEST 0x0500 + +/* Get number of frame types, and the size of each type */ +#define EC_CMD_TP_FRAME_INFO 0x0501 + +struct __ec_align4 ec_response_tp_frame_info { + uint32_t n_frames; + uint32_t frame_sizes[0]; +}; + +/* Create a snapshot of current frame readings */ +#define EC_CMD_TP_FRAME_SNAPSHOT 0x0502 + +/* Read the frame */ +#define EC_CMD_TP_FRAME_GET 0x0503 + +struct __ec_align4 ec_params_tp_frame_get { + uint32_t frame_index; + uint32_t offset; + uint32_t size; +}; + +/*****************************************************************************/ +/* + * Reserve a range of host commands for board-specific, experimental, or + * special purpose features. These can be (re)used without updating this file. * - * Returns EC_RES_UNAVAILABLE if there is no response available - for example, - * there was no previous command, or the previous command's response was too - * big to save. + * CAUTION: Don't go nuts with this. Shipping products should document ALL + * their EC commands for easier development, testing, debugging, and support. + * + * All commands MUST be #defined to be 4-digit UPPER CASE hex values + * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. + * + * In your experimental code, you may want to do something like this: + * + * #define EC_CMD_MAGIC_FOO 0x0000 + * #define EC_CMD_MAGIC_BAR 0x0001 + * #define EC_CMD_MAGIC_HEY 0x0002 + * + * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, + * EC_VER_MASK(0); + * + * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, + * EC_VER_MASK(0); + * + * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, + * EC_VER_MASK(0); */ -#define EC_CMD_RESEND_RESPONSE 0xdb +#define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 +#define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF /* - * This header byte on a command indicate version 0. Any header byte less - * than this means that we are talking to an old EC which doesn't support - * versioning. In that case, we assume version 0. + * Given the private host command offset, calculate the true private host + * command value. + */ +#define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ + (EC_CMD_BOARD_SPECIFIC_BASE + (command)) + +/*****************************************************************************/ +/* + * Passthru commands * - * Header bytes greater than this indicate a later version. For example, - * EC_CMD_VERSION0 + 1 means we are using version 1. + * Some platforms have sub-processors chained to each other. For example. + * + * AP <--> EC <--> PD MCU + * + * The top 2 bits of the command number are used to indicate which device the + * command is intended for. Device 0 is always the device receiving the + * command; other device mapping is board-specific. * - * The old EC interface must not use commands 0dc or higher. + * When a device receives a command to be passed to a sub-processor, it passes + * it on with the device number set back to 0. This allows the sub-processor + * to remain blissfully unaware of whether the command originated on the next + * device up the chain, or was passed through from the AP. + * + * In the above example, if the AP wants to send command 0x0002 to the PD MCU, + * AP sends command 0x4002 to the EC + * EC sends command 0x0002 to the PD MCU + * EC forwards PD MCU response back to the AP + */ + +/* Offset and max command number for sub-device n */ +#define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n)) +#define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff) + +/*****************************************************************************/ +/* + * Deprecated constants. These constants have been renamed for clarity. The + * meaning and size has not changed. Programs that use the old names should + * switch to the new names soon, as the old names may not be carried forward + * forever. */ -#define EC_CMD_VERSION0 0xdc +#define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE +#define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 +#define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE -#endif /* !__ACPI__ */ +#endif /* !__ACPI__ && !__KERNEL__ */ #endif /* __CROS_EC_COMMANDS_H */ diff --git a/include/efi_api.h b/include/efi_api.h index bea19a5a12..e850b951eb 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -914,9 +914,9 @@ struct efi_file_handle { efi_status_t (EFIAPI *write)(struct efi_file_handle *file, efi_uintn_t *buffer_size, void *buffer); efi_status_t (EFIAPI *getpos)(struct efi_file_handle *file, - efi_uintn_t *pos); + u64 *pos); efi_status_t (EFIAPI *setpos)(struct efi_file_handle *file, - efi_uintn_t pos); + u64 pos); efi_status_t (EFIAPI *getinfo)(struct efi_file_handle *file, const efi_guid_t *info_type, efi_uintn_t *buffer_size, void *buffer); diff --git a/include/efi_loader.h b/include/efi_loader.h index 34e44c6677..1417c3588f 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -236,7 +236,7 @@ efi_status_t efi_root_node_register(void); /* Called by bootefi to initialize runtime */ efi_status_t efi_initialize_system_table(void); /* Called by bootefi to make console interface available */ -int efi_console_register(void); +efi_status_t efi_console_register(void); /* Called by bootefi to make all disk storage accessible as EFI objects */ efi_status_t efi_disk_register(void); /* Create handles and protocols for the partitions of a block device */ diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h index 2893cd4287..560753ae4c 100644 --- a/include/environment/ti/boot.h +++ b/include/environment/ti/boot.h @@ -35,7 +35,6 @@ "uuid_disk=${uuid_gpt_disk};" \ "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \ "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \ - "name=environment,size=128K,uuid=${uuid_gpt_environment};" \ "name=misc,size=128K,uuid=${uuid_gpt_misc};" \ "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \ "name=efs,size=16M,uuid=${uuid_gpt_efs};" \ @@ -92,8 +91,6 @@ "mmc dev $mmcdev; " \ "mmc rescan; " \ AVB_VERIFY_CHECK \ - "part start mmc ${mmcdev} environment fdt_start; " \ - "part size mmc ${mmcdev} environment fdt_size; " \ "part start mmc ${mmcdev} boot boot_start; " \ "part size mmc ${mmcdev} boot boot_size; " \ "mmc read ${fdtaddr} ${fdt_start} ${fdt_size}; " \ diff --git a/include/fdtdec.h b/include/fdtdec.h index 83be06403d..c26df50543 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -803,23 +803,6 @@ const u8 *fdtdec_locate_byte_array(const void *blob, int node, const char *prop_name, int count); /** - * Look up a property in a node which contains a memory region address and - * size. Then return a pointer to this address. - * - * The property must hold one address with a length. This is only tested on - * 32-bit machines. - * - * @param blob FDT blob - * @param node node to examine - * @param prop_name name of property to find - * @param basep Returns base address of region - * @param size Returns size of region - * @return 0 if ok, -1 on error (property not found) - */ -int fdtdec_decode_region(const void *blob, int node, const char *prop_name, - fdt_addr_t *basep, fdt_size_t *sizep); - -/** * Obtain an indexed resource from a device property. * * @param fdt FDT blob @@ -849,34 +832,6 @@ int fdt_get_named_resource(const void *fdt, int node, const char *property, const char *prop_names, const char *name, struct fdt_resource *res); -/** - * Decode a named region within a memory bank of a given type. - * - * This function handles selection of a memory region. The region is - * specified as an offset/size within a particular type of memory. - * - * The properties used are: - * - * <mem_type>-memory<suffix> for the name of the memory bank - * <mem_type>-offset<suffix> for the offset in that bank - * - * The property value must have an offset and a size. The function checks - * that the region is entirely within the memory bank.5 - * - * @param blob FDT blob - * @param node Node containing the properties (-1 for /config) - * @param mem_type Type of memory to use, which is a name, such as - * "u-boot" or "kernel". - * @param suffix String to append to the memory/offset - * property names - * @param basep Returns base of region - * @param sizep Returns size of region - * @return 0 if OK, -ive on error - */ -int fdtdec_decode_memory_region(const void *blob, int node, - const char *mem_type, const char *suffix, - fdt_addr_t *basep, fdt_size_t *sizep); - /* Display timings from linux include/video/display_timing.h */ enum display_flags { DISPLAY_FLAGS_HSYNC_LOW = 1 << 0, diff --git a/include/fsl-mc/ldpaa_wriop.h b/include/fsl-mc/ldpaa_wriop.h index 07e5130264..b55c39cbb2 100644 --- a/include/fsl-mc/ldpaa_wriop.h +++ b/include/fsl-mc/ldpaa_wriop.h @@ -6,7 +6,11 @@ #ifndef __LDPAA_WRIOP_H #define __LDPAA_WRIOP_H - #include <phy.h> +#include <phy.h> + +#define DEFAULT_WRIOP_MDIO1_NAME "FSL_MDIO0" +#define DEFAULT_WRIOP_MDIO2_NAME "FSL_MDIO1" +#define WRIOP_MAX_PHY_NUM 2 enum wriop_port { WRIOP1_DPMAC1 = 1, @@ -40,34 +44,30 @@ struct wriop_dpmac_info { u8 enabled; u8 id; u8 board_mux; - int phy_addr; - void *phy_regs; + int phy_addr[WRIOP_MAX_PHY_NUM]; phy_interface_t enet_if; - struct phy_device *phydev; + struct phy_device *phydev[WRIOP_MAX_PHY_NUM]; struct mii_dev *bus; }; extern struct wriop_dpmac_info dpmac_info[NUM_WRIOP_PORTS]; -#define DEFAULT_WRIOP_MDIO1_NAME "FSL_MDIO0" -#define DEFAULT_WRIOP_MDIO2_NAME "FSL_MDIO1" - -void wriop_init_dpmac(int, int, int); -void wriop_disable_dpmac(int); -void wriop_enable_dpmac(int); -u8 wriop_is_enabled_dpmac(int dpmac_id); -void wriop_set_mdio(int, struct mii_dev *); -struct mii_dev *wriop_get_mdio(int); -void wriop_set_phy_address(int, int); -int wriop_get_phy_address(int); -void wriop_set_phy_dev(int, struct phy_device *); -struct phy_device *wriop_get_phy_dev(int); -phy_interface_t wriop_get_enet_if(int); +void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl); +void wriop_init_dpmac_enet_if(int dpmac_id, phy_interface_t enet_if); +int wriop_disable_dpmac(int dpmac_id); +int wriop_enable_dpmac(int dpmac_id); +int wriop_is_enabled_dpmac(int dpmac_id); +int wriop_set_mdio(int dpmac_id, struct mii_dev *bus); +struct mii_dev *wriop_get_mdio(int dpmac_id); +int wriop_set_phy_address(int dpmac_id, int phy_num, int address); +int wriop_get_phy_address(int dpmac_id, int phy_num); +int wriop_set_phy_dev(int dpmac_id, int phy_num, struct phy_device *phydev); +struct phy_device *wriop_get_phy_dev(int dpmac_id, int phy_num); +phy_interface_t wriop_get_enet_if(int dpmac_id); -void wriop_dpmac_disable(int); -void wriop_dpmac_enable(int); -phy_interface_t wriop_dpmac_enet_if(int, int); -void wriop_init_dpmac_qsgmii(int, int); +void wriop_dpmac_disable(int dpmac_id); +void wriop_dpmac_enable(int dpmac_id); +phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl); +void wriop_init_dpmac_qsgmii(int sd, int lane_prtcl); void wriop_init_rgmii(void); -void wriop_init_dpmac_enet_if(int , phy_interface_t); #endif /* __LDPAA_WRIOP_H */ diff --git a/include/linux/compat.h b/include/linux/compat.h index 6e3feb64d2..d0f51baab4 100644 --- a/include/linux/compat.h +++ b/include/linux/compat.h @@ -43,6 +43,25 @@ extern struct p_current *current; #define dev_warn(dev, fmt, args...) \ printf(fmt, ##args) +#define netdev_emerg(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_alert(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_crit(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_err(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_warn(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_notice(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_info(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_dbg(dev, fmt, args...) \ + debug(fmt, ##args) +#define netdev_vdbg(dev, fmt, args...) \ + debug(fmt, ##args) + #define GFP_ATOMIC ((gfp_t) 0) #define GFP_KERNEL ((gfp_t) 0) #define GFP_NOFS ((gfp_t) 0) diff --git a/include/linux/compiler-gcc.h b/include/linux/compiler-gcc.h index 22ab246fee..8d9e079435 100644 --- a/include/linux/compiler-gcc.h +++ b/include/linux/compiler-gcc.h @@ -12,7 +12,8 @@ /* Optimization barrier */ /* The "volatile" is due to gcc bugs */ -#define barrier() __asm__ __volatile__("": : :"memory") +#define barrier() \ + __asm__ __volatile__("": : :"memory") /* * This version is i.e. to prevent dead stores elimination on @ptr * where gcc and llvm may behave differently when otherwise using @@ -26,7 +27,8 @@ * the compiler that the inline asm absolutely may see the contents * of @ptr. See also: https://llvm.org/bugs/show_bug.cgi?id=15495 */ -#define barrier_data(ptr) __asm__ __volatile__("": :"r"(ptr) :"memory") +#define barrier_data(ptr) \ + __asm__ __volatile__("": :"r"(ptr) :"memory") /* * This macro obfuscates arithmetic on a variable address so that gcc diff --git a/include/linux/if_ether.h b/include/linux/if_ether.h new file mode 100644 index 0000000000..0d62aefa0d --- /dev/null +++ b/include/linux/if_ether.h @@ -0,0 +1,178 @@ +/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ +/* + * INET An implementation of the TCP/IP protocol suite for the LINUX + * operating system. INET is implemented using the BSD Socket + * interface as the means of communication with the user level. + * + * Global definitions for the Ethernet IEEE 802.3 interface. + * + * Version: @(#)if_ether.h 1.0.1a 02/08/94 + * + * Author: Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG> + * Donald Becker, <becker@super.org> + * Alan Cox, <alan@lxorguk.ukuu.org.uk> + * Steve Whitehouse, <gw7rrm@eeshack3.swan.ac.uk> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#ifndef _UAPI_LINUX_IF_ETHER_H +#define _UAPI_LINUX_IF_ETHER_H + +#include <linux/types.h> + +/* + * IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble + * and FCS/CRC (frame check sequence). + */ + +#define ETH_ALEN 6 /* Octets in one ethernet addr */ +#define ETH_TLEN 2 /* Octets in ethernet type field */ +#define ETH_HLEN 14 /* Total octets in header. */ +#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */ +#define ETH_DATA_LEN 1500 /* Max. octets in payload */ +#define ETH_FRAME_LEN 1514 /* Max. octets in frame sans FCS */ +#define ETH_FCS_LEN 4 /* Octets in the FCS */ + +#define ETH_MIN_MTU 68 /* Min IPv4 MTU per RFC791 */ +#define ETH_MAX_MTU 0xFFFFU /* 65535, same as IP_MAX_MTU */ + +/* + * These are the defined Ethernet Protocol ID's. + */ + +#define ETH_P_LOOP 0x0060 /* Ethernet Loopback packet */ +#define ETH_P_PUP 0x0200 /* Xerox PUP packet */ +#define ETH_P_PUPAT 0x0201 /* Xerox PUP Addr Trans packet */ +#define ETH_P_TSN 0x22F0 /* TSN (IEEE 1722) packet */ +#define ETH_P_ERSPAN2 0x22EB /* ERSPAN version 2 (type III) */ +#define ETH_P_IP 0x0800 /* Internet Protocol packet */ +#define ETH_P_X25 0x0805 /* CCITT X.25 */ +#define ETH_P_ARP 0x0806 /* Address Resolution packet */ +#define ETH_P_BPQ 0x08FF /* G8BPQ AX.25 Ethernet Packet */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_IEEEPUP 0x0a00 /* Xerox IEEE802.3 PUP packet */ +#define ETH_P_IEEEPUPAT 0x0a01 /* Xerox IEEE802.3 PUP Addr Trans packet */ +#define ETH_P_BATMAN 0x4305 /* B.A.T.M.A.N.-Advanced packet */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_DEC 0x6000 /* DEC Assigned proto */ +#define ETH_P_DNA_DL 0x6001 /* DEC DNA Dump/Load */ +#define ETH_P_DNA_RC 0x6002 /* DEC DNA Remote Console */ +#define ETH_P_DNA_RT 0x6003 /* DEC DNA Routing */ +#define ETH_P_LAT 0x6004 /* DEC LAT */ +#define ETH_P_DIAG 0x6005 /* DEC Diagnostics */ +#define ETH_P_CUST 0x6006 /* DEC Customer use */ +#define ETH_P_SCA 0x6007 /* DEC Systems Comms Arch */ +#define ETH_P_TEB 0x6558 /* Trans Ether Bridging */ +#define ETH_P_RARP 0x8035 /* Reverse Addr Res packet */ +#define ETH_P_ATALK 0x809B /* Appletalk DDP */ +#define ETH_P_AARP 0x80F3 /* Appletalk AARP */ +#define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */ +#define ETH_P_ERSPAN 0x88BE /* ERSPAN type II */ +#define ETH_P_IPX 0x8137 /* IPX over DIX */ +#define ETH_P_IPV6 0x86DD /* IPv6 over bluebook */ +#define ETH_P_PAUSE 0x8808 /* IEEE Pause frames. See 802.3 31B */ +#define ETH_P_SLOW 0x8809 /* Slow Protocol. See 802.3ad 43B */ +#define ETH_P_WCCP 0x883E /* Web-cache coordination */ + /* protocol defined in */ + /* draft-wilson-wrec-wccp-v2-00.txt */ +#define ETH_P_MPLS_UC 0x8847 /* MPLS Unicast traffic */ +#define ETH_P_MPLS_MC 0x8848 /* MPLS Multicast traffic */ +#define ETH_P_ATMMPOA 0x884c /* MultiProtocol Over ATM */ +#define ETH_P_PPP_DISC 0x8863 /* PPPoE discovery messages */ +#define ETH_P_PPP_SES 0x8864 /* PPPoE session messages */ +#define ETH_P_LINK_CTL 0x886c /* HPNA, wlan link local tunnel */ +#define ETH_P_ATMFATE 0x8884 /* Frame-based ATM Transport over Ethernet */ +#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */ +#define ETH_P_AOE 0x88A2 /* ATA over Ethernet */ +#define ETH_P_8021AD 0x88A8 /* 802.1ad Service VLAN */ +#define ETH_P_802_EX1 0x88B5 /* 802.1 Local Experimental 1. */ +#define ETH_P_PREAUTH 0x88C7 /* 802.11 Preauthentication */ +#define ETH_P_TIPC 0x88CA /* TIPC */ +#define ETH_P_MACSEC 0x88E5 /* 802.1ae MACsec */ +#define ETH_P_8021AH 0x88E7 /* 802.1ah Backbone Service Tag */ +#define ETH_P_MVRP 0x88F5 /* 802.1Q MVRP */ +#define ETH_P_1588 0x88F7 /* IEEE 1588 Timesync */ +#define ETH_P_NCSI 0x88F8 /* NCSI protocol */ +#define ETH_P_PRP 0x88FB /* IEC 62439-3 PRP/HSRv0 */ +#define ETH_P_FCOE 0x8906 /* Fibre Channel over Ethernet */ +#define ETH_P_IBOE 0x8915 /* Infiniband over Ethernet */ +#define ETH_P_TDLS 0x890D /* TDLS */ +#define ETH_P_FIP 0x8914 /* FCoE Initialization Protocol */ +#define ETH_P_80221 0x8917 /* IEEE 802.21 Media Independent */ + /* Handover Protocol */ +#define ETH_P_HSR 0x892F /* IEC 62439-3 HSRv1 */ +#define ETH_P_NSH 0x894F /* Network Service Header */ +#define ETH_P_LOOPBACK 0x9000 /* Ethernet loopback packet, per IEEE 802.3 */ +#define ETH_P_QINQ1 0x9100 /* deprecated QinQ VLAN */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_QINQ2 0x9200 /* deprecated QinQ VLAN */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_QINQ3 0x9300 /* deprecated QinQ VLAN] */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_EDSA 0xDADA /* Ethertype DSA */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_IFE 0xED3E /* ForCES inter-FE LFB type */ +#define ETH_P_AF_IUCV 0xFBFB /* IBM af_iucv */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ + +#define ETH_P_802_3_MIN 0x0600 /* If the value in the ethernet type is less */ + /* than this value then the frame is Ethernet */ + /* II. Else it is 802.3 */ + +/* + * Non DIX types. Won't clash for 1500 types. + */ + +#define ETH_P_802_3 0x0001 /* Dummy type for 802.3 frames */ +#define ETH_P_AX25 0x0002 /* Dummy protocol id for AX.25 */ +#define ETH_P_ALL 0x0003 /* Every packet (be careful!!!) */ +#define ETH_P_802_2 0x0004 /* 802.2 frames */ +#define ETH_P_SNAP 0x0005 /* Internal only */ +#define ETH_P_DDCMP 0x0006 /* DEC DDCMP: Internal only */ +#define ETH_P_WAN_PPP 0x0007 /* Dummy type for WAN PPP frames*/ +#define ETH_P_PPP_MP 0x0008 /* Dummy type for PPP MP frames */ +#define ETH_P_LOCALTALK 0x0009 /* Localtalk pseudo type */ +#define ETH_P_CAN 0x000C /* CAN: Controller Area Network */ +#define ETH_P_CANFD 0x000D /* CANFD: CAN flexible data rate*/ +#define ETH_P_PPPTALK 0x0010 /* Dummy type for Atalk over PPP*/ +#define ETH_P_TR_802_2 0x0011 /* 802.2 frames */ +#define ETH_P_MOBITEX 0x0015 /* Mobitex (kaz@cafe.net) */ +#define ETH_P_CONTROL 0x0016 /* Card specific control frames */ +#define ETH_P_IRDA 0x0017 /* Linux-IrDA */ +#define ETH_P_ECONET 0x0018 /* Acorn Econet */ +#define ETH_P_HDLC 0x0019 /* HDLC frames */ +#define ETH_P_ARCNET 0x001A /* 1A for ArcNet :-) */ +#define ETH_P_DSA 0x001B /* Distributed Switch Arch */ +#define ETH_P_TRAILER 0x001C /* Trailer switch tagging */ +#define ETH_P_PHONET 0x00F5 /* Nokia Phonet frames */ +#define ETH_P_IEEE802154 0x00F6 /* IEEE802.15.4 frame */ +#define ETH_P_CAIF 0x00F7 /* ST-Ericsson CAIF protocol */ +#define ETH_P_XDSA 0x00F8 /* Multiplexed DSA protocol */ +#define ETH_P_MAP 0x00F9 /* Qualcomm multiplexing and */ + /* aggregation protocol */ + +/* The following macros come from Linux kernel include/linux/if_vlan.h */ + +#define VLAN_HLEN 4 /* The additional bytes required by VLAN */ + /* (in addition to the Ethernet header) */ +#define VLAN_ETH_HLEN 18 /* Total octets in header. */ +#define VLAN_ETH_ZLEN 64 /* Min. octets in frame sans FCS */ + +/* + * According to 802.3ac, the packet can be 4 bytes longer. --Klika Jan + */ +#define VLAN_ETH_DATA_LEN 1500 /* Max. octets in payload */ +#define VLAN_ETH_FRAME_LEN 1518 /* Max. octets in frame sans FCS */ + +#define VLAN_PRIO_MASK 0xe000 /* Priority Code Point */ +#define VLAN_PRIO_SHIFT 13 +#define VLAN_CFI_MASK 0x1000 /* Canonical Format Indicator */ +#define VLAN_TAG_PRESENT VLAN_CFI_MASK +#define VLAN_VID_MASK 0x0fff /* VLAN Identifier */ +#define VLAN_N_VID 4096 + +#endif /* _UAPI_LINUX_IF_ETHER_H */ diff --git a/include/linux/mdio.h b/include/linux/mdio.h index ea20608463..6e821d906f 100644 --- a/include/linux/mdio.h +++ b/include/linux/mdio.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * linux/mdio.h: definitions for MDIO (clause 45) transceivers * Copyright 2006-2009 Solarflare Communications Inc. @@ -42,7 +43,11 @@ #define MDIO_PKGID2 15 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */ #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */ +#define MDIO_PCS_EEE_ABLE 20 /* EEE Capability register */ +#define MDIO_PCS_EEE_WK_ERR 22 /* EEE wake error counter */ #define MDIO_PHYXS_LNSTAT 24 /* PHY XGXS lane state */ +#define MDIO_AN_EEE_ADV 60 /* EEE advertisement */ +#define MDIO_AN_EEE_LPABLE 61 /* EEE link partner ability */ /* Media-dependent registers. */ #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */ @@ -55,7 +60,6 @@ #define MDIO_PCS_10GBRT_STAT2 33 /* 10GBASE-R/-T PCS status 2 */ #define MDIO_AN_10GBT_CTRL 32 /* 10GBASE-T auto-negotiation control */ #define MDIO_AN_10GBT_STAT 33 /* 10GBASE-T auto-negotiation status */ -#define MDIO_AN_EEE_ADV 60 /* EEE advertisement */ /* LASI (Link Alarm Status Interrupt) registers, defined by XENPAK MSA. */ #define MDIO_PMA_LASI_RXCTRL 0x9000 /* RX_ALARM control */ @@ -81,6 +85,7 @@ #define MDIO_AN_CTRL1_RESTART BMCR_ANRESTART #define MDIO_AN_CTRL1_ENABLE BMCR_ANENABLE #define MDIO_AN_CTRL1_XNP 0x2000 /* Enable extended next page */ +#define MDIO_PCS_CTRL1_CLKSTOP_EN 0x400 /* Stop the clock during LPI */ /* 10 Gb/s */ #define MDIO_CTRL1_SPEED10G (MDIO_CTRL1_SPEEDSELEXT | 0x00) @@ -245,9 +250,25 @@ #define MDIO_AN_10GBT_STAT_MS 0x4000 /* Master/slave config */ #define MDIO_AN_10GBT_STAT_MSFLT 0x8000 /* Master/slave config fault */ -/* AN EEE Advertisement register. */ -#define MDIO_AN_EEE_ADV_100TX 0x0002 /* Advertise 100TX EEE cap */ -#define MDIO_AN_EEE_ADV_1000T 0x0004 /* Advertise 1000T EEE cap */ +/* EEE Supported/Advertisement/LP Advertisement registers. + * + * EEE capability Register (3.20), Advertisement (7.60) and + * Link partner ability (7.61) registers have and can use the same identical + * bit masks. + */ +#define MDIO_AN_EEE_ADV_100TX 0x0002 /* Advertise 100TX EEE cap */ +#define MDIO_AN_EEE_ADV_1000T 0x0004 /* Advertise 1000T EEE cap */ +/* Note: the two defines above can be potentially used by the user-land + * and cannot remove them now. + * So, we define the new generic MDIO_EEE_100TX and MDIO_EEE_1000T macros + * using the previous ones (that can be considered obsolete). + */ +#define MDIO_EEE_100TX MDIO_AN_EEE_ADV_100TX /* 100TX EEE cap */ +#define MDIO_EEE_1000T MDIO_AN_EEE_ADV_1000T /* 1000T EEE cap */ +#define MDIO_EEE_10GT 0x0008 /* 10GT EEE cap */ +#define MDIO_EEE_1000KX 0x0010 /* 1000KX EEE cap */ +#define MDIO_EEE_10GKX4 0x0020 /* 10G KX4 EEE cap */ +#define MDIO_EEE_10GKR 0x0040 /* 10G KR EEE cap */ /* LASI RX_ALARM control/status registers. */ #define MDIO_PMA_LASI_RX_PHYXSLFLT 0x0001 /* PHY XS RX local fault */ @@ -281,4 +302,9 @@ #define MDIO_DEVAD_NONE (-1) #define MDIO_EMULATE_C22 4 +static inline __u16 mdio_phy_id_c45(int prtad, int devad) +{ + return MDIO_PHY_ID_C45 | (prtad << 5) | devad; +} + #endif /* __LINUX_MDIO_H__ */ diff --git a/include/linux/mii.h b/include/linux/mii.h index 19afb746cd..21db032340 100644 --- a/include/linux/mii.h +++ b/include/linux/mii.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * linux/mii.h: definitions for MII-compatible transceivers * Originally drivers/net/sunhme.h. @@ -9,53 +10,55 @@ #define __LINUX_MII_H__ /* Generic MII registers. */ - -#define MII_BMCR 0x00 /* Basic mode control register */ -#define MII_BMSR 0x01 /* Basic mode status register */ -#define MII_PHYSID1 0x02 /* PHYS ID 1 */ -#define MII_PHYSID2 0x03 /* PHYS ID 2 */ -#define MII_ADVERTISE 0x04 /* Advertisement control reg */ -#define MII_LPA 0x05 /* Link partner ability reg */ -#define MII_EXPANSION 0x06 /* Expansion register */ -#define MII_CTRL1000 0x09 /* 1000BASE-T control */ -#define MII_STAT1000 0x0a /* 1000BASE-T status */ -#define MII_ESTATUS 0x0f /* Extended Status */ -#define MII_DCOUNTER 0x12 /* Disconnect counter */ -#define MII_FCSCOUNTER 0x13 /* False carrier counter */ -#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ -#define MII_RERRCOUNTER 0x15 /* Receive error counter */ -#define MII_SREVISION 0x16 /* Silicon revision */ -#define MII_RESV1 0x17 /* Reserved... */ -#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ -#define MII_PHYADDR 0x19 /* PHY address */ -#define MII_RESV2 0x1a /* Reserved... */ -#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ -#define MII_NCONFIG 0x1c /* Network interface config */ +#define MII_BMCR 0x00 /* Basic mode control register */ +#define MII_BMSR 0x01 /* Basic mode status register */ +#define MII_PHYSID1 0x02 /* PHYS ID 1 */ +#define MII_PHYSID2 0x03 /* PHYS ID 2 */ +#define MII_ADVERTISE 0x04 /* Advertisement control reg */ +#define MII_LPA 0x05 /* Link partner ability reg */ +#define MII_EXPANSION 0x06 /* Expansion register */ +#define MII_CTRL1000 0x09 /* 1000BASE-T control */ +#define MII_STAT1000 0x0a /* 1000BASE-T status */ +#define MII_MMD_CTRL 0x0d /* MMD Access Control Register */ +#define MII_MMD_DATA 0x0e /* MMD Access Data Register */ +#define MII_ESTATUS 0x0f /* Extended Status */ +#define MII_DCOUNTER 0x12 /* Disconnect counter */ +#define MII_FCSCOUNTER 0x13 /* False carrier counter */ +#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ +#define MII_RERRCOUNTER 0x15 /* Receive error counter */ +#define MII_SREVISION 0x16 /* Silicon revision */ +#define MII_RESV1 0x17 /* Reserved... */ +#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ +#define MII_PHYADDR 0x19 /* PHY address */ +#define MII_RESV2 0x1a /* Reserved... */ +#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ +#define MII_NCONFIG 0x1c /* Network interface config */ /* Basic mode control register. */ -#define BMCR_RESV 0x003f /* Unused... */ -#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ -#define BMCR_CTST 0x0080 /* Collision test */ -#define BMCR_FULLDPLX 0x0100 /* Full duplex */ +#define BMCR_RESV 0x003f /* Unused... */ +#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ +#define BMCR_CTST 0x0080 /* Collision test */ +#define BMCR_FULLDPLX 0x0100 /* Full duplex */ #define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ -#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ -#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ +#define BMCR_ISOLATE 0x0400 /* Isolate data paths from MII */ +#define BMCR_PDOWN 0x0800 /* Enable low power state */ #define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ -#define BMCR_SPEED100 0x2000 /* Select 100Mbps */ -#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ -#define BMCR_RESET 0x8000 /* Reset the DP83840 */ +#define BMCR_SPEED100 0x2000 /* Select 100Mbps */ +#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ +#define BMCR_RESET 0x8000 /* Reset to default state */ +#define BMCR_SPEED10 0x0000 /* Select 10Mbps */ /* Basic mode status register. */ -#define BMSR_ERCAP 0x0001 /* Ext-reg capability */ -#define BMSR_JCD 0x0002 /* Jabber detected */ -#define BMSR_LSTATUS 0x0004 /* Link status */ +#define BMSR_ERCAP 0x0001 /* Ext-reg capability */ +#define BMSR_JCD 0x0002 /* Jabber detected */ +#define BMSR_LSTATUS 0x0004 /* Link status */ #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ #define BMSR_RFAULT 0x0010 /* Remote fault detected */ #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ -#define BMSR_RESV 0x00c0 /* Unused... */ -#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ -#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */ -#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */ +#define BMSR_RESV 0x00c0 /* Unused... */ +#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ +#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */ +#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */ #define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ #define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ #define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ @@ -63,7 +66,7 @@ #define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ /* Advertisement control register. */ -#define ADVERTISE_SLCT 0x001f /* Selector bits */ +#define ADVERTISE_SLCT 0x001f /* Selector bits */ #define ADVERTISE_CSMA 0x0001 /* Only selector supported */ #define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ #define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ @@ -72,19 +75,19 @@ #define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ #define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ #define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ -#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ +#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ #define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ -#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ +#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ #define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */ -#define ADVERTISE_RESV 0x1000 /* Unused... */ +#define ADVERTISE_RESV 0x1000 /* Unused... */ #define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ #define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ -#define ADVERTISE_NPAGE 0x8000 /* Next page bit */ +#define ADVERTISE_NPAGE 0x8000 /* Next page bit */ -#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ - ADVERTISE_CSMA) -#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ - ADVERTISE_100HALF | ADVERTISE_100FULL) +#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ + ADVERTISE_CSMA) +#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ + ADVERTISE_100HALF | ADVERTISE_100FULL) /* Link partner ability register. */ #define LPA_SLCT 0x001f /* Same as advertise selector */ @@ -97,12 +100,12 @@ #define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ #define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/ #define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ -#define LPA_PAUSE_CAP 0x0400 /* Can pause */ +#define LPA_PAUSE_CAP 0x0400 /* Can pause */ #define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ -#define LPA_RESV 0x1000 /* Unused... */ +#define LPA_RESV 0x1000 /* Unused... */ #define LPA_RFAULT 0x2000 /* Link partner faulted */ #define LPA_LPACK 0x4000 /* Link partner acked us */ -#define LPA_NPAGE 0x8000 /* Next page bit */ +#define LPA_NPAGE 0x8000 /* Next page bit */ #define LPA_DUPLEX (LPA_10FULL | LPA_100FULL) #define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) @@ -113,21 +116,23 @@ #define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ #define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ #define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ -#define EXPANSION_RESV 0xffe0 /* Unused... */ +#define EXPANSION_RESV 0xffe0 /* Unused... */ #define ESTATUS_1000_XFULL 0x8000 /* Can do 1000BX Full */ #define ESTATUS_1000_XHALF 0x4000 /* Can do 1000BX Half */ -#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ -#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ +#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ +#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ /* N-way test register. */ -#define NWAYTEST_RESV1 0x00ff /* Unused... */ +#define NWAYTEST_RESV1 0x00ff /* Unused... */ #define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ -#define NWAYTEST_RESV2 0xfe00 /* Unused... */ +#define NWAYTEST_RESV2 0xfe00 /* Unused... */ /* 1000BASE-T Control register */ -#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ -#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ +#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ +#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ +#define CTL1000_AS_MASTER 0x0800 +#define CTL1000_ENABLE_MASTER 0x1000 /* 1000BASE-T Status register */ #define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */ @@ -139,6 +144,13 @@ #define FLOW_CTRL_TX 0x01 #define FLOW_CTRL_RX 0x02 +/* MMD Access Control register fields */ +#define MII_MMD_CTRL_DEVAD_MASK 0x1f /* Mask MMD DEVAD*/ +#define MII_MMD_CTRL_ADDR 0x0000 /* Address */ +#define MII_MMD_CTRL_NOINCR 0x4000 /* no post increment */ +#define MII_MMD_CTRL_INCR_RDWT 0x8000 /* post increment on reads & writes */ +#define MII_MMD_CTRL_INCR_ON_WT 0xC000 /* post increment on writes only */ + /** * mii_nway_result * @negotiated: value of MII ANAR and'd with ANLPAR diff --git a/include/log.h b/include/log.h index 653fb8d853..a872fc6ef5 100644 --- a/include/log.h +++ b/include/log.h @@ -39,16 +39,17 @@ enum log_level_t { enum log_category_t { LOGC_FIRST = 0, /* First part mirrors UCLASS_... */ - LOGC_NONE = UCLASS_COUNT, - LOGC_ARCH, - LOGC_BOARD, - LOGC_CORE, + LOGC_NONE = UCLASS_COUNT, /* First number is after all uclasses */ + LOGC_ARCH, /* Related to arch-specific code */ + LOGC_BOARD, /* Related to board-specific code */ + LOGC_CORE, /* Related to core features (non-driver-model) */ LOGC_DM, /* Core driver-model */ LOGC_DT, /* Device-tree */ LOGC_EFI, /* EFI implementation */ + LOGC_ALLOC, /* Memory allocation */ - LOGC_COUNT, - LOGC_END, + LOGC_COUNT, /* Number of log categories */ + LOGC_END, /* Sentinel value for a list of log categories */ }; /* Helper to cast a uclass ID to a log category */ @@ -88,8 +89,22 @@ int _log(enum log_category_t cat, enum log_level_t level, const char *file, */ #if CONFIG_IS_ENABLED(LOG) #define _LOG_MAX_LEVEL CONFIG_VAL(LOG_MAX_LEVEL) +#define log_err(_fmt...) log(LOG_CATEGORY, LOGL_ERR, ##_fmt) +#define log_warning(_fmt...) log(LOG_CATEGORY, LOGL_WARNING, ##_fmt) +#define log_notice(_fmt...) log(LOG_CATEGORY, LOGL_NOTICE, ##_fmt) +#define log_info(_fmt...) log(LOG_CATEGORY, LOGL_INFO, ##_fmt) +#define log_debug(_fmt...) log(LOG_CATEGORY, LOGL_DEBUG, ##_fmt) +#define log_content(_fmt...) log(LOG_CATEGORY, LOGL_DEBUG_CONTENT, ##_fmt) +#define log_io(_fmt...) log(LOG_CATEGORY, LOGL_DEBUG_IO, ##_fmt) #else #define _LOG_MAX_LEVEL LOGL_INFO +#define log_err(_fmt...) +#define log_warning(_fmt...) +#define log_notice(_fmt...) +#define log_info(_fmt...) +#define log_debug(_fmt...) +#define log_content(_fmt...) +#define log_io(_fmt...) #endif /* Emit a log record if the level is less that the maximum */ @@ -175,7 +190,7 @@ void __assert_fail(const char *assertion, const char *file, unsigned int line, }) #else #define log_ret(_ret) (_ret) -#define log_msg_ret(_ret) (_ret) +#define log_msg_ret(_msg, _ret) (_ret) #endif /** diff --git a/include/net.h b/include/net.h index 2b2deb5aae..51c099dae2 100644 --- a/include/net.h +++ b/include/net.h @@ -14,6 +14,7 @@ #include <asm/cache.h> #include <asm/byteorder.h> /* for nton* / ntoh* stuff */ +#include <linux/if_ether.h> #define DEBUG_LL_STATE 0 /* Link local state machine changes */ #define DEBUG_DEV_PKT 0 /* Packets or info directed to the device */ @@ -596,7 +597,8 @@ int net_set_ether(uchar *xet, const uchar *dest_ethaddr, uint prot); int net_update_ether(struct ethernet_hdr *et, uchar *addr, uint prot); /* Set IP header */ -void net_set_ip_header(uchar *pkt, struct in_addr dest, struct in_addr source); +void net_set_ip_header(uchar *pkt, struct in_addr dest, struct in_addr source, + u16 pkt_len, u8 proto); void net_set_udp_header(uchar *pkt, struct in_addr dest, int dport, int sport, int len); @@ -635,6 +637,7 @@ rxhand_f *net_get_udp_handler(void); /* Get UDP RX packet handler */ void net_set_udp_handler(rxhand_f *); /* Set UDP RX packet handler */ rxhand_f *net_get_arp_handler(void); /* Get ARP RX packet handler */ void net_set_arp_handler(rxhand_f *); /* Set ARP RX packet handler */ +bool arp_is_waiting(void); /* Waiting for ARP reply? */ void net_set_icmp_handler(rxhand_icmp_f *f); /* Set ICMP RX handler */ void net_set_timeout_handler(ulong, thand_f *);/* Set timeout handler */ @@ -653,6 +656,14 @@ static inline void net_set_state(enum net_loop_state state) net_state = state; } +/* + * net_get_async_tx_pkt_buf - Get a packet buffer that is not in use for + * sending an asynchronous reply + * + * returns - ptr to packet buffer + */ +uchar * net_get_async_tx_pkt_buf(void); + /* Transmit a packet */ static inline void net_send_packet(uchar *pkt, int len) { @@ -670,6 +681,9 @@ static inline void net_send_packet(uchar *pkt, int len) * @param sport Source UDP port * @param payload_len Length of data after the UDP header */ +int net_send_ip_packet(uchar *ether, struct in_addr dest, int dport, int sport, + int payload_len, int proto, u8 action, u32 tcp_seq_num, + u32 tcp_ack_num); int net_send_udp_packet(uchar *ether, struct in_addr dest, int dport, int sport, int payload_len); diff --git a/include/os.h b/include/os.h index 5c797212c2..28eb625284 100644 --- a/include/os.h +++ b/include/os.h @@ -27,16 +27,6 @@ struct sandbox_state; ssize_t os_read(int fd, void *buf, size_t count); /** - * Access to the OS read() system call with non-blocking access - * - * \param fd File descriptor as returned by os_open() - * \param buf Buffer to place data - * \param count Number of bytes to read - * \return number of bytes read, or -1 on error - */ -ssize_t os_read_no_block(int fd, void *buf, size_t count); - -/** * Access to the OS write() system call * * \param fd File descriptor as returned by os_open() @@ -75,6 +65,7 @@ int os_open(const char *pathname, int flags); #define OS_O_RDWR 2 #define OS_O_MASK 3 /* Mask for read/write flags */ #define OS_O_CREAT 0100 +#define OS_O_TRUNC 01000 /** * Access to the OS close() system call @@ -334,4 +325,29 @@ void os_localtime(struct rtc_time *rt); * os_abort() - Raise SIGABRT to exit sandbox (e.g. to debugger) */ void os_abort(void); + +/** + * os_mprotect_allow() - Remove write-protection on a region of memory + * + * The start and length will be page-aligned before use. + * + * @start: Region start + * @len: Region length in bytes + * @return 0 if OK, -1 on error from mprotect() + */ +int os_mprotect_allow(void *start, size_t len); + +/** + * os_write_file() - Write a file to the host filesystem + * + * This can be useful when debugging for writing data out of sandbox for + * inspection by external tools. + * + * @name: File path to write to + * @buf: Data to write + * @size: Size of data to write + * @return 0 if OK, -ve on error + */ +int os_write_file(const char *name, const void *buf, int size); + #endif diff --git a/include/panel.h b/include/panel.h index 6237d32657..cd596d48c0 100644 --- a/include/panel.h +++ b/include/panel.h @@ -15,6 +15,16 @@ struct panel_ops { * @return 0 if OK, -ve on error */ int (*enable_backlight)(struct udevice *dev); + + /** + * set_backlight - Set panel backlight brightness + * + * @dev: Panel device containing the backlight to update + * @percent: Brightness value (0 to 100, or BACKLIGHT_... value) + * @return 0 if OK, -ve on error + */ + int (*set_backlight)(struct udevice *dev, int percent); + /** * get_timings() - Get display timings from panel. * @@ -29,14 +39,24 @@ struct panel_ops { #define panel_get_ops(dev) ((struct panel_ops *)(dev)->driver->ops) /** - * panel_enable_backlight() - Enable the panel backlight + * panel_enable_backlight() - Enable/disable the panel backlight * * @dev: Panel device containing the backlight to enable + * @enable: true to enable the backlight, false to dis * @return 0 if OK, -ve on error */ int panel_enable_backlight(struct udevice *dev); /** + * panel_set_backlight - Set brightness for the panel backlight + * + * @dev: Panel device containing the backlight to update + * @percent: Brightness value (0 to 100, or BACKLIGHT_... value) + * @return 0 if OK, -ve on error + */ +int panel_set_backlight(struct udevice *dev, int percent); + +/** * panel_get_display_timing() - Get display timings from panel. * * @dev: Panel device containing the display timings diff --git a/include/part_efi.h b/include/part_efi.h index 8525770445..7170b61c95 100644 --- a/include/part_efi.h +++ b/include/part_efi.h @@ -24,7 +24,7 @@ #define EFI_PMBR_OSTYPE_EFI 0xEF #define EFI_PMBR_OSTYPE_EFI_GPT 0xEE -#define GPT_HEADER_SIGNATURE 0x5452415020494645ULL +#define GPT_HEADER_SIGNATURE_UBOOT 0x5452415020494645ULL #define GPT_HEADER_REVISION_V1 0x00010000 #define GPT_PRIMARY_PARTITION_TABLE_LBA 1ULL #define GPT_ENTRY_NUMBERS CONFIG_EFI_PARTITION_ENTRIES_NUMBERS diff --git a/include/phy_interface.h b/include/phy_interface.h index 0760d65de5..c6823189f8 100644 --- a/include/phy_interface.h +++ b/include/phy_interface.h @@ -27,6 +27,10 @@ typedef enum { PHY_INTERFACE_MODE_RXAUI, PHY_INTERFACE_MODE_SFI, PHY_INTERFACE_MODE_INTERNAL, + PHY_INTERFACE_MODE_25G_AUI, + PHY_INTERFACE_MODE_XLAUI, + PHY_INTERFACE_MODE_CAUI2, + PHY_INTERFACE_MODE_CAUI4, PHY_INTERFACE_MODE_NONE, /* Must be last */ PHY_INTERFACE_MODE_COUNT, @@ -50,6 +54,10 @@ static const char * const phy_interface_strings[] = { [PHY_INTERFACE_MODE_RXAUI] = "rxaui", [PHY_INTERFACE_MODE_SFI] = "sfi", [PHY_INTERFACE_MODE_INTERNAL] = "internal", + [PHY_INTERFACE_MODE_25G_AUI] = "25g-aui", + [PHY_INTERFACE_MODE_XLAUI] = "xlaui4", + [PHY_INTERFACE_MODE_CAUI2] = "caui2", + [PHY_INTERFACE_MODE_CAUI4] = "caui4", [PHY_INTERFACE_MODE_NONE] = "", }; diff --git a/include/samsung/exynos5-dt-types.h b/include/samsung/exynos5-dt-types.h index 8e11af30d1..8fe08fe211 100644 --- a/include/samsung/exynos5-dt-types.h +++ b/include/samsung/exynos5-dt-types.h @@ -9,6 +9,7 @@ enum { EXYNOS5_BOARD_ODROID_XU3_REV02, EXYNOS5_BOARD_ODROID_XU4_REV01, EXYNOS5_BOARD_ODROID_HC1_REV01, + EXYNOS5_BOARD_ODROID_HC2_REV01, EXYNOS5_BOARD_ODROID_UNKNOWN, EXYNOS5_BOARD_COUNT, @@ -25,5 +26,6 @@ bool board_is_generic(void); bool board_is_odroidxu3(void); bool board_is_odroidxu4(void); bool board_is_odroidhc1(void); +bool board_is_odroidhc2(void); #endif diff --git a/include/string.h b/include/string.h new file mode 100644 index 0000000000..38134dcf4c --- /dev/null +++ b/include/string.h @@ -0,0 +1 @@ +#include <linux/string.h> diff --git a/include/sysreset.h b/include/sysreset.h index a5c0b74a47..61295e3fcb 100644 --- a/include/sysreset.h +++ b/include/sysreset.h @@ -11,6 +11,7 @@ enum sysreset_t { SYSRESET_WARM, /* Reset CPU, keep GPIOs active */ SYSRESET_COLD, /* Reset CPU and GPIOs */ SYSRESET_POWER, /* Reset PMIC (remove and restore power) */ + SYSRESET_POWER_OFF, /* Turn off power */ SYSRESET_COUNT, }; @@ -31,11 +32,20 @@ struct sysreset_ops { /** * get_status() - get printable reset status information * + * @dev: Device to check * @buf: Buffer to receive the textual reset information * @size: Size of the passed buffer * @return 0 if OK, -ve on error */ int (*get_status)(struct udevice *dev, char *buf, int size); + + /** + * get_last() - get information on the last reset + * + * @dev: Device to check + * @return last reset state (enum sysreset_t) or -ve error + */ + int (*get_last)(struct udevice *dev); }; #define sysreset_get_ops(dev) ((struct sysreset_ops *)(dev)->driver->ops) @@ -49,8 +59,9 @@ struct sysreset_ops { int sysreset_request(struct udevice *dev, enum sysreset_t type); /** - * get_status() - get printable reset status information + * sysreset_get_status() - get printable reset status information * + * @dev: Device to check * @buf: Buffer to receive the textual reset information * @size: Size of the passed buffer * @return 0 if OK, -ve on error @@ -58,6 +69,14 @@ int sysreset_request(struct udevice *dev, enum sysreset_t type); int sysreset_get_status(struct udevice *dev, char *buf, int size); /** + * sysreset_get_last() - get information on the last reset + * + * @dev: Device to check + * @return last reset state (enum sysreset_t) or -ve error + */ +int sysreset_get_last(struct udevice *dev); + +/** * sysreset_walk() - cause a system reset * * This works through the available sysreset devices until it finds one that can @@ -72,6 +91,19 @@ int sysreset_get_status(struct udevice *dev, char *buf, int size); int sysreset_walk(enum sysreset_t type); /** + * sysreset_get_last_walk() - get information on the last reset + * + * This works through the available sysreset devices until it finds one that can + * perform a reset. If the provided sysreset type is not available, the next one + * will be tried. + * + * If no device prives the information, this function returns -ENOENT + * + * @return last reset state (enum sysreset_t) or -ve error + */ +int sysreset_get_last_walk(void); + +/** * sysreset_walk_halt() - try to reset, otherwise halt * * This calls sysreset_walk(). If it returns, indicating that reset is not diff --git a/include/tpm-v1.h b/include/tpm-v1.h index 6b4941ef9a..be2eca946f 100644 --- a/include/tpm-v1.h +++ b/include/tpm-v1.h @@ -81,6 +81,12 @@ enum tpm_capability_areas { TPM_CAP_VERSION_VAL = 0x0000001A, }; +enum tmp_cap_flag { + TPM_CAP_FLAG_PERMANENT = 0x108, +}; + +#define TPM_TAG_PERMANENT_FLAGS 0x001f + #define TPM_NV_PER_GLOBALLOCK BIT(15) #define TPM_NV_PER_PPREAD BIT(16) #define TPM_NV_PER_PPWRITE BIT(0) @@ -93,6 +99,14 @@ enum { TPM_PUBEK_SIZE = 256, }; +enum { + TPM_CMD_EXTEND = 0x14, + TPM_CMD_GET_CAPABILITY = 0x65, + TPM_CMD_NV_DEFINE_SPACE = 0xcc, + TPM_CMD_NV_WRITE_VALUE = 0xcd, + TPM_CMD_NV_READ_VALUE = 0xcf, +}; + /** * TPM return codes as defined in the TCG Main specification * (TPM Main Part 2 Structures; Specification version 1.2) @@ -231,6 +245,40 @@ struct tpm_permanent_flags { u8 disable_full_da_logic_info; } __packed; +#define TPM_SHA1_160_HASH_LEN 0x14 + +struct __packed tpm_composite_hash { + u8 digest[TPM_SHA1_160_HASH_LEN]; +}; + +struct __packed tpm_pcr_selection { + __be16 size_of_select; + u8 pcr_select[3]; /* matches vboot's struct */ +}; + +struct __packed tpm_pcr_info_short { + struct tpm_pcr_selection pcr_selection; + u8 locality_at_release; + struct tpm_composite_hash digest_at_release; +}; + +struct __packed tpm_nv_attributes { + __be16 tag; + __be32 attributes; +}; + +struct __packed tpm_nv_data_public { + __be16 tag; + __be32 nv_index; + struct tpm_pcr_info_short pcr_info_read; + struct tpm_pcr_info_short pcr_info_write; + struct tpm_nv_attributes permission; + u8 read_st_clear; + u8 write_st_clear; + u8 write_define; + __be32 data_size; +}; + /** * Issue a TPM_Startup command. * @@ -477,4 +525,32 @@ u32 tpm_find_key_sha1(const u8 auth[20], const u8 pubkey_digest[20], */ u32 tpm_get_random(void *data, u32 count); +/** + * tpm_finalise_physical_presence() - Finalise physical presence + * + * @return return code of the operation (0 = success) + */ +u32 tpm_finalise_physical_presence(void); + +/** + * tpm_nv_set_locked() - lock the non-volatile space + * + * @return return code of the operation (0 = success) + */ +u32 tpm_nv_set_locked(void); + +/** + * tpm_set_global_lock() - set the global lock + * + * @return return code of the operation (0 = success) + */ +u32 tpm_set_global_lock(void); + +/** + * tpm_resume() - start up the TPM from resume (after suspend) + * + * @return return code of the operation (0 = success) + */ +u32 tpm_resume(void); + #endif /* __TPM_V1_H */ diff --git a/include/tpm-v2.h b/include/tpm-v2.h index 780e061975..c77b416182 100644 --- a/include/tpm-v2.h +++ b/include/tpm-v2.h @@ -83,6 +83,7 @@ enum tpm2_command_codes { TPM2_CC_PCR_SETAUTHPOL = 0x012C, TPM2_CC_DAM_RESET = 0x0139, TPM2_CC_DAM_PARAMETERS = 0x013A, + TPM2_CC_NV_READ = 0x014E, TPM2_CC_GET_CAPABILITY = 0x017A, TPM2_CC_PCR_READ = 0x017E, TPM2_CC_PCR_EXTEND = 0x0182, diff --git a/include/usb_ether.h b/include/usb_ether.h index 49f47d372a..e85acadb7f 100644 --- a/include/usb_ether.h +++ b/include/usb_ether.h @@ -8,16 +8,6 @@ #include <net.h> -/* - * IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble - * and FCS/CRC (frame check sequence). - */ -#define ETH_ALEN 6 /* Octets in one ethernet addr */ -#define ETH_HLEN 14 /* Total octets in header. */ -#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */ -#define ETH_DATA_LEN 1500 /* Max. octets in payload */ -#define ETH_FRAME_LEN PKTSIZE_ALIGN /* Max. octets in frame sans FCS */ - /* TODO(sjg@chromium.org): Remove @pusb_dev when all boards use CONFIG_DM_ETH */ struct ueth_data { /* eth info */ diff --git a/include/video.h b/include/video.h index e7fc5c94e2..75200f0e45 100644 --- a/include/video.h +++ b/include/video.h @@ -55,7 +55,7 @@ enum video_log2_bpp { * @xsize: Number of pixel columns (e.g. 1366) * @ysize: Number of pixels rows (e.g.. 768) * @rot: Display rotation (0=none, 1=90 degrees clockwise, etc.) - * @bpix: Encoded bits per pixel + * @bpix: Encoded bits per pixel (enum video_log2_bpp) * @vidconsole_drv_name: Driver to use for the text console, NULL to * select automatically * @font_size: Font size in pixels (0 to use a default value) @@ -120,8 +120,9 @@ int video_reserve(ulong *addrp); * video_clear() - Clear a device's frame buffer to background color. * * @dev: Device to clear + * @return 0 */ -void video_clear(struct udevice *dev); +int video_clear(struct udevice *dev); /** * video_sync() - Sync a device's frame buffer with its hardware @@ -131,8 +132,10 @@ void video_clear(struct udevice *dev); * buffer are displayed to the user. * * @dev: Device to sync + * @force: True to force a sync even if there was one recently (this is + * very expensive on sandbox) */ -void video_sync(struct udevice *vid); +void video_sync(struct udevice *vid, bool force); /** * video_sync_all() - Sync all devices' frame buffers with there hardware @@ -266,6 +269,6 @@ int lg4573_spi_startup(unsigned int bus, unsigned int cs, */ void video_get_info_str(int line_number, char *info); -#endif /* CONFIG_DM_VIDEO */ +#endif /* !CONFIG_DM_VIDEO */ #endif diff --git a/lib/Kconfig b/lib/Kconfig index 622f3c26c3..ccab426e12 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -185,6 +185,28 @@ config TPM for the low-level TPM interface, but only one TPM is supported at a time by the TPM library. +config SPL_TPM + bool "Trusted Platform Module (TPM) Support in SPL" + depends on SPL_DM + help + This enables support for TPMs which can be used to provide security + features for your board. The TPM can be connected via LPC or I2C + and a sandbox TPM is provided for testing purposes. Use the 'tpm' + command to interactive the TPM. Driver model support is provided + for the low-level TPM interface, but only one TPM is supported at + a time by the TPM library. + +config TPL_TPM + bool "Trusted Platform Module (TPM) Support in TPL" + depends on TPL_DM + help + This enables support for TPMs which can be used to provide security + features for your board. The TPM can be connected via LPC or I2C + and a sandbox TPM is provided for testing purposes. Use the 'tpm' + command to interactive the TPM. Driver model support is provided + for the low-level TPM interface, but only one TPM is supported at + a time by the TPM library. + endmenu menu "Android Verified Boot" @@ -331,6 +353,16 @@ config SPL_OF_LIBFDT particular compatible nodes. The library operates on a flattened version of the device tree. +config TPL_OF_LIBFDT + bool "Enable the FDT library for TPL" + default y if TPL_OF_CONTROL + help + This enables the FDT library (libfdt). It provides functions for + accessing binary device tree images in memory, such as adding and + removing nodes and properties, scanning through the tree and finding + particular compatible nodes. The library operates on a flattened + version of the device tree. + config FDT_FIXUP_PARTITIONS bool "overwrite MTD partitions in DTS through defined in 'mtdparts'" depends on OF_LIBFDT diff --git a/lib/Makefile b/lib/Makefile index f169644850..fb6944128a 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -45,14 +45,18 @@ obj-$(CONFIG_PHYSMEM) += physmem.o obj-y += qsort.o obj-y += rc4.o obj-$(CONFIG_SUPPORT_EMMC_RPMB) += sha256.o -obj-$(CONFIG_TPM) += tpm-common.o -obj-$(CONFIG_TPM_V1) += tpm-v1.o -obj-$(CONFIG_TPM_V2) += tpm-v2.o obj-$(CONFIG_RBTREE) += rbtree.o obj-$(CONFIG_BITREVERSE) += bitrev.o obj-y += list_sort.o endif +obj-$(CONFIG_$(SPL_TPL_)TPM) += tpm-common.o +ifeq ($(CONFIG_$(SPL_TPL_)TPM),y) +obj-y += crc8.o +obj-$(CONFIG_TPM_V1) += tpm-v1.o +obj-$(CONFIG_TPM_V2) += tpm-v2.o +endif + obj-$(CONFIG_RSA) += rsa/ obj-$(CONFIG_SHA1) += sha1.o obj-$(CONFIG_SHA256) += sha256.o diff --git a/lib/charset.c b/lib/charset.c index 0cede9b60b..10557b9e75 100644 --- a/lib/charset.c +++ b/lib/charset.c @@ -97,12 +97,17 @@ static u8 read_string(void *data) /** * read_console() - read byte from console * - * @src - not used, needed to match interface - * Return: - byte read + * @data - not used, needed to match interface + * Return: - byte read or 0 on error */ static u8 read_console(void *data) { - return getc(); + int ch; + + ch = getc(); + if (ch < 0) + ch = 0; + return ch; } int console_read_unicode(s32 *code) diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c index 97eb19cd14..da978d2b34 100644 --- a/lib/efi_loader/efi_boottime.c +++ b/lib/efi_loader/efi_boottime.c @@ -1599,7 +1599,7 @@ static efi_status_t EFIAPI efi_load_image(bool boot_policy, efi_uintn_t source_size, efi_handle_t *image_handle) { - struct efi_loaded_image *info; + struct efi_loaded_image *info = NULL; struct efi_loaded_image_obj **image_obj = (struct efi_loaded_image_obj **)image_handle; efi_status_t ret; @@ -2023,7 +2023,7 @@ static efi_status_t EFIAPI efi_open_protocol_information( /* Copy entries */ buffer_size = count * sizeof(struct efi_open_protocol_info_entry); - r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, buffer_size, + r = efi_allocate_pool(EFI_BOOT_SERVICES_DATA, buffer_size, (void **)entry_buffer); if (r != EFI_SUCCESS) goto out; @@ -2080,7 +2080,7 @@ static efi_status_t EFIAPI efi_protocols_per_handle( size_t j = 0; buffer_size = sizeof(efi_guid_t *) * *protocol_buffer_count; - r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, buffer_size, + r = efi_allocate_pool(EFI_BOOT_SERVICES_DATA, buffer_size, (void **)protocol_buffer); if (r != EFI_SUCCESS) return EFI_EXIT(r); @@ -2133,7 +2133,7 @@ static efi_status_t EFIAPI efi_locate_handle_buffer( *buffer); if (r != EFI_BUFFER_TOO_SMALL) goto out; - r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, buffer_size, + r = efi_allocate_pool(EFI_BOOT_SERVICES_DATA, buffer_size, (void **)buffer); if (r != EFI_SUCCESS) goto out; @@ -2506,7 +2506,7 @@ static efi_status_t efi_protocol_open( if (item->info.attributes & EFI_OPEN_PROTOCOL_BY_DRIVER) opened_by_driver = true; } - /* Only one controller can be conncected */ + /* Only one controller can be connected */ if (opened_by_driver) return EFI_ACCESS_DENIED; } diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c index 7ecdbb1666..0225222a61 100644 --- a/lib/efi_loader/efi_console.c +++ b/lib/efi_loader/efi_console.c @@ -1045,8 +1045,10 @@ static void EFIAPI efi_key_notify(struct efi_event *event, void *context) * efi_console_register() - install the console protocols * * This function is called from do_bootefi_exec(). + * + * Return: status code */ -int efi_console_register(void) +efi_status_t efi_console_register(void) { efi_status_t r; struct efi_object *efi_console_output_obj; diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c index 5a61a1c1dc..46a24f7882 100644 --- a/lib/efi_loader/efi_device_path.c +++ b/lib/efi_loader/efi_device_path.c @@ -382,7 +382,6 @@ struct efi_device_path *efi_dp_get_next_instance(struct efi_device_path **dp, *size = 0; if (!dp || !*dp) return NULL; - p = *dp; sz = efi_dp_instance_size(*dp); p = dp_alloc(sz + sizeof(END)); if (!p) diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c index 0753a36a20..beb4fba917 100644 --- a/lib/efi_loader/efi_file.c +++ b/lib/efi_loader/efi_file.c @@ -52,11 +52,18 @@ static int set_blk_dev(struct file_handle *fh) return fs_set_blk_dev_with_part(fh->fs->desc, fh->fs->part); } +/** + * is_dir() - check if file handle points to directory + * + * We assume that set_blk_dev(fh) has been called already. + * + * @fh: file handle + * Return: true if file handle points to a directory + */ static int is_dir(struct file_handle *fh) { struct fs_dir_stream *dirs; - set_blk_dev(fh); dirs = fs_opendir(fh->path); if (!dirs) return 0; @@ -436,28 +443,51 @@ error: return EFI_EXIT(ret); } +/** + * efi_file_getpos() - get current position in file + * + * This function implements the GetPosition service of the EFI file protocol. + * See the UEFI spec for details. + * + * @file: file handle + * @pos: pointer to file position + * Return: status code + */ static efi_status_t EFIAPI efi_file_getpos(struct efi_file_handle *file, - efi_uintn_t *pos) + u64 *pos) { + efi_status_t ret = EFI_SUCCESS; struct file_handle *fh = to_fh(file); EFI_ENTRY("%p, %p", file, pos); - if (fh->offset <= SIZE_MAX) { - *pos = fh->offset; - return EFI_EXIT(EFI_SUCCESS); - } else { - return EFI_EXIT(EFI_DEVICE_ERROR); + if (fh->isdir) { + ret = EFI_UNSUPPORTED; + goto out; } + + *pos = fh->offset; +out: + return EFI_EXIT(ret); } +/** + * efi_file_setpos() - set current position in file + * + * This function implements the SetPosition service of the EFI file protocol. + * See the UEFI spec for details. + * + * @file: file handle + * @pos: new file position + * Return: status code + */ static efi_status_t EFIAPI efi_file_setpos(struct efi_file_handle *file, - efi_uintn_t pos) + u64 pos) { struct file_handle *fh = to_fh(file); efi_status_t ret = EFI_SUCCESS; - EFI_ENTRY("%p, %zu", file, pos); + EFI_ENTRY("%p, %llu", file, pos); if (fh->isdir) { if (pos != 0) { diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c index 034d0d2ed0..4e8b2d597d 100644 --- a/lib/efi_loader/efi_net.c +++ b/lib/efi_loader/efi_net.c @@ -7,7 +7,6 @@ #include <common.h> #include <efi_loader.h> -#include <lcd.h> #include <malloc.h> static const efi_guid_t efi_net_guid = EFI_SIMPLE_NETWORK_GUID; diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c index c5fbd91fa3..f059dc97fd 100644 --- a/lib/efi_loader/efi_runtime.c +++ b/lib/efi_loader/efi_runtime.c @@ -41,9 +41,13 @@ static efi_status_t __efi_runtime EFIAPI efi_invalid_parameter(void); #elif defined(__arm__) #define R_RELATIVE R_ARM_RELATIVE #define R_MASK 0xffULL -#elif defined(__x86_64__) || defined(__i386__) +#elif defined(__i386__) #define R_RELATIVE R_386_RELATIVE #define R_MASK 0xffULL +#elif defined(__x86_64__) +#define R_RELATIVE R_X86_64_RELATIVE +#define R_MASK 0xffffffffULL +#define IS_RELA 1 #elif defined(__riscv) #define R_RELATIVE R_RISCV_RELATIVE #define R_MASK 0xffULL @@ -358,7 +362,8 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map) p = (void*)((ulong)rel->offset - base) + gd->relocaddr; - debug("%s: rel->info=%#lx *p=%#lx rel->offset=%p\n", __func__, rel->info, *p, rel->offset); + debug("%s: rel->info=%#lx *p=%#lx rel->offset=%p\n", __func__, + rel->info, *p, rel->offset); switch (rel->info & R_MASK) { case R_RELATIVE: @@ -377,6 +382,9 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map) } #endif default: + if (!efi_runtime_tobedetached(p)) + printf("%s: Unknown relocation type %llx\n", + __func__, rel->info & R_MASK); continue; } @@ -385,8 +393,8 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map) newaddr > (map->virtual_start + (map->num_pages << EFI_PAGE_SHIFT)))) { if (!efi_runtime_tobedetached(p)) - printf("U-Boot EFI: Relocation at %p is out of " - "range (%lx)\n", p, newaddr); + printf("%s: Relocation at %p is out of " + "range (%lx)\n", __func__, p, newaddr); continue; } diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c index a1313fa215..19d9cb865f 100644 --- a/lib/efi_loader/efi_variable.c +++ b/lib/efi_loader/efi_variable.c @@ -294,8 +294,10 @@ efi_status_t EFIAPI efi_set_variable(u16 *variable_name, efi_guid_t *vendor, } val = malloc(2 * data_size + strlen("{ro,run,boot}(blob)") + 1); - if (!val) - return EFI_EXIT(EFI_OUT_OF_RESOURCES); + if (!val) { + ret = EFI_OUT_OF_RESOURCES; + goto out; + } s = val; diff --git a/lib/efi_selftest/efi_selftest_block_device.c b/lib/efi_selftest/efi_selftest_block_device.c index 1cd13042e9..d4e4fac1c7 100644 --- a/lib/efi_selftest/efi_selftest_block_device.c +++ b/lib/efi_selftest/efi_selftest_block_device.c @@ -308,6 +308,7 @@ static int execute(void) } system_info; efi_uintn_t buf_size; char buf[16] __aligned(ARCH_DMA_MINALIGN); + u64 pos; /* Connect controller to virtual disk */ ret = boottime->connect_controller(disk_handle, NULL, NULL, 1); @@ -392,21 +393,36 @@ static int execute(void) efi_st_error("Failed to open file\n"); return EFI_ST_FAILURE; } + ret = file->setpos(file, 1); + if (ret != EFI_SUCCESS) { + efi_st_error("SetPosition failed\n"); + return EFI_ST_FAILURE; + } buf_size = sizeof(buf) - 1; ret = file->read(file, &buf_size, buf); if (ret != EFI_SUCCESS) { efi_st_error("Failed to read file\n"); return EFI_ST_FAILURE; } - if (buf_size != 13) { + if (buf_size != 12) { efi_st_error("Wrong number of bytes read: %u\n", (unsigned int)buf_size); return EFI_ST_FAILURE; } - if (efi_st_memcmp(buf, "Hello world!", 12)) { + if (efi_st_memcmp(buf, "ello world!", 11)) { efi_st_error("Unexpected file content\n"); return EFI_ST_FAILURE; } + ret = file->getpos(file, &pos); + if (ret != EFI_SUCCESS) { + efi_st_error("GetPosition failed\n"); + return EFI_ST_FAILURE; + } + if (pos != 13) { + efi_st_error("GetPosition returned %u, expected 13\n", + (unsigned int)pos); + return EFI_ST_FAILURE; + } ret = file->close(file); if (ret != EFI_SUCCESS) { efi_st_error("Failed to close file\n"); @@ -434,6 +450,16 @@ static int execute(void) efi_st_error("Failed to close file\n"); return EFI_ST_FAILURE; } + ret = file->getpos(file, &pos); + if (ret != EFI_SUCCESS) { + efi_st_error("GetPosition failed\n"); + return EFI_ST_FAILURE; + } + if (pos != 7) { + efi_st_error("GetPosition returned %u, expected 7\n", + (unsigned int)pos); + return EFI_ST_FAILURE; + } /* Verify file */ boottime->set_mem(buf, sizeof(buf), 0); diff --git a/lib/efi_selftest/efi_selftest_controllers.c b/lib/efi_selftest/efi_selftest_controllers.c index ceefa03444..d08c377c72 100644 --- a/lib/efi_selftest/efi_selftest_controllers.c +++ b/lib/efi_selftest/efi_selftest_controllers.c @@ -134,6 +134,8 @@ static efi_status_t EFIAPI start( /* Create child controllers */ for (i = 0; i < NUMBER_OF_CHILD_CONTROLLERS; ++i) { + /* Creating a new handle for the child controller */ + handle_child_controller[i] = 0; ret = boottime->install_protocol_interface( &handle_child_controller[i], &guid_child_controller, EFI_NATIVE_INTERFACE, NULL); diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 74196ce7f9..a420ba1885 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -15,7 +15,6 @@ #include <serial.h> #include <asm/sections.h> #include <linux/ctype.h> -#include <linux/ioport.h> #include <linux/lzo.h> DECLARE_GLOBAL_DATA_PTR; @@ -922,28 +921,6 @@ char *fdtdec_get_config_string(const void *blob, const char *prop_name) return (char *)nodep; } -int fdtdec_decode_region(const void *blob, int node, const char *prop_name, - fdt_addr_t *basep, fdt_size_t *sizep) -{ - const fdt_addr_t *cell; - int len; - - debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL), - prop_name); - cell = fdt_getprop(blob, node, prop_name, &len); - if (!cell || (len < sizeof(fdt_addr_t) * 2)) { - debug("cell=%p, len=%d\n", cell, len); - return -1; - } - - *basep = fdt_addr_to_cpu(*cell); - *sizep = fdt_size_to_cpu(cell[1]); - debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep, - (ulong)*sizep); - - return 0; -} - u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells) { u64 number = 0; @@ -1002,67 +979,6 @@ int fdt_get_named_resource(const void *fdt, int node, const char *property, return fdt_get_resource(fdt, node, property, index, res); } -int fdtdec_decode_memory_region(const void *blob, int config_node, - const char *mem_type, const char *suffix, - fdt_addr_t *basep, fdt_size_t *sizep) -{ - char prop_name[50]; - const char *mem; - fdt_size_t size, offset_size; - fdt_addr_t base, offset; - int node; - - if (config_node == -1) { - config_node = fdt_path_offset(blob, "/config"); - if (config_node < 0) { - debug("%s: Cannot find /config node\n", __func__); - return -ENOENT; - } - } - if (!suffix) - suffix = ""; - - snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type, - suffix); - mem = fdt_getprop(blob, config_node, prop_name, NULL); - if (!mem) { - debug("%s: No memory type for '%s', using /memory\n", __func__, - prop_name); - mem = "/memory"; - } - - node = fdt_path_offset(blob, mem); - if (node < 0) { - debug("%s: Failed to find node '%s': %s\n", __func__, mem, - fdt_strerror(node)); - return -ENOENT; - } - - /* - * Not strictly correct - the memory may have multiple banks. We just - * use the first - */ - if (fdtdec_decode_region(blob, node, "reg", &base, &size)) { - debug("%s: Failed to decode memory region %s\n", __func__, - mem); - return -EINVAL; - } - - snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type, - suffix); - if (fdtdec_decode_region(blob, config_node, prop_name, &offset, - &offset_size)) { - debug("%s: Failed to decode memory region '%s'\n", __func__, - prop_name); - return -EINVAL; - } - - *basep = base + offset; - *sizep = offset_size; - - return 0; -} - static int decode_timing_property(const void *blob, int node, const char *name, struct timing_entry *result) { @@ -1182,34 +1098,41 @@ int fdtdec_setup_mem_size_base(void) #if defined(CONFIG_NR_DRAM_BANKS) -static ofnode get_next_memory_node(ofnode mem) +static int get_next_memory_node(const void *blob, int mem) { do { - mem = ofnode_by_prop_value(mem, "device_type", "memory", 7); - } while (ofnode_valid(mem) && !ofnode_is_available(mem)); + mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem, + "device_type", "memory", 7); + } while (!fdtdec_get_is_enabled(blob, mem)); return mem; } int fdtdec_setup_memory_banksize(void) { - int bank, reg = 0; - struct resource res; - ofnode mem; + int bank, ret, mem, reg = 0; + struct fdt_resource res; - mem = get_next_memory_node(ofnode_null()); - if (!ofnode_valid(mem)) - goto missing_node; + mem = get_next_memory_node(gd->fdt_blob, -1); + if (mem < 0) { + debug("%s: Missing /memory node\n", __func__); + return -EINVAL; + } for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { - while (ofnode_read_resource(mem, reg++, &res)) { + ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res); + if (ret == -FDT_ERR_NOTFOUND) { reg = 0; - mem = get_next_memory_node(mem); - if (!ofnode_valid(mem)) { - if (bank) - return 0; - goto missing_node; - } + mem = get_next_memory_node(gd->fdt_blob, mem); + if (mem == -FDT_ERR_NOTFOUND) + break; + + ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res); + if (ret == -FDT_ERR_NOTFOUND) + break; + } + if (ret != 0) { + return -EINVAL; } gd->bd->bi_dram[bank].start = (phys_addr_t)res.start; @@ -1223,10 +1146,6 @@ int fdtdec_setup_memory_banksize(void) } return 0; - -missing_node: - debug("%s: Missing /memory node\n", __func__); - return -EINVAL; } #endif diff --git a/lib/hang.c b/lib/hang.c index bf56f4c662..c5a78694be 100644 --- a/lib/hang.c +++ b/lib/hang.c @@ -20,8 +20,9 @@ */ void hang(void) { -#if !defined(CONFIG_SPL_BUILD) || (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \ - defined(CONFIG_SPL_SERIAL_SUPPORT)) +#if !defined(CONFIG_SPL_BUILD) || \ + (CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT) && \ + CONFIG_IS_ENABLED(SERIAL_SUPPORT)) puts("### ERROR ### Please RESET the board ###\n"); #endif bootstage_error(BOOTSTAGE_ID_NEED_RESET); diff --git a/lib/tpm-common.c b/lib/tpm-common.c index 43b530865a..a440639cec 100644 --- a/lib/tpm-common.c +++ b/lib/tpm-common.c @@ -4,6 +4,8 @@ * Coypright (c) 2013 Guntermann & Drunck GmbH */ +#define LOG_CATEGORY UCLASS_TPM + #include <common.h> #include <dm.h> #include <asm/unaligned.h> @@ -110,6 +112,8 @@ int unpack_byte_string(const u8 *str, size_t size, const char *format, ...) if (offset + length > size) { va_end(args); + log_err("Failed to read: size=%d, offset=%x, len=%x\n", + size, offset, length); return -1; } @@ -176,10 +180,10 @@ u32 tpm_sendrecv_command(const void *command, void *response, size_t *size_ptr) ret = tpm_return_code(response); - log(LOGC_NONE, LOGL_DEBUG, "TPM response [ret:%d]: ", ret); + log_debug("TPM response [ret:%d]: ", ret); for (i = 0; i < response_length; i++) - log(LOGC_NONE, LOGL_DEBUG, "%02x ", ((u8 *)response)[i]); - log(LOGC_NONE, LOGL_DEBUG, "\n"); + log_debug("%02x ", ((u8 *)response)[i]); + log_debug("\n"); return ret; } diff --git a/lib/tpm-v1.c b/lib/tpm-v1.c index 7aecb24f92..9d45c3d3bf 100644 --- a/lib/tpm-v1.c +++ b/lib/tpm-v1.c @@ -4,6 +4,8 @@ * Coypright (c) 2013 Guntermann & Drunck GmbH */ +#define LOG_CATEGORY UCLASS_TPM + #include <common.h> #include <dm.h> #include <asm/unaligned.h> @@ -45,6 +47,11 @@ u32 tpm_startup(enum tpm_startup_type mode) return tpm_sendrecv_command(buf, NULL, NULL); } +u32 tpm_resume(void) +{ + return tpm_startup(TPM_ST_STATE); +} + u32 tpm_self_test_full(void) { const u8 command[10] = { @@ -61,6 +68,34 @@ u32 tpm_continue_self_test(void) return tpm_sendrecv_command(command, NULL, NULL); } +u32 tpm_clear_and_reenable(void) +{ + u32 ret; + + log_info("TPM: Clear and re-enable\n"); + ret = tpm_force_clear(); + if (ret != TPM_SUCCESS) { + log_err("Can't initiate a force clear\n"); + return ret; + } + +#if IS_ENABLED(CONFIG_TPM_V1) + ret = tpm_physical_enable(); + if (ret != TPM_SUCCESS) { + log_err("TPM: Can't set enabled state\n"); + return ret; + } + + ret = tpm_physical_set_deactivated(0); + if (ret != TPM_SUCCESS) { + log_err("TPM: Can't set deactivated state\n"); + return ret; + } +#endif + + return TPM_SUCCESS; +} + u32 tpm_nv_define_space(u32 index, u32 perm, u32 size) { const u8 command[101] = { @@ -104,6 +139,11 @@ u32 tpm_nv_define_space(u32 index, u32 perm, u32 size) return tpm_sendrecv_command(buf, NULL, NULL); } +u32 tpm_nv_set_locked(void) +{ + return tpm_nv_define_space(TPM_NV_INDEX_LOCK, 0, 0); +} + u32 tpm_nv_read_value(u32 index, void *data, u32 count) { const u8 command[22] = { @@ -168,6 +208,13 @@ u32 tpm_nv_write_value(u32 index, const void *data, u32 length) return 0; } +uint32_t tpm_set_global_lock(void) +{ + u32 x; + + return tpm_nv_write_value(TPM_NV_INDEX_0, (uint8_t *)&x, 0); +} + u32 tpm_extend(u32 index, const void *in_digest, void *out_digest) { const u8 command[34] = { @@ -243,6 +290,15 @@ u32 tpm_tsc_physical_presence(u16 presence) return tpm_sendrecv_command(buf, NULL, NULL); } +u32 tpm_finalise_physical_presence(void) +{ + const u8 command[12] = { + 0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x2, 0xa0, + }; + + return tpm_sendrecv_command(command, NULL, NULL); +} + u32 tpm_read_pubek(void *data, size_t count) { const u8 command[30] = { @@ -377,13 +433,19 @@ u32 tpm_get_permanent_flags(struct tpm_permanent_flags *pflags) if (err) return err; if (unpack_byte_string(response, response_length, "d", - data_size_offset, &data_size)) + data_size_offset, &data_size)) { + log_err("Cannot unpack data size\n"); return TPM_LIB_ERROR; - if (data_size < sizeof(*pflags)) + } + if (data_size < sizeof(*pflags)) { + log_err("Data size too small\n"); return TPM_LIB_ERROR; + } if (unpack_byte_string(response, response_length, "s", - data_offset, pflags, sizeof(*pflags))) + data_offset, pflags, sizeof(*pflags))) { + log_err("Cannot unpack pflags\n"); return TPM_LIB_ERROR; + } return 0; } @@ -34,8 +34,7 @@ uchar *arp_wait_packet_ethaddr; int arp_wait_tx_packet_size; ulong arp_wait_timer_start; int arp_wait_try; - -static uchar *arp_tx_packet; /* THE ARP transmit packet */ +uchar *arp_tx_packet; /* THE ARP transmit packet */ static uchar arp_tx_packet_buf[PKTSIZE_ALIGN + PKTALIGN]; void arp_init(void) @@ -100,7 +99,7 @@ int arp_timeout_check(void) { ulong t; - if (!net_arp_wait_packet_ip.s_addr) + if (!arp_is_waiting()) return 0; t = get_timer(0); @@ -126,6 +125,7 @@ void arp_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, int len) struct arp_hdr *arp; struct in_addr reply_ip_addr; int eth_hdr_size; + uchar *tx_packet; /* * We have to deal with two types of ARP packets: @@ -182,13 +182,14 @@ void arp_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, int len) (net_read_ip(&arp->ar_spa).s_addr & net_netmask.s_addr)) udelay(5000); #endif - memcpy(net_tx_packet, et, eth_hdr_size + ARP_HDR_SIZE); - net_send_packet(net_tx_packet, eth_hdr_size + ARP_HDR_SIZE); + tx_packet = net_get_async_tx_pkt_buf(); + memcpy(tx_packet, et, eth_hdr_size + ARP_HDR_SIZE); + net_send_packet(tx_packet, eth_hdr_size + ARP_HDR_SIZE); return; case ARPOP_REPLY: /* arp reply */ - /* are we waiting for a reply */ - if (!net_arp_wait_packet_ip.s_addr) + /* are we waiting for a reply? */ + if (!arp_is_waiting()) break; #ifdef CONFIG_KEEP_SERVERADDR @@ -233,3 +234,8 @@ void arp_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, int len) return; } } + +bool arp_is_waiting(void) +{ + return !!net_arp_wait_packet_ip.s_addr; +} @@ -20,6 +20,7 @@ extern uchar *arp_wait_packet_ethaddr; extern int arp_wait_tx_packet_size; extern ulong arp_wait_timer_start; extern int arp_wait_try; +extern uchar *arp_tx_packet; void arp_init(void); void arp_request(void); @@ -799,9 +799,25 @@ void net_set_timeout_handler(ulong iv, thand_f *f) } } +uchar *net_get_async_tx_pkt_buf(void) +{ + if (arp_is_waiting()) + return arp_tx_packet; /* If we are waiting, we already sent */ + else + return net_tx_packet; +} + int net_send_udp_packet(uchar *ether, struct in_addr dest, int dport, int sport, int payload_len) { + return net_send_ip_packet(ether, dest, dport, sport, payload_len, + IPPROTO_UDP, 0, 0, 0); +} + +int net_send_ip_packet(uchar *ether, struct in_addr dest, int dport, int sport, + int payload_len, int proto, u8 action, u32 tcp_seq_num, + u32 tcp_ack_num) +{ uchar *pkt; int eth_hdr_size; int pkt_hdr_size; @@ -822,9 +838,16 @@ int net_send_udp_packet(uchar *ether, struct in_addr dest, int dport, int sport, pkt = (uchar *)net_tx_packet; eth_hdr_size = net_set_ether(pkt, ether, PROT_IP); - pkt += eth_hdr_size; - net_set_udp_header(pkt, dest, dport, sport, payload_len); - pkt_hdr_size = eth_hdr_size + IP_UDP_HDR_SIZE; + + switch (proto) { + case IPPROTO_UDP: + net_set_udp_header(pkt + eth_hdr_size, dest, dport, sport, + payload_len); + pkt_hdr_size = eth_hdr_size + IP_UDP_HDR_SIZE; + break; + default: + return -EINVAL; + } /* if MAC address was not discovered yet, do an ARP request */ if (memcmp(ether, net_null_ethaddr, 6) == 0) { @@ -1455,7 +1478,8 @@ int net_update_ether(struct ethernet_hdr *et, uchar *addr, uint prot) } } -void net_set_ip_header(uchar *pkt, struct in_addr dest, struct in_addr source) +void net_set_ip_header(uchar *pkt, struct in_addr dest, struct in_addr source, + u16 pkt_len, u8 proto) { struct ip_udp_hdr *ip = (struct ip_udp_hdr *)pkt; @@ -1465,7 +1489,8 @@ void net_set_ip_header(uchar *pkt, struct in_addr dest, struct in_addr source) /* IP_HDR_SIZE / 4 (not including UDP) */ ip->ip_hl_v = 0x45; ip->ip_tos = 0; - ip->ip_len = htons(IP_HDR_SIZE); + ip->ip_len = htons(pkt_len); + ip->ip_p = proto; ip->ip_id = htons(net_ip_id++); ip->ip_off = htons(IP_FLAGS_DFRAG); /* Don't fragment */ ip->ip_ttl = 255; @@ -1474,6 +1499,8 @@ void net_set_ip_header(uchar *pkt, struct in_addr dest, struct in_addr source) net_copy_ip((void *)&ip->ip_src, &source); /* already in network byte order */ net_copy_ip((void *)&ip->ip_dst, &dest); + + ip->ip_sum = compute_ip_checksum(ip, IP_HDR_SIZE); } void net_set_udp_header(uchar *pkt, struct in_addr dest, int dport, int sport, @@ -1489,10 +1516,8 @@ void net_set_udp_header(uchar *pkt, struct in_addr dest, int dport, int sport, if (len & 1) pkt[IP_UDP_HDR_SIZE + len] = 0; - net_set_ip_header(pkt, dest, net_ip); - ip->ip_len = htons(IP_UDP_HDR_SIZE + len); - ip->ip_p = IPPROTO_UDP; - ip->ip_sum = compute_ip_checksum(ip, IP_HDR_SIZE); + net_set_ip_header(pkt, dest, net_ip, IP_UDP_HDR_SIZE + len, + IPPROTO_UDP); ip->udp_src = htons(sport); ip->udp_dst = htons(dport); diff --git a/net/ping.c b/net/ping.c index 3e5461a36a..633c942e67 100644 --- a/net/ping.c +++ b/net/ping.c @@ -22,14 +22,9 @@ static void set_icmp_header(uchar *pkt, struct in_addr dest) /* * Construct an IP and ICMP header. */ - struct ip_hdr *ip = (struct ip_hdr *)pkt; struct icmp_hdr *icmp = (struct icmp_hdr *)(pkt + IP_HDR_SIZE); - net_set_ip_header(pkt, dest, net_ip); - - ip->ip_len = htons(IP_ICMP_HDR_SIZE); - ip->ip_p = IPPROTO_ICMP; - ip->ip_sum = compute_ip_checksum(ip, IP_HDR_SIZE); + net_set_ip_header(pkt, dest, net_ip, IP_ICMP_HDR_SIZE, IPPROTO_ICMP); icmp->type = ICMP_ECHO_REQUEST; icmp->code = 0; @@ -84,6 +79,7 @@ void ping_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, int len) struct icmp_hdr *icmph = (struct icmp_hdr *)&ip->udp_src; struct in_addr src_ip; int eth_hdr_size; + uchar *tx_packet; switch (icmph->type) { case ICMP_ECHO_REPLY: @@ -107,8 +103,10 @@ void ping_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, int len) icmph->type = ICMP_ECHO_REPLY; icmph->checksum = 0; icmph->checksum = compute_ip_checksum(icmph, len - IP_HDR_SIZE); - memcpy(net_tx_packet, et, eth_hdr_size + len); - net_send_packet(net_tx_packet, eth_hdr_size + len); + + tx_packet = net_get_async_tx_pkt_buf(); + memcpy(tx_packet, et, eth_hdr_size + len); + net_send_packet(tx_packet, eth_hdr_size + len); return; /* default: return;*/ diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index e494d185e4..7416abec62 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -45,6 +45,13 @@ SPL_ := SPL_TPL_ := endif +ifeq ($(obj)$(CONFIG_SUPPORT_SPL),spl) +$(error You cannot build SPL without enabling CONFIG_SUPPORT_SPL) +endif +ifeq ($(obj)$(CONFIG_SUPPORT_TPL),tpl) +$(error You cannot build TPL without enabling CONFIG_SUPPORT_TPL) +endif + include $(srctree)/config.mk include $(srctree)/arch/$(ARCH)/Makefile @@ -364,7 +371,7 @@ $(u-boot-spl-dirs): $(u-boot-spl-platdata) quiet_cmd_cpp_lds = LDS $@ cmd_cpp_lds = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) -ansi \ - -D__ASSEMBLY__ -x assembler-with-cpp -P -o $@ $< + -D__ASSEMBLY__ -x assembler-with-cpp -std=c99 -P -o $@ $< $(obj)/u-boot-spl.lds: $(LDSCRIPT) FORCE $(call if_changed_dep,cpp_lds) diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index fe82419d66..94c0f1ff82 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -614,9 +614,7 @@ CONFIG_FLASHBOOTCOMMAND CONFIG_FLASHCARD CONFIG_FLASH_BASE CONFIG_FLASH_BR_PRELIM -CONFIG_FLASH_CFI_DRIVER CONFIG_FLASH_CFI_LEGACY -CONFIG_FLASH_CFI_MTD CONFIG_FLASH_END CONFIG_FLASH_NOT_MEM_MAPPED CONFIG_FLASH_OR_PRELIM @@ -1176,8 +1174,6 @@ CONFIG_LPC32XX_NAND_SLC_WDR_CLKS CONFIG_LPC32XX_NAND_SLC_WHOLD CONFIG_LPC32XX_NAND_SLC_WSETUP CONFIG_LPC32XX_NAND_SLC_WWIDTH -CONFIG_LPC32XX_SDRAM_ -CONFIG_LPC32XX_SPL CONFIG_LPC32XX_SSP_TIMEOUT CONFIG_LPC_BASE CONFIG_LPC_IO_BASE @@ -1671,7 +1667,6 @@ CONFIG_RTC_IMXDI CONFIG_RTC_M41T11 CONFIG_RTC_M41T62 CONFIG_RTC_MC13XXX -CONFIG_RTC_MC146818 CONFIG_RTC_MCFRRTC CONFIG_RTC_MCP79411 CONFIG_RTC_MXS @@ -2587,7 +2582,6 @@ CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE_PHYS_EARLY CONFIG_SYS_FLASH_BASE_PHYS_LOW CONFIG_SYS_FLASH_BR_PRELIM -CONFIG_SYS_FLASH_CFI CONFIG_SYS_FLASH_CFI_AMD_RESET CONFIG_SYS_FLASH_CFI_BROKEN_TABLE CONFIG_SYS_FLASH_CFI_NONBLOCK @@ -2602,13 +2596,11 @@ CONFIG_SYS_FLASH_LEGACY_512Kx8 CONFIG_SYS_FLASH_LOCK_TOUT CONFIG_SYS_FLASH_OR_PRELIM CONFIG_SYS_FLASH_PARMSECT_SZ -CONFIG_SYS_FLASH_PROTECTION CONFIG_SYS_FLASH_QUIET_TEST CONFIG_SYS_FLASH_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ CONFIG_SYS_FLASH_SIZE CONFIG_SYS_FLASH_UNLOCK_TOUT -CONFIG_SYS_FLASH_USE_BUFFER_WRITE CONFIG_SYS_FLASH_VERIFY_AFTER_WRITE CONFIG_SYS_FLASH_WRITE_TOUT CONFIG_SYS_FLYCNFG_VAL diff --git a/test/dm/Makefile b/test/dm/Makefile index 57c7dfbcaf..b490cf2862 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_DM_MAILBOX) += mailbox.o obj-$(CONFIG_DM_MMC) += mmc.o obj-y += ofnode.o obj-$(CONFIG_OSD) += osd.o +obj-$(CONFIG_DM_VIDEO) += panel.o obj-$(CONFIG_DM_PCI) += pci.o obj-$(CONFIG_PHY) += phy.o obj-$(CONFIG_POWER_DOMAIN) += power-domain.o diff --git a/test/dm/bus.c b/test/dm/bus.c index e9a4028f04..08137a2216 100644 --- a/test/dm/bus.c +++ b/test/dm/bus.c @@ -4,6 +4,9 @@ */ #include <common.h> +#ifdef CONFIG_SANDBOX +#include <os.h> +#endif #include <dm.h> #include <dm/device-internal.h> #include <dm/test.h> @@ -297,6 +300,11 @@ static int dm_test_bus_parent_data_uclass(struct unit_test_state *uts) ut_assertok(uclass_find_device(UCLASS_TEST_BUS, 0, &bus)); drv = (struct driver *)bus->driver; size = drv->per_child_auto_alloc_size; + +#ifdef CONFIG_SANDBOX + os_mprotect_allow(bus->uclass->uc_drv, sizeof(*bus->uclass->uc_drv)); + os_mprotect_allow(drv, sizeof(*drv)); +#endif bus->uclass->uc_drv->per_child_auto_alloc_size = size; drv->per_child_auto_alloc_size = 0; ret = test_bus_parent_data(uts); @@ -440,6 +448,10 @@ static int dm_test_bus_parent_platdata_uclass(struct unit_test_state *uts) ut_assertok(uclass_find_device(UCLASS_TEST_BUS, 0, &bus)); drv = (struct driver *)bus->driver; size = drv->per_child_platdata_auto_alloc_size; +#ifdef CONFIG_SANDBOX + os_mprotect_allow(bus->uclass->uc_drv, sizeof(*bus->uclass->uc_drv)); + os_mprotect_allow(drv, sizeof(*drv)); +#endif bus->uclass->uc_drv->per_child_platdata_auto_alloc_size = size; drv->per_child_platdata_auto_alloc_size = 0; ret = test_bus_parent_platdata(uts); diff --git a/test/dm/core.c b/test/dm/core.c index c15a8406c0..260f6494a2 100644 --- a/test/dm/core.c +++ b/test/dm/core.c @@ -870,3 +870,34 @@ static int dm_test_uclass_names(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_uclass_names, DM_TESTF_SCAN_PDATA); + +static int dm_test_inactive_child(struct unit_test_state *uts) +{ + struct dm_test_state *dms = uts->priv; + struct udevice *parent, *dev1, *dev2; + + /* Skip the behaviour in test_post_probe() */ + dms->skip_post_probe = 1; + + ut_assertok(uclass_first_device_err(UCLASS_TEST, &parent)); + + /* + * Create a child but do not activate it. Calling the function again + * should return the same child. + */ + ut_asserteq(-ENODEV, device_find_first_inactive_child(parent, + UCLASS_TEST, &dev1)); + ut_assertok(device_bind_ofnode(parent, DM_GET_DRIVER(test_drv), + "test_child", 0, ofnode_null(), &dev1)); + + ut_assertok(device_find_first_inactive_child(parent, UCLASS_TEST, + &dev2)); + ut_asserteq_ptr(dev1, dev2); + + ut_assertok(device_probe(dev1)); + ut_asserteq(-ENODEV, device_find_first_inactive_child(parent, + UCLASS_TEST, &dev2)); + + return 0; +} +DM_TEST(dm_test_inactive_child, DM_TESTF_SCAN_PDATA); diff --git a/test/dm/eth.c b/test/dm/eth.c index 1a7684a887..850eabb9dc 100644 --- a/test/dm/eth.c +++ b/test/dm/eth.c @@ -258,3 +258,173 @@ static int dm_test_net_retry(struct unit_test_state *uts) return retval; } DM_TEST(dm_test_net_retry, DM_TESTF_SCAN_FDT); + +static int sb_check_arp_reply(struct udevice *dev, void *packet, + unsigned int len) +{ + struct eth_sandbox_priv *priv = dev_get_priv(dev); + struct ethernet_hdr *eth = packet; + struct arp_hdr *arp; + /* Used by all of the ut_assert macros */ + struct unit_test_state *uts = priv->priv; + + if (ntohs(eth->et_protlen) != PROT_ARP) + return 0; + + arp = packet + ETHER_HDR_SIZE; + + if (ntohs(arp->ar_op) != ARPOP_REPLY) + return 0; + + /* This test would be worthless if we are not waiting */ + ut_assert(arp_is_waiting()); + + /* Validate response */ + ut_assert(memcmp(eth->et_src, net_ethaddr, ARP_HLEN) == 0); + ut_assert(memcmp(eth->et_dest, priv->fake_host_hwaddr, ARP_HLEN) == 0); + ut_assert(eth->et_protlen == htons(PROT_ARP)); + + ut_assert(arp->ar_hrd == htons(ARP_ETHER)); + ut_assert(arp->ar_pro == htons(PROT_IP)); + ut_assert(arp->ar_hln == ARP_HLEN); + ut_assert(arp->ar_pln == ARP_PLEN); + ut_assert(memcmp(&arp->ar_sha, net_ethaddr, ARP_HLEN) == 0); + ut_assert(net_read_ip(&arp->ar_spa).s_addr == net_ip.s_addr); + ut_assert(memcmp(&arp->ar_tha, priv->fake_host_hwaddr, ARP_HLEN) == 0); + ut_assert(net_read_ip(&arp->ar_tpa).s_addr == + string_to_ip("1.1.2.4").s_addr); + + return 0; +} + +static int sb_with_async_arp_handler(struct udevice *dev, void *packet, + unsigned int len) +{ + struct eth_sandbox_priv *priv = dev_get_priv(dev); + struct ethernet_hdr *eth = packet; + struct arp_hdr *arp = packet + ETHER_HDR_SIZE; + int ret; + + /* + * If we are about to generate a reply to ARP, first inject a request + * from another host + */ + if (ntohs(eth->et_protlen) == PROT_ARP && + ntohs(arp->ar_op) == ARPOP_REQUEST) { + /* Make sure sandbox_eth_recv_arp_req() knows who is asking */ + priv->fake_host_ipaddr = string_to_ip("1.1.2.4"); + + ret = sandbox_eth_recv_arp_req(dev); + if (ret) + return ret; + } + + sandbox_eth_arp_req_to_reply(dev, packet, len); + sandbox_eth_ping_req_to_reply(dev, packet, len); + + return sb_check_arp_reply(dev, packet, len); +} + +static int dm_test_eth_async_arp_reply(struct unit_test_state *uts) +{ + net_ping_ip = string_to_ip("1.1.2.2"); + + sandbox_eth_set_tx_handler(0, sb_with_async_arp_handler); + /* Used by all of the ut_assert macros in the tx_handler */ + sandbox_eth_set_priv(0, uts); + + env_set("ethact", "eth@10002000"); + ut_assertok(net_loop(PING)); + ut_asserteq_str("eth@10002000", env_get("ethact")); + + sandbox_eth_set_tx_handler(0, NULL); + + return 0; +} + +DM_TEST(dm_test_eth_async_arp_reply, DM_TESTF_SCAN_FDT); + +static int sb_check_ping_reply(struct udevice *dev, void *packet, + unsigned int len) +{ + struct eth_sandbox_priv *priv = dev_get_priv(dev); + struct ethernet_hdr *eth = packet; + struct ip_udp_hdr *ip; + struct icmp_hdr *icmp; + /* Used by all of the ut_assert macros */ + struct unit_test_state *uts = priv->priv; + + if (ntohs(eth->et_protlen) != PROT_IP) + return 0; + + ip = packet + ETHER_HDR_SIZE; + + if (ip->ip_p != IPPROTO_ICMP) + return 0; + + icmp = (struct icmp_hdr *)&ip->udp_src; + + if (icmp->type != ICMP_ECHO_REPLY) + return 0; + + /* This test would be worthless if we are not waiting */ + ut_assert(arp_is_waiting()); + + /* Validate response */ + ut_assert(memcmp(eth->et_src, net_ethaddr, ARP_HLEN) == 0); + ut_assert(memcmp(eth->et_dest, priv->fake_host_hwaddr, ARP_HLEN) == 0); + ut_assert(eth->et_protlen == htons(PROT_IP)); + + ut_assert(net_read_ip(&ip->ip_src).s_addr == net_ip.s_addr); + ut_assert(net_read_ip(&ip->ip_dst).s_addr == + string_to_ip("1.1.2.4").s_addr); + + return 0; +} + +static int sb_with_async_ping_handler(struct udevice *dev, void *packet, + unsigned int len) +{ + struct eth_sandbox_priv *priv = dev_get_priv(dev); + struct ethernet_hdr *eth = packet; + struct arp_hdr *arp = packet + ETHER_HDR_SIZE; + int ret; + + /* + * If we are about to generate a reply to ARP, first inject a request + * from another host + */ + if (ntohs(eth->et_protlen) == PROT_ARP && + ntohs(arp->ar_op) == ARPOP_REQUEST) { + /* Make sure sandbox_eth_recv_arp_req() knows who is asking */ + priv->fake_host_ipaddr = string_to_ip("1.1.2.4"); + + ret = sandbox_eth_recv_ping_req(dev); + if (ret) + return ret; + } + + sandbox_eth_arp_req_to_reply(dev, packet, len); + sandbox_eth_ping_req_to_reply(dev, packet, len); + + return sb_check_ping_reply(dev, packet, len); +} + +static int dm_test_eth_async_ping_reply(struct unit_test_state *uts) +{ + net_ping_ip = string_to_ip("1.1.2.2"); + + sandbox_eth_set_tx_handler(0, sb_with_async_ping_handler); + /* Used by all of the ut_assert macros in the tx_handler */ + sandbox_eth_set_priv(0, uts); + + env_set("ethact", "eth@10002000"); + ut_assertok(net_loop(PING)); + ut_asserteq_str("eth@10002000", env_get("ethact")); + + sandbox_eth_set_tx_handler(0, NULL); + + return 0; +} + +DM_TEST(dm_test_eth_async_ping_reply, DM_TESTF_SCAN_FDT); diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index 907d1ddbdb..745de50c7b 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -2,6 +2,7 @@ #include <common.h> #include <dm.h> +#include <dm/of_extra.h> #include <dm/test.h> #include <test/ut.h> @@ -42,3 +43,18 @@ static int dm_test_ofnode_by_prop_value(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_ofnode_by_prop_value, DM_TESTF_SCAN_FDT); + +static int dm_test_ofnode_fmap(struct unit_test_state *uts) +{ + struct fmap_entry entry; + ofnode node; + + node = ofnode_path("/cros-ec/flash"); + ut_assert(ofnode_valid(node)); + ut_assertok(ofnode_read_fmap_entry(node, &entry)); + ut_asserteq(0x08000000, entry.offset); + ut_asserteq(0x20000, entry.length); + + return 0; +} +DM_TEST(dm_test_ofnode_fmap, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); diff --git a/test/dm/panel.c b/test/dm/panel.c new file mode 100644 index 0000000000..7e4ebd6d81 --- /dev/null +++ b/test/dm/panel.c @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Test for panel uclass + * + * Copyright (c) 2018 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + */ + +#include <common.h> +#include <backlight.h> +#include <dm.h> +#include <panel.h> +#include <video.h> +#include <asm/gpio.h> +#include <asm/test.h> +#include <dm/test.h> +#include <test/ut.h> +#include <power/regulator.h> + +/* Basic test of the panel uclass */ +static int dm_test_panel(struct unit_test_state *uts) +{ + struct udevice *dev, *pwm, *gpio, *reg; + uint period_ns; + uint duty_ns; + bool enable; + bool polarity; + + ut_assertok(uclass_first_device_err(UCLASS_PANEL, &dev)); + ut_assertok(uclass_first_device_err(UCLASS_PWM, &pwm)); + ut_assertok(uclass_get_device(UCLASS_GPIO, 1, &gpio)); + ut_assertok(regulator_get_by_platname("VDD_EMMC_1.8V", ®)); + ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, + &enable, &polarity)); + ut_asserteq(false, enable); + ut_asserteq(false, regulator_get_enable(reg)); + + ut_assertok(panel_enable_backlight(dev)); + ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, + &enable, &polarity)); + ut_asserteq(1000, period_ns); + ut_asserteq(170 * 1000 / 256, duty_ns); + ut_asserteq(true, enable); + ut_asserteq(false, polarity); + ut_asserteq(1, sandbox_gpio_get_value(gpio, 1)); + ut_asserteq(true, regulator_get_enable(reg)); + + ut_assertok(panel_set_backlight(dev, 40)); + ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, + &enable, &polarity)); + ut_asserteq(64 * 1000 / 256, duty_ns); + + ut_assertok(panel_set_backlight(dev, BACKLIGHT_MAX)); + ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, + &enable, &polarity)); + ut_asserteq(255 * 1000 / 256, duty_ns); + + ut_assertok(panel_set_backlight(dev, BACKLIGHT_MIN)); + ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, + &enable, &polarity)); + ut_asserteq(0 * 1000 / 256, duty_ns); + ut_asserteq(1, sandbox_gpio_get_value(gpio, 1)); + + ut_assertok(panel_set_backlight(dev, BACKLIGHT_DEFAULT)); + ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, + &enable, &polarity)); + ut_asserteq(true, enable); + ut_asserteq(170 * 1000 / 256, duty_ns); + + ut_assertok(panel_set_backlight(dev, BACKLIGHT_OFF)); + ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, + &enable, &polarity)); + ut_asserteq(0 * 1000 / 256, duty_ns); + ut_asserteq(0, sandbox_gpio_get_value(gpio, 1)); + ut_asserteq(false, regulator_get_enable(reg)); + + return 0; +} +DM_TEST(dm_test_panel, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); diff --git a/test/dm/pci.c b/test/dm/pci.c index 869970072d..a1dedd84a7 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -119,8 +119,13 @@ static int dm_test_pci_drvdata(struct unit_test_state *uts) ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &swap)); ut_asserteq(SWAP_CASE_DRV_DATA, swap->driver_data); + ut_assertok(dev_of_valid(swap)); ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x0c, 0), &swap)); ut_asserteq(SWAP_CASE_DRV_DATA, swap->driver_data); + ut_assertok(dev_of_valid(swap)); + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x10, 0), &swap)); + ut_asserteq(SWAP_CASE_DRV_DATA, swap->driver_data); + ut_assertok(!dev_of_valid(swap)); return 0; } diff --git a/test/dm/sysreset.c b/test/dm/sysreset.c index 04d4621d9e..e1b7bf5277 100644 --- a/test/dm/sysreset.c +++ b/test/dm/sysreset.c @@ -62,7 +62,6 @@ static int dm_test_sysreset_get_status(struct unit_test_state *uts) return 0; } - DM_TEST(dm_test_sysreset_get_status, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); /* Test that we can walk through the sysreset devices */ @@ -72,6 +71,7 @@ static int dm_test_sysreset_walk(struct unit_test_state *uts) /* If we generate a power sysreset, we will exit sandbox! */ state->sysreset_allowed[SYSRESET_POWER] = false; + state->sysreset_allowed[SYSRESET_POWER_OFF] = false; ut_asserteq(-EACCES, sysreset_walk(SYSRESET_WARM)); ut_asserteq(-EACCES, sysreset_walk(SYSRESET_COLD)); ut_asserteq(-EACCES, sysreset_walk(SYSRESET_POWER)); @@ -91,3 +91,22 @@ static int dm_test_sysreset_walk(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_sysreset_walk, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + +static int dm_test_sysreset_get_last(struct unit_test_state *uts) +{ + struct udevice *dev; + + /* Device 1 is the warm sysreset device */ + ut_assertok(uclass_get_device(UCLASS_SYSRESET, 1, &dev)); + ut_asserteq(SYSRESET_WARM, sysreset_get_last(dev)); + + /* Device 2 is the cold sysreset device */ + ut_assertok(uclass_get_device(UCLASS_SYSRESET, 2, &dev)); + ut_asserteq(SYSRESET_COLD, sysreset_get_last(dev)); + + /* This is device 0, the non-DT one */ + ut_asserteq(SYSRESET_COLD, sysreset_get_last_walk()); + + return 0; +} +DM_TEST(dm_test_sysreset_get_last, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); diff --git a/test/dm/video.c b/test/dm/video.c index ef74c2de72..7def338058 100644 --- a/test/dm/video.c +++ b/test/dm/video.c @@ -169,7 +169,7 @@ static int dm_test_video_ansi(struct unit_test_state *uts) /* reference clear: */ video_clear(con->parent); - video_sync(con->parent); + video_sync(con->parent, false); ut_asserteq(46, compress_frame_buffer(dev)); /* test clear escape sequence: [2J */ diff --git a/test/log/log_test.c b/test/log/log_test.c index de431b0823..febc2c1252 100644 --- a/test/log/log_test.c +++ b/test/log/log_test.c @@ -181,6 +181,19 @@ static int log_test(int testnum) return ret; break; } + case 10: { + log_err("level %d\n", LOGL_EMERG); + log_err("level %d\n", LOGL_ALERT); + log_err("level %d\n", LOGL_CRIT); + log_err("level %d\n", LOGL_ERR); + log_warning("level %d\n", LOGL_WARNING); + log_notice("level %d\n", LOGL_NOTICE); + log_info("level %d\n", LOGL_INFO); + log_debug("level %d\n", LOGL_DEBUG); + log_content("level %d\n", LOGL_DEBUG_CONTENT); + log_io("level %d\n", LOGL_DEBUG_IO); + break; + } } return 0; diff --git a/test/overlay/cmd_ut_overlay.c b/test/overlay/cmd_ut_overlay.c index f7ff93799f..3d34c8ab53 100644 --- a/test/overlay/cmd_ut_overlay.c +++ b/test/overlay/cmd_ut_overlay.c @@ -7,6 +7,7 @@ #include <common.h> #include <command.h> #include <errno.h> +#include <fdt_support.h> #include <malloc.h> #include <linux/sizes.h> diff --git a/test/py/README.md b/test/py/README.md index aed2fd063a..4d9d2b81d1 100644 --- a/test/py/README.md +++ b/test/py/README.md @@ -29,6 +29,7 @@ tests. Similar package names should exist in other distributions. | -------------- | ----------------------------- | | python | 2.7.5-5ubuntu3 | | python-pytest | 2.5.1-1 | +| python-subunit | - | | gdisk | 0.8.8-1ubuntu0.1 | | dfu-util | 0.5-1 | | dtc | 1.4.0+dfsg-1 | diff --git a/test/py/multiplexed_log.py b/test/py/multiplexed_log.py index f23d5dec68..637a3bd257 100644 --- a/test/py/multiplexed_log.py +++ b/test/py/multiplexed_log.py @@ -314,8 +314,9 @@ $(document).ready(function () { # The set of characters that should be represented as hexadecimal codes in # the log file. - _nonprint = ('%' + ''.join(chr(c) for c in range(0, 32) if c not in (9, 10)) + - ''.join(chr(c) for c in range(127, 256))) + _nonprint = {ord('%')} + _nonprint.update({c for c in range(0, 32) if c not in (9, 10)}) + _nonprint.update({c for c in range(127, 256)}) def _escape(self, data): """Render data format suitable for inclusion in an HTML document. @@ -331,7 +332,7 @@ $(document).ready(function () { """ data = data.replace(chr(13), '') - data = ''.join((c in self._nonprint) and ('%%%02x' % ord(c)) or + data = ''.join((ord(c) in self._nonprint) and ('%%%02x' % ord(c)) or c for c in data) data = cgi.escape(data) return data diff --git a/test/py/tests/test_log.py b/test/py/tests/test_log.py index 605275b039..cb183444c6 100644 --- a/test/py/tests/test_log.py +++ b/test/py/tests/test_log.py @@ -85,6 +85,11 @@ def test_log(u_boot_console): lines = run_test(9) check_log_entries(lines, 3) + def test10(): + lines = run_test(10) + for i in range(7): + assert 'log_test() level %d' % i == lines.next() + # TODO(sjg@chromium.org): Consider structuring this as separate tests cons = u_boot_console test0() @@ -97,6 +102,7 @@ def test_log(u_boot_console): test7() test8() test9() + test10() @pytest.mark.buildconfigspec('cmd_log') def test_log_format(u_boot_console): @@ -1,40 +1,53 @@ #!/bin/bash +# Script to run all U-Boot tests that use sandbox. + +# Runs a test and checks the exit code to decide if it passed +# $1: Test name +# $2 onwards: command line to run run_test() { - $@ - [ $? -ne 0 ] && result=$((result+1)) + echo -n "$1: " + shift + "$@" + [ $? -ne 0 ] && failures=$((failures+1)) } -result=0 +failures=0 # Run all tests that the standard sandbox build can support -run_test ./test/py/test.py --bd sandbox --build +run_test "sandbox" ./test/py/test.py --bd sandbox --build # Run tests which require sandbox_spl -run_test ./test/py/test.py --bd sandbox_spl --build -k test_ofplatdata.py - -# Run tests for the flat DT version of sandbox -./test/py/test.py --bd sandbox_flattree --build - +run_test "sandbox_spl" ./test/py/test.py --bd sandbox_spl --build \ + -k test_ofplatdata.py + +# Run tests for the flat-device-tree version of sandbox. This is a special +# build which does not enable CONFIG_OF_LIVE for the live device tree, so we can +# check that functionality is the same. The standard sandbox build (above) uses +# CONFIG_OF_LIVE. +run_test "sandbox_flattree" ./test/py/test.py --bd sandbox_flattree --build \ + -k test_ut + +# Set up a path to dtc (device-tree compiler) and libfdt.py, a library it +# provides and which is built by the sandbox_spl config. DTC_DIR=build-sandbox_spl/scripts/dtc +export PYTHONPATH=${DTC_DIR}/pylibfdt +export DTC=${DTC_DIR}/dtc -PYTHONPATH=${DTC_DIR}/pylibfdt DTC=${DTC_DIR}/dtc run_test \ - ./tools/binman/binman -t -run_test ./tools/patman/patman --test -run_test ./tools/buildman/buildman -t -PYTHONPATH=${DTC_DIR}/pylibfdt DTC=${DTC_DIR}/dtc run_test ./tools/dtoc/dtoc -t +run_test "binman" ./tools/binman/binman -t +run_test "patman" ./tools/patman/patman --test +run_test "buildman" ./tools/buildman/buildman -t +run_test "fdt" ./tools/dtoc/test_fdt -t +run_test "dtoc" ./tools/dtoc/dtoc -t # This needs you to set up Python test coverage tools. # To enable Python test coverage on Debian-type distributions (e.g. Ubuntu): # $ sudo apt-get install python-pytest python-coverage -PYTHONPATH=${DTC_DIR}/pylibfdt DTC=${DTC_DIR}/dtc run_test \ - ./tools/binman/binman -T -PYTHONPATH=${DTC_DIR}/pylibfdt DTC=${DTC_DIR}/dtc run_test \ - ./tools/dtoc/dtoc -T -PYTHONPATH=${DTC_DIR}/pylibfdt DTC=${DTC_DIR}/dtc run_test \ - ./tools/dtoc/test_fdt -T - -if [ $result == 0 ]; then +run_test "binman code coverage" ./tools/binman/binman -T +run_test "dtoc code coverage" ./tools/dtoc/dtoc -T +run_test "fdt code coverage" ./tools/dtoc/test_fdt -T + +if [ $failures == 0 ]; then echo "Tests passed!" else echo "Tests FAILED" diff --git a/tools/binman/binman.py b/tools/binman/binman.py index 1536e95651..439908e665 100755 --- a/tools/binman/binman.py +++ b/tools/binman/binman.py @@ -10,6 +10,7 @@ """See README for more information""" import glob +import multiprocessing import os import sys import traceback @@ -17,24 +18,32 @@ import unittest # Bring in the patman and dtoc libraries our_path = os.path.dirname(os.path.realpath(__file__)) -for dirname in ['../patman', '../dtoc', '..']: +for dirname in ['../patman', '../dtoc', '..', '../concurrencytest']: sys.path.insert(0, os.path.join(our_path, dirname)) # Bring in the libfdt module sys.path.insert(0, 'scripts/dtc/pylibfdt') +sys.path.insert(0, os.path.join(our_path, + '../../build-sandbox_spl/scripts/dtc/pylibfdt')) import cmdline import command +use_concurrent = True +try: + from concurrencytest import ConcurrentTestSuite, fork_for_tests +except: + use_concurrent = False import control import test_util -def RunTests(debug, args): +def RunTests(debug, processes, args): """Run the functional tests and any embedded doctests Args: debug: True to enable debugging, which shows a full stack trace on error args: List of positional args provided to binman. This can hold a test name to execute (as in 'binman -t testSections', for example) + processes: Number of processes to use to run tests (None=same as #CPUs) """ import elf_test import entry_test @@ -52,19 +61,28 @@ def RunTests(debug, args): sys.argv = [sys.argv[0]] if debug: sys.argv.append('-D') + if debug: + sys.argv.append('-D') # Run the entry tests first ,since these need to be the first to import the # 'entry' module. test_name = args and args[0] or None + suite = unittest.TestSuite() + loader = unittest.TestLoader() for module in (entry_test.TestEntry, ftest.TestFunctional, fdt_test.TestFdt, elf_test.TestElf, image_test.TestImage): if test_name: try: - suite = unittest.TestLoader().loadTestsFromName(test_name, module) + suite.addTests(loader.loadTestsFromName(test_name, module)) except AttributeError: continue else: - suite = unittest.TestLoader().loadTestsFromTestCase(module) + suite.addTests(loader.loadTestsFromTestCase(module)) + if use_concurrent and processes != 1: + concurrent_suite = ConcurrentTestSuite(suite, + fork_for_tests(processes or multiprocessing.cpu_count())) + concurrent_suite.run(result) + else: suite.run(result) print result @@ -113,7 +131,7 @@ def RunBinman(options, args): sys.tracebacklimit = 0 if options.test: - ret_code = RunTests(options.debug, args[1:]) + ret_code = RunTests(options.debug, options.processes, args[1:]) elif options.test_coverage: RunTestCoverage() diff --git a/tools/binman/cmdline.py b/tools/binman/cmdline.py index f8caa7d284..3886d52b3a 100644 --- a/tools/binman/cmdline.py +++ b/tools/binman/cmdline.py @@ -46,6 +46,8 @@ def ParseArgs(argv): parser.add_option('-p', '--preserve', action='store_true',\ help='Preserve temporary output directory even if option -O is not ' 'given') + parser.add_option('-P', '--processes', type=int, + help='set number of processes to use for running tests') parser.add_option('-t', '--test', action='store_true', default=False, help='run tests') parser.add_option('-T', '--test-coverage', action='store_true', diff --git a/tools/binman/elf_test.py b/tools/binman/elf_test.py index c16f71401d..b68530c19b 100644 --- a/tools/binman/elf_test.py +++ b/tools/binman/elf_test.py @@ -10,6 +10,7 @@ import unittest import elf import test_util +import tools binman_dir = os.path.dirname(os.path.realpath(sys.argv[0])) @@ -46,6 +47,10 @@ class FakeSection: class TestElf(unittest.TestCase): + @classmethod + def setUpClass(self): + tools.SetInputDirs(['.']) + def testAllSymbols(self): """Test that we can obtain a symbol from the ELF file""" fname = os.path.join(binman_dir, 'test', 'u_boot_ucode_ptr') diff --git a/tools/binman/entry_test.py b/tools/binman/entry_test.py index 69d85b4ced..1f7ff5b4e4 100644 --- a/tools/binman/entry_test.py +++ b/tools/binman/entry_test.py @@ -13,12 +13,19 @@ import fdt import fdt_util import tools +entry = None + class TestEntry(unittest.TestCase): + def setUp(self): + tools.PrepareOutputDir(None) + + def tearDown(self): + tools.FinaliseOutputDir() + def GetNode(self): binman_dir = os.path.dirname(os.path.realpath(sys.argv[0])) - tools.PrepareOutputDir(None) fname = fdt_util.EnsureCompiled( - os.path.join(binman_dir,('test/05_simple.dts'))) + os.path.join(binman_dir,('test/005_simple.dts'))) dtb = fdt.FdtScan(fname) return dtb.GetNode('/binman/u-boot') @@ -33,9 +40,11 @@ class TestEntry(unittest.TestCase): def test2EntryImportLib(self): del sys.modules['importlib'] global entry - reload(entry) + if entry: + reload(entry) + else: + import entry entry.Entry.Create(None, self.GetNode(), 'u-boot-spl') - tools._RemoveOutputDir() del entry def testEntryContents(self): diff --git a/tools/binman/etype/intel_refcode.py b/tools/binman/etype/intel_refcode.py new file mode 100644 index 0000000000..045db589d1 --- /dev/null +++ b/tools/binman/etype/intel_refcode.py @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (c) 2016 Google, Inc +# Written by Simon Glass <sjg@chromium.org> +# +# Entry-type module for Intel Memory Reference Code binary blob +# + +from entry import Entry +from blob import Entry_blob + +class Entry_intel_refcode(Entry_blob): + """Entry containing an Intel Reference Code file + + Properties / Entry arguments: + - filename: Filename of file to read into entry + + This file contains code for setting up the platform on some Intel systems. + This is executed by U-Boot when needed early during startup. A typical + filename is 'refcode.bin'. + + See README.x86 for information about x86 binary blobs. + """ + def __init__(self, section, etype, node): + Entry_blob.__init__(self, section, etype, node) + + def GetDefaultFilename(self): + return 'refcode.bin' diff --git a/tools/binman/fdt_test.py b/tools/binman/fdt_test.py index 8ea098f38a..ac6f910d3c 100644 --- a/tools/binman/fdt_test.py +++ b/tools/binman/fdt_test.py @@ -21,6 +21,10 @@ class TestFdt(unittest.TestCase): self._indir = tempfile.mkdtemp(prefix='binmant.') tools.PrepareOutputDir(self._indir, True) + @classmethod + def tearDownClass(self): + tools._FinaliseForTest() + def TestFile(self, fname): return os.path.join(self._binman_dir, 'test', fname) @@ -32,12 +36,12 @@ class TestFdt(unittest.TestCase): node.DeleteProp('data') def testFdtNormal(self): - fname = self.GetCompiled('34_x86_ucode.dts') + fname = self.GetCompiled('034_x86_ucode.dts') dt = FdtScan(fname) self._DeleteProp(dt) def testFdtNormalProp(self): - fname = self.GetCompiled('45_prop_test.dts') + fname = self.GetCompiled('045_prop_test.dts') dt = FdtScan(fname) node = dt.GetNode('/binman/intel-me') self.assertEquals('intel-me', node.name) diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index 57725c928e..e77fce5a26 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -60,6 +60,7 @@ VBLOCK_DATA = 'vblk' FILES_DATA = ("sorry I'm late\nOh, don't bother apologising, I'm " + "sorry you're alive\n") COMPRESS_DATA = 'data to compress' +REFCODE_DATA = 'refcode' class TestFunctional(unittest.TestCase): @@ -115,7 +116,7 @@ class TestFunctional(unittest.TestCase): TestFunctional._MakeInputFile('ecrw.bin', CROS_EC_RW_DATA) TestFunctional._MakeInputDir('devkeys') TestFunctional._MakeInputFile('bmpblk.bin', BMPBLK_DATA) - self._output_setup = False + TestFunctional._MakeInputFile('refcode.bin', REFCODE_DATA) # ELF file with a '_dt_ucode_base_size' symbol with open(self.TestFile('u_boot_ucode_ptr')) as fd: @@ -190,7 +191,7 @@ class TestFunctional(unittest.TestCase): """Run binman with a given test file Args: - fname: Device-tree source filename to use (e.g. 05_simple.dts) + fname: Device-tree source filename to use (e.g. 005_simple.dts) debug: True to enable debugging output map: True to output map files for the images update_dtb: Update the offset and size of each entry in the device @@ -230,14 +231,13 @@ class TestFunctional(unittest.TestCase): Returns: Contents of device-tree binary """ - if not self._output_setup: - tools.PrepareOutputDir(self._indir, True) - self._output_setup = True + tools.PrepareOutputDir(None) dtb = fdt_util.EnsureCompiled(self.TestFile(fname)) with open(dtb) as fd: data = fd.read() TestFunctional._MakeInputFile(outfile, data) - return data + tools.FinaliseOutputDir() + return data def _GetDtbContentsForSplTpl(self, dtb_data, name): """Create a version of the main DTB for SPL or SPL @@ -268,7 +268,7 @@ class TestFunctional(unittest.TestCase): Raises an assertion failure if binman returns a non-zero exit code. Args: - fname: Device-tree source filename to use (e.g. 05_simple.dts) + fname: Device-tree source filename to use (e.g. 005_simple.dts) use_real_dtb: True to use the test file as the contents of the u-boot-dtb entry. Normally this is not needed and the test contents (the U_BOOT_DTB_DATA string) can be used. @@ -325,7 +325,7 @@ class TestFunctional(unittest.TestCase): """Helper function which discards the device-tree binary Args: - fname: Device-tree source filename to use (e.g. 05_simple.dts) + fname: Device-tree source filename to use (e.g. 005_simple.dts) use_real_dtb: True to use the test file as the contents of the u-boot-dtb entry. Normally this is not needed and the test contents (the U_BOOT_DTB_DATA string) can be used. @@ -370,6 +370,16 @@ class TestFunctional(unittest.TestCase): return pathname @classmethod + def _SetupSplElf(self, src_fname='bss_data'): + """Set up an ELF file with a '_dt_ucode_base_size' symbol + + Args: + Filename of ELF file to use as SPL + """ + with open(self.TestFile(src_fname)) as fd: + TestFunctional._MakeInputFile('spl/u-boot-spl', fd.read()) + + @classmethod def TestFile(self, fname): return os.path.join(self._binman_dir, 'test', fname) @@ -456,7 +466,7 @@ class TestFunctional(unittest.TestCase): def testBoard(self): """Test that we can run it with a specific board""" - self._SetupDtb('05_simple.dts', 'sandbox/u-boot.dtb') + self._SetupDtb('005_simple.dts', 'sandbox/u-boot.dtb') TestFunctional._MakeInputFile('sandbox/u-boot.bin', U_BOOT_DATA) result = self._DoBinman('-b', 'sandbox') self.assertEqual(0, result) @@ -483,19 +493,19 @@ class TestFunctional(unittest.TestCase): will come from the device-tree compiler (dtc). """ with self.assertRaises(Exception) as e: - self._RunBinman('-d', self.TestFile('01_invalid.dts')) + self._RunBinman('-d', self.TestFile('001_invalid.dts')) self.assertIn("FATAL ERROR: Unable to parse input tree", str(e.exception)) def testMissingNode(self): """Test that a device tree without a 'binman' node generates an error""" with self.assertRaises(Exception) as e: - self._DoBinman('-d', self.TestFile('02_missing_node.dts')) + self._DoBinman('-d', self.TestFile('002_missing_node.dts')) self.assertIn("does not have a 'binman' node", str(e.exception)) def testEmpty(self): """Test that an empty binman node works OK (i.e. does nothing)""" - result = self._RunBinman('-d', self.TestFile('03_empty.dts')) + result = self._RunBinman('-d', self.TestFile('003_empty.dts')) self.assertEqual(0, len(result.stderr)) self.assertEqual(0, result.return_code) @@ -503,25 +513,25 @@ class TestFunctional(unittest.TestCase): """Test that an invalid entry is flagged""" with self.assertRaises(Exception) as e: result = self._RunBinman('-d', - self.TestFile('04_invalid_entry.dts')) + self.TestFile('004_invalid_entry.dts')) self.assertIn("Unknown entry type 'not-a-valid-type' in node " "'/binman/not-a-valid-type'", str(e.exception)) def testSimple(self): """Test a simple binman with a single file""" - data = self._DoReadFile('05_simple.dts') + data = self._DoReadFile('005_simple.dts') self.assertEqual(U_BOOT_DATA, data) def testSimpleDebug(self): """Test a simple binman run with debugging enabled""" - data = self._DoTestFile('05_simple.dts', debug=True) + data = self._DoTestFile('005_simple.dts', debug=True) def testDual(self): """Test that we can handle creating two images This also tests image padding. """ - retcode = self._DoTestFile('06_dual_image.dts') + retcode = self._DoTestFile('006_dual_image.dts') self.assertEqual(0, retcode) image = control.images['image1'] @@ -545,13 +555,13 @@ class TestFunctional(unittest.TestCase): def testBadAlign(self): """Test that an invalid alignment value is detected""" with self.assertRaises(ValueError) as e: - self._DoTestFile('07_bad_align.dts') + self._DoTestFile('007_bad_align.dts') self.assertIn("Node '/binman/u-boot': Alignment 23 must be a power " "of two", str(e.exception)) def testPackSimple(self): """Test that packing works as expected""" - retcode = self._DoTestFile('08_pack.dts') + retcode = self._DoTestFile('008_pack.dts') self.assertEqual(0, retcode) self.assertIn('image', control.images) image = control.images['image'] @@ -593,7 +603,7 @@ class TestFunctional(unittest.TestCase): def testPackExtra(self): """Test that extra packing feature works as expected""" - retcode = self._DoTestFile('09_pack_extra.dts') + retcode = self._DoTestFile('009_pack_extra.dts') self.assertEqual(0, retcode) self.assertIn('image', control.images) @@ -638,35 +648,35 @@ class TestFunctional(unittest.TestCase): def testPackAlignPowerOf2(self): """Test that invalid entry alignment is detected""" with self.assertRaises(ValueError) as e: - self._DoTestFile('10_pack_align_power2.dts') + self._DoTestFile('010_pack_align_power2.dts') self.assertIn("Node '/binman/u-boot': Alignment 5 must be a power " "of two", str(e.exception)) def testPackAlignSizePowerOf2(self): """Test that invalid entry size alignment is detected""" with self.assertRaises(ValueError) as e: - self._DoTestFile('11_pack_align_size_power2.dts') + self._DoTestFile('011_pack_align_size_power2.dts') self.assertIn("Node '/binman/u-boot': Alignment size 55 must be a " "power of two", str(e.exception)) def testPackInvalidAlign(self): """Test detection of an offset that does not match its alignment""" with self.assertRaises(ValueError) as e: - self._DoTestFile('12_pack_inv_align.dts') + self._DoTestFile('012_pack_inv_align.dts') self.assertIn("Node '/binman/u-boot': Offset 0x5 (5) does not match " "align 0x4 (4)", str(e.exception)) def testPackInvalidSizeAlign(self): """Test that invalid entry size alignment is detected""" with self.assertRaises(ValueError) as e: - self._DoTestFile('13_pack_inv_size_align.dts') + self._DoTestFile('013_pack_inv_size_align.dts') self.assertIn("Node '/binman/u-boot': Size 0x5 (5) does not match " "align-size 0x4 (4)", str(e.exception)) def testPackOverlap(self): """Test that overlapping regions are detected""" with self.assertRaises(ValueError) as e: - self._DoTestFile('14_pack_overlap.dts') + self._DoTestFile('014_pack_overlap.dts') self.assertIn("Node '/binman/u-boot-align': Offset 0x3 (3) overlaps " "with previous entry '/binman/u-boot' ending at 0x4 (4)", str(e.exception)) @@ -674,20 +684,20 @@ class TestFunctional(unittest.TestCase): def testPackEntryOverflow(self): """Test that entries that overflow their size are detected""" with self.assertRaises(ValueError) as e: - self._DoTestFile('15_pack_overflow.dts') + self._DoTestFile('015_pack_overflow.dts') self.assertIn("Node '/binman/u-boot': Entry contents size is 0x4 (4) " "but entry size is 0x3 (3)", str(e.exception)) def testPackImageOverflow(self): """Test that entries which overflow the image size are detected""" with self.assertRaises(ValueError) as e: - self._DoTestFile('16_pack_image_overflow.dts') + self._DoTestFile('016_pack_image_overflow.dts') self.assertIn("Section '/binman': contents size 0x4 (4) exceeds section " "size 0x3 (3)", str(e.exception)) def testPackImageSize(self): """Test that the image size can be set""" - retcode = self._DoTestFile('17_pack_image_size.dts') + retcode = self._DoTestFile('017_pack_image_size.dts') self.assertEqual(0, retcode) self.assertIn('image', control.images) image = control.images['image'] @@ -695,7 +705,7 @@ class TestFunctional(unittest.TestCase): def testPackImageSizeAlign(self): """Test that image size alignemnt works as expected""" - retcode = self._DoTestFile('18_pack_image_align.dts') + retcode = self._DoTestFile('018_pack_image_align.dts') self.assertEqual(0, retcode) self.assertIn('image', control.images) image = control.images['image'] @@ -704,27 +714,26 @@ class TestFunctional(unittest.TestCase): def testPackInvalidImageAlign(self): """Test that invalid image alignment is detected""" with self.assertRaises(ValueError) as e: - self._DoTestFile('19_pack_inv_image_align.dts') + self._DoTestFile('019_pack_inv_image_align.dts') self.assertIn("Section '/binman': Size 0x7 (7) does not match " "align-size 0x8 (8)", str(e.exception)) def testPackAlignPowerOf2(self): """Test that invalid image alignment is detected""" with self.assertRaises(ValueError) as e: - self._DoTestFile('20_pack_inv_image_align_power2.dts') + self._DoTestFile('020_pack_inv_image_align_power2.dts') self.assertIn("Section '/binman': Alignment size 131 must be a power of " "two", str(e.exception)) def testImagePadByte(self): """Test that the image pad byte can be specified""" - with open(self.TestFile('bss_data')) as fd: - TestFunctional._MakeInputFile('spl/u-boot-spl', fd.read()) - data = self._DoReadFile('21_image_pad.dts') + self._SetupSplElf() + data = self._DoReadFile('021_image_pad.dts') self.assertEqual(U_BOOT_SPL_DATA + (chr(0xff) * 1) + U_BOOT_DATA, data) def testImageName(self): """Test that image files can be named""" - retcode = self._DoTestFile('22_image_name.dts') + retcode = self._DoTestFile('022_image_name.dts') self.assertEqual(0, retcode) image = control.images['image1'] fname = tools.GetOutputFilename('test-name') @@ -736,32 +745,33 @@ class TestFunctional(unittest.TestCase): def testBlobFilename(self): """Test that generic blobs can be provided by filename""" - data = self._DoReadFile('23_blob.dts') + data = self._DoReadFile('023_blob.dts') self.assertEqual(BLOB_DATA, data) def testPackSorted(self): """Test that entries can be sorted""" - data = self._DoReadFile('24_sorted.dts') + self._SetupSplElf() + data = self._DoReadFile('024_sorted.dts') self.assertEqual(chr(0) * 1 + U_BOOT_SPL_DATA + chr(0) * 2 + U_BOOT_DATA, data) def testPackZeroOffset(self): """Test that an entry at offset 0 is not given a new offset""" with self.assertRaises(ValueError) as e: - self._DoTestFile('25_pack_zero_size.dts') + self._DoTestFile('025_pack_zero_size.dts') self.assertIn("Node '/binman/u-boot-spl': Offset 0x0 (0) overlaps " "with previous entry '/binman/u-boot' ending at 0x4 (4)", str(e.exception)) def testPackUbootDtb(self): """Test that a device tree can be added to U-Boot""" - data = self._DoReadFile('26_pack_u_boot_dtb.dts') + data = self._DoReadFile('026_pack_u_boot_dtb.dts') self.assertEqual(U_BOOT_NODTB_DATA + U_BOOT_DTB_DATA, data) def testPackX86RomNoSize(self): """Test that the end-at-4gb property requires a size property""" with self.assertRaises(ValueError) as e: - self._DoTestFile('27_pack_4gb_no_size.dts') + self._DoTestFile('027_pack_4gb_no_size.dts') self.assertIn("Section '/binman': Section size must be provided when " "using end-at-4gb", str(e.exception)) @@ -776,14 +786,15 @@ class TestFunctional(unittest.TestCase): def testPackX86RomOutside(self): """Test that the end-at-4gb property checks for offset boundaries""" with self.assertRaises(ValueError) as e: - self._DoTestFile('28_pack_4gb_outside.dts') + self._DoTestFile('028_pack_4gb_outside.dts') self.assertIn("Node '/binman/u-boot': Offset 0x0 (0) is outside " "the section starting at 0xffffffe0 (4294967264)", str(e.exception)) def testPackX86Rom(self): """Test that a basic x86 ROM can be created""" - data = self._DoReadFile('29_x86-rom.dts') + self._SetupSplElf() + data = self._DoReadFile('029_x86-rom.dts') self.assertEqual(U_BOOT_DATA + chr(0) * 7 + U_BOOT_SPL_DATA + chr(0) * 2, data) @@ -791,31 +802,31 @@ class TestFunctional(unittest.TestCase): """Test that an invalid Intel descriptor entry is detected""" TestFunctional._MakeInputFile('descriptor.bin', '') with self.assertRaises(ValueError) as e: - self._DoTestFile('31_x86-rom-me.dts') + self._DoTestFile('031_x86-rom-me.dts') self.assertIn("Node '/binman/intel-descriptor': Cannot find FD " "signature", str(e.exception)) def testPackX86RomBadDesc(self): """Test that the Intel requires a descriptor entry""" with self.assertRaises(ValueError) as e: - self._DoTestFile('30_x86-rom-me-no-desc.dts') + self._DoTestFile('030_x86-rom-me-no-desc.dts') self.assertIn("Node '/binman/intel-me': No offset set with " "offset-unset: should another entry provide this correct " "offset?", str(e.exception)) def testPackX86RomMe(self): """Test that an x86 ROM with an ME region can be created""" - data = self._DoReadFile('31_x86-rom-me.dts') + data = self._DoReadFile('031_x86-rom-me.dts') self.assertEqual(ME_DATA, data[0x1000:0x1000 + len(ME_DATA)]) def testPackVga(self): """Test that an image with a VGA binary can be created""" - data = self._DoReadFile('32_intel-vga.dts') + data = self._DoReadFile('032_intel-vga.dts') self.assertEqual(VGA_DATA, data[:len(VGA_DATA)]) def testPackStart16(self): """Test that an image with an x86 start16 region can be created""" - data = self._DoReadFile('33_x86-start16.dts') + data = self._DoReadFile('033_x86-start16.dts') self.assertEqual(X86_START16_DATA, data[:len(X86_START16_DATA)]) def testPackPowerpcMpc85xxBootpgResetvec(self): @@ -884,7 +895,7 @@ class TestFunctional(unittest.TestCase): u-boot.dtb with the microcode removed the microcode """ - first, pos_and_size = self._RunMicrocodeTest('34_x86_ucode.dts', + first, pos_and_size = self._RunMicrocodeTest('034_x86_ucode.dts', U_BOOT_NODTB_DATA) self.assertEqual('nodtb with microcode' + pos_and_size + ' somewhere in here', first) @@ -901,7 +912,7 @@ class TestFunctional(unittest.TestCase): # We need the libfdt library to run this test since only that allows # finding the offset of a property. This is required by # Entry_u_boot_dtb_with_ucode.ObtainContents(). - data = self._DoReadFile('35_x86_single_ucode.dts', True) + data = self._DoReadFile('035_x86_single_ucode.dts', True) second = data[len(U_BOOT_NODTB_DATA):] @@ -928,27 +939,27 @@ class TestFunctional(unittest.TestCase): def testUBootImg(self): """Test that u-boot.img can be put in a file""" - data = self._DoReadFile('36_u_boot_img.dts') + data = self._DoReadFile('036_u_boot_img.dts') self.assertEqual(U_BOOT_IMG_DATA, data) def testNoMicrocode(self): """Test that a missing microcode region is detected""" with self.assertRaises(ValueError) as e: - self._DoReadFile('37_x86_no_ucode.dts', True) + self._DoReadFile('037_x86_no_ucode.dts', True) self.assertIn("Node '/binman/u-boot-dtb-with-ucode': No /microcode " "node found in ", str(e.exception)) def testMicrocodeWithoutNode(self): """Test that a missing u-boot-dtb-with-ucode node is detected""" with self.assertRaises(ValueError) as e: - self._DoReadFile('38_x86_ucode_missing_node.dts', True) + self._DoReadFile('038_x86_ucode_missing_node.dts', True) self.assertIn("Node '/binman/u-boot-with-ucode-ptr': Cannot find " "microcode region u-boot-dtb-with-ucode", str(e.exception)) def testMicrocodeWithoutNode2(self): """Test that a missing u-boot-ucode node is detected""" with self.assertRaises(ValueError) as e: - self._DoReadFile('39_x86_ucode_missing_node2.dts', True) + self._DoReadFile('039_x86_ucode_missing_node2.dts', True) self.assertIn("Node '/binman/u-boot-with-ucode-ptr': Cannot find " "microcode region u-boot-ucode", str(e.exception)) @@ -972,7 +983,7 @@ class TestFunctional(unittest.TestCase): def testMicrocodeNotInImage(self): """Test that microcode must be placed within the image""" with self.assertRaises(ValueError) as e: - self._DoReadFile('40_x86_ucode_not_in_image.dts', True) + self._DoReadFile('040_x86_ucode_not_in_image.dts', True) self.assertIn("Node '/binman/u-boot-with-ucode-ptr': Microcode " "pointer _dt_ucode_base_size at fffffe14 is outside the " "section ranging from 00000000 to 0000002e", str(e.exception)) @@ -981,7 +992,7 @@ class TestFunctional(unittest.TestCase): """Test that we can cope with an image without microcode (e.g. qemu)""" with open(self.TestFile('u_boot_no_ucode_ptr')) as fd: TestFunctional._MakeInputFile('u-boot', fd.read()) - data, dtb, _, _ = self._DoReadFileDtb('44_x86_optional_ucode.dts', True) + data, dtb, _, _ = self._DoReadFileDtb('044_x86_optional_ucode.dts', True) # Now check the device tree has no microcode self.assertEqual(U_BOOT_NODTB_DATA, data[:len(U_BOOT_NODTB_DATA)]) @@ -997,43 +1008,43 @@ class TestFunctional(unittest.TestCase): def testUnknownPosSize(self): """Test that microcode must be placed within the image""" with self.assertRaises(ValueError) as e: - self._DoReadFile('41_unknown_pos_size.dts', True) + self._DoReadFile('041_unknown_pos_size.dts', True) self.assertIn("Section '/binman': Unable to set offset/size for unknown " "entry 'invalid-entry'", str(e.exception)) def testPackFsp(self): """Test that an image with a FSP binary can be created""" - data = self._DoReadFile('42_intel-fsp.dts') + data = self._DoReadFile('042_intel-fsp.dts') self.assertEqual(FSP_DATA, data[:len(FSP_DATA)]) def testPackCmc(self): """Test that an image with a CMC binary can be created""" - data = self._DoReadFile('43_intel-cmc.dts') + data = self._DoReadFile('043_intel-cmc.dts') self.assertEqual(CMC_DATA, data[:len(CMC_DATA)]) def testPackVbt(self): """Test that an image with a VBT binary can be created""" - data = self._DoReadFile('46_intel-vbt.dts') + data = self._DoReadFile('046_intel-vbt.dts') self.assertEqual(VBT_DATA, data[:len(VBT_DATA)]) def testSplBssPad(self): """Test that we can pad SPL's BSS with zeros""" # ELF file with a '__bss_size' symbol - with open(self.TestFile('bss_data')) as fd: - TestFunctional._MakeInputFile('spl/u-boot-spl', fd.read()) - data = self._DoReadFile('47_spl_bss_pad.dts') + self._SetupSplElf() + data = self._DoReadFile('047_spl_bss_pad.dts') self.assertEqual(U_BOOT_SPL_DATA + (chr(0) * 10) + U_BOOT_DATA, data) - with open(self.TestFile('u_boot_ucode_ptr')) as fd: - TestFunctional._MakeInputFile('spl/u-boot-spl', fd.read()) + def testSplBssPadMissing(self): + """Test that a missing symbol is detected""" + self._SetupSplElf('u_boot_ucode_ptr') with self.assertRaises(ValueError) as e: - data = self._DoReadFile('47_spl_bss_pad.dts') + self._DoReadFile('047_spl_bss_pad.dts') self.assertIn('Expected __bss_size symbol in spl/u-boot-spl', str(e.exception)) def testPackStart16Spl(self): """Test that an image with an x86 start16 SPL region can be created""" - data = self._DoReadFile('48_x86-start16-spl.dts') + data = self._DoReadFile('048_x86-start16-spl.dts') self.assertEqual(X86_START16_SPL_DATA, data[:len(X86_START16_SPL_DATA)]) def _PackUbootSplMicrocode(self, dts, ucode_second=False): @@ -1050,9 +1061,7 @@ class TestFunctional(unittest.TestCase): ucode_second: True if the microsecond entry is second instead of third """ - # ELF file with a '_dt_ucode_base_size' symbol - with open(self.TestFile('u_boot_ucode_ptr')) as fd: - TestFunctional._MakeInputFile('spl/u-boot-spl', fd.read()) + self._SetupSplElf('u_boot_ucode_ptr') first, pos_and_size = self._RunMicrocodeTest(dts, U_BOOT_SPL_NODTB_DATA, ucode_second=ucode_second) self.assertEqual('splnodtb with microc' + pos_and_size + @@ -1060,7 +1069,7 @@ class TestFunctional(unittest.TestCase): def testPackUbootSplMicrocode(self): """Test that x86 microcode can be handled correctly in SPL""" - self._PackUbootSplMicrocode('49_x86_ucode_spl.dts') + self._PackUbootSplMicrocode('049_x86_ucode_spl.dts') def testPackUbootSplMicrocodeReorder(self): """Test that order doesn't matter for microcode entries @@ -1069,22 +1078,22 @@ class TestFunctional(unittest.TestCase): u-boot-ucode entry we have not yet seen the u-boot-dtb-with-ucode entry, so we reply on binman to try later. """ - self._PackUbootSplMicrocode('58_x86_ucode_spl_needs_retry.dts', + self._PackUbootSplMicrocode('058_x86_ucode_spl_needs_retry.dts', ucode_second=True) def testPackMrc(self): """Test that an image with an MRC binary can be created""" - data = self._DoReadFile('50_intel_mrc.dts') + data = self._DoReadFile('050_intel_mrc.dts') self.assertEqual(MRC_DATA, data[:len(MRC_DATA)]) def testSplDtb(self): """Test that an image with spl/u-boot-spl.dtb can be created""" - data = self._DoReadFile('51_u_boot_spl_dtb.dts') + data = self._DoReadFile('051_u_boot_spl_dtb.dts') self.assertEqual(U_BOOT_SPL_DTB_DATA, data[:len(U_BOOT_SPL_DTB_DATA)]) def testSplNoDtb(self): """Test that an image with spl/u-boot-spl-nodtb.bin can be created""" - data = self._DoReadFile('52_u_boot_spl_nodtb.dts') + data = self._DoReadFile('052_u_boot_spl_nodtb.dts') self.assertEqual(U_BOOT_SPL_NODTB_DATA, data[:len(U_BOOT_SPL_NODTB_DATA)]) def testSymbols(self): @@ -1094,9 +1103,8 @@ class TestFunctional(unittest.TestCase): addr = elf.GetSymbolAddress(elf_fname, '__image_copy_start') self.assertEqual(syms['_binman_u_boot_spl_prop_offset'].address, addr) - with open(self.TestFile('u_boot_binman_syms')) as fd: - TestFunctional._MakeInputFile('spl/u-boot-spl', fd.read()) - data = self._DoReadFile('53_symbols.dts') + self._SetupSplElf('u_boot_binman_syms') + data = self._DoReadFile('053_symbols.dts') sym_values = struct.pack('<LQL', 0x24 + 0, 0x24 + 24, 0x24 + 20) expected = (sym_values + U_BOOT_SPL_DATA[16:] + chr(0xff) + U_BOOT_DATA + @@ -1105,19 +1113,19 @@ class TestFunctional(unittest.TestCase): def testPackUnitAddress(self): """Test that we support multiple binaries with the same name""" - data = self._DoReadFile('54_unit_address.dts') + data = self._DoReadFile('054_unit_address.dts') self.assertEqual(U_BOOT_DATA + U_BOOT_DATA, data) def testSections(self): """Basic test of sections""" - data = self._DoReadFile('55_sections.dts') + data = self._DoReadFile('055_sections.dts') expected = (U_BOOT_DATA + '!' * 12 + U_BOOT_DATA + 'a' * 12 + U_BOOT_DATA + '&' * 4) self.assertEqual(expected, data) def testMap(self): """Tests outputting a map of the images""" - _, _, map_data, _ = self._DoReadFileDtb('55_sections.dts', map=True) + _, _, map_data, _ = self._DoReadFileDtb('055_sections.dts', map=True) self.assertEqual('''ImagePos Offset Size Name 00000000 00000000 00000028 main-section 00000000 00000000 00000010 section@0 @@ -1130,7 +1138,7 @@ class TestFunctional(unittest.TestCase): def testNamePrefix(self): """Tests that name prefixes are used""" - _, _, map_data, _ = self._DoReadFileDtb('56_name_prefix.dts', map=True) + _, _, map_data, _ = self._DoReadFileDtb('056_name_prefix.dts', map=True) self.assertEqual('''ImagePos Offset Size Name 00000000 00000000 00000028 main-section 00000000 00000000 00000010 section@0 @@ -1142,7 +1150,7 @@ class TestFunctional(unittest.TestCase): def testUnknownContents(self): """Test that obtaining the contents works as expected""" with self.assertRaises(ValueError) as e: - self._DoReadFile('57_unknown_contents.dts', True) + self._DoReadFile('057_unknown_contents.dts', True) self.assertIn("Section '/binman': Internal error: Could not complete " "processing of contents: remaining [<_testing.Entry__testing ", str(e.exception)) @@ -1150,13 +1158,13 @@ class TestFunctional(unittest.TestCase): def testBadChangeSize(self): """Test that trying to change the size of an entry fails""" with self.assertRaises(ValueError) as e: - self._DoReadFile('59_change_size.dts', True) + self._DoReadFile('059_change_size.dts', True) self.assertIn("Node '/binman/_testing': Cannot update entry size from " '2 to 1', str(e.exception)) def testUpdateFdt(self): """Test that we can update the device tree with offset/size info""" - _, _, _, out_dtb_fname = self._DoReadFileDtb('60_fdt_update.dts', + _, _, _, out_dtb_fname = self._DoReadFileDtb('060_fdt_update.dts', update_dtb=True) dtb = fdt.Fdt(out_dtb_fname) dtb.Scan() @@ -1186,7 +1194,7 @@ class TestFunctional(unittest.TestCase): def testUpdateFdtBad(self): """Test that we detect when ProcessFdt never completes""" with self.assertRaises(ValueError) as e: - self._DoReadFileDtb('61_fdt_update_bad.dts', update_dtb=True) + self._DoReadFileDtb('061_fdt_update_bad.dts', update_dtb=True) self.assertIn('Could not complete processing of Fdt: remaining ' '[<_testing.Entry__testing', str(e.exception)) @@ -1196,7 +1204,7 @@ class TestFunctional(unittest.TestCase): 'test-str-arg': 'test1', 'test-int-arg': '456', } - self._DoReadFileDtb('62_entry_args.dts', entry_args=entry_args) + self._DoReadFileDtb('062_entry_args.dts', entry_args=entry_args) self.assertIn('image', control.images) entry = control.images['image'].GetEntries()['_testing'] self.assertEqual('test0', entry.test_str_fdt) @@ -1209,7 +1217,7 @@ class TestFunctional(unittest.TestCase): entry_args = { 'test-int-arg': '456', } - self._DoReadFileDtb('63_entry_args_missing.dts', entry_args=entry_args) + self._DoReadFileDtb('063_entry_args_missing.dts', entry_args=entry_args) entry = control.images['image'].GetEntries()['_testing'] self.assertEqual('test0', entry.test_str_fdt) self.assertEqual(None, entry.test_str_arg) @@ -1222,14 +1230,14 @@ class TestFunctional(unittest.TestCase): 'test-int-arg': '456', } with self.assertRaises(ValueError) as e: - self._DoReadFileDtb('64_entry_args_required.dts') + self._DoReadFileDtb('064_entry_args_required.dts') self.assertIn("Node '/binman/_testing': Missing required " 'properties/entry args: test-str-arg, test-int-fdt, test-int-arg', str(e.exception)) def testEntryArgsInvalidFormat(self): """Test that an invalid entry-argument format is detected""" - args = ['-d', self.TestFile('64_entry_args_required.dts'), '-ano-value'] + args = ['-d', self.TestFile('064_entry_args_required.dts'), '-ano-value'] with self.assertRaises(ValueError) as e: self._DoBinman(*args) self.assertIn("Invalid entry arguemnt 'no-value'", str(e.exception)) @@ -1240,7 +1248,7 @@ class TestFunctional(unittest.TestCase): 'test-int-arg': 'abc', } with self.assertRaises(ValueError) as e: - self._DoReadFileDtb('62_entry_args.dts', entry_args=entry_args) + self._DoReadFileDtb('062_entry_args.dts', entry_args=entry_args) self.assertIn("Node '/binman/_testing': Cannot convert entry arg " "'test-int-arg' (value 'abc') to integer", str(e.exception)) @@ -1256,7 +1264,7 @@ class TestFunctional(unittest.TestCase): 'test-bad-datatype-arg': '12', } with self.assertRaises(ValueError) as e: - self._DoReadFileDtb('65_entry_args_unknown_datatype.dts', + self._DoReadFileDtb('065_entry_args_unknown_datatype.dts', entry_args=entry_args) self.assertIn('GetArg() internal error: Unknown data type ', str(e.exception)) @@ -1268,7 +1276,7 @@ class TestFunctional(unittest.TestCase): 'test-id2': TEXT_DATA2, 'test-id3': TEXT_DATA3, } - data, _, _, _ = self._DoReadFileDtb('66_text.dts', + data, _, _, _ = self._DoReadFileDtb('066_text.dts', entry_args=entry_args) expected = (TEXT_DATA + chr(0) * (8 - len(TEXT_DATA)) + TEXT_DATA2 + TEXT_DATA3 + 'some text') @@ -1290,7 +1298,7 @@ class TestFunctional(unittest.TestCase): def testFmap(self): """Basic test of generation of a flashrom fmap""" - data = self._DoReadFile('67_fmap.dts') + data = self._DoReadFile('067_fmap.dts') fhdr, fentries = fmap_util.DecodeFmap(data[32:]) expected = U_BOOT_DATA + '!' * 12 + U_BOOT_DATA + 'a' * 12 self.assertEqual(expected, data[:32]) @@ -1324,19 +1332,19 @@ class TestFunctional(unittest.TestCase): entry_args = { 'cros-ec-rw-path': 'ecrw.bin', } - data, _, _, _ = self._DoReadFileDtb('68_blob_named_by_arg.dts', + data, _, _, _ = self._DoReadFileDtb('068_blob_named_by_arg.dts', entry_args=entry_args) def testFill(self): """Test for an fill entry type""" - data = self._DoReadFile('69_fill.dts') + data = self._DoReadFile('069_fill.dts') expected = 8 * chr(0xff) + 8 * chr(0) self.assertEqual(expected, data) def testFillNoSize(self): """Test for an fill entry type with no size""" with self.assertRaises(ValueError) as e: - self._DoReadFile('70_fill_no_size.dts') + self._DoReadFile('070_fill_no_size.dts') self.assertIn("'fill' entry must have a size property", str(e.exception)) @@ -1357,7 +1365,7 @@ class TestFunctional(unittest.TestCase): 'keydir': 'devkeys', 'bmpblk': 'bmpblk.bin', } - data, _, _, _ = self._DoReadFileDtb('71_gbb.dts', entry_args=entry_args) + data, _, _, _ = self._DoReadFileDtb('071_gbb.dts', entry_args=entry_args) # Since futility expected = GBB_DATA + GBB_DATA + 8 * chr(0) + (0x2180 - 16) * chr(0) @@ -1366,14 +1374,14 @@ class TestFunctional(unittest.TestCase): def testGbbTooSmall(self): """Test for the Chromium OS Google Binary Block being large enough""" with self.assertRaises(ValueError) as e: - self._DoReadFileDtb('72_gbb_too_small.dts') + self._DoReadFileDtb('072_gbb_too_small.dts') self.assertIn("Node '/binman/gbb': GBB is too small", str(e.exception)) def testGbbNoSize(self): """Test for the Chromium OS Google Binary Block having a size""" with self.assertRaises(ValueError) as e: - self._DoReadFileDtb('73_gbb_no_size.dts') + self._DoReadFileDtb('073_gbb_no_size.dts') self.assertIn("Node '/binman/gbb': GBB must have a fixed size", str(e.exception)) @@ -1391,7 +1399,7 @@ class TestFunctional(unittest.TestCase): entry_args = { 'keydir': 'devkeys', } - data, _, _, _ = self._DoReadFileDtb('74_vblock.dts', + data, _, _, _ = self._DoReadFileDtb('074_vblock.dts', entry_args=entry_args) expected = U_BOOT_DATA + VBLOCK_DATA + U_BOOT_DTB_DATA self.assertEqual(expected, data) @@ -1399,21 +1407,21 @@ class TestFunctional(unittest.TestCase): def testVblockNoContent(self): """Test we detect a vblock which has no content to sign""" with self.assertRaises(ValueError) as e: - self._DoReadFile('75_vblock_no_content.dts') + self._DoReadFile('075_vblock_no_content.dts') self.assertIn("Node '/binman/vblock': Vblock must have a 'content' " 'property', str(e.exception)) def testVblockBadPhandle(self): """Test that we detect a vblock with an invalid phandle in contents""" with self.assertRaises(ValueError) as e: - self._DoReadFile('76_vblock_bad_phandle.dts') + self._DoReadFile('076_vblock_bad_phandle.dts') self.assertIn("Node '/binman/vblock': Cannot find node for phandle " '1000', str(e.exception)) def testVblockBadEntry(self): """Test that we detect an entry that points to a non-entry""" with self.assertRaises(ValueError) as e: - self._DoReadFile('77_vblock_bad_entry.dts') + self._DoReadFile('077_vblock_bad_entry.dts') self.assertIn("Node '/binman/vblock': Cannot find entry for node " "'other'", str(e.exception)) @@ -1422,37 +1430,37 @@ class TestFunctional(unittest.TestCase): # ELF file with a '__bss_size' symbol with open(self.TestFile('bss_data')) as fd: TestFunctional._MakeInputFile('tpl/u-boot-tpl', fd.read()) - data = self._DoReadFile('78_u_boot_tpl.dts') + data = self._DoReadFile('078_u_boot_tpl.dts') self.assertEqual(U_BOOT_TPL_DATA + U_BOOT_TPL_DTB_DATA, data) def testUsesPos(self): """Test that the 'pos' property cannot be used anymore""" with self.assertRaises(ValueError) as e: - data = self._DoReadFile('79_uses_pos.dts') + data = self._DoReadFile('079_uses_pos.dts') self.assertIn("Node '/binman/u-boot': Please use 'offset' instead of " "'pos'", str(e.exception)) def testFillZero(self): """Test for an fill entry type with a size of 0""" - data = self._DoReadFile('80_fill_empty.dts') + data = self._DoReadFile('080_fill_empty.dts') self.assertEqual(chr(0) * 16, data) def testTextMissing(self): """Test for a text entry type where there is no text""" with self.assertRaises(ValueError) as e: - self._DoReadFileDtb('66_text.dts',) + self._DoReadFileDtb('066_text.dts',) self.assertIn("Node '/binman/text': No value provided for text label " "'test-id'", str(e.exception)) def testPackStart16Tpl(self): """Test that an image with an x86 start16 TPL region can be created""" - data = self._DoReadFile('81_x86-start16-tpl.dts') + data = self._DoReadFile('081_x86-start16-tpl.dts') self.assertEqual(X86_START16_TPL_DATA, data[:len(X86_START16_TPL_DATA)]) def testSelectImage(self): """Test that we can select which images to build""" with test_util.capture_sys_output() as (stdout, stderr): - retcode = self._DoTestFile('06_dual_image.dts', images=['image2']) + retcode = self._DoTestFile('006_dual_image.dts', images=['image2']) self.assertEqual(0, retcode) self.assertIn('Skipping images: image1', stdout.getvalue()) @@ -1461,7 +1469,7 @@ class TestFunctional(unittest.TestCase): def testUpdateFdtAll(self): """Test that all device trees are updated with offset/size info""" - data, _, _, _ = self._DoReadFileDtb('82_fdt_update_all.dts', + data, _, _, _ = self._DoReadFileDtb('082_fdt_update_all.dts', use_real_dtb=True, update_dtb=True) base_expected = { @@ -1501,12 +1509,12 @@ class TestFunctional(unittest.TestCase): def testUpdateFdtOutput(self): """Test that output DTB files are updated""" try: - data, dtb_data, _, _ = self._DoReadFileDtb('82_fdt_update_all.dts', + data, dtb_data, _, _ = self._DoReadFileDtb('082_fdt_update_all.dts', use_real_dtb=True, update_dtb=True, reset_dtbs=False) # Unfortunately, compiling a source file always results in a file # called source.dtb (see fdt_util.EnsureCompiled()). The test - # source file (e.g. test/75_fdt_update_all.dts) thus does not enter + # source file (e.g. test/075_fdt_update_all.dts) thus does not enter # binman as a file called u-boot.dtb. To fix this, copy the file # over to the expected place. #tools.WriteFile(os.path.join(self._indir, 'u-boot.dtb'), @@ -1547,7 +1555,7 @@ class TestFunctional(unittest.TestCase): def testCompress(self): """Test compression of blobs""" - data, _, _, out_dtb_fname = self._DoReadFileDtb('83_compress.dts', + data, _, _, out_dtb_fname = self._DoReadFileDtb('083_compress.dts', use_real_dtb=True, update_dtb=True) dtb = fdt.Fdt(out_dtb_fname) dtb.Scan() @@ -1563,12 +1571,12 @@ class TestFunctional(unittest.TestCase): def testFiles(self): """Test bringing in multiple files""" - data = self._DoReadFile('84_files.dts') + data = self._DoReadFile('084_files.dts') self.assertEqual(FILES_DATA, data) def testFilesCompress(self): """Test bringing in multiple files and compressing them""" - data = self._DoReadFile('85_files_compress.dts') + data = self._DoReadFile('085_files_compress.dts') image = control.images['image'] entries = image.GetEntries() @@ -1588,20 +1596,20 @@ class TestFunctional(unittest.TestCase): def testFilesMissing(self): """Test missing files""" with self.assertRaises(ValueError) as e: - data = self._DoReadFile('86_files_none.dts') + data = self._DoReadFile('086_files_none.dts') self.assertIn("Node '/binman/files': Pattern \'files/*.none\' matched " 'no files', str(e.exception)) def testFilesNoPattern(self): """Test missing files""" with self.assertRaises(ValueError) as e: - data = self._DoReadFile('87_files_no_pattern.dts') + data = self._DoReadFile('087_files_no_pattern.dts') self.assertIn("Node '/binman/files': Missing 'pattern' property", str(e.exception)) def testExpandSize(self): """Test an expanding entry""" - data, _, map_data, _ = self._DoReadFileDtb('88_expand_size.dts', + data, _, map_data, _ = self._DoReadFileDtb('088_expand_size.dts', map=True) expect = ('a' * 8 + U_BOOT_DATA + MRC_DATA + 'b' * 1 + U_BOOT_DATA + @@ -1625,13 +1633,13 @@ class TestFunctional(unittest.TestCase): """Test an expanding entry which fails to provide contents""" with test_util.capture_sys_output() as (stdout, stderr): with self.assertRaises(ValueError) as e: - self._DoReadFileDtb('89_expand_size_bad.dts', map=True) + self._DoReadFileDtb('089_expand_size_bad.dts', map=True) self.assertIn("Node '/binman/_testing': Cannot obtain contents when " 'expanding entry', str(e.exception)) def testHash(self): """Test hashing of the contents of an entry""" - _, _, _, out_dtb_fname = self._DoReadFileDtb('90_hash.dts', + _, _, _, out_dtb_fname = self._DoReadFileDtb('090_hash.dts', use_real_dtb=True, update_dtb=True) dtb = fdt.Fdt(out_dtb_fname) dtb.Scan() @@ -1642,19 +1650,19 @@ class TestFunctional(unittest.TestCase): def testHashNoAlgo(self): with self.assertRaises(ValueError) as e: - self._DoReadFileDtb('91_hash_no_algo.dts', update_dtb=True) + self._DoReadFileDtb('091_hash_no_algo.dts', update_dtb=True) self.assertIn("Node \'/binman/u-boot\': Missing \'algo\' property for " 'hash node', str(e.exception)) def testHashBadAlgo(self): with self.assertRaises(ValueError) as e: - self._DoReadFileDtb('92_hash_bad_algo.dts', update_dtb=True) + self._DoReadFileDtb('092_hash_bad_algo.dts', update_dtb=True) self.assertIn("Node '/binman/u-boot': Unknown hash algorithm", str(e.exception)) def testHashSection(self): """Test hashing of the contents of an entry""" - _, _, _, out_dtb_fname = self._DoReadFileDtb('99_hash_section.dts', + _, _, _, out_dtb_fname = self._DoReadFileDtb('099_hash_section.dts', use_real_dtb=True, update_dtb=True) dtb = fdt.Fdt(out_dtb_fname) dtb.Scan() @@ -1675,14 +1683,14 @@ class TestFunctional(unittest.TestCase): """ with open(self.TestFile('u_boot_ucode_ptr')) as fd: TestFunctional._MakeInputFile('tpl/u-boot-tpl', fd.read()) - first, pos_and_size = self._RunMicrocodeTest('93_x86_tpl_ucode.dts', + first, pos_and_size = self._RunMicrocodeTest('093_x86_tpl_ucode.dts', U_BOOT_TPL_NODTB_DATA) self.assertEqual('tplnodtb with microc' + pos_and_size + 'ter somewhere in here', first) def testFmapX86(self): """Basic test of generation of a flashrom fmap""" - data = self._DoReadFile('94_fmap_x86.dts') + data = self._DoReadFile('094_fmap_x86.dts') fhdr, fentries = fmap_util.DecodeFmap(data[32:]) expected = U_BOOT_DATA + MRC_DATA + 'a' * (32 - 7) self.assertEqual(expected, data[:32]) @@ -1705,7 +1713,7 @@ class TestFunctional(unittest.TestCase): def testFmapX86Section(self): """Basic test of generation of a flashrom fmap""" - data = self._DoReadFile('95_fmap_x86_section.dts') + data = self._DoReadFile('095_fmap_x86_section.dts') expected = U_BOOT_DATA + MRC_DATA + 'b' * (32 - 7) self.assertEqual(expected, data[:32]) fhdr, fentries = fmap_util.DecodeFmap(data[36:]) @@ -1727,25 +1735,23 @@ class TestFunctional(unittest.TestCase): def testElf(self): """Basic test of ELF entries""" - with open(self.TestFile('bss_data')) as fd: - TestFunctional._MakeInputFile('spl/u-boot-spl', fd.read()) + self._SetupSplElf() with open(self.TestFile('bss_data')) as fd: TestFunctional._MakeInputFile('-boot', fd.read()) - data = self._DoReadFile('96_elf.dts') + data = self._DoReadFile('096_elf.dts') def testElfStripg(self): """Basic test of ELF entries""" - with open(self.TestFile('bss_data')) as fd: - TestFunctional._MakeInputFile('spl/u-boot-spl', fd.read()) + self._SetupSplElf() with open(self.TestFile('bss_data')) as fd: TestFunctional._MakeInputFile('-boot', fd.read()) - data = self._DoReadFile('97_elf_strip.dts') + data = self._DoReadFile('097_elf_strip.dts') def testPackOverlapMap(self): """Test that overlapping regions are detected""" with test_util.capture_sys_output() as (stdout, stderr): with self.assertRaises(ValueError) as e: - self._DoTestFile('14_pack_overlap.dts', map=True) + self._DoTestFile('014_pack_overlap.dts', map=True) map_fname = tools.GetOutputFilename('image.map') self.assertEqual("Wrote map file '%s' to show errors\n" % map_fname, stdout.getvalue()) @@ -1760,6 +1766,11 @@ class TestFunctional(unittest.TestCase): <none> 00000003 00000004 u-boot-align ''', map_data) + def testPacRefCode(self): + """Test that an image with an Intel Reference code binary works""" + data = self._DoReadFile('100_intel_refcode.dts') + self.assertEqual(REFCODE_DATA, data[:len(REFCODE_DATA)]) + if __name__ == "__main__": unittest.main() diff --git a/tools/binman/test/01_invalid.dts b/tools/binman/test/001_invalid.dts index 7d00455d7c..7d00455d7c 100644 --- a/tools/binman/test/01_invalid.dts +++ b/tools/binman/test/001_invalid.dts diff --git a/tools/binman/test/02_missing_node.dts b/tools/binman/test/002_missing_node.dts index 3a51ec2be5..3a51ec2be5 100644 --- a/tools/binman/test/02_missing_node.dts +++ b/tools/binman/test/002_missing_node.dts diff --git a/tools/binman/test/03_empty.dts b/tools/binman/test/003_empty.dts index 493c9a04c9..493c9a04c9 100644 --- a/tools/binman/test/03_empty.dts +++ b/tools/binman/test/003_empty.dts diff --git a/tools/binman/test/04_invalid_entry.dts b/tools/binman/test/004_invalid_entry.dts index b043455bb5..b043455bb5 100644 --- a/tools/binman/test/04_invalid_entry.dts +++ b/tools/binman/test/004_invalid_entry.dts diff --git a/tools/binman/test/05_simple.dts b/tools/binman/test/005_simple.dts index 3771aa2261..3771aa2261 100644 --- a/tools/binman/test/05_simple.dts +++ b/tools/binman/test/005_simple.dts diff --git a/tools/binman/test/06_dual_image.dts b/tools/binman/test/006_dual_image.dts index 78be16f164..78be16f164 100644 --- a/tools/binman/test/06_dual_image.dts +++ b/tools/binman/test/006_dual_image.dts diff --git a/tools/binman/test/07_bad_align.dts b/tools/binman/test/007_bad_align.dts index 123bb13558..123bb13558 100644 --- a/tools/binman/test/07_bad_align.dts +++ b/tools/binman/test/007_bad_align.dts diff --git a/tools/binman/test/08_pack.dts b/tools/binman/test/008_pack.dts index a88785d835..a88785d835 100644 --- a/tools/binman/test/08_pack.dts +++ b/tools/binman/test/008_pack.dts diff --git a/tools/binman/test/09_pack_extra.dts b/tools/binman/test/009_pack_extra.dts index 0765707dea..0765707dea 100644 --- a/tools/binman/test/09_pack_extra.dts +++ b/tools/binman/test/009_pack_extra.dts diff --git a/tools/binman/test/10_pack_align_power2.dts b/tools/binman/test/010_pack_align_power2.dts index 8f6253a3d0..8f6253a3d0 100644 --- a/tools/binman/test/10_pack_align_power2.dts +++ b/tools/binman/test/010_pack_align_power2.dts diff --git a/tools/binman/test/11_pack_align_size_power2.dts b/tools/binman/test/011_pack_align_size_power2.dts index 04f7672ea4..04f7672ea4 100644 --- a/tools/binman/test/11_pack_align_size_power2.dts +++ b/tools/binman/test/011_pack_align_size_power2.dts diff --git a/tools/binman/test/12_pack_inv_align.dts b/tools/binman/test/012_pack_inv_align.dts index d8dd600edb..d8dd600edb 100644 --- a/tools/binman/test/12_pack_inv_align.dts +++ b/tools/binman/test/012_pack_inv_align.dts diff --git a/tools/binman/test/13_pack_inv_size_align.dts b/tools/binman/test/013_pack_inv_size_align.dts index dfafa134d7..dfafa134d7 100644 --- a/tools/binman/test/13_pack_inv_size_align.dts +++ b/tools/binman/test/013_pack_inv_size_align.dts diff --git a/tools/binman/test/14_pack_overlap.dts b/tools/binman/test/014_pack_overlap.dts index 3895cba3bd..3895cba3bd 100644 --- a/tools/binman/test/14_pack_overlap.dts +++ b/tools/binman/test/014_pack_overlap.dts diff --git a/tools/binman/test/15_pack_overflow.dts b/tools/binman/test/015_pack_overflow.dts index 6f654330af..6f654330af 100644 --- a/tools/binman/test/15_pack_overflow.dts +++ b/tools/binman/test/015_pack_overflow.dts diff --git a/tools/binman/test/16_pack_image_overflow.dts b/tools/binman/test/016_pack_image_overflow.dts index 6ae66f3ac9..6ae66f3ac9 100644 --- a/tools/binman/test/16_pack_image_overflow.dts +++ b/tools/binman/test/016_pack_image_overflow.dts diff --git a/tools/binman/test/17_pack_image_size.dts b/tools/binman/test/017_pack_image_size.dts index 2360eb5d19..2360eb5d19 100644 --- a/tools/binman/test/17_pack_image_size.dts +++ b/tools/binman/test/017_pack_image_size.dts diff --git a/tools/binman/test/18_pack_image_align.dts b/tools/binman/test/018_pack_image_align.dts index 16cd2a422e..16cd2a422e 100644 --- a/tools/binman/test/18_pack_image_align.dts +++ b/tools/binman/test/018_pack_image_align.dts diff --git a/tools/binman/test/19_pack_inv_image_align.dts b/tools/binman/test/019_pack_inv_image_align.dts index e5ee87b88f..e5ee87b88f 100644 --- a/tools/binman/test/19_pack_inv_image_align.dts +++ b/tools/binman/test/019_pack_inv_image_align.dts diff --git a/tools/binman/test/20_pack_inv_image_align_power2.dts b/tools/binman/test/020_pack_inv_image_align_power2.dts index a428c4be52..a428c4be52 100644 --- a/tools/binman/test/20_pack_inv_image_align_power2.dts +++ b/tools/binman/test/020_pack_inv_image_align_power2.dts diff --git a/tools/binman/test/21_image_pad.dts b/tools/binman/test/021_image_pad.dts index c6516689d9..c6516689d9 100644 --- a/tools/binman/test/21_image_pad.dts +++ b/tools/binman/test/021_image_pad.dts diff --git a/tools/binman/test/22_image_name.dts b/tools/binman/test/022_image_name.dts index 94fc069c17..94fc069c17 100644 --- a/tools/binman/test/22_image_name.dts +++ b/tools/binman/test/022_image_name.dts diff --git a/tools/binman/test/23_blob.dts b/tools/binman/test/023_blob.dts index 7dcff69666..7dcff69666 100644 --- a/tools/binman/test/23_blob.dts +++ b/tools/binman/test/023_blob.dts diff --git a/tools/binman/test/24_sorted.dts b/tools/binman/test/024_sorted.dts index d35d39f077..d35d39f077 100644 --- a/tools/binman/test/24_sorted.dts +++ b/tools/binman/test/024_sorted.dts diff --git a/tools/binman/test/25_pack_zero_size.dts b/tools/binman/test/025_pack_zero_size.dts index e863c44e3f..e863c44e3f 100644 --- a/tools/binman/test/25_pack_zero_size.dts +++ b/tools/binman/test/025_pack_zero_size.dts diff --git a/tools/binman/test/26_pack_u_boot_dtb.dts b/tools/binman/test/026_pack_u_boot_dtb.dts index 2707a7347a..2707a7347a 100644 --- a/tools/binman/test/26_pack_u_boot_dtb.dts +++ b/tools/binman/test/026_pack_u_boot_dtb.dts diff --git a/tools/binman/test/27_pack_4gb_no_size.dts b/tools/binman/test/027_pack_4gb_no_size.dts index 371cca10d5..371cca10d5 100644 --- a/tools/binman/test/27_pack_4gb_no_size.dts +++ b/tools/binman/test/027_pack_4gb_no_size.dts diff --git a/tools/binman/test/28_pack_4gb_outside.dts b/tools/binman/test/028_pack_4gb_outside.dts index 2216abfb70..2216abfb70 100644 --- a/tools/binman/test/28_pack_4gb_outside.dts +++ b/tools/binman/test/028_pack_4gb_outside.dts diff --git a/tools/binman/test/29_x86-rom.dts b/tools/binman/test/029_x86-rom.dts index d5c69f9d4a..d5c69f9d4a 100644 --- a/tools/binman/test/29_x86-rom.dts +++ b/tools/binman/test/029_x86-rom.dts diff --git a/tools/binman/test/30_x86-rom-me-no-desc.dts b/tools/binman/test/030_x86-rom-me-no-desc.dts index 796cb87afc..796cb87afc 100644 --- a/tools/binman/test/30_x86-rom-me-no-desc.dts +++ b/tools/binman/test/030_x86-rom-me-no-desc.dts diff --git a/tools/binman/test/31_x86-rom-me.dts b/tools/binman/test/031_x86-rom-me.dts index b8b0a5a74b..b8b0a5a74b 100644 --- a/tools/binman/test/31_x86-rom-me.dts +++ b/tools/binman/test/031_x86-rom-me.dts diff --git a/tools/binman/test/32_intel-vga.dts b/tools/binman/test/032_intel-vga.dts index 9c532d03d3..9c532d03d3 100644 --- a/tools/binman/test/32_intel-vga.dts +++ b/tools/binman/test/032_intel-vga.dts diff --git a/tools/binman/test/33_x86-start16.dts b/tools/binman/test/033_x86-start16.dts index 2e279dee9d..2e279dee9d 100644 --- a/tools/binman/test/33_x86-start16.dts +++ b/tools/binman/test/033_x86-start16.dts diff --git a/tools/binman/test/34_x86_ucode.dts b/tools/binman/test/034_x86_ucode.dts index 40725731cd..40725731cd 100644 --- a/tools/binman/test/34_x86_ucode.dts +++ b/tools/binman/test/034_x86_ucode.dts diff --git a/tools/binman/test/35_x86_single_ucode.dts b/tools/binman/test/035_x86_single_ucode.dts index 2b1f086a41..2b1f086a41 100644 --- a/tools/binman/test/35_x86_single_ucode.dts +++ b/tools/binman/test/035_x86_single_ucode.dts diff --git a/tools/binman/test/36_u_boot_img.dts b/tools/binman/test/036_u_boot_img.dts index aa5a3fe481..aa5a3fe481 100644 --- a/tools/binman/test/36_u_boot_img.dts +++ b/tools/binman/test/036_u_boot_img.dts diff --git a/tools/binman/test/37_x86_no_ucode.dts b/tools/binman/test/037_x86_no_ucode.dts index 6da49c3da6..6da49c3da6 100644 --- a/tools/binman/test/37_x86_no_ucode.dts +++ b/tools/binman/test/037_x86_no_ucode.dts diff --git a/tools/binman/test/38_x86_ucode_missing_node.dts b/tools/binman/test/038_x86_ucode_missing_node.dts index 720677c9c1..720677c9c1 100644 --- a/tools/binman/test/38_x86_ucode_missing_node.dts +++ b/tools/binman/test/038_x86_ucode_missing_node.dts diff --git a/tools/binman/test/39_x86_ucode_missing_node2.dts b/tools/binman/test/039_x86_ucode_missing_node2.dts index 10ac086d54..10ac086d54 100644 --- a/tools/binman/test/39_x86_ucode_missing_node2.dts +++ b/tools/binman/test/039_x86_ucode_missing_node2.dts diff --git a/tools/binman/test/40_x86_ucode_not_in_image.dts b/tools/binman/test/040_x86_ucode_not_in_image.dts index 609725824a..609725824a 100644 --- a/tools/binman/test/40_x86_ucode_not_in_image.dts +++ b/tools/binman/test/040_x86_ucode_not_in_image.dts diff --git a/tools/binman/test/41_unknown_pos_size.dts b/tools/binman/test/041_unknown_pos_size.dts index 94fe821c47..94fe821c47 100644 --- a/tools/binman/test/41_unknown_pos_size.dts +++ b/tools/binman/test/041_unknown_pos_size.dts diff --git a/tools/binman/test/42_intel-fsp.dts b/tools/binman/test/042_intel-fsp.dts index 8a7c889251..8a7c889251 100644 --- a/tools/binman/test/42_intel-fsp.dts +++ b/tools/binman/test/042_intel-fsp.dts diff --git a/tools/binman/test/43_intel-cmc.dts b/tools/binman/test/043_intel-cmc.dts index 5a56c7d881..5a56c7d881 100644 --- a/tools/binman/test/43_intel-cmc.dts +++ b/tools/binman/test/043_intel-cmc.dts diff --git a/tools/binman/test/44_x86_optional_ucode.dts b/tools/binman/test/044_x86_optional_ucode.dts index 24a7040d31..24a7040d31 100644 --- a/tools/binman/test/44_x86_optional_ucode.dts +++ b/tools/binman/test/044_x86_optional_ucode.dts diff --git a/tools/binman/test/45_prop_test.dts b/tools/binman/test/045_prop_test.dts index 064de2b316..064de2b316 100644 --- a/tools/binman/test/45_prop_test.dts +++ b/tools/binman/test/045_prop_test.dts diff --git a/tools/binman/test/46_intel-vbt.dts b/tools/binman/test/046_intel-vbt.dts index 733f5751d5..733f5751d5 100644 --- a/tools/binman/test/46_intel-vbt.dts +++ b/tools/binman/test/046_intel-vbt.dts diff --git a/tools/binman/test/47_spl_bss_pad.dts b/tools/binman/test/047_spl_bss_pad.dts index 6bd88b83f9..6bd88b83f9 100644 --- a/tools/binman/test/47_spl_bss_pad.dts +++ b/tools/binman/test/047_spl_bss_pad.dts diff --git a/tools/binman/test/48_x86-start16-spl.dts b/tools/binman/test/048_x86-start16-spl.dts index e2009f15f0..e2009f15f0 100644 --- a/tools/binman/test/48_x86-start16-spl.dts +++ b/tools/binman/test/048_x86-start16-spl.dts diff --git a/tools/binman/test/49_x86_ucode_spl.dts b/tools/binman/test/049_x86_ucode_spl.dts index 350d2c4730..350d2c4730 100644 --- a/tools/binman/test/49_x86_ucode_spl.dts +++ b/tools/binman/test/049_x86_ucode_spl.dts diff --git a/tools/binman/test/50_intel_mrc.dts b/tools/binman/test/050_intel_mrc.dts index 54cd52a2b7..54cd52a2b7 100644 --- a/tools/binman/test/50_intel_mrc.dts +++ b/tools/binman/test/050_intel_mrc.dts diff --git a/tools/binman/test/51_u_boot_spl_dtb.dts b/tools/binman/test/051_u_boot_spl_dtb.dts index 3912f86b4c..3912f86b4c 100644 --- a/tools/binman/test/51_u_boot_spl_dtb.dts +++ b/tools/binman/test/051_u_boot_spl_dtb.dts diff --git a/tools/binman/test/52_u_boot_spl_nodtb.dts b/tools/binman/test/052_u_boot_spl_nodtb.dts index 7f4e27780f..7f4e27780f 100644 --- a/tools/binman/test/52_u_boot_spl_nodtb.dts +++ b/tools/binman/test/052_u_boot_spl_nodtb.dts diff --git a/tools/binman/test/53_symbols.dts b/tools/binman/test/053_symbols.dts index 9f135676cb..9f135676cb 100644 --- a/tools/binman/test/53_symbols.dts +++ b/tools/binman/test/053_symbols.dts diff --git a/tools/binman/test/54_unit_address.dts b/tools/binman/test/054_unit_address.dts index 3216dbbcc1..3216dbbcc1 100644 --- a/tools/binman/test/54_unit_address.dts +++ b/tools/binman/test/054_unit_address.dts diff --git a/tools/binman/test/55_sections.dts b/tools/binman/test/055_sections.dts index 6b306aeda4..6b306aeda4 100644 --- a/tools/binman/test/55_sections.dts +++ b/tools/binman/test/055_sections.dts diff --git a/tools/binman/test/56_name_prefix.dts b/tools/binman/test/056_name_prefix.dts index f38c80eb18..f38c80eb18 100644 --- a/tools/binman/test/56_name_prefix.dts +++ b/tools/binman/test/056_name_prefix.dts diff --git a/tools/binman/test/57_unknown_contents.dts b/tools/binman/test/057_unknown_contents.dts index 6ea98d7cab..6ea98d7cab 100644 --- a/tools/binman/test/57_unknown_contents.dts +++ b/tools/binman/test/057_unknown_contents.dts diff --git a/tools/binman/test/58_x86_ucode_spl_needs_retry.dts b/tools/binman/test/058_x86_ucode_spl_needs_retry.dts index a04adaaf7b..a04adaaf7b 100644 --- a/tools/binman/test/58_x86_ucode_spl_needs_retry.dts +++ b/tools/binman/test/058_x86_ucode_spl_needs_retry.dts diff --git a/tools/binman/test/59_change_size.dts b/tools/binman/test/059_change_size.dts index 1a69026a64..1a69026a64 100644 --- a/tools/binman/test/59_change_size.dts +++ b/tools/binman/test/059_change_size.dts diff --git a/tools/binman/test/60_fdt_update.dts b/tools/binman/test/060_fdt_update.dts index f53c8a5053..f53c8a5053 100644 --- a/tools/binman/test/60_fdt_update.dts +++ b/tools/binman/test/060_fdt_update.dts diff --git a/tools/binman/test/61_fdt_update_bad.dts b/tools/binman/test/061_fdt_update_bad.dts index e5abf31699..e5abf31699 100644 --- a/tools/binman/test/61_fdt_update_bad.dts +++ b/tools/binman/test/061_fdt_update_bad.dts diff --git a/tools/binman/test/62_entry_args.dts b/tools/binman/test/062_entry_args.dts index 4d4f102d60..4d4f102d60 100644 --- a/tools/binman/test/62_entry_args.dts +++ b/tools/binman/test/062_entry_args.dts diff --git a/tools/binman/test/63_entry_args_missing.dts b/tools/binman/test/063_entry_args_missing.dts index 1644e2fef3..1644e2fef3 100644 --- a/tools/binman/test/63_entry_args_missing.dts +++ b/tools/binman/test/063_entry_args_missing.dts diff --git a/tools/binman/test/64_entry_args_required.dts b/tools/binman/test/064_entry_args_required.dts index 705be10069..705be10069 100644 --- a/tools/binman/test/64_entry_args_required.dts +++ b/tools/binman/test/064_entry_args_required.dts diff --git a/tools/binman/test/65_entry_args_unknown_datatype.dts b/tools/binman/test/065_entry_args_unknown_datatype.dts index 3e4838f4ff..3e4838f4ff 100644 --- a/tools/binman/test/65_entry_args_unknown_datatype.dts +++ b/tools/binman/test/065_entry_args_unknown_datatype.dts diff --git a/tools/binman/test/66_text.dts b/tools/binman/test/066_text.dts index 59b1fed0ef..59b1fed0ef 100644 --- a/tools/binman/test/66_text.dts +++ b/tools/binman/test/066_text.dts diff --git a/tools/binman/test/67_fmap.dts b/tools/binman/test/067_fmap.dts index 9c0e293ac8..9c0e293ac8 100644 --- a/tools/binman/test/67_fmap.dts +++ b/tools/binman/test/067_fmap.dts diff --git a/tools/binman/test/68_blob_named_by_arg.dts b/tools/binman/test/068_blob_named_by_arg.dts index e129f843cd..e129f843cd 100644 --- a/tools/binman/test/68_blob_named_by_arg.dts +++ b/tools/binman/test/068_blob_named_by_arg.dts diff --git a/tools/binman/test/69_fill.dts b/tools/binman/test/069_fill.dts index e372ea37aa..e372ea37aa 100644 --- a/tools/binman/test/69_fill.dts +++ b/tools/binman/test/069_fill.dts diff --git a/tools/binman/test/70_fill_no_size.dts b/tools/binman/test/070_fill_no_size.dts index 7b1fcf1b68..7b1fcf1b68 100644 --- a/tools/binman/test/70_fill_no_size.dts +++ b/tools/binman/test/070_fill_no_size.dts diff --git a/tools/binman/test/71_gbb.dts b/tools/binman/test/071_gbb.dts index 551756372a..551756372a 100644 --- a/tools/binman/test/71_gbb.dts +++ b/tools/binman/test/071_gbb.dts diff --git a/tools/binman/test/72_gbb_too_small.dts b/tools/binman/test/072_gbb_too_small.dts index c088f36a1d..c088f36a1d 100644 --- a/tools/binman/test/72_gbb_too_small.dts +++ b/tools/binman/test/072_gbb_too_small.dts diff --git a/tools/binman/test/73_gbb_no_size.dts b/tools/binman/test/073_gbb_no_size.dts index 83be403785..83be403785 100644 --- a/tools/binman/test/73_gbb_no_size.dts +++ b/tools/binman/test/073_gbb_no_size.dts diff --git a/tools/binman/test/74_vblock.dts b/tools/binman/test/074_vblock.dts index f0c21bfe9f..f0c21bfe9f 100644 --- a/tools/binman/test/74_vblock.dts +++ b/tools/binman/test/074_vblock.dts diff --git a/tools/binman/test/75_vblock_no_content.dts b/tools/binman/test/075_vblock_no_content.dts index 676d9474b3..676d9474b3 100644 --- a/tools/binman/test/75_vblock_no_content.dts +++ b/tools/binman/test/075_vblock_no_content.dts diff --git a/tools/binman/test/76_vblock_bad_phandle.dts b/tools/binman/test/076_vblock_bad_phandle.dts index ffbd0c335c..ffbd0c335c 100644 --- a/tools/binman/test/76_vblock_bad_phandle.dts +++ b/tools/binman/test/076_vblock_bad_phandle.dts diff --git a/tools/binman/test/77_vblock_bad_entry.dts b/tools/binman/test/077_vblock_bad_entry.dts index 764c42a56e..764c42a56e 100644 --- a/tools/binman/test/77_vblock_bad_entry.dts +++ b/tools/binman/test/077_vblock_bad_entry.dts diff --git a/tools/binman/test/78_u_boot_tpl.dts b/tools/binman/test/078_u_boot_tpl.dts index 6c60b4c46f..6c60b4c46f 100644 --- a/tools/binman/test/78_u_boot_tpl.dts +++ b/tools/binman/test/078_u_boot_tpl.dts diff --git a/tools/binman/test/79_uses_pos.dts b/tools/binman/test/079_uses_pos.dts index 7638b9b5e0..7638b9b5e0 100644 --- a/tools/binman/test/79_uses_pos.dts +++ b/tools/binman/test/079_uses_pos.dts diff --git a/tools/binman/test/80_fill_empty.dts b/tools/binman/test/080_fill_empty.dts index 2b78d3ae88..2b78d3ae88 100644 --- a/tools/binman/test/80_fill_empty.dts +++ b/tools/binman/test/080_fill_empty.dts diff --git a/tools/binman/test/81_x86-start16-tpl.dts b/tools/binman/test/081_x86-start16-tpl.dts index 68e6bbd68f..68e6bbd68f 100644 --- a/tools/binman/test/81_x86-start16-tpl.dts +++ b/tools/binman/test/081_x86-start16-tpl.dts diff --git a/tools/binman/test/82_fdt_update_all.dts b/tools/binman/test/082_fdt_update_all.dts index 284975cc28..284975cc28 100644 --- a/tools/binman/test/82_fdt_update_all.dts +++ b/tools/binman/test/082_fdt_update_all.dts diff --git a/tools/binman/test/83_compress.dts b/tools/binman/test/083_compress.dts index 07813bdeaa..07813bdeaa 100644 --- a/tools/binman/test/83_compress.dts +++ b/tools/binman/test/083_compress.dts diff --git a/tools/binman/test/84_files.dts b/tools/binman/test/084_files.dts index 83ddb78f8e..83ddb78f8e 100644 --- a/tools/binman/test/84_files.dts +++ b/tools/binman/test/084_files.dts diff --git a/tools/binman/test/85_files_compress.dts b/tools/binman/test/085_files_compress.dts index 847b398bf2..847b398bf2 100644 --- a/tools/binman/test/85_files_compress.dts +++ b/tools/binman/test/085_files_compress.dts diff --git a/tools/binman/test/86_files_none.dts b/tools/binman/test/086_files_none.dts index 34bd92f224..34bd92f224 100644 --- a/tools/binman/test/86_files_none.dts +++ b/tools/binman/test/086_files_none.dts diff --git a/tools/binman/test/87_files_no_pattern.dts b/tools/binman/test/087_files_no_pattern.dts index 0cb5b469cb..0cb5b469cb 100644 --- a/tools/binman/test/87_files_no_pattern.dts +++ b/tools/binman/test/087_files_no_pattern.dts diff --git a/tools/binman/test/88_expand_size.dts b/tools/binman/test/088_expand_size.dts index c8a01308ec..c8a01308ec 100644 --- a/tools/binman/test/88_expand_size.dts +++ b/tools/binman/test/088_expand_size.dts diff --git a/tools/binman/test/89_expand_size_bad.dts b/tools/binman/test/089_expand_size_bad.dts index edc0e5cf68..edc0e5cf68 100644 --- a/tools/binman/test/89_expand_size_bad.dts +++ b/tools/binman/test/089_expand_size_bad.dts diff --git a/tools/binman/test/90_hash.dts b/tools/binman/test/090_hash.dts index 200304599d..200304599d 100644 --- a/tools/binman/test/90_hash.dts +++ b/tools/binman/test/090_hash.dts diff --git a/tools/binman/test/91_hash_no_algo.dts b/tools/binman/test/091_hash_no_algo.dts index b64df20511..b64df20511 100644 --- a/tools/binman/test/91_hash_no_algo.dts +++ b/tools/binman/test/091_hash_no_algo.dts diff --git a/tools/binman/test/92_hash_bad_algo.dts b/tools/binman/test/092_hash_bad_algo.dts index d2402000db..d2402000db 100644 --- a/tools/binman/test/92_hash_bad_algo.dts +++ b/tools/binman/test/092_hash_bad_algo.dts diff --git a/tools/binman/test/93_x86_tpl_ucode.dts b/tools/binman/test/093_x86_tpl_ucode.dts index d7ed9fc66b..d7ed9fc66b 100644 --- a/tools/binman/test/93_x86_tpl_ucode.dts +++ b/tools/binman/test/093_x86_tpl_ucode.dts diff --git a/tools/binman/test/94_fmap_x86.dts b/tools/binman/test/094_fmap_x86.dts index 613c5dab42..613c5dab42 100644 --- a/tools/binman/test/94_fmap_x86.dts +++ b/tools/binman/test/094_fmap_x86.dts diff --git a/tools/binman/test/95_fmap_x86_section.dts b/tools/binman/test/095_fmap_x86_section.dts index 4cfce45670..4cfce45670 100644 --- a/tools/binman/test/95_fmap_x86_section.dts +++ b/tools/binman/test/095_fmap_x86_section.dts diff --git a/tools/binman/test/96_elf.dts b/tools/binman/test/096_elf.dts index df3440c319..df3440c319 100644 --- a/tools/binman/test/96_elf.dts +++ b/tools/binman/test/096_elf.dts diff --git a/tools/binman/test/97_elf_strip.dts b/tools/binman/test/097_elf_strip.dts index 6f3c66fd70..6f3c66fd70 100644 --- a/tools/binman/test/97_elf_strip.dts +++ b/tools/binman/test/097_elf_strip.dts diff --git a/tools/binman/test/99_hash_section.dts b/tools/binman/test/099_hash_section.dts index dcd8683d64..dcd8683d64 100644 --- a/tools/binman/test/99_hash_section.dts +++ b/tools/binman/test/099_hash_section.dts diff --git a/tools/binman/test/100_intel_refcode.dts b/tools/binman/test/100_intel_refcode.dts new file mode 100644 index 0000000000..0a1a0270e5 --- /dev/null +++ b/tools/binman/test/100_intel_refcode.dts @@ -0,0 +1,14 @@ +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + size = <16>; + + intel-refcode { + filename = "refcode.bin"; + }; + }; +}; diff --git a/tools/buildman/test.py b/tools/buildman/test.py index c36bcdf6fb..e0c9d6da6a 100644 --- a/tools/buildman/test.py +++ b/tools/buildman/test.py @@ -20,6 +20,7 @@ import control import command import commit import terminal +import test_util import toolchain use_network = True @@ -422,8 +423,11 @@ class TestBuild(unittest.TestCase): def testToolchainDownload(self): """Test that we can download toolchains""" if use_network: - self.assertEqual('https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.9.0/x86_64-gcc-4.9.0-nolibc_arm-unknown-linux-gnueabi.tar.xz', - self.toolchains.LocateArchUrl('arm')) + with test_util.capture_sys_output() as (stdout, stderr): + url = self.toolchains.LocateArchUrl('arm') + self.assertRegexpMatches(url, 'https://www.kernel.org/pub/tools/' + 'crosstool/files/bin/x86_64/.*/' + 'x86_64-gcc-.*-nolibc_arm-.*linux-gnueabi.tar.xz') if __name__ == "__main__": diff --git a/tools/concurrencytest/.gitignore b/tools/concurrencytest/.gitignore new file mode 100644 index 0000000000..0d20b6487c --- /dev/null +++ b/tools/concurrencytest/.gitignore @@ -0,0 +1 @@ +*.pyc diff --git a/tools/concurrencytest/README.md b/tools/concurrencytest/README.md new file mode 100644 index 0000000000..8e65776f17 --- /dev/null +++ b/tools/concurrencytest/README.md @@ -0,0 +1,74 @@ +concurrencytest +=============== + + + +Python testtools extension for running unittest suites concurrently. + +---- + +Install from PyPI: +``` +pip install concurrencytest +``` + +---- + +Requires: + + * [testtools](https://pypi.python.org/pypi/testtools) : `pip install testtools` + * [python-subunit](https://pypi.python.org/pypi/python-subunit) : `pip install python-subunit` + +---- + +Example: + +```python +import time +import unittest + +from concurrencytest import ConcurrentTestSuite, fork_for_tests + + +class SampleTestCase(unittest.TestCase): + """Dummy tests that sleep for demo.""" + + def test_me_1(self): + time.sleep(0.5) + + def test_me_2(self): + time.sleep(0.5) + + def test_me_3(self): + time.sleep(0.5) + + def test_me_4(self): + time.sleep(0.5) + + +# Load tests from SampleTestCase defined above +suite = unittest.TestLoader().loadTestsFromTestCase(SampleTestCase) +runner = unittest.TextTestRunner() + +# Run tests sequentially +runner.run(suite) + +# Run same tests across 4 processes +suite = unittest.TestLoader().loadTestsFromTestCase(SampleTestCase) +concurrent_suite = ConcurrentTestSuite(suite, fork_for_tests(4)) +runner.run(concurrent_suite) +``` +Output: + +``` +.... +---------------------------------------------------------------------- +Ran 4 tests in 2.003s + +OK +.... +---------------------------------------------------------------------- +Ran 4 tests in 0.504s + +OK +``` diff --git a/tools/concurrencytest/concurrencytest.py b/tools/concurrencytest/concurrencytest.py new file mode 100644 index 0000000000..418d7eed21 --- /dev/null +++ b/tools/concurrencytest/concurrencytest.py @@ -0,0 +1,144 @@ +#!/usr/bin/env python +# SPDX-License-Identifier: GPL-2.0+ +# +# Modified by: Corey Goldberg, 2013 +# +# Original code from: +# Bazaar (bzrlib.tests.__init__.py, v2.6, copied Jun 01 2013) +# Copyright (C) 2005-2011 Canonical Ltd + +"""Python testtools extension for running unittest suites concurrently. + +The `testtools` project provides a ConcurrentTestSuite class, but does +not provide a `make_tests` implementation needed to use it. + +This allows you to parallelize a test run across a configurable number +of worker processes. While this can speed up CPU-bound test runs, it is +mainly useful for IO-bound tests that spend most of their time waiting for +data to arrive from someplace else and can benefit from cocncurrency. + +Unix only. +""" + +import os +import sys +import traceback +import unittest +from itertools import cycle +from multiprocessing import cpu_count + +from subunit import ProtocolTestCase, TestProtocolClient +from subunit.test_results import AutoTimingTestResultDecorator + +from testtools import ConcurrentTestSuite, iterate_tests + + +_all__ = [ + 'ConcurrentTestSuite', + 'fork_for_tests', + 'partition_tests', +] + + +CPU_COUNT = cpu_count() + + +def fork_for_tests(concurrency_num=CPU_COUNT): + """Implementation of `make_tests` used to construct `ConcurrentTestSuite`. + + :param concurrency_num: number of processes to use. + """ + def do_fork(suite): + """Take suite and start up multiple runners by forking (Unix only). + + :param suite: TestSuite object. + + :return: An iterable of TestCase-like objects which can each have + run(result) called on them to feed tests to result. + """ + result = [] + test_blocks = partition_tests(suite, concurrency_num) + # Clear the tests from the original suite so it doesn't keep them alive + suite._tests[:] = [] + for process_tests in test_blocks: + process_suite = unittest.TestSuite(process_tests) + # Also clear each split list so new suite has only reference + process_tests[:] = [] + c2pread, c2pwrite = os.pipe() + pid = os.fork() + if pid == 0: + try: + stream = os.fdopen(c2pwrite, 'wb', 1) + os.close(c2pread) + # Leave stderr and stdout open so we can see test noise + # Close stdin so that the child goes away if it decides to + # read from stdin (otherwise its a roulette to see what + # child actually gets keystrokes for pdb etc). + sys.stdin.close() + subunit_result = AutoTimingTestResultDecorator( + TestProtocolClient(stream) + ) + process_suite.run(subunit_result) + except: + # Try and report traceback on stream, but exit with error + # even if stream couldn't be created or something else + # goes wrong. The traceback is formatted to a string and + # written in one go to avoid interleaving lines from + # multiple failing children. + try: + stream.write(traceback.format_exc()) + finally: + os._exit(1) + os._exit(0) + else: + os.close(c2pwrite) + stream = os.fdopen(c2pread, 'rb', 1) + test = ProtocolTestCase(stream) + result.append(test) + return result + return do_fork + + +def partition_tests(suite, count): + """Partition suite into count lists of tests.""" + # This just assigns tests in a round-robin fashion. On one hand this + # splits up blocks of related tests that might run faster if they shared + # resources, but on the other it avoids assigning blocks of slow tests to + # just one partition. So the slowest partition shouldn't be much slower + # than the fastest. + partitions = [list() for _ in range(count)] + tests = iterate_tests(suite) + for partition, test in zip(cycle(partitions), tests): + partition.append(test) + return partitions + + +if __name__ == '__main__': + import time + + class SampleTestCase(unittest.TestCase): + """Dummy tests that sleep for demo.""" + + def test_me_1(self): + time.sleep(0.5) + + def test_me_2(self): + time.sleep(0.5) + + def test_me_3(self): + time.sleep(0.5) + + def test_me_4(self): + time.sleep(0.5) + + # Load tests from SampleTestCase defined above + suite = unittest.TestLoader().loadTestsFromTestCase(SampleTestCase) + runner = unittest.TextTestRunner() + + # Run tests sequentially + runner.run(suite) + + # Run same tests across 4 processes + suite = unittest.TestLoader().loadTestsFromTestCase(SampleTestCase) + concurrent_suite = ConcurrentTestSuite(suite, fork_for_tests(4)) + runner.run(concurrent_suite) diff --git a/tools/dtoc/dtoc.py b/tools/dtoc/dtoc.py index 827094e72a..2277af9bf7 100755 --- a/tools/dtoc/dtoc.py +++ b/tools/dtoc/dtoc.py @@ -34,6 +34,11 @@ import unittest our_path = os.path.dirname(os.path.realpath(__file__)) sys.path.append(os.path.join(our_path, '../patman')) +# Bring in the libfdt module +sys.path.insert(0, 'scripts/dtc/pylibfdt') +sys.path.insert(0, os.path.join(our_path, + '../../build-sandbox_spl/scripts/dtc/pylibfdt')) + import dtb_platdata import test_util @@ -84,6 +89,8 @@ parser.add_option('--include-disabled', action='store_true', help='Include disabled nodes') parser.add_option('-o', '--output', action='store', default='-', help='Select output filename') +parser.add_option('-P', '--processes', type=int, + help='set number of processes to use for running tests') parser.add_option('-t', '--test', action='store_true', dest='test', default=False, help='run tests') parser.add_option('-T', '--test-coverage', action='store_true', diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py index 2df2d4b0cc..9ad72f89ec 100644 --- a/tools/dtoc/fdt.py +++ b/tools/dtoc/fdt.py @@ -171,7 +171,7 @@ class Prop: val: Integer value (32-bit, single cell) """ self.bytes = struct.pack('>I', val); - self.value = val + self.value = self.bytes self.type = TYPE_INT self.dirty = True diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py index 72bcb37244..11bead1260 100644 --- a/tools/dtoc/test_dtoc.py +++ b/tools/dtoc/test_dtoc.py @@ -385,7 +385,8 @@ U_BOOT_DEVICE(phandle_source2) = { def test_phandle_bad(self): """Test a node containing an invalid phandle fails""" - dtb_file = get_dtb_file('dtoc_test_phandle_bad.dts') + dtb_file = get_dtb_file('dtoc_test_phandle_bad.dts', + capture_stderr=True) output = tools.GetOutputFilename('output') with self.assertRaises(ValueError) as e: dtb_platdata.run_steps(['struct'], dtb_file, False, output) @@ -394,7 +395,8 @@ U_BOOT_DEVICE(phandle_source2) = { def test_phandle_bad2(self): """Test a phandle target missing its #*-cells property""" - dtb_file = get_dtb_file('dtoc_test_phandle_bad2.dts') + dtb_file = get_dtb_file('dtoc_test_phandle_bad2.dts', + capture_stderr=True) output = tools.GetOutputFilename('output') with self.assertRaises(ValueError) as e: dtb_platdata.run_steps(['struct'], dtb_file, False, output) diff --git a/tools/dtoc/test_fdt.py b/tools/dtoc/test_fdt.py index d259702050..8d70dd2a29 100755 --- a/tools/dtoc/test_fdt.py +++ b/tools/dtoc/test_fdt.py @@ -60,7 +60,7 @@ class TestFdt(unittest.TestCase): @classmethod def tearDownClass(cls): - tools._FinaliseForTest() + tools.FinaliseOutputDir() def setUp(self): self.dtb = fdt.FdtScan('tools/dtoc/dtoc_test_simple.dts') @@ -128,7 +128,7 @@ class TestNode(unittest.TestCase): @classmethod def tearDownClass(cls): - tools._FinaliseForTest() + tools.FinaliseOutputDir() def setUp(self): self.dtb = fdt.FdtScan('tools/dtoc/dtoc_test_simple.dts') @@ -209,7 +209,7 @@ class TestProp(unittest.TestCase): @classmethod def tearDownClass(cls): - tools._FinaliseForTest() + tools.FinaliseOutputDir() def setUp(self): self.dtb = fdt.FdtScan('tools/dtoc/dtoc_test_simple.dts') @@ -427,6 +427,10 @@ class TestFdtUtil(unittest.TestCase): def setUpClass(cls): tools.PrepareOutputDir(None) + @classmethod + def tearDownClass(cls): + tools.FinaliseOutputDir() + def setUp(self): self.dtb = fdt.FdtScan('tools/dtoc/dtoc_test_simple.dts') self.node = self.dtb.GetNode('/spl-test') @@ -543,6 +547,8 @@ if __name__ != '__main__': parser = OptionParser() parser.add_option('-B', '--build-dir', type='string', default='b', help='Directory containing the build output') +parser.add_option('-P', '--processes', type=int, + help='set number of processes to use for running tests') parser.add_option('-t', '--test', action='store_true', dest='test', default=False, help='run tests') parser.add_option('-T', '--test-coverage', action='store_true', diff --git a/tools/patman/settings.py b/tools/patman/settings.py index ca4334426b..ea2bc74f75 100644 --- a/tools/patman/settings.py +++ b/tools/patman/settings.py @@ -58,25 +58,25 @@ class _ProjectConfigParser(ConfigParser.SafeConfigParser): >>> config = _ProjectConfigParser("zzz") >>> config.readfp(StringIO(sample_config)) >>> config.get("alias", "enemies") - 'Evil <evil@example.com>' + u'Evil <evil@example.com>' # Check to make sure that alias gets overridden by project. >>> config = _ProjectConfigParser("sm") >>> config.readfp(StringIO(sample_config)) >>> config.get("alias", "enemies") - 'Green G. <ugly@example.com>' + u'Green G. <ugly@example.com>' # Check to make sure that settings get merged with project. >>> config = _ProjectConfigParser("linux") >>> config.readfp(StringIO(sample_config)) >>> sorted(config.items("settings")) - [('am_hero', 'True'), ('process_tags', 'False')] + [(u'am_hero', u'True'), (u'process_tags', u'False')] # Check to make sure that settings works with unknown project. >>> config = _ProjectConfigParser("unknown") >>> config.readfp(StringIO(sample_config)) >>> sorted(config.items("settings")) - [('am_hero', 'True')] + [(u'am_hero', u'True')] """ def __init__(self, project_name): """Construct _ProjectConfigParser. @@ -99,6 +99,17 @@ class _ProjectConfigParser(ConfigParser.SafeConfigParser): for setting_name, setting_value in project_defaults.items(): self.set(project_settings, setting_name, setting_value) + def _to_unicode(self, val): + """Make sure a value is of type 'unicode' + + Args: + val: string or unicode object + + Returns: + unicode version of val + """ + return val if isinstance(val, unicode) else val.decode('utf-8') + def get(self, section, option, *args, **kwargs): """Extend SafeConfigParser to try project_section before section. @@ -108,14 +119,15 @@ class _ProjectConfigParser(ConfigParser.SafeConfigParser): See SafeConfigParser. """ try: - return ConfigParser.SafeConfigParser.get( + val = ConfigParser.SafeConfigParser.get( self, "%s_%s" % (self._project_name, section), option, *args, **kwargs ) except (ConfigParser.NoSectionError, ConfigParser.NoOptionError): - return ConfigParser.SafeConfigParser.get( + val = ConfigParser.SafeConfigParser.get( self, section, option, *args, **kwargs ) + return self._to_unicode(val) def items(self, section, *args, **kwargs): """Extend SafeConfigParser to add project_section to section. @@ -150,7 +162,8 @@ class _ProjectConfigParser(ConfigParser.SafeConfigParser): item_dict = dict(top_items) item_dict.update(project_items) - return item_dict.items() + return {(self._to_unicode(item), self._to_unicode(val)) + for item, val in item_dict.iteritems()} def ReadGitAliases(fname): """Read a git alias file. This is in the form used by git: diff --git a/tools/patman/test_util.py b/tools/patman/test_util.py index 0e79af871a..687d40704a 100644 --- a/tools/patman/test_util.py +++ b/tools/patman/test_util.py @@ -43,7 +43,7 @@ def RunTestCoverage(prog, filter_fname, exclude_list, build_dir, required=None): glob_list += exclude_list glob_list += ['*libfdt.py', '*site-packages*'] cmd = ('PYTHONPATH=$PYTHONPATH:%s/sandbox_spl/tools python-coverage run ' - '--omit "%s" %s -t' % (build_dir, ','.join(glob_list), prog)) + '--omit "%s" %s -P1 -t' % (build_dir, ','.join(glob_list), prog)) os.system(cmd) stdout = command.Output('python-coverage', 'report') lines = stdout.splitlines() diff --git a/tools/patman/tools.py b/tools/patman/tools.py index 1c9bf4e810..bf099798e6 100644 --- a/tools/patman/tools.py +++ b/tools/patman/tools.py @@ -28,6 +28,9 @@ packages = { 'lz4': 'liblz4-tool', } +# List of paths to use when looking for an input file +indir = [] + def PrepareOutputDir(dirname, preserve=False): """Select an output directory, ensuring it exists. diff --git a/tools/patman/tout.py b/tools/patman/tout.py index 4cd49e1c68..4957c7ae1d 100644 --- a/tools/patman/tout.py +++ b/tools/patman/tout.py @@ -15,6 +15,8 @@ NOTICE = 2 INFO = 3 DEBUG = 4 +in_progress = False + """ This class handles output of progress and other useful information to the user. It provides for simple verbosity level control and can @@ -48,9 +50,11 @@ def UserIsPresent(): def ClearProgress(): """Clear any active progress message on the terminal.""" - if verbose > 0 and stdout_is_tty: + global in_progress + if verbose > 0 and stdout_is_tty and in_progress: _stdout.write('\r%s\r' % (" " * len (_progress))) _stdout.flush() + in_progress = False def Progress(msg, warning=False, trailer='...'): """Display progress information. @@ -58,6 +62,7 @@ def Progress(msg, warning=False, trailer='...'): Args: msg: Message to display. warning: True if this is a warning.""" + global in_progress ClearProgress() if verbose > 0: _progress = msg + trailer @@ -65,6 +70,7 @@ def Progress(msg, warning=False, trailer='...'): col = _color.YELLOW if warning else _color.GREEN _stdout.write('\r' + _color.Color(col, _progress)) _stdout.flush() + in_progress = True else: _stdout.write(_progress + '\n') |