diff options
| -rw-r--r-- | arch/arm/mach-tegra/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/reset/Kconfig | 7 | ||||
| -rw-r--r-- | drivers/reset/Makefile | 1 | ||||
| -rw-r--r-- | drivers/reset/tegra186-reset.c | 81 |
4 files changed, 91 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index e8186d5158..1eaf406272 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -66,10 +66,12 @@ config TEGRA186 bool "Tegra186 family" select CLK select DM_MAILBOX + select DM_RESET select MISC select TEGRA186_BPMP select TEGRA186_CLOCK select TEGRA186_GPIO + select TEGRA186_RESET select TEGRA_ARMV8_COMMON select TEGRA_HSP select TEGRA_IVC diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 0fe8cc3827..5b84f2178b 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -20,4 +20,11 @@ config SANDBOX_RESET simply accepts requests to reset various HW modules without actually doing anything beyond a little error checking. +config TEGRA186_RESET + bool "Enable Tegra186 BPMP-based reset driver" + depends on TEGRA186_BPMP + help + Enable support for manipulating Tegra's on-SoC reset signals via IPC + requests to the BPMP (Boot and Power Management Processor). + endmenu diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 71f3b21961..ff0e090775 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_DM_RESET) += reset-uclass.o obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset.o obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset-test.o +obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o diff --git a/drivers/reset/tegra186-reset.c b/drivers/reset/tegra186-reset.c new file mode 100644 index 0000000000..228adda0aa --- /dev/null +++ b/drivers/reset/tegra186-reset.c @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2016, NVIDIA CORPORATION. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <dm.h> +#include <misc.h> +#include <reset-uclass.h> +#include <asm/arch-tegra/bpmp_abi.h> + +static int tegra186_reset_request(struct reset_ctl *reset_ctl) +{ + debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return 0; +} + +static int tegra186_reset_free(struct reset_ctl *reset_ctl) +{ + debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return 0; +} + +static int tegra186_reset_common(struct reset_ctl *reset_ctl, + enum mrq_reset_commands cmd) +{ + struct mrq_reset_request req; + int ret; + + req.cmd = cmd; + req.reset_id = reset_ctl->id; + + ret = misc_call(reset_ctl->dev->parent, MRQ_RESET, &req, sizeof(req), + NULL, 0); + if (ret < 0) + return ret; + + return 0; +} + +static int tegra186_reset_assert(struct reset_ctl *reset_ctl) +{ + debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return tegra186_reset_common(reset_ctl, CMD_RESET_ASSERT); +} + +static int tegra186_reset_deassert(struct reset_ctl *reset_ctl) +{ + debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return tegra186_reset_common(reset_ctl, CMD_RESET_DEASSERT); +} + +struct reset_ops tegra186_reset_ops = { + .request = tegra186_reset_request, + .free = tegra186_reset_free, + .rst_assert = tegra186_reset_assert, + .rst_deassert = tegra186_reset_deassert, +}; + +static int tegra186_reset_probe(struct udevice *dev) +{ + debug("%s(dev=%p)\n", __func__, dev); + + return 0; +} + +U_BOOT_DRIVER(tegra186_reset) = { + .name = "tegra186_reset", + .id = UCLASS_RESET, + .probe = tegra186_reset_probe, + .ops = &tegra186_reset_ops, +}; |