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-rw-r--r--arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi2
-rw-r--r--arch/arm/dts/stm32mp157a-avenger96.dts25
2 files changed, 22 insertions, 5 deletions
diff --git a/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
index 8dcd8866e8..47bfbb8d77 100644
--- a/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
@@ -150,7 +150,7 @@
};
};
-&sdmmc1_dir_pins_a {
+&sdmmc1_dir_pins_b {
u-boot,dm-spl;
pins1 {
u-boot,dm-spl;
diff --git a/arch/arm/dts/stm32mp157a-avenger96.dts b/arch/arm/dts/stm32mp157a-avenger96.dts
index 3065593bf2..1e9b45b69d 100644
--- a/arch/arm/dts/stm32mp157a-avenger96.dts
+++ b/arch/arm/dts/stm32mp157a-avenger96.dts
@@ -76,6 +76,20 @@
default-state = "off";
};
};
+
+ sd_switch: regulator-sd_switch {
+ compatible = "regulator-gpio";
+ regulator-name = "sd_switch";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2900000>;
+ regulator-type = "voltage";
+ regulator-always-on;
+
+ gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0>;
+ states = <1800000 0x1>,
+ <2900000 0x0>;
+ };
};
&ethernet0 {
@@ -296,15 +310,18 @@
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
- pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
- pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
- pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
- broken-cd;
+ pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_b>;
+ pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_b>;
+ pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_b>;
+ cd-gpios = <&gpioi 8 GPIO_ACTIVE_LOW>;
+ disable-wp;
st,sig-dir;
st,neg-edge;
st,use-ckin;
+ sd-uhs-sdr104;
bus-width = <4>;
vmmc-supply = <&vdd_sd>;
+ vqmmc-supply = <&sd_switch>;
status = "okay";
};