diff options
118 files changed, 1019 insertions, 598 deletions
@@ -4512,11 +4512,6 @@ Low Level (hardware related) configuration options: If defined, the x86 reset vector code is included. This is not needed when U-Boot is running from Coreboot. -- CONFIG_SYS_MPUCLK - Defines the MPU clock speed (in MHz). - - NOTE : currently only supported on AM335x platforms. - - CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC: Enables the RTC32K OSC on AM33xx based plattforms diff --git a/arch/arm/cpu/armv7m/Makefile b/arch/arm/cpu/armv7m/Makefile index 93c9085219..257fc7faf3 100644 --- a/arch/arm/cpu/armv7m/Makefile +++ b/arch/arm/cpu/armv7m/Makefile @@ -6,5 +6,5 @@ # extra-y := start.o -obj-y += cpu.o cache.o +obj-y += cpu.o cache.o mpu.o obj-$(CONFIG_SYS_ARCH_TIMER) += systick-timer.o diff --git a/arch/arm/cpu/armv7m/cache.c b/arch/arm/cpu/armv7m/cache.c index 162cfe3928..e8f86420cf 100644 --- a/arch/arm/cpu/armv7m/cache.c +++ b/arch/arm/cpu/armv7m/cache.c @@ -253,6 +253,21 @@ void flush_dcache_range(unsigned long start, unsigned long stop) return; } } +void flush_dcache_all(void) +{ + if (action_dcache_all(FLUSH_SET_WAY)) { + printf("ERR: D-cache not flushed\n"); + return; + } +} + +void invalidate_dcache_all(void) +{ + if (action_dcache_all(INVALIDATE_SET_WAY)) { + printf("ERR: D-cache not invalidated\n"); + return; + } +} #else void dcache_enable(void) { @@ -268,6 +283,14 @@ int dcache_status(void) { return 0; } + +void flush_dcache_all(void) +{ +} + +void invalidate_dcache_all(void) +{ +} #endif #ifndef CONFIG_SYS_ICACHE_OFF diff --git a/arch/arm/cpu/armv7m/cpu.c b/arch/arm/cpu/armv7m/cpu.c index 58cde9391f..a424babde5 100644 --- a/arch/arm/cpu/armv7m/cpu.c +++ b/arch/arm/cpu/armv7m/cpu.c @@ -18,6 +18,25 @@ */ int cleanup_before_linux(void) { + /* + * this function is called just before we call linux + * it prepares the processor for linux + * + * disable interrupt and turn off caches etc ... + */ + disable_interrupts(); + /* + * turn off D-cache + * dcache_disable() in turn flushes the d-cache + * MPU is still enabled & can't be disabled as the u-boot + * code might be running in sdram which by default is not + * executable area. + */ + dcache_disable(); + /* invalidate to make sure no cache line gets dirty between + * dcache flushing and disabling dcache */ + invalidate_dcache_all(); + return 0; } diff --git a/arch/arm/cpu/armv7m/mpu.c b/arch/arm/cpu/armv7m/mpu.c new file mode 100644 index 0000000000..31a243b49a --- /dev/null +++ b/arch/arm/cpu/armv7m/mpu.c @@ -0,0 +1,82 @@ +/* + * (C) Copyright 2017 + * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/bitops.h> +#include <asm/armv7m.h> +#include <asm/armv7m_mpu.h> +#include <asm/io.h> + +#define V7M_MPU_CTRL_ENABLE (1 << 0) +#define V7M_MPU_CTRL_DISABLE (0 << 0) +#define V7M_MPU_CTRL_HFNMIENA (1 << 1) +#define VALID_REGION (1 << 4) + +#define ENABLE_REGION (1 << 0) + +#define AP_SHIFT 24 +#define XN_SHIFT 28 +#define TEX_SHIFT 19 +#define S_SHIFT 18 +#define C_SHIFT 17 +#define B_SHIFT 16 +#define REGION_SIZE_SHIFT 1 + +#define CACHEABLE (1 << C_SHIFT) +#define BUFFERABLE (1 << B_SHIFT) +#define SHAREABLE (1 << S_SHIFT) + +void disable_mpu(void) +{ + writel(0, &V7M_MPU->ctrl); +} + +void enable_mpu(void) +{ + writel(V7M_MPU_CTRL_ENABLE | V7M_MPU_CTRL_HFNMIENA, &V7M_MPU->ctrl); + + /* Make sure new mpu config is effective for next memory access */ + dsb(); + isb(); /* Make sure instruction stream sees it */ +} + +void mpu_config(struct mpu_region_config *reg_config) +{ + uint32_t attr; + + switch (reg_config->mr_attr) { + case STRONG_ORDER: + attr = SHAREABLE; + break; + case SHARED_WRITE_BUFFERED: + attr = BUFFERABLE; + break; + case O_I_WT_NO_WR_ALLOC: + attr = CACHEABLE; + break; + case O_I_WB_NO_WR_ALLOC: + attr = CACHEABLE | BUFFERABLE; + break; + case O_I_NON_CACHEABLE: + attr = 1 << TEX_SHIFT; + break; + case O_I_WB_RD_WR_ALLOC: + attr = (1 << TEX_SHIFT) | CACHEABLE | BUFFERABLE; + break; + case DEVICE_NON_SHARED: + attr = (2 << TEX_SHIFT) | BUFFERABLE; + default: + attr = 0; /* strongly ordered */ + break; + }; + + writel(reg_config->start_addr | VALID_REGION | reg_config->region_no, + &V7M_MPU->rbar); + + writel(reg_config->xn << XN_SHIFT | reg_config->ap << AP_SHIFT | attr + | reg_config->reg_size << REGION_SIZE_SHIFT | ENABLE_REGION + , &V7M_MPU->rasr); +} diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S index f1deaa7230..7cba308ee7 100644 --- a/arch/arm/cpu/armv8/cache.S +++ b/arch/arm/cpu/armv8/cache.S @@ -138,6 +138,30 @@ ENTRY(__asm_flush_dcache_range) dsb sy ret ENDPROC(__asm_flush_dcache_range) +/* + * void __asm_invalidate_dcache_range(start, end) + * + * invalidate data cache in the range + * + * x0: start address + * x1: end address + */ +ENTRY(__asm_invalidate_dcache_range) + mrs x3, ctr_el0 + ubfm x3, x3, #16, #19 + mov x2, #4 + lsl x2, x2, x3 /* cache line size */ + + /* x2 <- minimal cache line size in cache system */ + sub x3, x2, #1 + bic x0, x0, x3 +1: dc ivac, x0 /* invalidate data or unified cache */ + add x0, x0, x2 + cmp x0, x1 + b.lo 1b + dsb sy + ret +ENDPROC(__asm_invalidate_dcache_range) /* * void __asm_invalidate_icache_all(void) diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index bd1c3e0335..adc7e1746f 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -446,7 +446,7 @@ inline void flush_dcache_all(void) */ void invalidate_dcache_range(unsigned long start, unsigned long stop) { - __asm_flush_dcache_range(start, stop); + __asm_invalidate_dcache_range(start, stop); } /* diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c index cd92b2c761..a2dda333fe 100644 --- a/arch/arm/cpu/armv8/generic_timer.c +++ b/arch/arm/cpu/armv8/generic_timer.c @@ -43,7 +43,7 @@ unsigned long timer_read_counter(void) return cntpct; } -unsigned long long get_ticks(void) +uint64_t get_ticks(void) { unsigned long ticks = timer_read_counter(); diff --git a/arch/arm/include/asm/arch-am33xx/clock.h b/arch/arm/include/asm/arch-am33xx/clock.h index acf3fd55a8..19ccf5c8db 100644 --- a/arch/arm/include/asm/arch-am33xx/clock.h +++ b/arch/arm/include/asm/arch-am33xx/clock.h @@ -12,6 +12,7 @@ #define _CLOCKS_H_ #include <asm/arch/clocks_am33xx.h> +#include <asm/arch/hardware.h> #ifdef CONFIG_TI81XX #include <asm/arch/clock_ti81xx.h> @@ -103,6 +104,12 @@ extern const struct dpll_regs dpll_mpu_regs; extern const struct dpll_regs dpll_core_regs; extern const struct dpll_regs dpll_per_regs; extern const struct dpll_regs dpll_ddr_regs; +extern const struct dpll_params dpll_mpu_opp[NUM_CRYSTAL_FREQ][NUM_OPPS]; +extern const struct dpll_params dpll_core_1000MHz[NUM_CRYSTAL_FREQ]; +extern const struct dpll_params dpll_per_192MHz[NUM_CRYSTAL_FREQ]; +extern const struct dpll_params dpll_ddr2_266MHz[NUM_CRYSTAL_FREQ]; +extern const struct dpll_params dpll_ddr3_303MHz[NUM_CRYSTAL_FREQ]; +extern const struct dpll_params dpll_ddr3_400MHz[NUM_CRYSTAL_FREQ]; extern struct cm_wkuppll *const cmwkup; diff --git a/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h b/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h index 4c9352a2ed..653ec1b239 100644 --- a/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h +++ b/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h @@ -16,14 +16,9 @@ #define MPUPLL_M_800 800 #define MPUPLL_M_720 720 #define MPUPLL_M_600 600 -#define MPUPLL_M_550 550 +#define MPUPLL_M_500 500 #define MPUPLL_M_300 300 -/* MAIN PLL Fdll = 550 MHz, by default */ -#ifndef CONFIG_SYS_MPUCLK -#define CONFIG_SYS_MPUCLK MPUPLL_M_550 -#endif - #define UART_RESET (0x1 << 1) #define UART_CLK_RUNNING_MASK 0x1 #define UART_SMART_IDLE_EN (0x1 << 0x3) @@ -31,6 +26,8 @@ #define CM_DLL_CTRL_NO_OVERRIDE 0x0 #define CM_DLL_READYST 0x4 +#define NUM_OPPS 6 + extern void enable_dmm_clocks(void); extern const struct dpll_params dpll_core_opp100; extern struct dpll_params dpll_mpu_opp100; diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index 54f449f6e6..8cae291ea0 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -49,6 +49,14 @@ #define TI81XX 0xB81E #define DEVICE_ID (CTRL_BASE + 0x0600) #define DEVICE_ID_MASK 0x1FFF +#define PACKAGE_TYPE_SHIFT 16 +#define PACKAGE_TYPE_MASK (3 << 16) + +/* Package Type */ +#define PACKAGE_TYPE_UNDEFINED 0x0 +#define PACKAGE_TYPE_ZCZ 0x1 +#define PACKAGE_TYPE_ZCE 0x2 +#define PACKAGE_TYPE_RESERVED 0x3 /* MPU max frequencies */ #define AM335X_ZCZ_300 0x1FEF diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h b/arch/arm/include/asm/arch-am33xx/hardware.h index dd950e5ac4..3437e6116d 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware.h +++ b/arch/arm/include/asm/arch-am33xx/hardware.h @@ -61,5 +61,18 @@ /* CPSW Config space */ #define CPSW_BASE 0x4A100000 +/* Control status register */ +#define CTRL_CRYSTAL_FREQ_SRC_MASK (1 << 31) +#define CTRL_CRYSTAL_FREQ_SRC_SHIFT 31 +#define CTRL_CRYSTAL_FREQ_SELECTION_MASK (0x3 << 29) +#define CTRL_CRYSTAL_FREQ_SELECTION_SHIFT 29 +#define CTRL_SYSBOOT_15_14_MASK (0x3 << 22) +#define CTRL_SYSBOOT_15_14_SHIFT 22 + +#define CTRL_CRYSTAL_FREQ_SRC_SYSBOOT 0x0 +#define CTRL_CRYSTAL_FREQ_SRC_EFUSE 0x1 + +#define NUM_CRYSTAL_FREQ 0x4 + int clk_get(int clk); #endif /* __AM33XX_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h index a7da6b5cfd..af69ac6f2c 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h +++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h @@ -85,19 +85,6 @@ #define USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960 (1 << 8) #define USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K (1 << 8) -/* Control status register */ -#define CTRL_CRYSTAL_FREQ_SRC_MASK (1 << 31) -#define CTRL_CRYSTAL_FREQ_SRC_SHIFT 31 -#define CTRL_CRYSTAL_FREQ_SELECTION_MASK (0x3 << 29) -#define CTRL_CRYSTAL_FREQ_SELECTION_SHIFT 29 -#define CTRL_SYSBOOT_15_14_MASK (0x3 << 22) -#define CTRL_SYSBOOT_15_14_SHIFT 22 - -#define CTRL_CRYSTAL_FREQ_SRC_SYSBOOT 0x0 -#define CTRL_CRYSTAL_FREQ_SRC_EFUSE 0x1 - -#define NUM_CRYSTAL_FREQ 0x4 - /* EDMA3 Base Address */ #define EDMA3_BASE 0x49000000 diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 903398fe8f..4e78aafb0b 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -46,3 +46,4 @@ int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency); void enable_usb_clocks(int index); void disable_usb_clocks(int index); void do_board_detect(void); +u32 get_sys_clk_index(void); diff --git a/arch/arm/include/asm/armv7m.h b/arch/arm/include/asm/armv7m.h index ebf0f17042..af8a97e988 100644 --- a/arch/arm/include/asm/armv7m.h +++ b/arch/arm/include/asm/armv7m.h @@ -70,24 +70,5 @@ struct v7m_mpu { }; #define V7M_MPU ((struct v7m_mpu *)V7M_MPU_BASE) -#define V7M_MPU_CTRL_ENABLE (1 << 0) -#define V7M_MPU_CTRL_HFNMIENA (1 << 1) - -#define V7M_MPU_CTRL_ENABLE (1 << 0) -#define V7M_MPU_CTRL_DISABLE (0 << 0) -#define V7M_MPU_CTRL_HFNMIENA (1 << 1) - -#define V7M_MPU_RASR_EN (1 << 0) -#define V7M_MPU_RASR_SIZE_BITS 1 -#define V7M_MPU_RASR_SIZE_4GB (31 << V7M_MPU_RASR_SIZE_BITS) -#define V7M_MPU_RASR_SIZE_8MB (24 << V7M_MPU_RASR_SIZE_BITS) -#define V7M_MPU_RASR_TEX_SHIFT 19 -#define V7M_MPU_RASR_S_SHIFT 18 -#define V7M_MPU_RASR_C_SHIFT 17 -#define V7M_MPU_RASR_B_SHIFT 16 -#define V7M_MPU_RASR_AP_RW_RW (3 << 24) -#define V7M_MPU_RASR_XN_ENABLE (0 << 28) -#define V7M_MPU_RASR_XN_DISABLE (1 << 28) - #endif /* !defined(__ASSEMBLY__) */ #endif /* ARMV7M_H */ diff --git a/arch/arm/include/asm/armv7m_mpu.h b/arch/arm/include/asm/armv7m_mpu.h new file mode 100644 index 0000000000..d7e99b4d8d --- /dev/null +++ b/arch/arm/include/asm/armv7m_mpu.h @@ -0,0 +1,67 @@ +/* + * (C) Copyright 2017 + * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +enum region_number { + REGION_0 = 0, + REGION_1, + REGION_2, + REGION_3, + REGION_4, + REGION_5, + REGION_6, + REGION_7, +}; + +enum ap { + NO_ACCESS = 0, + PRIV_RW_USR_NO, + PRIV_RW_USR_RO, + PRIV_RW_USR_RW, + UNPREDICTABLE, + PRIV_RO_USR_NO, + PRIV_RO_USR_RO, +}; + +enum mr_attr { + STRONG_ORDER = 0, + SHARED_WRITE_BUFFERED, + O_I_WT_NO_WR_ALLOC, + O_I_WB_NO_WR_ALLOC, + O_I_NON_CACHEABLE, + O_I_WB_RD_WR_ALLOC, + DEVICE_NON_SHARED, +}; +enum size { + REGION_8MB = 22, + REGION_16MB, + REGION_32MB, + REGION_64MB, + REGION_128MB, + REGION_256MB, + REGION_512MB, + REGION_1GB, + REGION_2GB, + REGION_4GB, +}; + +enum xn { + XN_DIS = 0, + XN_EN, +}; + +struct mpu_region_config { + uint32_t start_addr; + enum region_number region_no; + enum xn xn; + enum ap ap; + enum mr_attr mr_attr; + enum size reg_size; +}; + +void disable_mpu(void); +void enable_mpu(void); +void mpu_config(struct mpu_region_config *reg_config); diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 1aab6295d6..3cc0e5fa34 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -32,8 +32,8 @@ struct arch_global_data { #endif /* "static data" needed by most of timer.c on ARM platforms */ unsigned long timer_rate_hz; - unsigned long tbu; - unsigned long tbl; + unsigned int tbu; + unsigned int tbl; unsigned long lastinc; unsigned long long timer_reset_value; #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) diff --git a/arch/arm/include/asm/omap_mmc.h b/arch/arm/include/asm/omap_mmc.h index 93e003a368..f6eb51ee3c 100644 --- a/arch/arm/include/asm/omap_mmc.h +++ b/arch/arm/include/asm/omap_mmc.h @@ -25,6 +25,8 @@ #ifndef OMAP_MMC_H_ #define OMAP_MMC_H_ +#include <mmc.h> + struct hsmmc { unsigned char res1[0x10]; unsigned int sysconfig; /* 0x10 */ @@ -49,6 +51,13 @@ struct hsmmc { unsigned int capa; /* 0x140 */ }; +struct omap_hsmmc_plat { + struct mmc_config cfg; + struct hsmmc *base_addr; + struct mmc mmc; + bool cd_inverted; +}; + /* * OMAP HS MMC Bit definitions */ diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 9c3261c884..79bd19af7d 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -180,6 +180,21 @@ static inline unsigned long read_mpidr(void) void __asm_flush_dcache_all(void); void __asm_invalidate_dcache_all(void); void __asm_flush_dcache_range(u64 start, u64 end); + +/** + * __asm_invalidate_dcache_range() - Invalidate a range of virtual addresses + * + * This performance an invalidate from @start to @end - 1. Both addresses + * should be cache-aligned, otherwise this function will align the start + * address and may continue past the end address. + * + * Data in the address range is evicted from the cache and is not written back + * to memory. + * + * @start: Start address to invalidate + * @end: End address to invalidate up to (exclusive) + */ +void __asm_invalidate_dcache_range(u64 start, u64 end); void __asm_invalidate_tlb_all(void); void __asm_invalidate_icache_all(void); int __asm_invalidate_l3_dcache(void); diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 6e96cfb0c5..53d4ed2bc6 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_SYS_L2_PL310) += cache-pl310.o else obj-$(CONFIG_SPL_FRAMEWORK) += spl.o obj-$(CONFIG_SPL_FRAMEWORK) += zimage.o +obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o endif obj-$(CONFIG_$(SPL_)USE_ARCH_MEMSET) += memset.o obj-$(CONFIG_$(SPL_)USE_ARCH_MEMCPY) += memcpy.o diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c index d84789c7a8..eaa817b9ac 100644 --- a/arch/arm/lib/bootm-fdt.c +++ b/arch/arm/lib/bootm-fdt.c @@ -27,8 +27,10 @@ DECLARE_GLOBAL_DATA_PTR; int arch_fixup_fdt(void *blob) { + int ret = 0; +#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_OF_LIBFDT) bd_t *bd = gd->bd; - int bank, ret; + int bank; u64 start[CONFIG_NR_DRAM_BANKS]; u64 size[CONFIG_NR_DRAM_BANKS]; @@ -42,9 +44,11 @@ int arch_fixup_fdt(void *blob) #endif } +#ifdef CONFIG_OF_LIBFDT ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS); if (ret) return ret; +#endif #ifdef CONFIG_ARMV8_SPIN_TABLE ret = spin_table_update_dt(blob); @@ -58,6 +62,7 @@ int arch_fixup_fdt(void *blob) if (ret) return ret; #endif +#endif return 0; } diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 6d8c3e4298..408b62c663 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -135,6 +135,7 @@ config AM43XX config AM33XX bool "AM33XX SoC" imply SYS_THUMB_BUILD + imply USE_TINY_PRINTF help Support for AM335x SOC from Texas Instruments. The AM335x high performance SOC features a Cortex-A8 @@ -147,6 +148,11 @@ config TARGET_CM_T43 endchoice +config SYS_MPUCLK + int "MPU CLK speed" + default 500 + help + Defines the MPU clock speed (in MHz). config TI_SECURE_DEVICE bool "HS Device Type Support" diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig index db3c70fe21..5c4168fefc 100644 --- a/arch/arm/mach-omap2/am33xx/Kconfig +++ b/arch/arm/mach-omap2/am33xx/Kconfig @@ -29,6 +29,11 @@ config TARGET_AM335X_EVM imply SPL_SERIAL_SUPPORT imply SPL_WATCHDOG_SUPPORT imply SPL_YMODEM_SUPPORT + imply SPL_SYS_MALLOC_SIMPLE + imply SPL_SEPARATE_BSS + imply SPL_DM + imply SPL_DM_SEQ_ALIAS + imply SPL_OF_LIBFDT help This option specifies support for the AM335x GP and HS EVM development platforms. The AM335x diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index 2bfc8649d5..a8b5d13238 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -10,6 +10,7 @@ #include <common.h> #include <dm.h> +#include <debug_uart.h> #include <errno.h> #include <ns16550.h> #include <spl.h> @@ -242,8 +243,6 @@ int board_early_init_f(void) */ __weak void am33xx_spl_board_init(void) { - do_setup_dpll(&dpll_core_regs, &dpll_core_opp100); - do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100); } #if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC) @@ -312,6 +311,9 @@ void early_system_init(void) set_uart_mux_conf(); setup_early_clocks(); uart_soft_reset(); +#ifdef CONFIG_DEBUG_UART_OMAP + debug_uart_init(); +#endif #ifdef CONFIG_TI_I2C_BOARD_DETECT do_board_detect(); #endif @@ -327,6 +329,10 @@ void board_init_f(ulong dummy) early_system_init(); board_early_init_f(); sdram_init(); + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size( + (void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_MAX_RAM_BANK_SIZE); } #endif diff --git a/arch/arm/mach-omap2/am33xx/clock_am33xx.c b/arch/arm/mach-omap2/am33xx/clock_am33xx.c index 7b841b2d55..1780bbdb6f 100644 --- a/arch/arm/mach-omap2/am33xx/clock_am33xx.c +++ b/arch/arm/mach-omap2/am33xx/clock_am33xx.c @@ -10,6 +10,7 @@ #include <common.h> #include <asm/arch/cpu.h> +#include <asm/arch/sys_proto.h> #include <asm/arch/clock.h> #include <asm/arch/hardware.h> #include <asm/io.h> @@ -55,26 +56,94 @@ struct dpll_params dpll_mpu_opp100 = { CONFIG_SYS_MPUCLK, OSC-1, 1, -1, -1, -1, -1}; const struct dpll_params dpll_core_opp100 = { 1000, OSC-1, -1, -1, 10, 8, 4}; -const struct dpll_params dpll_mpu = { - MPUPLL_M_300, OSC-1, 1, -1, -1, -1, -1}; -const struct dpll_params dpll_core = { - 50, OSC-1, -1, -1, 1, 1, 1}; -const struct dpll_params dpll_per = { - 960, OSC-1, 5, -1, -1, -1, -1}; - -const struct dpll_params *get_dpll_mpu_params(void) + +const struct dpll_params dpll_mpu_opp[NUM_CRYSTAL_FREQ][NUM_OPPS] = { + { /* 19.2 MHz */ + {125, 3, 2, -1, -1, -1, -1}, /* OPP 50 */ + {-1, -1, -1, -1, -1, -1, -1}, /* OPP RESERVED */ + {125, 3, 1, -1, -1, -1, -1}, /* OPP 100 */ + {150, 3, 1, -1, -1, -1, -1}, /* OPP 120 */ + {125, 2, 1, -1, -1, -1, -1}, /* OPP TB */ + {625, 11, 1, -1, -1, -1, -1} /* OPP NT */ + }, + { /* 24 MHz */ + {25, 0, 2, -1, -1, -1, -1}, /* OPP 50 */ + {-1, -1, -1, -1, -1, -1, -1}, /* OPP RESERVED */ + {25, 0, 1, -1, -1, -1, -1}, /* OPP 100 */ + {30, 0, 1, -1, -1, -1, -1}, /* OPP 120 */ + {100, 3, 1, -1, -1, -1, -1}, /* OPP TB */ + {125, 2, 1, -1, -1, -1, -1} /* OPP NT */ + }, + { /* 25 MHz */ + {24, 0, 2, -1, -1, -1, -1}, /* OPP 50 */ + {-1, -1, -1, -1, -1, -1, -1}, /* OPP RESERVED */ + {24, 0, 1, -1, -1, -1, -1}, /* OPP 100 */ + {144, 4, 1, -1, -1, -1, -1}, /* OPP 120 */ + {32, 0, 1, -1, -1, -1, -1}, /* OPP TB */ + {40, 0, 1, -1, -1, -1, -1} /* OPP NT */ + }, + { /* 26 MHz */ + {300, 12, 2, -1, -1, -1, -1}, /* OPP 50 */ + {-1, -1, -1, -1, -1, -1, -1}, /* OPP RESERVED */ + {300, 12, 1, -1, -1, -1, -1}, /* OPP 100 */ + {360, 12, 1, -1, -1, -1, -1}, /* OPP 120 */ + {400, 12, 1, -1, -1, -1, -1}, /* OPP TB */ + {500, 12, 1, -1, -1, -1, -1} /* OPP NT */ + }, +}; + +const struct dpll_params dpll_core_1000MHz[NUM_CRYSTAL_FREQ] = { + {625, 11, -1, -1, 10, 8, 4}, /* 19.2 MHz */ + {125, 2, -1, -1, 10, 8, 4}, /* 24 MHz */ + {40, 0, -1, -1, 10, 8, 4}, /* 25 MHz */ + {500, 12, -1, -1, 10, 8, 4} /* 26 MHz */ +}; + +const struct dpll_params dpll_per_192MHz[NUM_CRYSTAL_FREQ] = { + {400, 7, 5, -1, -1, -1, -1}, /* 19.2 MHz */ + {400, 9, 5, -1, -1, -1, -1}, /* 24 MHz */ + {384, 9, 5, -1, -1, -1, -1}, /* 25 MHz */ + {480, 12, 5, -1, -1, -1, -1} /* 26 MHz */ +}; + +const struct dpll_params dpll_ddr3_303MHz[NUM_CRYSTAL_FREQ] = { + {505, 15, 2, -1, -1, -1, -1}, /*19.2*/ + {101, 3, 2, -1, -1, -1, -1}, /* 24 MHz */ + {303, 24, 1, -1, 4, -1, -1}, /* 25 MHz */ + {303, 12, 2, -1, 4, -1, -1} /* 26 MHz */ +}; + +const struct dpll_params dpll_ddr3_400MHz[NUM_CRYSTAL_FREQ] = { + {125, 5, 1, -1, -1, -1, -1}, /*19.2*/ + {50, 2, 1, -1, -1, -1, -1}, /* 24 MHz */ + {16, 0, 1, -1, 4, -1, -1}, /* 25 MHz */ + {200, 12, 1, -1, 4, -1, -1} /* 26 MHz */ +}; + +const struct dpll_params dpll_ddr2_266MHz[NUM_CRYSTAL_FREQ] = { + {665, 47, 1, -1, -1, -1, -1}, /*19.2*/ + {133, 11, 1, -1, -1, -1, -1}, /* 24 MHz */ + {266, 24, 1, -1, 4, -1, -1}, /* 25 MHz */ + {133, 12, 1, -1, 4, -1, -1} /* 26 MHz */ +}; + +__weak const struct dpll_params *get_dpll_mpu_params(void) { - return &dpll_mpu; + return &dpll_mpu_opp100; } const struct dpll_params *get_dpll_core_params(void) { - return &dpll_core; + int ind = get_sys_clk_index(); + + return &dpll_core_1000MHz[ind]; } const struct dpll_params *get_dpll_per_params(void) { - return &dpll_per; + int ind = get_sys_clk_index(); + + return &dpll_per_192MHz[ind]; } void setup_clocks_for_console(void) diff --git a/arch/arm/mach-omap2/am33xx/sys_info.c b/arch/arm/mach-omap2/am33xx/sys_info.c index e4fc461bd8..564bae6793 100644 --- a/arch/arm/mach-omap2/am33xx/sys_info.c +++ b/arch/arm/mach-omap2/am33xx/sys_info.c @@ -68,6 +68,24 @@ u32 get_sysboot_value(void) return readl(&cstat->statusreg) & SYSBOOT_MASK; } +u32 get_sys_clk_index(void) +{ + struct ctrl_stat *ctrl = (struct ctrl_stat *)CTRL_BASE; + u32 ind = readl(&ctrl->statusreg); + +#ifdef CONFIG_AM43XX + u32 src; + src = (ind & CTRL_CRYSTAL_FREQ_SRC_MASK) >> CTRL_CRYSTAL_FREQ_SRC_SHIFT; + if (src == CTRL_CRYSTAL_FREQ_SRC_EFUSE) /* Value read from EFUSE */ + return ((ind & CTRL_CRYSTAL_FREQ_SELECTION_MASK) >> + CTRL_CRYSTAL_FREQ_SELECTION_SHIFT); + else /* Value read from SYS BOOT pins */ +#endif + return ((ind & CTRL_SYSBOOT_15_14_MASK) >> + CTRL_SYSBOOT_15_14_SHIFT); +} + + #ifdef CONFIG_DISPLAY_CPUINFO static char *cpu_revs[] = { "1.0", @@ -132,13 +150,21 @@ int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev) sil_rev = readl(&cdev->deviceid) >> 28; - if (sil_rev == 1) - /* PG 2.0, efuse may not be set. */ - return MPUPLL_M_800; - else if (sil_rev >= 2) { + if (sil_rev == 0) { + /* No efuse in PG 1.0. Use max speed */ + return MPUPLL_M_720; + } else if (sil_rev >= 1) { /* Check what the efuse says our max speed is. */ - int efuse_arm_mpu_max_freq; + int efuse_arm_mpu_max_freq, package_type; efuse_arm_mpu_max_freq = readl(&cdev->efuse_sma); + package_type = (efuse_arm_mpu_max_freq & PACKAGE_TYPE_MASK) >> + PACKAGE_TYPE_SHIFT; + + /* PG 2.0, efuse may not be set. */ + if (package_type == PACKAGE_TYPE_UNDEFINED || package_type == + PACKAGE_TYPE_RESERVED) + return MPUPLL_M_800; + switch ((efuse_arm_mpu_max_freq & DEVICE_ID_MASK)) { case AM335X_ZCZ_1000: return MPUPLL_M_1000; @@ -155,14 +181,14 @@ int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev) } } - /* PG 1.0 or otherwise unknown, use the PG1.0 max */ + /* unknown, use the PG1.0 max */ return MPUPLL_M_720; } int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency) { - /* For PG2.1 and later, we have one set of values. */ - if (sil_rev >= 2) { + /* For PG2.0 and later, we have one set of values. */ + if (sil_rev >= 1) { switch (frequency) { case MPUPLL_M_1000: return TPS65910_OP_REG_SEL_1_3_2_5; @@ -171,12 +197,13 @@ int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency) case MPUPLL_M_720: return TPS65910_OP_REG_SEL_1_2_0; case MPUPLL_M_600: + case MPUPLL_M_500: case MPUPLL_M_300: - return TPS65910_OP_REG_SEL_1_1_3; + return TPS65910_OP_REG_SEL_1_1_0; } } - /* Default to PG1.0/PG2.0 values. */ - return TPS65910_OP_REG_SEL_1_1_3; + /* Default to PG1.0 values. */ + return TPS65910_OP_REG_SEL_1_2_6; } #endif diff --git a/arch/arm/mach-omap2/am33xx/u-boot-spl.lds b/arch/arm/mach-omap2/am33xx/u-boot-spl.lds deleted file mode 100644 index 07cf267878..0000000000 --- a/arch/arm/mach-omap2/am33xx/u-boot-spl.lds +++ /dev/null @@ -1,56 +0,0 @@ -/* - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> - * - * (C) Copyright 2010 - * Texas Instruments, <www.ti.com> - * Aneesh V <aneesh@ti.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\ - LENGTH = CONFIG_SPL_MAX_SIZE } -MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \ - LENGTH = CONFIG_SPL_BSS_MAX_SIZE } - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - .text : - { - __start = .; - *(.vectors) - arch/arm/cpu/armv7/start.o (.text) - *(.text*) - } >.sram - - . = ALIGN(4); - .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram - - . = ALIGN(4); - .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram - - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } >.sram - - . = ALIGN(4); - __image_copy_end = .; - - .end : - { - *(.__end) - } >.sram - - .bss : - { - . = ALIGN(4); - __bss_start = .; - *(.bss*) - . = ALIGN(4); - __bss_end = .; - } >.sdram -} diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c index f317293988..c090442598 100644 --- a/arch/arm/mach-omap2/hwinit-common.c +++ b/arch/arm/mach-omap2/hwinit-common.c @@ -12,6 +12,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> +#include <debug_uart.h> #include <spl.h> #include <asm/arch/sys_proto.h> #include <linux/sizes.h> @@ -159,6 +160,9 @@ void early_system_init(void) setup_early_clocks(); do_board_detect(); vcores_init(); +#ifdef CONFIG_DEBUG_UART_OMAP + debug_uart_init(); +#endif prcm_init(); } @@ -171,6 +175,7 @@ void board_init_f(ulong dummy) #endif /* For regular u-boot sdram_init() is called from dram_init() */ sdram_init(); + gd->ram_size = omap_sdram_size(); } #endif diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c index 0522d65467..7b8d0ee653 100644 --- a/arch/arm/mach-rockchip/rk3036-board-spl.c +++ b/arch/arm/mach-rockchip/rk3036-board-spl.c @@ -17,13 +17,13 @@ DECLARE_GLOBAL_DATA_PTR; #define GRF_BASE 0x20008000 -static struct rk3036_grf * const grf = (void *)GRF_BASE; #define DEBUG_UART_BASE 0x20068000 void board_init_f(ulong dummy) { #ifdef EARLY_DEBUG + struct rk3036_grf * const grf = (void *)GRF_BASE; /* * NOTE: sd card and debug uart use same iomux in rk3036, * so if you enable uart, diff --git a/arch/arm/mach-stm32/stm32f4/soc.c b/arch/arm/mach-stm32/stm32f4/soc.c index b5d06dbe83..3f45a25cea 100644 --- a/arch/arm/mach-stm32/stm32f4/soc.c +++ b/arch/arm/mach-stm32/stm32f4/soc.c @@ -7,7 +7,7 @@ #include <common.h> #include <asm/io.h> -#include <asm/armv7m.h> +#include <asm/armv7m_mpu.h> #include <asm/arch/stm32.h> u32 get_cpu_rev(void) @@ -17,17 +17,19 @@ u32 get_cpu_rev(void) int arch_cpu_init(void) { + struct mpu_region_config stm32_region_config[] = { + { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW, + STRONG_ORDER, REGION_4GB }, + }; configure_clocks(); - /* * Configure the memory protection unit (MPU) to allow full access to * the whole 4GB address space. */ - writel(0, &V7M_MPU->rnr); - writel(0, &V7M_MPU->rbar); - writel((V7M_MPU_RASR_AP_RW_RW | V7M_MPU_RASR_SIZE_4GB - | V7M_MPU_RASR_EN), &V7M_MPU->rasr); - writel(V7M_MPU_CTRL_ENABLE | V7M_MPU_CTRL_HFNMIENA, &V7M_MPU->ctrl); + disable_mpu(); + for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++) + mpu_config(&stm32_region_config[i]); + enable_mpu(); return 0; } diff --git a/arch/arm/mach-stm32/stm32f7/soc.c b/arch/arm/mach-stm32/stm32f7/soc.c index 6f9704ab78..74a9350a31 100644 --- a/arch/arm/mach-stm32/stm32f7/soc.c +++ b/arch/arm/mach-stm32/stm32f7/soc.c @@ -7,7 +7,7 @@ #include <common.h> #include <asm/io.h> -#include <asm/armv7m.h> +#include <asm/armv7m_mpu.h> #include <asm/arch/stm32.h> u32 get_cpu_rev(void) @@ -17,56 +17,27 @@ u32 get_cpu_rev(void) int arch_cpu_init(void) { - /* - * Configure the memory protection unit (MPU) - * 0x00000000 - 0xffffffff: Strong-order, Shareable - * 0xC0000000 - 0xC0800000: Normal, Outer and inner Non-cacheable - */ + struct mpu_region_config stm32_region_config[] = { + { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW, + O_I_WB_RD_WR_ALLOC, REGION_4GB }, - /* Disable MPU */ - writel(0, &V7M_MPU->ctrl); + { 0x00000000, REGION_1, XN_DIS, PRIV_RW_USR_RW, + STRONG_ORDER, REGION_512MB }, - writel( - 0x00000000 /* address */ - | 1 << 4 /* VALID */ - | 0 << 0 /* REGION */ - , &V7M_MPU->rbar - ); + { 0x40000000, REGION_2, XN_EN, PRIV_RW_USR_RW, + DEVICE_NON_SHARED, REGION_512MB }, - /* Strong-order, Shareable */ - /* TEX=000, S=1, C=0, B=0*/ - writel( - (V7M_MPU_RASR_XN_ENABLE - | V7M_MPU_RASR_AP_RW_RW - | 0x01 << V7M_MPU_RASR_S_SHIFT - | 0x00 << V7M_MPU_RASR_TEX_SHIFT - | V7M_MPU_RASR_SIZE_4GB - | V7M_MPU_RASR_EN) - , &V7M_MPU->rasr - ); + { 0xA0000000, REGION_3, XN_EN, PRIV_RW_USR_RW, + DEVICE_NON_SHARED, REGION_512MB }, - writel( - 0xC0000000 /* address */ - | 1 << 4 /* VALID */ - | 1 << 0 /* REGION */ - , &V7M_MPU->rbar - ); + { 0xE0000000, REGION_4, XN_EN, PRIV_RW_USR_RW, + STRONG_ORDER, REGION_512MB }, + }; - /* Normal, Outer and inner Non-cacheable */ - /* TEX=001, S=0, C=0, B=0*/ - writel( - (V7M_MPU_RASR_XN_ENABLE - | V7M_MPU_RASR_AP_RW_RW - | 0x01 << V7M_MPU_RASR_TEX_SHIFT - | 0x01 << V7M_MPU_RASR_B_SHIFT - | 0x01 << V7M_MPU_RASR_C_SHIFT - | V7M_MPU_RASR_SIZE_8MB - | V7M_MPU_RASR_EN) - , &V7M_MPU->rasr - ); - - /* Enable MPU */ - writel(V7M_MPU_CTRL_ENABLE | V7M_MPU_CTRL_HFNMIENA, &V7M_MPU->ctrl); + disable_mpu(); + for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++) + mpu_config(&stm32_region_config[i]); + enable_mpu(); return 0; } diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c index eeced7943e..c0a8b6423e 100644 --- a/board/bachmann/ot1200/ot1200.c +++ b/board/bachmann/ot1200/ot1200.c @@ -273,10 +273,6 @@ int board_mmc_init(bd_t *bis) return 0; } -static iomux_v3_cfg_t const pwm_pad[] = { - MX6_PAD_SD1_CMD__PWM4_OUT | MUX_PAD_CTRL(OUTPUT_40OHM), -}; - static void leds_on(void) { /* turn on all possible leds connected via GPIO expander */ diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c index a4a602943e..24956a8a94 100644 --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c @@ -71,6 +71,7 @@ static iomux_v3_cfg_t const uart2_pads[] = { IOMUX_PADS(PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), }; +#ifndef CONFIG_SPL_BUILD static iomux_v3_cfg_t const usdhc2_pads[] = { IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), @@ -94,6 +95,7 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), IOMUX_PADS(PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL)), }; +#endif static iomux_v3_cfg_t const usdhc4_pads[] = { IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), diff --git a/board/davinci/da8xxevm/Kconfig b/board/davinci/da8xxevm/Kconfig index 7d0de1d0fa..0935abfd42 100644 --- a/board/davinci/da8xxevm/Kconfig +++ b/board/davinci/da8xxevm/Kconfig @@ -22,4 +22,6 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "omapl138_lcdk" +source "board/ti/common/Kconfig" + endif diff --git a/board/freescale/m5253demo/flash.c b/board/freescale/m5253demo/flash.c index 071701d234..099decabb8 100644 --- a/board/freescale/m5253demo/flash.c +++ b/board/freescale/m5253demo/flash.c @@ -31,7 +31,7 @@ typedef volatile unsigned short FLASH_PORT_WIDTHV; ulong flash_get_size(FPWV * addr, flash_info_t * info); int flash_get_offsets(ulong base, flash_info_t * info); int write_word(flash_info_t * info, FPWV * dest, u16 data); -void inline spin_wheel(void); +static inline void spin_wheel(void); flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; @@ -439,7 +439,7 @@ int write_word(flash_info_t * info, FPWV * dest, u16 data) return (res); } -void inline spin_wheel(void) +static inline void spin_wheel(void) { static int p = 0; static char w[] = "\\/-"; diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index d49543315b..228514b106 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -66,6 +66,7 @@ static iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_UART1_RXD__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), }; +#ifdef CONFIG_SPL_BUILD static iomux_v3_cfg_t const usdhc1_pads[] = { /* 8 bit SD */ MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -106,6 +107,7 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { /*CD pin*/ MX6_PAD_REF_CLK_32K__GPIO_3_22 | MUX_PAD_CTRL(NO_PAD_CTRL), }; +#endif static iomux_v3_cfg_t const fec_pads[] = { MX6_PAD_FEC_MDC__FEC_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c index b28ce10495..a5746fe086 100644 --- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c @@ -225,6 +225,7 @@ static iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), }; +#ifndef CONFIG_SPL_BUILD static iomux_v3_cfg_t const usdhc1_pads[] = { MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -240,6 +241,7 @@ static iomux_v3_cfg_t const usdhc1_pads[] = { /* RST_B */ MX6_PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), }; +#endif /* * mx6ul_14x14_evk board default supports sd card. If want to use diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index d27bd57648..186eb18048 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -180,33 +180,6 @@ void setup_ventana_i2c(void) /* * Baseboard specific GPIO */ - -/* prototype */ -static iomux_v3_cfg_t const gwproto_gpio_pads[] = { - /* RS232_EN# */ - IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG), - /* PANLEDG# */ - IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), - /* PANLEDR# */ - IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), - /* LOCLED# */ - IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), - /* RS485_EN */ - IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG), - /* IOEXP_PWREN# */ - IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG), - /* IOEXP_IRQ# */ - IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)), - /* VID_EN */ - IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), - /* DIOI2C_DIS# */ - IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG), - /* PCICK_SSON */ - IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | DIO_PAD_CFG), - /* PCI_RST# */ - IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG), -}; - static iomux_v3_cfg_t const gw51xx_gpio_pads[] = { /* PANLEDG# */ IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index dc8cd883e9..c4c2d23532 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -76,7 +76,7 @@ static iomux_v3_cfg_t const enet_pads[] = { IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | DIO_PAD_CFG), }; -/* NAND */ +#ifdef CONFIG_CMD_NAND static iomux_v3_cfg_t const nfc_pads[] = { IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(NO_PAD_CTRL)), IOMUX_PADS(PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NO_PAD_CTRL)), @@ -95,7 +95,6 @@ static iomux_v3_cfg_t const nfc_pads[] = { IOMUX_PADS(PAD_NANDF_D7__NAND_DATA07 | MUX_PAD_CTRL(NO_PAD_CTRL)), }; -#ifdef CONFIG_CMD_NAND static void setup_gpmi_nand(void) { struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; diff --git a/board/gdsys/p1022/controlcenterd-id.c b/board/gdsys/p1022/controlcenterd-id.c index 1648f13340..db8a917563 100644 --- a/board/gdsys/p1022/controlcenterd-id.c +++ b/board/gdsys/p1022/controlcenterd-id.c @@ -156,33 +156,8 @@ static const uint8_t prg_stage1_prepare[] = { 0x81, 0x2e, 0x30, 0x00, /* opcode: LOAD PCR3, f3 */ }; -static const uint8_t prg_stage2_prepare[] = { - 0x00, 0x80, 0x00, 0x00, /* opcode: SYNC PCR0 */ - 0x00, 0x84, 0x00, 0x00, /* opcode: SYNC PCR1 */ - 0x00, 0x88, 0x00, 0x00, /* opcode: SYNC PCR2 */ - 0x00, 0x8c, 0x00, 0x00, /* opcode: SYNC PCR3 */ - 0x00, 0x90, 0x00, 0x00, /* opcode: SYNC PCR4 */ -}; - -static const uint8_t prg_stage2_success[] = { - 0x81, 0x02, 0x40, 0x14, /* opcode: LOAD PCR4, #<20B data> */ - 0x48, 0xfd, 0x95, 0x17, 0xe7, 0x54, 0x6b, 0x68, /* data */ - 0x92, 0x31, 0x18, 0x05, 0xf8, 0x58, 0x58, 0x3c, /* data */ - 0xe4, 0xd2, 0x81, 0xe0, /* data */ -}; - -static const uint8_t prg_stage_fail[] = { - 0x81, 0x01, 0x00, 0x14, /* opcode: LOAD v0, #<20B data> */ - 0xc0, 0x32, 0xad, 0xc1, 0xff, 0x62, 0x9c, 0x9b, /* data */ - 0x66, 0xf2, 0x27, 0x49, 0xad, 0x66, 0x7e, 0x6b, /* data */ - 0xea, 0xdf, 0x14, 0x4b, /* data */ - 0x81, 0x42, 0x30, 0x00, /* opcode: LOAD PCR3, v0 */ - 0x81, 0x42, 0x40, 0x00, /* opcode: LOAD PCR4, v0 */ -}; - static const uint8_t vendor[] = "Guntermann & Drunck"; - /** * @brief read a bunch of data from MMC into memory. * @@ -1013,6 +988,30 @@ static int first_stage_init(void) #endif #ifdef CCDM_SECOND_STAGE +static const uint8_t prg_stage2_prepare[] = { + 0x00, 0x80, 0x00, 0x00, /* opcode: SYNC PCR0 */ + 0x00, 0x84, 0x00, 0x00, /* opcode: SYNC PCR1 */ + 0x00, 0x88, 0x00, 0x00, /* opcode: SYNC PCR2 */ + 0x00, 0x8c, 0x00, 0x00, /* opcode: SYNC PCR3 */ + 0x00, 0x90, 0x00, 0x00, /* opcode: SYNC PCR4 */ +}; + +static const uint8_t prg_stage2_success[] = { + 0x81, 0x02, 0x40, 0x14, /* opcode: LOAD PCR4, #<20B data> */ + 0x48, 0xfd, 0x95, 0x17, 0xe7, 0x54, 0x6b, 0x68, /* data */ + 0x92, 0x31, 0x18, 0x05, 0xf8, 0x58, 0x58, 0x3c, /* data */ + 0xe4, 0xd2, 0x81, 0xe0, /* data */ +}; + +static const uint8_t prg_stage_fail[] = { + 0x81, 0x01, 0x00, 0x14, /* opcode: LOAD v0, #<20B data> */ + 0xc0, 0x32, 0xad, 0xc1, 0xff, 0x62, 0x9c, 0x9b, /* data */ + 0x66, 0xf2, 0x27, 0x49, 0xad, 0x66, 0x7e, 0x6b, /* data */ + 0xea, 0xdf, 0x14, 0x4b, /* data */ + 0x81, 0x42, 0x30, 0x00, /* opcode: LOAD PCR3, v0 */ + 0x81, 0x42, 0x40, 0x00, /* opcode: LOAD PCR4, v0 */ +}; + static int second_stage_init(void) { static const char mac_suffix[] = ".mac"; diff --git a/board/phytec/pcm058/pcm058.c b/board/phytec/pcm058/pcm058.c index c3607daf46..3dc8cbd6a5 100644 --- a/board/phytec/pcm058/pcm058.c +++ b/board/phytec/pcm058/pcm058.c @@ -108,6 +108,7 @@ static iomux_v3_cfg_t const ecspi1_pads[] = { MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), }; +#ifdef CONFIG_CMD_NAND /* NAND */ static iomux_v3_cfg_t const nfc_pads[] = { MX6_PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(NAND_PAD_CTRL), @@ -130,11 +131,7 @@ static iomux_v3_cfg_t const nfc_pads[] = { MX6_PAD_NANDF_D7__NAND_DATA07 | MUX_PAD_CTRL(NAND_PAD_CTRL), MX6_PAD_SD4_DAT0__NAND_DQS | MUX_PAD_CTRL(NAND_PAD_CTRL), }; - - -/* GPIOS */ -static iomux_v3_cfg_t const gpios_pads[] = { -}; +#endif static struct i2c_pads_info i2c_pad_info2 = { .scl = { @@ -167,7 +164,7 @@ static iomux_v3_cfg_t const usdhc1_pads[] = { MX6_PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ }; -#ifndef CONFIG_CMD_NAND +#if !defined(CONFIG_CMD_NAND) && !defined(CONFIG_SPL_BUILD) static iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c index 8b34a80e8f..fb691c22d9 100644 --- a/board/socrates/socrates.c +++ b/board/socrates/socrates.c @@ -378,7 +378,7 @@ static void board_backlight_brightness(int br) /* LEDs on */ reg = in_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c)); - if (!(reg & BACKLIGHT_ENABLE)); + if (!(reg & BACKLIGHT_ENABLE)) out_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c), reg | BACKLIGHT_ENABLE); } else { diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 3e842d3187..3e81521399 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -9,6 +9,7 @@ */ #include <common.h> +#include <dm.h> #include <errno.h> #include <spl.h> #include <serial.h> @@ -26,6 +27,7 @@ #include <asm/emif.h> #include <asm/gpio.h> #include <asm/omap_sec_common.h> +#include <asm/omap_mmc.h> #include <i2c.h> #include <miiphy.h> #include <cpsw.h> @@ -254,163 +256,222 @@ int spl_start_uboot(void) } #endif -#define OSC (V_OSCK/1000000) -const struct dpll_params dpll_ddr = { - 266, OSC-1, 1, -1, -1, -1, -1}; -const struct dpll_params dpll_ddr_evm_sk = { - 303, OSC-1, 1, -1, -1, -1, -1}; -const struct dpll_params dpll_ddr_bone_black = { - 400, OSC-1, 1, -1, -1, -1, -1}; +const struct dpll_params *get_dpll_ddr_params(void) +{ + int ind = get_sys_clk_index(); + + if (board_is_evm_sk()) + return &dpll_ddr3_303MHz[ind]; + else if (board_is_bone_lt() || board_is_icev2()) + return &dpll_ddr3_400MHz[ind]; + else if (board_is_evm_15_or_later()) + return &dpll_ddr3_303MHz[ind]; + else + return &dpll_ddr2_266MHz[ind]; +} -void am33xx_spl_board_init(void) +static u8 bone_not_connected_to_ac_power(void) { - int mpu_vdd; + if (board_is_bone()) { + uchar pmic_status_reg; + if (tps65217_reg_read(TPS65217_STATUS, + &pmic_status_reg)) + return 1; + if (!(pmic_status_reg & TPS65217_PWR_SRC_AC_BITMASK)) { + puts("No AC power, switching to default OPP\n"); + return 1; + } + } + return 0; +} - /* Get the frequency */ - dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev); +const struct dpll_params *get_dpll_mpu_params(void) +{ + int ind = get_sys_clk_index(); + int freq = am335x_get_efuse_mpu_max_freq(cdev); + + if (bone_not_connected_to_ac_power()) + freq = MPUPLL_M_600; + + if (board_is_bone_lt()) + freq = MPUPLL_M_1000; + + switch (freq) { + case MPUPLL_M_1000: + return &dpll_mpu_opp[ind][5]; + case MPUPLL_M_800: + return &dpll_mpu_opp[ind][4]; + case MPUPLL_M_720: + return &dpll_mpu_opp[ind][3]; + case MPUPLL_M_600: + return &dpll_mpu_opp[ind][2]; + case MPUPLL_M_500: + return &dpll_mpu_opp100; + case MPUPLL_M_300: + return &dpll_mpu_opp[ind][0]; + } - if (board_is_bone() || board_is_bone_lt()) { - /* BeagleBone PMIC Code */ - int usb_cur_lim; + return &dpll_mpu_opp[ind][0]; +} - /* - * Only perform PMIC configurations if board rev > A1 - * on Beaglebone White - */ - if (board_is_bone() && !strncmp(board_ti_get_rev(), "00A1", 4)) - return; +static void scale_vcores_bone(int freq) +{ + int usb_cur_lim, mpu_vdd; - if (i2c_probe(TPS65217_CHIP_PM)) - return; + /* + * Only perform PMIC configurations if board rev > A1 + * on Beaglebone White + */ + if (board_is_bone() && !strncmp(board_ti_get_rev(), "00A1", 4)) + return; - /* - * On Beaglebone White we need to ensure we have AC power - * before increasing the frequency. - */ - if (board_is_bone()) { - uchar pmic_status_reg; - if (tps65217_reg_read(TPS65217_STATUS, - &pmic_status_reg)) - return; - if (!(pmic_status_reg & TPS65217_PWR_SRC_AC_BITMASK)) { - puts("No AC power, disabling frequency switch\n"); - return; - } - } + if (i2c_probe(TPS65217_CHIP_PM)) + return; - /* - * Override what we have detected since we know if we have - * a Beaglebone Black it supports 1GHz. - */ - if (board_is_bone_lt()) - dpll_mpu_opp100.m = MPUPLL_M_1000; + /* + * On Beaglebone White we need to ensure we have AC power + * before increasing the frequency. + */ + if (bone_not_connected_to_ac_power()) + freq = MPUPLL_M_600; - /* - * Increase USB current limit to 1300mA or 1800mA and set - * the MPU voltage controller as needed. - */ - if (dpll_mpu_opp100.m == MPUPLL_M_1000) { - usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA; - mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV; - } else { - usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA; - mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV; - } + /* + * Override what we have detected since we know if we have + * a Beaglebone Black it supports 1GHz. + */ + if (board_is_bone_lt()) + freq = MPUPLL_M_1000; - if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, - TPS65217_POWER_PATH, - usb_cur_lim, - TPS65217_USB_INPUT_CUR_LIMIT_MASK)) - puts("tps65217_reg_write failure\n"); + if (freq == MPUPLL_M_1000) { + usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA; + mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV; + } else { + usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA; + mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV; + } - /* Set DCDC3 (CORE) voltage to 1.125V */ - if (tps65217_voltage_update(TPS65217_DEFDCDC3, - TPS65217_DCDC_VOLT_SEL_1125MV)) { - puts("tps65217_voltage_update failure\n"); - return; - } + switch (freq) { + case MPUPLL_M_1000: + mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV; + usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA; + break; + case MPUPLL_M_800: + mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV; + usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA; + break; + case MPUPLL_M_720: + mpu_vdd = TPS65217_DCDC_VOLT_SEL_1200MV; + usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA; + break; + case MPUPLL_M_600: + case MPUPLL_M_500: + case MPUPLL_M_300: + mpu_vdd = TPS65217_DCDC_VOLT_SEL_1100MV; + usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA; + break; + } - /* Set CORE Frequencies to OPP100 */ - do_setup_dpll(&dpll_core_regs, &dpll_core_opp100); + if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, + TPS65217_POWER_PATH, + usb_cur_lim, + TPS65217_USB_INPUT_CUR_LIMIT_MASK)) + puts("tps65217_reg_write failure\n"); - /* Set DCDC2 (MPU) voltage */ - if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) { - puts("tps65217_voltage_update failure\n"); - return; - } + /* Set DCDC3 (CORE) voltage to 1.10V */ + if (tps65217_voltage_update(TPS65217_DEFDCDC3, + TPS65217_DCDC_VOLT_SEL_1100MV)) { + puts("tps65217_voltage_update failure\n"); + return; + } - /* - * Set LDO3, LDO4 output voltage to 3.3V for Beaglebone. - * Set LDO3 to 1.8V and LDO4 to 3.3V for Beaglebone Black. - */ - if (board_is_bone()) { - if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, - TPS65217_DEFLS1, - TPS65217_LDO_VOLTAGE_OUT_3_3, - TPS65217_LDO_MASK)) - puts("tps65217_reg_write failure\n"); - } else { - if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, - TPS65217_DEFLS1, - TPS65217_LDO_VOLTAGE_OUT_1_8, - TPS65217_LDO_MASK)) - puts("tps65217_reg_write failure\n"); - } + /* Set DCDC2 (MPU) voltage */ + if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) { + puts("tps65217_voltage_update failure\n"); + return; + } + /* + * Set LDO3, LDO4 output voltage to 3.3V for Beaglebone. + * Set LDO3 to 1.8V and LDO4 to 3.3V for Beaglebone Black. + */ + if (board_is_bone()) { if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, - TPS65217_DEFLS2, + TPS65217_DEFLS1, TPS65217_LDO_VOLTAGE_OUT_3_3, TPS65217_LDO_MASK)) puts("tps65217_reg_write failure\n"); } else { - int sil_rev; + if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, + TPS65217_DEFLS1, + TPS65217_LDO_VOLTAGE_OUT_1_8, + TPS65217_LDO_MASK)) + puts("tps65217_reg_write failure\n"); + } - /* - * The GP EVM, IDK and EVM SK use a TPS65910 PMIC. For all - * MPU frequencies we support we use a CORE voltage of - * 1.1375V. For MPU voltage we need to switch based on - * the frequency we are running at. - */ - if (i2c_probe(TPS65910_CTRL_I2C_ADDR)) - return; + if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, + TPS65217_DEFLS2, + TPS65217_LDO_VOLTAGE_OUT_3_3, + TPS65217_LDO_MASK)) + puts("tps65217_reg_write failure\n"); +} - /* - * Depending on MPU clock and PG we will need a different - * VDD to drive at that speed. - */ - sil_rev = readl(&cdev->deviceid) >> 28; - mpu_vdd = am335x_get_tps65910_mpu_vdd(sil_rev, - dpll_mpu_opp100.m); +void scale_vcores_generic(int freq) +{ + int sil_rev, mpu_vdd; - /* Tell the TPS65910 to use i2c */ - tps65910_set_i2c_control(); + /* + * The GP EVM, IDK and EVM SK use a TPS65910 PMIC. For all + * MPU frequencies we support we use a CORE voltage of + * 1.10V. For MPU voltage we need to switch based on + * the frequency we are running at. + */ + if (i2c_probe(TPS65910_CTRL_I2C_ADDR)) + return; - /* First update MPU voltage. */ - if (tps65910_voltage_update(MPU, mpu_vdd)) - return; + /* + * Depending on MPU clock and PG we will need a different + * VDD to drive at that speed. + */ + sil_rev = readl(&cdev->deviceid) >> 28; + mpu_vdd = am335x_get_tps65910_mpu_vdd(sil_rev, freq); - /* Second, update the CORE voltage. */ - if (tps65910_voltage_update(CORE, TPS65910_OP_REG_SEL_1_1_3)) - return; + /* Tell the TPS65910 to use i2c */ + tps65910_set_i2c_control(); - /* Set CORE Frequencies to OPP100 */ - do_setup_dpll(&dpll_core_regs, &dpll_core_opp100); - } + /* First update MPU voltage. */ + if (tps65910_voltage_update(MPU, mpu_vdd)) + return; + + /* Second, update the CORE voltage. */ + if (tps65910_voltage_update(CORE, TPS65910_OP_REG_SEL_1_1_0)) + return; - /* Set MPU Frequency to what we detected now that voltages are set */ - do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100); } -const struct dpll_params *get_dpll_ddr_params(void) +void gpi2c_init(void) { - if (board_is_evm_sk()) - return &dpll_ddr_evm_sk; - else if (board_is_bone_lt() || board_is_icev2()) - return &dpll_ddr_bone_black; - else if (board_is_evm_15_or_later()) - return &dpll_ddr_evm_sk; + /* When needed to be invoked prior to BSS initialization */ + static bool first_time = true; + + if (first_time) { + enable_i2c0_pin_mux(); + i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, + CONFIG_SYS_OMAP24_I2C_SLAVE); + first_time = false; + } +} + +void scale_vcores(void) +{ + int freq; + + gpi2c_init(); + freq = am335x_get_efuse_mpu_max_freq(cdev); + + if (board_is_bone()) + scale_vcores_bone(freq); else - return &dpll_ddr; + scale_vcores_generic(freq); } void set_uart_mux_conf(void) @@ -892,3 +953,33 @@ void board_fit_image_post_process(void **p_image, size_t *p_size) secure_boot_verify_image(p_image, p_size); } #endif + +#if !CONFIG_IS_ENABLED(OF_CONTROL) +static const struct omap_hsmmc_plat am335x_mmc0_platdata = { + .base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE, + .cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_4BIT, + .cfg.f_min = 400000, + .cfg.f_max = 52000000, + .cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195, + .cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, +}; + +U_BOOT_DEVICE(am335x_mmc0) = { + .name = "omap_hsmmc", + .platdata = &am335x_mmc0_platdata, +}; + +static const struct omap_hsmmc_plat am335x_mmc1_platdata = { + .base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE, + .cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_8BIT, + .cfg.f_min = 400000, + .cfg.f_max = 52000000, + .cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195, + .cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, +}; + +U_BOOT_DEVICE(am335x_mmc1) = { + .name = "omap_hsmmc", + .platdata = &am335x_mmc1_platdata, +}; +#endif diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c index 2572029a25..f633e2f85d 100644 --- a/board/ti/am43xx/board.c +++ b/board/ti/am43xx/board.c @@ -49,8 +49,6 @@ void do_board_detect(void) #ifndef CONFIG_SKIP_LOWLEVEL_INIT -#define NUM_OPPS 6 - const struct dpll_params dpll_mpu[NUM_CRYSTAL_FREQ][NUM_OPPS] = { { /* 19.2 MHz */ {125, 3, 2, -1, -1, -1, -1}, /* OPP 50 */ @@ -317,25 +315,6 @@ void emif_get_ext_phy_ctrl_const_regs(const u32 **regs, u32 *size) return; } -/* - * get_sys_clk_index : returns the index of the sys_clk read from - * ctrl status register. This value is either - * read from efuse or sysboot pins. - */ -static u32 get_sys_clk_index(void) -{ - struct ctrl_stat *ctrl = (struct ctrl_stat *)CTRL_BASE; - u32 ind = readl(&ctrl->statusreg), src; - - src = (ind & CTRL_CRYSTAL_FREQ_SRC_MASK) >> CTRL_CRYSTAL_FREQ_SRC_SHIFT; - if (src == CTRL_CRYSTAL_FREQ_SRC_EFUSE) /* Value read from EFUSE */ - return ((ind & CTRL_CRYSTAL_FREQ_SELECTION_MASK) >> - CTRL_CRYSTAL_FREQ_SELECTION_SHIFT); - else /* Value read from SYS BOOT pins */ - return ((ind & CTRL_SYSBOOT_15_14_MASK) >> - CTRL_SYSBOOT_15_14_SHIFT); -} - const struct dpll_params *get_dpll_ddr_params(void) { int ind = get_sys_clk_index(); diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index 09bebeb71b..45f1d5de39 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -564,53 +564,6 @@ static iomux_v3_cfg_t const rgb_pads[] = { MX6_PAD_EIM_D31__IPU1_DISP1_DATA20 | MUX_PAD_CTRL(OUTPUT_RGB), }; -static iomux_v3_cfg_t const vga_pads[] = { -#ifdef FOR_DL_SOLO - /* DualLite/Solo doesn't have IPU2 */ - MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, - MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15, - MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02, - MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03, - MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00, - MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01, - MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02, - MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03, - MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04, - MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05, - MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06, - MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07, - MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08, - MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09, - MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10, - MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11, - MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12, - MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13, - MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14, - MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15, -#else - MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, - MX6_PAD_DI0_PIN15__IPU2_DI0_PIN15, - MX6_PAD_DI0_PIN2__IPU2_DI0_PIN02, - MX6_PAD_DI0_PIN3__IPU2_DI0_PIN03, - MX6_PAD_DISP0_DAT0__IPU2_DISP0_DATA00, - MX6_PAD_DISP0_DAT1__IPU2_DISP0_DATA01, - MX6_PAD_DISP0_DAT2__IPU2_DISP0_DATA02, - MX6_PAD_DISP0_DAT3__IPU2_DISP0_DATA03, - MX6_PAD_DISP0_DAT4__IPU2_DISP0_DATA04, - MX6_PAD_DISP0_DAT5__IPU2_DISP0_DATA05, - MX6_PAD_DISP0_DAT6__IPU2_DISP0_DATA06, - MX6_PAD_DISP0_DAT7__IPU2_DISP0_DATA07, - MX6_PAD_DISP0_DAT8__IPU2_DISP0_DATA08, - MX6_PAD_DISP0_DAT9__IPU2_DISP0_DATA09, - MX6_PAD_DISP0_DAT10__IPU2_DISP0_DATA10, - MX6_PAD_DISP0_DAT11__IPU2_DISP0_DATA11, - MX6_PAD_DISP0_DAT12__IPU2_DISP0_DATA12, - MX6_PAD_DISP0_DAT13__IPU2_DISP0_DATA13, - MX6_PAD_DISP0_DAT14__IPU2_DISP0_DATA14, - MX6_PAD_DISP0_DAT15__IPU2_DISP0_DATA15, -#endif -}; - static void do_enable_hdmi(struct display_info_t const *dev) { imx_enable_hdmi_phy(); diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c index b2b12e4519..e54afa1952 100644 --- a/board/toradex/colibri_imx7/colibri_imx7.c +++ b/board/toradex/colibri_imx7/colibri_imx7.c @@ -111,22 +111,6 @@ static void setup_gpmi_nand(void) } #endif -static iomux_v3_cfg_t const usdhc3_emmc_pads[] = { - MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX7D_PAD_SD3_DATA0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX7D_PAD_SD3_DATA1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX7D_PAD_SD3_DATA2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX7D_PAD_SD3_DATA3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX7D_PAD_SD3_DATA4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX7D_PAD_SD3_DATA5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX7D_PAD_SD3_DATA6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX7D_PAD_SD3_DATA7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX7D_PAD_SD3_STROBE__SD3_STROBE | MUX_PAD_CTRL(USDHC_PAD_CTRL), - - MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - #ifdef CONFIG_VIDEO_MXS static iomux_v3_cfg_t const lcd_pads[] = { MX7D_PAD_LCD_CLK__LCD_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL), diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c index ff3cce05f9..41ab8e8089 100644 --- a/cmd/bdinfo.c +++ b/cmd/bdinfo.c @@ -157,7 +157,7 @@ static inline void print_baudrate(void) #endif } -static inline void print_std_bdinfo(const bd_t *bd) +static inline void __maybe_unused print_std_bdinfo(const bd_t *bd) { print_bi_boot_params(bd); print_bi_mem(bd); @@ -46,7 +46,8 @@ int do_io_iod(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) int do_io_iow(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) { - ulong addr, size, val; + ulong addr, val; + int size; if (argc != 3) return CMD_RET_USAGE; @@ -90,8 +90,6 @@ int do_led(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return list_leds(); cmd = argc > 2 ? get_led_cmd(argv[2]) : LEDST_COUNT; - if (cmd < 0) - return CMD_RET_USAGE; #ifdef CONFIG_LED_BLINK if (cmd == LEDST_BLINK) { if (argc < 4) diff --git a/cmd/nvedit.c b/cmd/nvedit.c index 9ca5cb58a7..8f4e6bbe62 100644 --- a/cmd/nvedit.c +++ b/cmd/nvedit.c @@ -234,7 +234,6 @@ static int _do_env_set(int flag, int argc, char * const argv[], int env_flag) } debug("Final value for argc=%d\n", argc); name = argv[1]; - value = argv[2]; if (strchr(name, '=')) { printf("## Error: illegal character '='" diff --git a/common/Makefile b/common/Makefile index 86225f1564..14d01844ad 100644 --- a/common/Makefile +++ b/common/Makefile @@ -85,6 +85,7 @@ obj-$(CONFIG_SCSI) += scsi.o obj-$(CONFIG_UPDATE_TFTP) += update.o obj-$(CONFIG_DFU_TFTP) += update.o obj-$(CONFIG_USB_KEYBOARD) += usb_kbd.o +obj-$(CONFIG_CMDLINE) += cli_readline.o cli_simple.o endif # !CONFIG_SPL_BUILD @@ -95,7 +96,7 @@ obj-$(CONFIG_SPL_HASH_SUPPORT) += hash.o obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o obj-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o -obj-$(CONFIG_SPL_OF_TRANSLATE) += fdt_support.o +obj-$(CONFIG_SPL_OF_LIBFDT) += fdt_support.o ifdef CONFIG_SPL_USB_HOST_SUPPORT obj-$(CONFIG_SPL_USB_SUPPORT) += usb.o usb_hub.o obj-$(CONFIG_USB_STORAGE) += usb_storage.o @@ -168,11 +169,9 @@ endif ifdef CONFIG_CMD_EEPROM_LAYOUT obj-y += eeprom/eeprom_field.o eeprom/eeprom_layout.o endif -# We always have this since drivers/ddr/fs/interactive.c needs it -obj-$(CONFIG_CMDLINE) += cli_simple.o obj-y += cli.o -obj-$(CONFIG_CMDLINE) += cli_readline.o +obj-$(CONFIG_FSL_DDR_INTERACTIVE) += cli_simple.o cli_readline.o obj-$(CONFIG_CMD_DFU) += dfu.o obj-y += command.o obj-y += s_record.o diff --git a/common/dfu.c b/common/dfu.c index 0e9f5f59c8..546a1ab9b4 100644 --- a/common/dfu.c +++ b/common/dfu.c @@ -88,7 +88,7 @@ exit: board_usb_cleanup(usbctrl_index, USB_INIT_DEVICE); if (dfu_reset) - run_command("reset", 0); + do_reset(NULL, 0, 0, NULL); g_dnl_clear_detach(); diff --git a/common/env_attr.c b/common/env_attr.c index 5bfe5e3a89..f965b4bbb6 100644 --- a/common/env_attr.c +++ b/common/env_attr.c @@ -132,6 +132,10 @@ static int regex_callback(const char *name, const char *attributes, void *priv) if (slre_match(&slre, cbp->searched_for, strlen(cbp->searched_for), caps)) { free(cbp->regex); + if (!attributes) { + retval = -EINVAL; + goto done; + } cbp->regex = malloc(strlen(regex) + 1); if (cbp->regex) { strcpy(cbp->regex, regex); @@ -153,7 +157,7 @@ static int regex_callback(const char *name, const char *attributes, void *priv) } } else { printf("Error compiling regex: %s\n", slre.err_str); - retval = EINVAL; + retval = -EINVAL; } done: return retval; diff --git a/common/fb_mmc.c b/common/fb_mmc.c index 6cc113d825..866982e41c 100644 --- a/common/fb_mmc.c +++ b/common/fb_mmc.c @@ -37,7 +37,7 @@ static int part_get_info_by_name_or_alias(struct blk_desc *dev_desc, int ret; ret = part_get_info_by_name(dev_desc, name, info); - if (ret) { + if (ret < 0) { /* strlen("fastboot_partition_alias_") + 32(part_name) + 1 */ char env_alias_name[25 + 32 + 1]; char *aliased_part_name; @@ -153,7 +153,7 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer, } #endif - if (part_get_info_by_name_or_alias(dev_desc, cmd, &info)) { + if (part_get_info_by_name_or_alias(dev_desc, cmd, &info) < 0) { error("cannot find partition: '%s'\n", cmd); fastboot_fail("cannot find partition"); return; @@ -205,7 +205,7 @@ void fb_mmc_erase(const char *cmd) } ret = part_get_info_by_name_or_alias(dev_desc, cmd, &info); - if (ret) { + if (ret < 0) { error("cannot find partition: '%s'", cmd); fastboot_fail("cannot find partition"); return; diff --git a/common/image-android.c b/common/image-android.c index ee03b96aaa..c668407817 100644 --- a/common/image-android.c +++ b/common/image-android.c @@ -161,6 +161,9 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr, void android_print_contents(const struct andr_img_hdr *hdr) { const char * const p = IMAGE_INDENT_STRING; + /* os_version = ver << 11 | lvl */ + u32 os_ver = hdr->os_version >> 11; + u32 os_lvl = hdr->os_version & ((1U << 11) - 1); printf("%skernel size: %x\n", p, hdr->kernel_size); printf("%skernel address: %x\n", p, hdr->kernel_addr); @@ -170,6 +173,12 @@ void android_print_contents(const struct andr_img_hdr *hdr) printf("%ssecond address: %x\n", p, hdr->second_addr); printf("%stags address: %x\n", p, hdr->tags_addr); printf("%spage size: %x\n", p, hdr->page_size); + /* ver = A << 14 | B << 7 | C (7 bits for each of A, B, C) + * lvl = ((Y - 2000) & 127) << 4 | M (7 bits for Y, 4 bits for M) */ + printf("%sos_version: %x (ver: %u.%u.%u, level: %u.%u)\n", + p, hdr->os_version, + (os_ver >> 7) & 0x7F, (os_ver >> 14) & 0x7F, os_ver & 0x7F, + (os_lvl >> 4) + 2000, os_lvl & 0x0F); printf("%sname: %s\n", p, hdr->name); printf("%scmdline: %s\n", p, hdr->cmdline); } diff --git a/common/spl/Kconfig b/common/spl/Kconfig index ea6fbb60ad..f51ae2c484 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -6,6 +6,9 @@ config SUPPORT_SPL config SUPPORT_TPL bool +config SPL_DFU_NO_RESET + bool + config SPL bool depends on SUPPORT_SPL @@ -646,6 +649,8 @@ config SPL_USBETH_SUPPORT config SPL_DFU_SUPPORT bool "Support DFU (Device Firmware Upgarde)" select SPL_HASH_SUPPORT + select SPL_DFU_NO_RESET + depends on SPL_RAM_SUPPORT help This feature enables the DFU (Device Firmware Upgarde) in SPL with RAM memory device support. The ROM code will load and execute diff --git a/common/spl/spl.c b/common/spl/spl.c index 50828e6021..df984b8efd 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -17,6 +17,7 @@ #include <malloc.h> #include <dm/root.h> #include <linux/compiler.h> +#include <fdt_support.h> DECLARE_GLOBAL_DATA_PTR; @@ -56,6 +57,14 @@ __weak int spl_start_uboot(void) return 1; } +/* weak default platform specific function to initialize + * dram banks + */ +__weak int dram_init_banksize(void) +{ + return 0; +} + /* * Weak default function for arch specific zImage check. Return zero * and fill start and end address if image is recognized. @@ -66,6 +75,33 @@ int __weak bootz_setup(ulong image, ulong *start, ulong *end) } #endif +void spl_fixup_fdt(void) +{ +#if defined(CONFIG_SPL_OF_LIBFDT) && defined(CONFIG_SYS_SPL_ARGS_ADDR) + void *fdt_blob = (void *)CONFIG_SYS_SPL_ARGS_ADDR; + int err; + + err = fdt_check_header(fdt_blob); + if (err < 0) { + printf("fdt_root: %s\n", fdt_strerror(err)); + return; + } + + /* fixup the memory dt node */ + err = fdt_shrink_to_minimum(fdt_blob, 0); + if (err == 0) { + printf("spl: fdt_shrink_to_minimum err - %d\n", err); + return; + } + + err = arch_fixup_fdt(fdt_blob); + if (err) { + printf("spl: arch_fixup_fdt err - %d\n", err); + return; + } +#endif +} + /* * Weak default function for board specific cleanup/preparation before * Linux boot. Some boards/platforms might not need it, so just provide @@ -322,6 +358,10 @@ void board_init_r(gd_t *dummy1, ulong dummy2) struct spl_image_info spl_image; debug(">>spl:board_init_r()\n"); + gd->bd = &bdata; +#ifdef CONFIG_SPL_OS_BOOT + dram_init_banksize(); +#endif #if defined(CONFIG_SYS_SPL_MALLOC_START) mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, @@ -363,6 +403,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) #ifdef CONFIG_SPL_OS_BOOT case IH_OS_LINUX: debug("Jumping to Linux\n"); + spl_fixup_fdt(); spl_board_prepare_for_linux(); jump_to_image_linux(&spl_image); #endif @@ -385,7 +426,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2) */ void preloader_console_init(void) { - gd->bd = &bdata; gd->baudrate = CONFIG_BAUDRATE; serial_init(); /* serial communications setup */ diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c index 925a1b1491..42880d56b9 100644 --- a/common/spl/spl_spi.c +++ b/common/spl/spl_spi.c @@ -15,6 +15,8 @@ #include <errno.h> #include <spl.h> +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_SPL_OS_BOOT /* * Load the kernel, check for a valid header we can parse, and if found load @@ -70,6 +72,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, struct spl_boot_device *bootdev) { int err = 0; + unsigned payload_offs = CONFIG_SYS_SPI_U_BOOT_OFFS; struct spi_flash *flash; struct image_header *header; @@ -89,12 +92,18 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, /* use CONFIG_SYS_TEXT_BASE as temporary storage area */ header = (struct image_header *)(CONFIG_SYS_TEXT_BASE); +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) + payload_offs = fdtdec_get_config_int(gd->fdt_blob, + "u-boot,spl-payload-offset", + payload_offs); +#endif + #ifdef CONFIG_SPL_OS_BOOT if (spl_start_uboot() || spi_load_image_os(spl_image, flash, header)) #endif { /* Load u-boot, mkimage header is 64 bytes. */ - err = spi_flash_read(flash, CONFIG_SYS_SPI_U_BOOT_OFFS, 0x40, + err = spi_flash_read(flash, payload_offs, 0x40, (void *)header); if (err) { debug("%s: Failed to read from SPI flash (err=%d)\n", @@ -113,13 +122,13 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, load.bl_len = 1; load.read = spl_spi_fit_read; err = spl_load_simple_fit(spl_image, &load, - CONFIG_SYS_SPI_U_BOOT_OFFS, + payload_offs, header); } else { err = spl_parse_image_header(spl_image, header); if (err) return err; - err = spi_flash_read(flash, CONFIG_SYS_SPI_U_BOOT_OFFS, + err = spi_flash_read(flash, payload_offs, spl_image->size, (void *)spl_image->load_addr); } diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 9f96f15951..be04402572 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm" CONFIG_DM=y CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y @@ -45,6 +46,7 @@ CONFIG_SPL_SYSCON=y CONFIG_BLK=y CONFIG_DM_SCSI=y CONFIG_DWC_AHCI=y +CONFIG_SPL_OF_TRANSLATE=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y diff --git a/configs/draco_defconfig b/configs/draco_defconfig index ea678b6f48..2ecdd3c8f6 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_DRACO=y +CONFIG_SYS_MPUCLK=300 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index 39d3ad1cd9..7e0b1923b8 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_ETAMIN=y +CONFIG_SYS_MPUCLK=300 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index 7a5a78f494..752ff5d860 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_OMAPL138_LCDK=y +CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y @@ -15,19 +16,10 @@ CONFIG_SPL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xb5 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " -CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set -CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set -CONFIG_CMD_MMC=y -CONFIG_CMD_PART=y +# CONFIG_CMD_GPIO is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_DIAG=y CONFIG_CMD_UBI=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index 5b7c5ef3e9..c40684a81d 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_PXM2=y +CONFIG_SYS_MPUCLK=720 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index 084c03cd00..01848c5702 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_RASTABAN=y +CONFIG_SYS_MPUCLK=300 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 33289962a8..f09a67e62c 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_RUT=y +CONFIG_SYS_MPUCLK=600 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index a20c4dfb31..dd61ead647 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_THUBAN=y +CONFIG_SYS_MPUCLK=300 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y diff --git a/disk/part.c b/disk/part.c index cd447024c0..491b02dc9c 100644 --- a/disk/part.c +++ b/disk/part.c @@ -635,7 +635,7 @@ int part_get_info_by_name(struct blk_desc *dev_desc, const char *name, } if (strcmp(name, (const char *)info->name) == 0) { /* matched */ - return 0; + return i; } } } diff --git a/doc/device-tree-bindings/config.txt b/doc/device-tree-bindings/config.txt index 5640bae72f..d4bc1df553 100644 --- a/doc/device-tree-bindings/config.txt +++ b/doc/device-tree-bindings/config.txt @@ -20,3 +20,8 @@ u-boot,efi-partition-entries-offset is formatted. This setting will override any values configured via Kconfig. + +u-boot,spl-payload-offset + If present (and SPL is controlled by the device-tree), this allows + to override the CONFIG_SYS_SPI_U_BOOT_OFFS setting using a value + from the device-tree. diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c index 8dacc1a6d1..ceb33e35ee 100644 --- a/drivers/dfu/dfu.c +++ b/drivers/dfu/dfu.c @@ -35,7 +35,11 @@ static struct hash_algo *dfu_hash_algo; */ __weak bool dfu_usb_get_reset(void) { +#ifdef CONFIG_SPL_DFU_NO_RESET + return false; +#else return true; +#endif } static int dfu_find_alt_num(const char *s) diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c index 9ab9df4ce7..ba4804083d 100644 --- a/drivers/gpio/gpio-uclass.c +++ b/drivers/gpio/gpio-uclass.c @@ -68,7 +68,7 @@ int dm_gpio_lookup_name(const char *name, struct gpio_desc *desc) if (numeric != -1) { offset = numeric - uc_priv->gpio_base; /* Allow GPIOs to be numbered from 0 */ - if (offset >= 0 && offset < uc_priv->gpio_count) + if (offset < uc_priv->gpio_count) break; } diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index d151fe7266..c136ab0ec8 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -56,11 +56,6 @@ DECLARE_GLOBAL_DATA_PTR; #define SYSCTL_SRC (1 << 25) #define SYSCTL_SRD (1 << 26) -struct omap_hsmmc_plat { - struct mmc_config cfg; - struct mmc mmc; -}; - struct omap2_mmc_platform_config { u32 reg_offset; }; @@ -777,9 +772,9 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio, return 0; } #else +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) static int omap_hsmmc_ofdata_to_platdata(struct udevice *dev) { - struct omap_hsmmc_data *priv = dev_get_priv(dev); struct omap_hsmmc_plat *plat = dev_get_platdata(dev); struct mmc_config *cfg = &plat->cfg; struct omap2_mmc_platform_config *data = @@ -788,7 +783,7 @@ static int omap_hsmmc_ofdata_to_platdata(struct udevice *dev) int node = dev_of_offset(dev); int val; - priv->base_addr = map_physmem(dev_get_addr(dev), sizeof(struct hsmmc *), + plat->base_addr = map_physmem(dev_get_addr(dev), sizeof(struct hsmmc *), MAP_NOCACHE) + data->reg_offset; cfg->host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS; @@ -815,11 +810,12 @@ static int omap_hsmmc_ofdata_to_platdata(struct udevice *dev) cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; #ifdef OMAP_HSMMC_USE_GPIO - priv->cd_inverted = fdtdec_get_bool(fdt, node, "cd-inverted"); + plat->cd_inverted = fdtdec_get_bool(fdt, node, "cd-inverted"); #endif return 0; } +#endif #ifdef CONFIG_BLK @@ -840,6 +836,10 @@ static int omap_hsmmc_probe(struct udevice *dev) cfg->name = "OMAP SD/MMC"; cfg->ops = &omap_hsmmc_ops; + priv->base_addr = plat->base_addr; +#ifdef OMAP_HSMMC_USE_GPIO + priv->cd_inverted = plat->cd_inverted; +#endif #ifdef CONFIG_BLK mmc = &plat->mmc; @@ -849,7 +849,7 @@ static int omap_hsmmc_probe(struct udevice *dev) return -1; #endif -#ifdef OMAP_HSMMC_USE_GPIO +#if defined(OMAP_HSMMC_USE_GPIO) && CONFIG_IS_ENABLED(OF_CONTROL) gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN); gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN); #endif @@ -860,6 +860,7 @@ static int omap_hsmmc_probe(struct udevice *dev) return 0; } +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct omap2_mmc_platform_config omap3_mmc_pdata = { .reg_offset = 0, }; @@ -887,17 +888,21 @@ static const struct udevice_id omap_hsmmc_ids[] = { }, { } }; +#endif U_BOOT_DRIVER(omap_hsmmc) = { .name = "omap_hsmmc", .id = UCLASS_MMC, +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .of_match = omap_hsmmc_ids, .ofdata_to_platdata = omap_hsmmc_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct omap_hsmmc_plat), +#endif #ifdef CONFIG_BLK .bind = omap_hsmmc_bind, #endif .probe = omap_hsmmc_probe, .priv_auto_alloc_size = sizeof(struct omap_hsmmc_data), - .platdata_auto_alloc_size = sizeof(struct omap_hsmmc_plat), + .flags = DM_FLAG_PRE_RELOC, }; #endif diff --git a/drivers/net/eepro100.c b/drivers/net/eepro100.c index 0f350cba53..33d9fd6a57 100644 --- a/drivers/net/eepro100.c +++ b/drivers/net/eepro100.c @@ -207,12 +207,6 @@ static int tx_threshold; * There are so many options that it would be difficult to document * each bit. We mostly use the default or recommended settings. */ -static const char i82557_config_cmd[] = { - 22, 0x08, 0, 0, 0, 0, 0x32, 0x03, 1, /* 1=Use MII 0=Use AUI */ - 0, 0x2E, 0, 0x60, 0, - 0xf2, 0x48, 0, 0x40, 0xf2, 0x80, /* 0x40=Force full-duplex */ - 0x3f, 0x05, -}; static const char i82558_config_cmd[] = { 22, 0x08, 0, 1, 0, 0, 0x22, 0x03, 1, /* 1=Use MII 0=Use AUI */ 0, 0x2E, 0, 0x60, 0x08, 0x88, diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c index a2fd1686fc..3d2f6b98ad 100644 --- a/drivers/net/phy/mv88e61xx.c +++ b/drivers/net/phy/mv88e61xx.c @@ -655,8 +655,10 @@ static int mv88e61xx_read_port_config(struct phy_device *phydev, u8 port) do { val = mv88e61xx_port_read(phydev, port, PORT_REG_STATUS); - if (val < 0) + if (val < 0) { + res = -EIO; goto unforce; + } if (val & PORT_REG_STATUS_LINK) break; } while (--timeout); diff --git a/drivers/net/uli526x.c b/drivers/net/uli526x.c index 47cdb858c7..d05ae9ea0c 100644 --- a/drivers/net/uli526x.c +++ b/drivers/net/uli526x.c @@ -166,7 +166,6 @@ static int mode = 8; /* function declaration -- */ static int uli526x_start_xmit(struct eth_device *dev, void *packet, int length); -static const struct ethtool_ops netdev_ethtool_ops; static u16 read_srom_word(long, int); static void uli526x_descriptor_init(struct uli526x_board_info *, unsigned long); static void allocate_rx_buffer(struct uli526x_board_info *); diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 40f59c0c4c..504d7e3bb1 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -660,6 +660,7 @@ static int pci_find_and_bind_driver(struct udevice *parent, ret = device_bind_driver(parent, drv, str, devp); if (ret) { debug("%s: Failed to bind generic driver: %d\n", __func__, ret); + free(str); return ret; } debug("%s: No match found: bound generic driver instead\n", __func__); diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index d2dcec0d13..f19f7791f0 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -47,27 +47,27 @@ static int single_configure_pins(struct udevice *dev, int n, reg; u32 val; - for (n = 0; n < count; n++) { + for (n = 0; n < count; n++, pins++) { reg = fdt32_to_cpu(pins->reg); if ((reg < 0) || (reg > pdata->offset)) { dev_dbg(dev, " invalid register offset 0x%08x\n", reg); - pins++; continue; } reg += pdata->base; + val = fdt32_to_cpu(pins->val) & pdata->mask; switch (pdata->width) { + case 16: + writew((readw(reg) & ~pdata->mask) | val, reg); + break; case 32: - val = readl(reg) & ~pdata->mask; - val |= fdt32_to_cpu(pins->val) & pdata->mask; - writel(val, reg); - dev_dbg(dev, " reg/val 0x%08x/0x%08x\n", - reg, val); + writel((readl(reg) & ~pdata->mask) | val, reg); break; default: dev_warn(dev, "unsupported register width %i\n", pdata->width); + continue; } - pins++; + dev_dbg(dev, " reg/val 0x%08x/0x%08x\n",reg, val); } return 0; } diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 724994568d..58fc7cd2e6 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -257,6 +257,13 @@ config DEBUG_UART_UNIPHIER driver will be available until the real driver-model serial is running. +config DEBUG_UART_OMAP + bool "OMAP uart" + help + Select this to enable a debug UART using the omap ns16550 driver. + You will need to provide parameters to make this work. The driver + will be available until the real driver model serial is running. + endchoice config DEBUG_UART_BASE diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 4f86780cb1..ca55df78b7 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -246,17 +246,6 @@ int NS16550_tstc(NS16550_t com_port) #include <debug_uart.h> -#define serial_dout(reg, value) \ - serial_out_shift((char *)com_port + \ - ((char *)reg - (char *)com_port) * \ - (1 << CONFIG_DEBUG_UART_SHIFT), \ - CONFIG_DEBUG_UART_SHIFT, value) -#define serial_din(reg) \ - serial_in_shift((char *)com_port + \ - ((char *)reg - (char *)com_port) * \ - (1 << CONFIG_DEBUG_UART_SHIFT), \ - CONFIG_DEBUG_UART_SHIFT) - static inline void _debug_uart_init(void) { struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; @@ -293,6 +282,42 @@ DEBUG_UART_FUNCS #endif +#ifdef CONFIG_DEBUG_UART_OMAP + +#include <debug_uart.h> + +static inline void _debug_uart_init(void) +{ + struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; + int baud_divisor; + + baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, + CONFIG_BAUDRATE); + serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER); + serial_dout(&com_port->mdr1, 0x7); + serial_dout(&com_port->mcr, UART_MCRVAL); + serial_dout(&com_port->fcr, UART_FCR_DEFVAL); + + serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); + serial_dout(&com_port->dll, baud_divisor & 0xff); + serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff); + serial_dout(&com_port->lcr, UART_LCRVAL); + serial_dout(&com_port->mdr1, 0x0); +} + +static inline void _debug_uart_putc(int ch) +{ + struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; + + while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) + ; + serial_dout(&com_port->thr, ch); +} + +DEBUG_UART_FUNCS + +#endif + #ifdef CONFIG_DM_SERIAL static int ns16550_serial_putc(struct udevice *dev, const char ch) { diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 2160b1ccdc..7cd6d24bf5 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -432,9 +432,15 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req) else strcpy(response, "FAILValue not set"); } else { - char envstr[32]; + char *envstr; - snprintf(envstr, sizeof(envstr) - 1, "fastboot.%s", cmd); + envstr = malloc(strlen("fastboot.") + strlen(cmd) + 1); + if (!envstr) { + fastboot_tx_write_str("FAILmalloc error"); + return; + } + + sprintf(envstr, "fastboot.%s", cmd); s = getenv(envstr); if (s) { strncat(response, s, chars_left); @@ -442,6 +448,8 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req) printf("WARNING: unknown variable: %s\n", cmd); strcpy(response, "FAILVariable not implemented"); } + + free(envstr); } fastboot_tx_write_str(response); } diff --git a/drivers/video/ld9040.c b/drivers/video/ld9040.c index 23fe783c88..8a90c25797 100644 --- a/drivers/video/ld9040.c +++ b/drivers/video/ld9040.c @@ -10,10 +10,6 @@ #include <common.h> #include <spi.h> -static const unsigned char SEQ_SWRESET[] = { - 0x01, -}; - static const unsigned char SEQ_USER_SETTING[] = { 0xF0, 0x5A, 0x5A }; @@ -22,10 +18,6 @@ static const unsigned char SEQ_ELVSS_ON[] = { 0xB1, 0x0D, 0x00, 0x16, }; -static const unsigned char SEQ_TEMP_SWIRE[] = { - 0xB2, 0x06, 0x06, 0x06, 0x06, -}; - static const unsigned char SEQ_GTCON[] = { 0xF7, 0x09, 0x00, 0x00, }; @@ -46,10 +38,6 @@ static const unsigned char SEQ_GAMMA_CTRL[] = { 0xFB, 0x02, 0x5A, }; -static const unsigned char SEQ_APON[] = { - 0xF3, 0x00, 0x00, 0x00, 0x0A, 0x02, -}; - static const unsigned char SEQ_DISPCTL[] = { 0xF2, 0x02, 0x08, 0x08, 0x10, 0x10, }; @@ -66,10 +54,6 @@ static const unsigned char SEQ_SLPOUT[] = { 0x11, }; -static const unsigned char SEQ_SLPIN[] = { - 0x10, -}; - static const unsigned char SEQ_DISPON[] = { 0x29, }; diff --git a/include/android_image.h b/include/android_image.h index 094d60afe8..dfd4d9d72c 100644 --- a/include/android_image.h +++ b/include/android_image.h @@ -1,8 +1,8 @@ /* * This is from the Android Project, - * Repository: https://android.googlesource.com/platform/bootable/bootloader/legacy - * File: include/boot/bootimg.h - * Commit: 4205b865141ff2e255fe1d3bd16de18e217ef06a + * Repository: https://android.googlesource.com/platform/system/core/ + * File: mkbootimg/bootimg.h + * Commit: d162828814b08ada310846a33205befb69ef5799 * * Copyright (C) 2008 The Android Open Source Project * @@ -12,10 +12,13 @@ #ifndef _ANDROID_IMAGE_H_ #define _ANDROID_IMAGE_H_ +typedef struct andr_img_hdr andr_img_hdr; + #define ANDR_BOOT_MAGIC "ANDROID!" #define ANDR_BOOT_MAGIC_SIZE 8 #define ANDR_BOOT_NAME_SIZE 16 #define ANDR_BOOT_ARGS_SIZE 512 +#define ANDR_BOOT_EXTRA_ARGS_SIZE 1024 struct andr_img_hdr { char magic[ANDR_BOOT_MAGIC_SIZE]; @@ -31,14 +34,25 @@ struct andr_img_hdr { u32 tags_addr; /* physical addr for kernel tags */ u32 page_size; /* flash page size we assume */ - u32 unused[2]; /* future expansion: should be 0 */ + u32 unused; /* reserved for future expansion: MUST be 0 */ + + /* operating system version and security patch level; for + * version "A.B.C" and patch level "Y-M-D": + * ver = A << 14 | B << 7 | C (7 bits for each of A, B, C) + * lvl = ((Y - 2000) & 127) << 4 | M (7 bits for Y, 4 bits for M) + * os_version = ver << 11 | lvl */ + u32 os_version; char name[ANDR_BOOT_NAME_SIZE]; /* asciiz product name */ char cmdline[ANDR_BOOT_ARGS_SIZE]; u32 id[8]; /* timestamp / checksum / sha1 / etc */ -}; + + /* Supplemental command line data; kept here to maintain + * binary compatibility with older versions of mkbootimg */ + char extra_cmdline[ANDR_BOOT_EXTRA_ARGS_SIZE]; +} __attribute__((packed)); /* * +-----------------+ diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index 1a77c982fa..51838b5ead 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -83,8 +83,8 @@ typedef struct global_data { #ifdef CONFIG_SYS_I2C_MXC void *srdata[10]; #endif - unsigned long timebase_h; - unsigned long timebase_l; + unsigned int timebase_h; + unsigned int timebase_l; #ifdef CONFIG_SYS_MALLOC_F_LEN unsigned long malloc_base; /* base address of early malloc() */ unsigned long malloc_limit; /* limit address */ diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index fc8a08f5b7..51c3d493c8 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -194,7 +194,7 @@ /* USB gadget RNDIS */ -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #endif #ifdef CONFIG_NAND @@ -291,7 +291,6 @@ * DM support in SPL */ #ifdef CONFIG_SPL_BUILD -#undef CONFIG_DM_MMC #undef CONFIG_TIMER #undef CONFIG_DM_USB #endif diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h index 55b511c408..b1ffcc8872 100644 --- a/include/configs/am335x_igep003x.h +++ b/include/configs/am335x_igep003x.h @@ -127,7 +127,7 @@ #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(SPL),-(UBI)" /* SPL */ -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" /* UBI configuration */ #define CONFIG_SPL_UBI 1 diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index c100fbc533..bc0943fdfd 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -250,7 +250,7 @@ /* SPL */ -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #ifndef CONFIG_SPL_USBETH_SUPPORT #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h index 710dac269c..6855f62865 100644 --- a/include/configs/am335x_sl50.h +++ b/include/configs/am335x_sl50.h @@ -80,7 +80,7 @@ #define CONFIG_BOOTCOUNT_AM33XX #define CONFIG_SYS_BOOTCOUNT_BE -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #ifndef CONFIG_SPL_USBETH_SUPPORT #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 diff --git a/include/configs/baltos.h b/include/configs/baltos.h index 37c71bb433..c65eeedb53 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -248,7 +248,7 @@ /* General network SPL, both CPSW and USB gadget RNDIS */ #define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"*/ -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #ifdef CONFIG_NAND #define CONFIG_NAND_OMAP_GPMC diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index d5347e626f..924a351c38 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -348,7 +348,7 @@ DEFAULT_LINUX_BOOT_ENV \ /* USB gadget RNDIS */ -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #endif #ifdef CONFIG_NAND diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index e2da016f47..3742514a6e 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -109,6 +109,6 @@ /* General parts of the framework, required. */ #define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #endif /* ! __BUR_AM335X_COMMON_H__ */ diff --git a/include/configs/calimain.h b/include/configs/calimain.h index 425a38f551..6e2fd33563 100644 --- a/include/configs/calimain.h +++ b/include/configs/calimain.h @@ -176,7 +176,6 @@ * Network & Ethernet Configuration */ #ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 1 #define CONFIG_MII #define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h index c1669fa788..f515db038d 100644 --- a/include/configs/chiliboard.h +++ b/include/configs/chiliboard.h @@ -130,7 +130,7 @@ #define CONFIG_BOOTCOUNT_AM33XX #define CONFIG_SYS_BOOTCOUNT_BE -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" /* NAND: device related configs */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h index 69137bc6e8..9a8e1302c5 100644 --- a/include/configs/cm_t335.h +++ b/include/configs/cm_t335.h @@ -99,7 +99,7 @@ #define CONFIG_SYS_I2C_EEPROM_BUS 0 /* SPL */ -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" /* Network. */ #define CONFIG_PHY_GIGE diff --git a/include/configs/draco.h b/include/configs/draco.h index da77c451b0..896d14f99a 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -18,7 +18,6 @@ #include "siemens-am33x-common.h" -#define CONFIG_SYS_MPUCLK 300 #define DDR_PLL_FREQ 303 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC diff --git a/include/configs/ea20.h b/include/configs/ea20.h index 7510071883..3a5b5c7285 100644 --- a/include/configs/ea20.h +++ b/include/configs/ea20.h @@ -79,7 +79,6 @@ * Network & Ethernet Configuration */ #ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 0 #define CONFIG_MII #define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 3383f06bf7..40c57948cc 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -69,7 +69,6 @@ CONFIG_SYS_NAND_BASE2} #define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_SYS_MPUCLK 300 #define DDR_PLL_FREQ 303 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 4efddb6207..0cc0042bca 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -227,7 +227,6 @@ * Network & Ethernet Configuration */ #ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 7 #define CONFIG_MII #undef CONFIG_DRIVER_TI_EMAC_USE_RMII #define CONFIG_BOOTP_DEFAULT diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index 9ce976ce43..ea3872f5c9 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -119,7 +119,7 @@ /* CPU */ #define CONFIG_ENV_IS_NOWHERE -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #ifdef CONFIG_SPI_BOOT #define CONFIG_SPL_SPI_LOAD diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h index cdfaf7c912..2cb6f56f7d 100644 --- a/include/configs/pengwyn.h +++ b/include/configs/pengwyn.h @@ -203,6 +203,6 @@ /* CPSW support */ -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #endif /* ! __CONFIG_PENGWYN_H */ diff --git a/include/configs/pepper.h b/include/configs/pepper.h index 9552dd1bcb..5abeffbade 100644 --- a/include/configs/pepper.h +++ b/include/configs/pepper.h @@ -86,6 +86,6 @@ #define CONFIG_PHY_RESET_DELAY 1000 /* SPL */ -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #endif /* __CONFIG_PEPPER_H */ diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index c8bc8f3512..57f034f0df 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -19,7 +19,6 @@ #include "siemens-am33x-common.h" -#define CONFIG_SYS_MPUCLK 720 #define DDR_IOCTRL_VAL 0x18b #define DDR_PLL_FREQ 266 diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h index 16ed1f0133..99fe1616e5 100644 --- a/include/configs/rastaban.h +++ b/include/configs/rastaban.h @@ -15,7 +15,6 @@ #include "siemens-am33x-common.h" -#define CONFIG_SYS_MPUCLK 300 #define DDR_PLL_FREQ 303 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC diff --git a/include/configs/rut.h b/include/configs/rut.h index bd819f1aad..8cfb73d781 100644 --- a/include/configs/rut.h +++ b/include/configs/rut.h @@ -19,7 +19,6 @@ #include "siemens-am33x-common.h" -#define CONFIG_SYS_MPUCLK 600 #define RUT_IOCTRL_VAL 0x18b #define DDR_PLL_FREQ 303 diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index d69f513c65..508b849472 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -126,7 +126,7 @@ #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 -#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/am33xx/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_AM33XX_BCH diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index b1625b779c..0bdf52eb68 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -169,7 +169,6 @@ #define CONFIG_DRIVER_TI_EMAC #define CONFIG_DRIVER_TI_EMAC_USE_RMII #define CONFIG_MII -#define CONFIG_EMAC_MDIO_PHY_NUM 0 #define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME diff --git a/include/configs/thuban.h b/include/configs/thuban.h index 9b73828df6..8c37d7cace 100644 --- a/include/configs/thuban.h +++ b/include/configs/thuban.h @@ -15,7 +15,6 @@ #include "siemens-am33x-common.h" -#define CONFIG_SYS_MPUCLK 300 #define DDR_PLL_FREQ 303 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index c0e4336eb0..e4c3c807f2 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -22,8 +22,10 @@ /* NS16550 Configuration */ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_NS16550_SERIAL +#ifndef CONFIG_DM_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE (-4) #endif +#endif #define CONFIG_SYS_NS16550_CLK 48000000 #ifndef CONFIG_SPL_BUILD diff --git a/include/debug_uart.h b/include/debug_uart.h index 2980ae6200..6f0b0c5e15 100644 --- a/include/debug_uart.h +++ b/include/debug_uart.h @@ -111,6 +111,17 @@ void printhex8(uint value); #define _DEBUG_UART_ANNOUNCE #endif +#define serial_dout(reg, value) \ + serial_out_shift((char *)com_port + \ + ((char *)reg - (char *)com_port) * \ + (1 << CONFIG_DEBUG_UART_SHIFT), \ + CONFIG_DEBUG_UART_SHIFT, value) +#define serial_din(reg) \ + serial_in_shift((char *)com_port + \ + ((char *)reg - (char *)com_port) * \ + (1 << CONFIG_DEBUG_UART_SHIFT), \ + CONFIG_DEBUG_UART_SHIFT) + /* * Now define some functions - this should be inserted into the serial driver */ diff --git a/include/part.h b/include/part.h index b6d1b33167..83bce05a43 100644 --- a/include/part.h +++ b/include/part.h @@ -163,7 +163,8 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str, * @param gpt_name - the specified table entry name * @param info - returns the disk partition info * - * @return - '0' on match, '-1' on no match, otherwise error + * @return - the partition number on match (starting on 1), -1 on no match, + * otherwise error */ int part_get_info_by_name(struct blk_desc *dev_desc, const char *name, disk_partition_t *info); diff --git a/include/power/tps65910.h b/include/power/tps65910.h index ca8430145b..976130dc3e 100644 --- a/include/power/tps65910.h +++ b/include/power/tps65910.h @@ -62,6 +62,7 @@ enum { #define TPS65910_OP_REG_SEL_MASK (0x7F) #define TPS65910_OP_REG_SEL_0_9_5 (0x1F) /* 0.9500 V */ +#define TPS65910_OP_REG_SEL_1_1_0 (0x2B) /* 1.1000 V */ #define TPS65910_OP_REG_SEL_1_1_3 (0x2E) /* 1.1375 V */ #define TPS65910_OP_REG_SEL_1_2_0 (0x33) /* 1.2000 V */ #define TPS65910_OP_REG_SEL_1_2_6 (0x38) /* 1.2625 V */ diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c index 8c6637e328..1da4ef7fff 100644 --- a/lib/rsa/rsa-sign.c +++ b/lib/rsa/rsa-sign.c @@ -9,6 +9,7 @@ #include <string.h> #include <image.h> #include <time.h> +#include <openssl/bn.h> #include <openssl/rsa.h> #include <openssl/pem.h> #include <openssl/err.h> @@ -20,6 +21,19 @@ #define HAVE_ERR_REMOVE_THREAD_STATE #endif +#if OPENSSL_VERSION_NUMBER < 0x10100000L +static void RSA_get0_key(const RSA *r, + const BIGNUM **n, const BIGNUM **e, const BIGNUM **d) +{ + if (n != NULL) + *n = r->n; + if (e != NULL) + *e = r->e; + if (d != NULL) + *d = r->d; +} +#endif + static int rsa_err(const char *msg) { unsigned long sslErr = ERR_get_error(); @@ -286,16 +300,22 @@ static int rsa_init(void) { int ret; +#if OPENSSL_VERSION_NUMBER < 0x10100000L ret = SSL_library_init(); +#else + ret = OPENSSL_init_ssl(0, NULL); +#endif if (!ret) { fprintf(stderr, "Failure to init SSL library\n"); return -1; } +#if OPENSSL_VERSION_NUMBER < 0x10100000L SSL_load_error_strings(); OpenSSL_add_all_algorithms(); OpenSSL_add_all_digests(); OpenSSL_add_all_ciphers(); +#endif return 0; } @@ -335,12 +355,15 @@ err_set_rsa: err_engine_init: ENGINE_free(e); err_engine_by_id: +#if OPENSSL_VERSION_NUMBER < 0x10100000L ENGINE_cleanup(); +#endif return ret; } static void rsa_remove(void) { +#if OPENSSL_VERSION_NUMBER < 0x10100000L CRYPTO_cleanup_all_ex_data(); ERR_free_strings(); #ifdef HAVE_ERR_REMOVE_THREAD_STATE @@ -349,6 +372,7 @@ static void rsa_remove(void) ERR_remove_state(0); #endif EVP_cleanup(); +#endif } static void rsa_engine_remove(ENGINE *e) @@ -409,7 +433,11 @@ static int rsa_sign_with_key(RSA *rsa, struct checksum_algo *checksum_algo, ret = rsa_err("Could not obtain signature"); goto err_sign; } - EVP_MD_CTX_cleanup(context); + #if OPENSSL_VERSION_NUMBER < 0x10100000L + EVP_MD_CTX_cleanup(context); + #else + EVP_MD_CTX_reset(context); + #endif EVP_MD_CTX_destroy(context); EVP_PKEY_free(key); @@ -479,6 +507,7 @@ static int rsa_get_exponent(RSA *key, uint64_t *e) { int ret; BIGNUM *bn_te; + const BIGNUM *key_e; uint64_t te; ret = -EINVAL; @@ -487,17 +516,18 @@ static int rsa_get_exponent(RSA *key, uint64_t *e) if (!e) goto cleanup; - if (BN_num_bits(key->e) > 64) + RSA_get0_key(key, NULL, &key_e, NULL); + if (BN_num_bits(key_e) > 64) goto cleanup; - *e = BN_get_word(key->e); + *e = BN_get_word(key_e); - if (BN_num_bits(key->e) < 33) { + if (BN_num_bits(key_e) < 33) { ret = 0; goto cleanup; } - bn_te = BN_dup(key->e); + bn_te = BN_dup(key_e); if (!bn_te) goto cleanup; @@ -527,6 +557,7 @@ int rsa_get_params(RSA *key, uint64_t *exponent, uint32_t *n0_invp, { BIGNUM *big1, *big2, *big32, *big2_32; BIGNUM *n, *r, *r_squared, *tmp; + const BIGNUM *key_n; BN_CTX *bn_ctx = BN_CTX_new(); int ret = 0; @@ -548,7 +579,8 @@ int rsa_get_params(RSA *key, uint64_t *exponent, uint32_t *n0_invp, if (0 != rsa_get_exponent(key, exponent)) ret = -1; - if (!BN_copy(n, key->n) || !BN_set_word(big1, 1L) || + RSA_get0_key(key, &key_n, NULL, NULL); + if (!BN_copy(n, key_n) || !BN_set_word(big1, 1L) || !BN_set_word(big2, 2L) || !BN_set_word(big32, 32L)) ret = -1; diff --git a/lib/slre.c b/lib/slre.c index f90749f8ed..e26d344865 100644 --- a/lib/slre.c +++ b/lib/slre.c @@ -441,7 +441,7 @@ loop_greedy(const struct slre *r, int pc, const char *s, int len, int *ofs) { int saved_offset, matched_offset; - saved_offset = matched_offset = *ofs; + matched_offset = *ofs; while (match(r, pc + 2, s, len, ofs, NULL)) { saved_offset = *ofs; @@ -230,10 +230,9 @@ static uint32_t tpm_sendrecv_command(const void *command, void *response, size_t *size_ptr) { struct udevice *dev; - int ret; + int err, ret; uint8_t response_buffer[COMMAND_BUFFER_SIZE]; size_t response_length; - uint32_t err; if (response) { response_length = *size_ptr; diff --git a/net/Makefile b/net/Makefile index f03d608326..ae54eee5af 100644 --- a/net/Makefile +++ b/net/Makefile @@ -25,3 +25,8 @@ obj-$(CONFIG_CMD_PING) += ping.o obj-$(CONFIG_CMD_RARP) += rarp.o obj-$(CONFIG_CMD_SNTP) += sntp.o obj-$(CONFIG_CMD_NET) += tftp.o + +# Disable this warning as it is triggered by: +# sprintf(buf, index ? "foo%d" : "foo", index) +# and this is intentional usage. +CFLAGS_eth_common.o += -Wno-format-extra-args @@ -125,7 +125,6 @@ void arp_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, int len) { struct arp_hdr *arp; struct in_addr reply_ip_addr; - uchar *pkt; int eth_hdr_size; /* @@ -163,9 +162,7 @@ void arp_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, int len) case ARPOP_REQUEST: /* reply with our IP address */ debug_cond(DEBUG_DEV_PKT, "Got ARP REQUEST, return our IP\n"); - pkt = (uchar *)et; eth_hdr_size = net_update_ether(et, et->et_src, PROT_ARP); - pkt += eth_hdr_size; arp->ar_op = htons(ARPOP_REPLY); memcpy(&arp->ar_tha, &arp->ar_sha, ARP_HLEN); net_copy_ip(&arp->ar_tpa, &arp->ar_spa); diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index eb24292fec..182b3002c1 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -232,7 +232,7 @@ fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-spl endif quiet_cmd_fdtgrep = FDTGREP $@ cmd_fdtgrep = $(objtree)/tools/fdtgrep $(fdtgrep_props) -RT $< \ - -n /chosen -O dtb | \ + -n /chosen -n /config -O dtb | \ $(objtree)/tools/fdtgrep -r -O dtb - -o $@ \ $(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS))) diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index cd0165f934..7646bb6842 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -776,7 +776,6 @@ CONFIG_EHCI_MMIO_BIG_ENDIAN CONFIG_EHCI_MXS_PORT0 CONFIG_EHCI_MXS_PORT1 CONFIG_ELBC_NAND_SPL_STATIC_PGSIZE -CONFIG_EMAC_MDIO_PHY_NUM CONFIG_EMAC_NR_START CONFIG_EMAC_PHY_MODE CONFIG_EMIF4 @@ -4869,7 +4868,6 @@ CONFIG_SYS_MPTPR_1BK_8K CONFIG_SYS_MPTPR_2BK_2K CONFIG_SYS_MPTPR_2BK_4K CONFIG_SYS_MPTPR_2BK_8K -CONFIG_SYS_MPUCLK CONFIG_SYS_MRAM_BASE CONFIG_SYS_MRAM_SIZE CONFIG_SYS_MRS_OFFS diff --git a/tools/genboardscfg.py b/tools/genboardscfg.py index c2efad55ab..2e871feaf4 100755 --- a/tools/genboardscfg.py +++ b/tools/genboardscfg.py @@ -294,6 +294,8 @@ class MaintainersDatabase: tmp = self.database[target][0] if tmp.startswith('Maintained'): return 'Active' + elif tmp.startswith('Supported'): + return 'Active' elif tmp.startswith('Orphan'): return 'Orphan' else: diff --git a/tools/kwbimage.c b/tools/kwbimage.c index 2c637c7446..8c0e730e7b 100644 --- a/tools/kwbimage.c +++ b/tools/kwbimage.c @@ -18,10 +18,30 @@ #include "kwbimage.h" #ifdef CONFIG_KWB_SECURE +#include <openssl/bn.h> #include <openssl/rsa.h> #include <openssl/pem.h> #include <openssl/err.h> #include <openssl/evp.h> + +#if OPENSSL_VERSION_NUMBER < 0x10100000L +static void RSA_get0_key(const RSA *r, + const BIGNUM **n, const BIGNUM **e, const BIGNUM **d) +{ + if (n != NULL) + *n = r->n; + if (e != NULL) + *e = r->e; + if (d != NULL) + *d = r->d; +} + +#else +void EVP_MD_CTX_cleanup(EVP_MD_CTX *ctx) +{ + EVP_MD_CTX_reset(ctx); +} +#endif #endif static struct image_cfg_element *image_cfg; @@ -470,12 +490,16 @@ static int kwb_export_pubkey(RSA *key, struct pubkey_der_v1 *dst, FILE *hashf, char *keyname) { int size_exp, size_mod, size_seq; + const BIGNUM *key_e, *key_n; uint8_t *cur; char *errmsg = "Failed to encode %s\n"; - if (!key || !key->e || !key->n || !dst) { + RSA_get0_key(key, NULL, &key_e, NULL); + RSA_get0_key(key, &key_n, NULL, NULL); + + if (!key || !key_e || !key_n || !dst) { fprintf(stderr, "export pk failed: (%p, %p, %p, %p)", - key, key->e, key->n, dst); + key, key_e, key_n, dst); fprintf(stderr, errmsg, keyname); return -EINVAL; } @@ -490,8 +514,8 @@ static int kwb_export_pubkey(RSA *key, struct pubkey_der_v1 *dst, FILE *hashf, * do the encoding manually. */ - size_exp = BN_num_bytes(key->e); - size_mod = BN_num_bytes(key->n); + size_exp = BN_num_bytes(key_e); + size_mod = BN_num_bytes(key_n); size_seq = 4 + size_mod + 4 + size_exp; if (size_mod > 256) { @@ -520,14 +544,14 @@ static int kwb_export_pubkey(RSA *key, struct pubkey_der_v1 *dst, FILE *hashf, *cur++ = 0x82; *cur++ = (size_mod >> 8) & 0xFF; *cur++ = size_mod & 0xFF; - BN_bn2bin(key->n, cur); + BN_bn2bin(key_n, cur); cur += size_mod; /* Exponent */ *cur++ = 0x02; /* INTEGER */ *cur++ = 0x82; *cur++ = (size_exp >> 8) & 0xFF; *cur++ = size_exp & 0xFF; - BN_bn2bin(key->e, cur); + BN_bn2bin(key_e, cur); if (hashf) { struct hash_v1 pk_hash; |