diff options
author | Simon Glass <sjg@chromium.org> | 2018-10-01 12:22:40 -0600 |
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committer | Simon Glass <sjg@chromium.org> | 2018-10-09 04:40:27 -0600 |
commit | 5d9a88f44a93daf623906fee7ca20fa396460ae2 (patch) | |
tree | 1ce98cc7c8752f59280d131a8ad0cb2c32ac6071 /test | |
parent | d07b6e145ec2f0e77aab0fbe15dfd87f40170a8c (diff) | |
download | u-boot-5d9a88f44a93daf623906fee7ca20fa396460ae2.tar.gz |
test: panel: Add a test for the panel uclass
At present this uclass has no tests. Add a simple one which checks the PWM
configuration, regulator and GPIO.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'test')
-rw-r--r-- | test/dm/Makefile | 1 | ||||
-rw-r--r-- | test/dm/panel.c | 50 |
2 files changed, 51 insertions, 0 deletions
diff --git a/test/dm/Makefile b/test/dm/Makefile index 57c7dfbcaf..b490cf2862 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_DM_MAILBOX) += mailbox.o obj-$(CONFIG_DM_MMC) += mmc.o obj-y += ofnode.o obj-$(CONFIG_OSD) += osd.o +obj-$(CONFIG_DM_VIDEO) += panel.o obj-$(CONFIG_DM_PCI) += pci.o obj-$(CONFIG_PHY) += phy.o obj-$(CONFIG_POWER_DOMAIN) += power-domain.o diff --git a/test/dm/panel.c b/test/dm/panel.c new file mode 100644 index 0000000000..ca032409f8 --- /dev/null +++ b/test/dm/panel.c @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Test for panel uclass + * + * Copyright (c) 2018 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + */ + +#include <common.h> +#include <backlight.h> +#include <dm.h> +#include <panel.h> +#include <video.h> +#include <asm/gpio.h> +#include <asm/test.h> +#include <dm/test.h> +#include <test/ut.h> +#include <power/regulator.h> + +/* Basic test of the panel uclass */ +static int dm_test_panel(struct unit_test_state *uts) +{ + struct udevice *dev, *pwm, *gpio, *reg; + uint period_ns; + uint duty_ns; + bool enable; + bool polarity; + + ut_assertok(uclass_first_device_err(UCLASS_PANEL, &dev)); + ut_assertok(uclass_first_device_err(UCLASS_PWM, &pwm)); + ut_assertok(uclass_get_device(UCLASS_GPIO, 1, &gpio)); + ut_assertok(regulator_get_by_platname("VDD_EMMC_1.8V", ®)); + ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, + &enable, &polarity)); + ut_asserteq(false, enable); + ut_asserteq(false, regulator_get_enable(reg)); + + ut_assertok(panel_enable_backlight(dev)); + ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, + &enable, &polarity)); + ut_asserteq(1000, period_ns); + ut_asserteq(170 * 1000 / 256, duty_ns); + ut_asserteq(true, enable); + ut_asserteq(false, polarity); + ut_asserteq(1, sandbox_gpio_get_value(gpio, 1)); + ut_asserteq(true, regulator_get_enable(reg)); + + return 0; +} +DM_TEST(dm_test_panel, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); |