diff options
| author | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
|---|---|---|
| committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
| commit | cb5473205206c7f14cbb1e747f28ec75b48826e2 (patch) | |
| tree | 8f4808d60917100b18a10b05230f7638a0a9bbcc /lib_nios2/cache.S | |
| parent | baf449fc5ff96f071bb0e3789fd3265f6d4fd9a0 (diff) | |
| parent | 92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb (diff) | |
| download | u-boot-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.gz | |
Merge branch 'fixes' into cleanups
Conflicts:
board/atmel/atngw100/atngw100.c
board/atmel/atstk1000/atstk1000.c
cpu/at32ap/at32ap700x/gpio.c
include/asm-avr32/arch-at32ap700x/clk.h
include/configs/atngw100.h
include/configs/atstk1002.h
include/configs/atstk1003.h
include/configs/atstk1004.h
include/configs/atstk1006.h
include/configs/favr-32-ezkit.h
include/configs/hammerhead.h
include/configs/mimc200.h
Diffstat (limited to 'lib_nios2/cache.S')
| -rw-r--r-- | lib_nios2/cache.S | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/lib_nios2/cache.S b/lib_nios2/cache.S index eb7735af7d..ee3b4b79bf 100644 --- a/lib_nios2/cache.S +++ b/lib_nios2/cache.S @@ -29,8 +29,8 @@ flush_dcache: add r5, r5, r4 - movhi r8, %hi(CFG_DCACHELINE_SIZE) - ori r8, r8, %lo(CFG_DCACHELINE_SIZE) + movhi r8, %hi(CONFIG_SYS_DCACHELINE_SIZE) + ori r8, r8, %lo(CONFIG_SYS_DCACHELINE_SIZE) 0: flushd 0(r4) add r4, r4, r8 bltu r4, r5, 0b @@ -41,8 +41,8 @@ flush_dcache: flush_icache: add r5, r5, r4 - movhi r8, %hi(CFG_ICACHELINE_SIZE) - ori r8, r8, %lo(CFG_ICACHELINE_SIZE) + movhi r8, %hi(CONFIG_SYS_ICACHELINE_SIZE) + ori r8, r8, %lo(CONFIG_SYS_ICACHELINE_SIZE) 1: flushi r4 add r4, r4, r8 bltu r4, r5, 1b @@ -55,16 +55,16 @@ flush_cache: mov r9, r4 mov r10, r5 - movhi r8, %hi(CFG_DCACHELINE_SIZE) - ori r8, r8, %lo(CFG_DCACHELINE_SIZE) + movhi r8, %hi(CONFIG_SYS_DCACHELINE_SIZE) + ori r8, r8, %lo(CONFIG_SYS_DCACHELINE_SIZE) 0: flushd 0(r4) add r4, r4, r8 bltu r4, r5, 0b mov r4, r9 mov r5, r10 - movhi r8, %hi(CFG_ICACHELINE_SIZE) - ori r8, r8, %lo(CFG_ICACHELINE_SIZE) + movhi r8, %hi(CONFIG_SYS_ICACHELINE_SIZE) + ori r8, r8, %lo(CONFIG_SYS_ICACHELINE_SIZE) 1: flushi r4 add r4, r4, r8 bltu r4, r5, 1b |