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authorTom Rini <trini@konsulko.com>2017-04-14 09:05:57 -0400
committerTom Rini <trini@konsulko.com>2017-04-14 09:05:57 -0400
commitc1a16c3ab541c014b029b42cc27cae496107e170 (patch)
treee5da12851a4d920d9b79fa8547db9f479e506fed /include
parentaf1b7286d8b2712cff5779d8a1565afed9d9d8e6 (diff)
parent09397d99edb402c04d1e20b32989b5b2ecbb037a (diff)
downloadu-boot-c1a16c3ab541c014b029b42cc27cae496107e170.tar.gz
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'include')
-rw-r--r--include/configs/socfpga_arria5_socdk.h32
-rw-r--r--include/configs/socfpga_common.h59
-rw-r--r--include/configs/socfpga_cyclone5_socdk.h32
-rw-r--r--include/configs/socfpga_de0_nano_soc.h20
-rw-r--r--include/configs/socfpga_de1_soc.h20
-rw-r--r--include/configs/socfpga_mcvevk.h7
-rw-r--r--include/configs/socfpga_sockit.h28
-rw-r--r--include/configs/socfpga_socrates.h26
-rw-r--r--include/configs/socfpga_sr1500.h28
-rw-r--r--include/fdtdec.h8
10 files changed, 61 insertions, 199 deletions
diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h
index 9b1f753b4c..b60d007478 100644
--- a/include/configs/socfpga_arria5_socdk.h
+++ b/include/configs/socfpga_arria5_socdk.h
@@ -16,13 +16,6 @@
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
/* Booting Linux */
-#define CONFIG_BOOTFILE "zImage"
-#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
-#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
-#define CONFIG_BOOTCOMMAND "run ramboot"
-#else
-#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
-#endif
#define CONFIG_LOADADDR 0x01000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
@@ -34,31 +27,6 @@
#define CONFIG_ENV_IS_IN_MMC
-/* Extra Environment */
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "verify=n\0" \
- "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
- "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
- "bootm ${loadaddr} - ${fdt_addr}\0" \
- "bootimage=zImage\0" \
- "fdt_addr=100\0" \
- "fdtimage=socfpga.dtb\0" \
- "bootm ${loadaddr} - ${fdt_addr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
- "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
- " root=${mmcroot} rw rootwait;" \
- "bootz ${loadaddr} - ${fdt_addr}\0" \
- "mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
- "qspiload=sf probe && mtdparts default && run ubiload\0" \
- "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
- " ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
- "bootz ${loadaddr} - ${fdt_addr}\0" \
- "ubiload=ubi part UBI && ubifsmount ubi0 && " \
- "ubifsload ${loadaddr} /boot/${bootimage} && " \
- "ubifsload ${fdt_addr} /boot/${fdtimage}\0"
-
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 8472b52e0a..107c6d5b66 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -65,6 +65,9 @@
#define CONFIG_SYS_HOSTNAME CONFIG_SYS_BOARD
#endif
+#define CONFIG_CMD_PXE
+#define CONFIG_MENU
+
/*
* Cache
*/
@@ -72,11 +75,6 @@
#define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS
/*
- * SDRAM controller
- */
-#define CONFIG_ALTERA_SDRAM
-
-/*
* EPCS/EPCQx1 Serial Flash Controller
*/
#ifdef CONFIG_ALTERA_SPI
@@ -230,7 +228,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
#define CONFIG_USB_FUNCTION_MASS_STORAGE
-#define CONFIG_SYS_DFU_DATA_BUF_SIZE (32 * 1024 * 1024)
+#define CONFIG_SYS_DFU_DATA_BUF_SIZE (16 * 1024 * 1024)
#define DFU_DEFAULT_POLL_TIMEOUT 300
/* USB IDs */
@@ -242,13 +240,13 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
* U-Boot environment
*/
#if !defined(CONFIG_ENV_SIZE)
-#define CONFIG_ENV_SIZE 4096
+#define CONFIG_ENV_SIZE (8 * 1024)
#endif
/* Environment for SDMMC boot */
#if defined(CONFIG_ENV_IS_IN_MMC) && !defined(CONFIG_ENV_OFFSET)
-#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */
-#define CONFIG_ENV_OFFSET 512 /* just after the MBR */
+#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */
+#define CONFIG_ENV_OFFSET (34 * 512) /* just after the GPT */
#endif
/* Environment for QSPI boot */
@@ -305,8 +303,12 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
/* SPL SDMMC boot support */
#ifdef CONFIG_SPL_MMC_SUPPORT
#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 2
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
+#endif
+#else
+#ifndef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
#endif
#endif
@@ -328,4 +330,41 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
*/
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
+/* Extra Environment */
+#ifndef CONFIG_SPL_BUILD
+#include <config_distro_defaults.h>
+
+#ifdef CONFIG_CMD_PXE
+#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
+#else
+#define BOOT_TARGET_DEVICES_PXE(func)
+#endif
+
+#ifdef CONFIG_CMD_MMC
+#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
+#else
+#define BOOT_TARGET_DEVICES_MMC(func)
+#endif
+
+#define BOOT_TARGET_DEVICES(func) \
+ BOOT_TARGET_DEVICES_MMC(func) \
+ BOOT_TARGET_DEVICES_PXE(func) \
+ func(DHCP, dhcp, na)
+
+#include <config_distro_bootcmd.h>
+
+#ifndef CONFIG_EXTRA_ENV_SETTINGS
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ "bootm_size=0xa000000\0" \
+ "kernel_addr_r="__stringify(CONFIG_SYS_LOAD_ADDR)"\0" \
+ "fdt_addr_r=0x02000000\0" \
+ "scriptaddr=0x02100000\0" \
+ "pxefile_addr_r=0x02200000\0" \
+ "ramdisk_addr_r=0x02300000\0" \
+ BOOTENV
+
+#endif
+#endif
+
#endif /* __CONFIG_SOCFPGA_COMMON_H__ */
diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h
index 4100ef93d3..dfe4980b85 100644
--- a/include/configs/socfpga_cyclone5_socdk.h
+++ b/include/configs/socfpga_cyclone5_socdk.h
@@ -16,13 +16,6 @@
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
/* Booting Linux */
-#define CONFIG_BOOTFILE "zImage"
-#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
-#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
-#define CONFIG_BOOTCOMMAND "run ramboot"
-#else
-#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
-#endif
#define CONFIG_LOADADDR 0x01000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
@@ -34,31 +27,6 @@
#define CONFIG_ENV_IS_IN_MMC
-/* Extra Environment */
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "verify=n\0" \
- "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
- "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
- "bootm ${loadaddr} - ${fdt_addr}\0" \
- "bootimage=zImage\0" \
- "fdt_addr=100\0" \
- "fdtimage=socfpga.dtb\0" \
- "bootm ${loadaddr} - ${fdt_addr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
- "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
- " root=${mmcroot} rw rootwait;" \
- "bootz ${loadaddr} - ${fdt_addr}\0" \
- "mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
- "qspiload=sf probe && mtdparts default && run ubiload\0" \
- "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
- " ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
- "bootz ${loadaddr} - ${fdt_addr}\0" \
- "ubiload=ubi part UBI && ubifsmount ubi0 && " \
- "ubifsload ${loadaddr} /boot/${bootimage} && " \
- "ubifsload ${fdt_addr} /boot/${fdtimage}\0"
-
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h
index f6559722f4..dd5933d43c 100644
--- a/include/configs/socfpga_de0_nano_soc.h
+++ b/include/configs/socfpga_de0_nano_soc.h
@@ -16,9 +16,6 @@
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */
/* Booting Linux */
-#define CONFIG_BOOTFILE "fitImage"
-#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
-#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
#define CONFIG_LOADADDR 0x01000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
@@ -30,23 +27,6 @@
#define CONFIG_ENV_IS_IN_MMC
-/* Extra Environment */
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
- "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
- "bootm ${loadaddr} - ${fdt_addr}\0" \
- "bootimage=zImage\0" \
- "fdt_addr=100\0" \
- "fdtimage=socfpga.dtb\0" \
- "bootm ${loadaddr} - ${fdt_addr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
- "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
- " root=${mmcroot} rw rootwait;" \
- "bootz ${loadaddr} - ${fdt_addr}\0" \
- "mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
-
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_de1_soc.h b/include/configs/socfpga_de1_soc.h
index c6e8d81be6..014828bc08 100644
--- a/include/configs/socfpga_de1_soc.h
+++ b/include/configs/socfpga_de1_soc.h
@@ -16,9 +16,6 @@
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */
/* Booting Linux */
-#define CONFIG_BOOTFILE "fitImage"
-#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
-#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
#define CONFIG_LOADADDR 0x01000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
@@ -30,23 +27,6 @@
#define CONFIG_ENV_IS_IN_MMC
-/* Extra Environment */
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
- "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
- "bootm ${loadaddr} - ${fdtaddr}\0" \
- "bootimage=zImage\0" \
- "fdtaddr=100\0" \
- "fdtimage=socfpga.dtb\0" \
- "bootm ${loadaddr} - ${fdtaddr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
- "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
- " root=${mmcroot} rw rootwait;" \
- "bootz ${loadaddr} - ${fdtaddr}\0" \
- "mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdtaddr} ${fdtimage}\0" \
-
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h
index 3c9ba6de23..2d367026b6 100644
--- a/include/configs/socfpga_mcvevk.h
+++ b/include/configs/socfpga_mcvevk.h
@@ -3,8 +3,8 @@
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef __CONFIG_DENX_MCVEVK_H__
-#define __CONFIG_DENX_MCVEVK_H__
+#ifndef __CONFIG_ARIES_MCVEVK_H__
+#define __CONFIG_ARIES_MCVEVK_H__
#include <asm/arch/base_addr_ac5.h>
@@ -37,6 +37,7 @@
"netdev=eth0\0" \
"hostname=mcvevk\0" \
"kernel_addr_r=0x10000000\0" \
+ "dfu_alt_info=mmc raw 0 3867148288\0" \
"update_filename=u-boot-with-spl.sfp\0" \
"update_sd_offset=0x800\0" \
"update_sd=" /* Update the SD firmware partition */ \
@@ -105,4 +106,4 @@
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
-#endif /* __CONFIG_DENX_MCVEVK_H__ */
+#endif /* __CONFIG_ARIES_MCVEVK_H__ */
diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h
index 326310b539..c9fc5c90d9 100644
--- a/include/configs/socfpga_sockit.h
+++ b/include/configs/socfpga_sockit.h
@@ -16,9 +16,6 @@
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
/* Booting Linux */
-#define CONFIG_BOOTFILE "fitImage"
-#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
-#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
#define CONFIG_LOADADDR 0x01000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
@@ -30,31 +27,6 @@
#define CONFIG_ENV_IS_IN_MMC
-/* Extra Environment */
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "verify=n\0" \
- "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
- "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
- "bootm ${loadaddr} - ${fdt_addr}\0" \
- "bootimage=zImage\0" \
- "fdt_addr=100\0" \
- "fdtimage=socfpga.dtb\0" \
- "bootm ${loadaddr} - ${fdt_addr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
- "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
- " root=${mmcroot} rw rootwait;" \
- "bootz ${loadaddr} - ${fdt_addr}\0" \
- "mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
- "qspiload=sf probe && mtdparts default && run ubiload\0" \
- "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
- " ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
- "bootz ${loadaddr} - ${fdt_addr}\0" \
- "ubiload=ubi part UBI && ubifsmount ubi0 && " \
- "ubifsload ${loadaddr} /boot/${bootimage} && " \
- "ubifsload ${fdt_addr} /boot/${fdtimage}\0"
-
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h
index 90343b7c6d..5dc929852b 100644
--- a/include/configs/socfpga_socrates.h
+++ b/include/configs/socfpga_socrates.h
@@ -16,9 +16,6 @@
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCrates */
/* Booting Linux */
-#define CONFIG_BOOTFILE "zImage"
-#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
-#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
#define CONFIG_LOADADDR 0x01000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
@@ -30,29 +27,6 @@
#define CONFIG_ENV_IS_IN_MMC
-/* Extra Environment */
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "verify=n\0" \
- "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
- "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
- "bootm ${loadaddr} - ${fdt_addr}\0" \
- "bootimage=zImage\0" \
- "fdt_addr=100\0" \
- "fdtimage=socfpga.dtb\0" \
- "bootm ${loadaddr} - ${fdt_addr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
- "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
- " root=${mmcroot} rw rootwait;" \
- "bootz ${loadaddr} - ${fdt_addr}\0" \
- "mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
- "qspiroot=/dev/mtdblock0\0" \
- "qspirootfstype=jffs2\0" \
- "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
- " root=${qspiroot} rw rootfstype=${qspirootfstype};"\
- "bootm ${loadaddr} - ${fdt_addr}\0"
-
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h
index f67fafd756..64e1595cbe 100644
--- a/include/configs/socfpga_sr1500.h
+++ b/include/configs/socfpga_sr1500.h
@@ -16,9 +16,6 @@
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SR1500 */
/* Booting Linux */
-#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
-#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
#define CONFIG_LOADADDR 0x01000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
@@ -28,31 +25,6 @@
#define CONFIG_PHY_MARVELL
#define PHY_ANEG_TIMEOUT 8000
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "verify=n\0" \
- "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
- "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
- "bootm ${loadaddr} - ${fdt_addr}\0" \
- "bootimage=zImage\0" \
- "fdt_addr=100\0" \
- "fdtimage=socfpga.dtb\0" \
- "fsloadcmd=ext2load\0" \
- "bootm ${loadaddr} - ${fdt_addr}\0" \
- "mmcroot=/dev/mmcblk0p2\0" \
- "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
- " root=${mmcroot} rw rootwait;" \
- "bootz ${loadaddr} - ${fdt_addr}\0" \
- "mmcload=mmc rescan;" \
- "load mmc 0:1 ${loadaddr} ${bootimage};" \
- "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
- "qspiload=sf probe && mtdparts default && run ubiload\0" \
- "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
- " ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
- "bootz ${loadaddr} - ${fdt_addr}\0" \
- "ubiload=ubi part UBI && ubifsmount ubi0 && " \
- "ubifsload ${loadaddr} /boot/${bootimage} && " \
- "ubifsload ${fdt_addr} /boot/${fdtimage}\0"
-
/* Environment */
#define CONFIG_ENV_IS_IN_SPI_FLASH
diff --git a/include/fdtdec.h b/include/fdtdec.h
index d074478f14..2134701c54 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -155,6 +155,14 @@ enum fdt_compat_id {
COMPAT_INTEL_BAYTRAIL_FSP_MDP, /* Intel FSP memory-down params */
COMPAT_INTEL_IVYBRIDGE_FSP, /* Intel Ivy Bridge FSP */
COMPAT_SUNXI_NAND, /* SUNXI NAND controller */
+ COMPAT_ALTERA_SOCFPGA_CLK, /* SoCFPGA Clock initialization */
+ COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE, /* SoCFPGA pinctrl-single */
+ COMPAT_ALTERA_SOCFPGA_H2F_BRG, /* SoCFPGA hps2fpga bridge */
+ COMPAT_ALTERA_SOCFPGA_LWH2F_BRG, /* SoCFPGA lwhps2fpga bridge */
+ COMPAT_ALTERA_SOCFPGA_F2H_BRG, /* SoCFPGA fpga2hps bridge */
+ COMPAT_ALTERA_SOCFPGA_F2SDR0, /* SoCFPGA fpga2SDRAM0 bridge */
+ COMPAT_ALTERA_SOCFPGA_F2SDR1, /* SoCFPGA fpga2SDRAM1 bridge */
+ COMPAT_ALTERA_SOCFPGA_F2SDR2, /* SoCFPGA fpga2SDRAM2 bridge */
COMPAT_COUNT,
};