Merge branch '2019-07-26-ti-imports'WIP/27Jul2019

- Bring in the rest of the J271E platform
- Various OMAP3/AM3517, DA850 fixes

12 files changed, 141 insertions, 30 deletions

diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index e0521abe90..2e8481890f 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -28,6 +28,8 @@
  * Enable CONFIG_USB_MUSB_GADGET for Device functionalities.
  */
 
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	57
+
 #ifdef CONFIG_USB_MUSB_AM35X
 
 #ifdef CONFIG_USB_MUSB_HOST
diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h
index e69e800f61..e181b30564 100644
--- a/include/configs/am57xx_evm.h
+++ b/include/configs/am57xx_evm.h
@@ -22,7 +22,9 @@
 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
 
-#define CONSOLEDEV			"ttyO2"
+#define CONFIG_SYS_BOOTM_LEN		SZ_64M
+
+#define CONSOLEDEV			"ttyS2"
 #define CONFIG_SYS_NS16550_COM1		UART1_BASE	/* Base EVM has UART0 */
 #define CONFIG_SYS_NS16550_COM2		UART2_BASE	/* UART2 */
 #define CONFIG_SYS_NS16550_COM3		UART3_BASE	/* UART3 */
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index ccdac0abec..2dab17afab 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -19,14 +19,6 @@
 #endif
 
 /*
-* Disable DM_* for SPL build and can be re-enabled after adding
-* DM support in SPL
-*/
-#ifdef CONFIG_SPL_BUILD
-#undef CONFIG_DM_I2C
-#undef CONFIG_DM_I2C_COMPAT
-#endif
-/*
  * SoC Configuration
  */
 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
@@ -268,12 +260,8 @@
 #endif
 
 /* USB Configs */
-#define CONFIG_SYS_USB_OHCI_CPU_INIT
 #define CONFIG_USB_OHCI_NEW
-#define CONFIG_USB_STORAGE
-#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x01E25000
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	15
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"da850evm"
 
 #ifndef CONFIG_DIRECT_NOR_BOOT
 /* defines for SPL */
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 9c8141de2e..7ec6e691c7 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -26,9 +26,9 @@
 #endif
 
 #if (CONFIG_CONS_INDEX == 1)
-#define CONSOLEDEV			"ttyO0"
+#define CONSOLEDEV			"ttyS0"
 #elif (CONFIG_CONS_INDEX == 3)
-#define CONSOLEDEV			"ttyO2"
+#define CONSOLEDEV			"ttyS2"
 #endif
 #define CONFIG_SYS_NS16550_COM1		UART1_BASE	/* Base EVM has UART0 */
 #define CONFIG_SYS_NS16550_COM2		UART2_BASE	/* UART2 */
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
new file mode 100644
index 0000000000..5b35e22c85
--- /dev/null
+++ b/include/configs/j721e_evm.h
@@ -0,0 +1,103 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Configuration header file for K3 J721E EVM
+ *
+ * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
+ *	Lokesh Vutla <lokeshvutla@ti.com>
+ */
+
+#ifndef __CONFIG_J721E_EVM_H
+#define __CONFIG_J721E_EVM_H
+
+#include <linux/sizes.h>
+#include <config_distro_bootcmd.h>
+#include <environment/ti/mmc.h>
+
+#define CONFIG_ENV_SIZE			(128 << 10)
+
+/* DDR Configuration */
+#define CONFIG_SYS_SDRAM_BASE1		0x880000000
+
+/* SPL Loader Configuration */
+#ifdef CONFIG_TARGET_J721E_A72_EVM
+#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SPL_TEXT_BASE +	\
+					 CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE)
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x280000
+#else
+/*
+ * Maximum size in memory allocated to the SPL BSS. Keep it as tight as
+ * possible (to allow the build to go through), as this directly affects
+ * our memory footprint. The less we use for BSS the more we have available
+ * for everything else.
+ */
+#define CONFIG_SPL_BSS_MAX_SIZE		0xA000
+/*
+ * Link BSS to be within SPL in a dedicated region located near the top of
+ * the MCU SRAM, this way making it available also before relocation. Note
+ * that we are not using the actual top of the MCU SRAM as there is a memory
+ * location filled in by the boot ROM that we want to read out without any
+ * interference from the C context.
+ */
+#define CONFIG_SPL_BSS_START_ADDR	(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\
+					 CONFIG_SPL_BSS_MAX_SIZE)
+/* Set the stack right below the SPL BSS section */
+#define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SPL_BSS_START_ADDR
+/* Configure R5 SPL post-relocation malloc pool in DDR */
+#define CONFIG_SYS_SPL_MALLOC_START	0x84000000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_16M
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x80000
+#endif
+
+#ifdef CONFIG_SYS_K3_SPL_ATF
+#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"tispl.bin"
+#endif
+
+#define CONFIG_SPL_MAX_SIZE		CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
+
+#define CONFIG_SYS_BOOTM_LEN		SZ_64M
+#define CONFIG_CQSPI_REF_CLK		133333333
+
+/* U-Boot general configuration */
+#define EXTRA_ENV_J721E_BOARD_SETTINGS					\
+	"default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0"	\
+	"findfdt="							\
+		"setenv fdtfile ${default_device_tree};"		\
+		"setenv overlay_files ${name_overlays}\0"		\
+	"loadaddr=0x80080000\0"						\
+	"fdtaddr=0x82000000\0"						\
+	"overlayaddr=0x83000000\0"					\
+	"name_kern=Image\0"						\
+	"console=ttyS2,115200n8\0"					\
+	"args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000\0" \
+	"run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
+
+/* U-Boot MMC-specific configuration */
+#define EXTRA_ENV_J721E_BOARD_SETTINGS_MMC				\
+	"boot=mmc\0"							\
+	"mmcdev=1\0"							\
+	"bootpart=1:2\0"						\
+	"bootdir=/boot\0"						\
+	"rd_spec=-\0"							\
+	"init_mmc=run args_all args_mmc\0"				\
+	"get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
+	"get_overlay_mmc="						\
+		"fdt address ${fdtaddr};"				\
+		"fdt resize 0x100000;"					\
+		"for overlay in $overlay_files;"			\
+		"do;"							\
+		"load mmc ${bootpart} ${overlayaddr} ${bootdir}/${overlay} && "	\
+		"fdt apply ${overlayaddr};"				\
+		"done;\0"						\
+	"get_kern_mmc=load mmc ${bootpart} ${loadaddr} "		\
+		"${bootdir}/${name_kern}\0"
+
+/* Incorporate settings into the U-Boot environment */
+#define CONFIG_EXTRA_ENV_SETTINGS					\
+	DEFAULT_MMC_TI_ARGS						\
+	EXTRA_ENV_J721E_BOARD_SETTINGS					\
+	EXTRA_ENV_J721E_BOARD_SETTINGS_MMC
+
+/* Now for the remaining common defines */
+#include <configs/ti_armv7_common.h>
+
+#endif /* __CONFIG_J721E_EVM_H */
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index 6b7104db5f..1fbd371a50 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -30,6 +30,10 @@
 /* I2C */
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* EEPROM AT24C64      */
 
+#ifdef CONFIG_USB_EHCI_OMAP
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	4
+#endif
+
 /* Board NAND Info. */
 #ifdef CONFIG_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE	1	  /* Max number of */
diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h
index 27e47327d3..3710a71ae9 100644
--- a/include/configs/omap5_uevm.h
+++ b/include/configs/omap5_uevm.h
@@ -53,7 +53,7 @@
 
 /* USB Networking options */
 
-#define CONSOLEDEV		"ttyO2"
+#define CONSOLEDEV		"ttyS2"
 
 #define CONFIG_SCSI_AHCI_PLAT
 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h
index a67521cdc4..ce0cd38f56 100644
--- a/include/dt-bindings/pinctrl/k3.h
+++ b/include/dt-bindings/pinctrl/k3.h
@@ -35,4 +35,7 @@
 #define AM65X_IOPAD(pa, val, muxmode)		(((pa) & 0x1fff)) ((val) | (muxmode))
 #define AM65X_WKUP_IOPAD(pa, val, muxmode)	(((pa) & 0x1fff)) ((val) | (muxmode))
 
+#define J721E_IOPAD(pa, val, muxmode)		(((pa) & 0x1fff)) ((val) | (muxmode))
+#define J721E_WKUP_IOPAD(pa, val, muxmode)	(((pa) & 0x1fff)) ((val) | (muxmode))
+
 #endif
diff --git a/include/dt-bindings/soc/ti,sci_pm_domain.h b/include/dt-bindings/soc/ti,sci_pm_domain.h
new file mode 100644
index 0000000000..8f2a7360b6
--- /dev/null
+++ b/include/dt-bindings/soc/ti,sci_pm_domain.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __DT_BINDINGS_TI_SCI_PM_DOMAIN_H
+#define __DT_BINDINGS_TI_SCI_PM_DOMAIN_H
+
+#define TI_SCI_PD_EXCLUSIVE	1
+#define TI_SCI_PD_SHARED	0
+
+#endif /* __DT_BINDINGS_TI_SCI_PM_DOMAIN_H */
diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h
index 54e9b2de4d..e55a4aec57 100644
--- a/include/environment/ti/boot.h
+++ b/include/environment/ti/boot.h
@@ -10,7 +10,7 @@
 #define __TI_BOOT_H
 
 #ifndef CONSOLEDEV
-#define CONSOLEDEV "ttyO2"
+#define CONSOLEDEV "ttyS2"
 #endif
 
 #define VBMETA_PART_SIZE		(64 * 1024)
diff --git a/include/linux/soc/ti/ti_sci_protocol.h b/include/linux/soc/ti/ti_sci_protocol.h
index c57802f293..1cba8d9b79 100644
--- a/include/linux/soc/ti/ti_sci_protocol.h
+++ b/include/linux/soc/ti/ti_sci_protocol.h
@@ -105,6 +105,9 @@ struct ti_sci_board_ops {
  *		-reset_state: pointer to u32 which will retrieve resets
  *		Returns 0 for successful request, else returns
  *		corresponding error message.
+ * @release_exclusive_devices: Command to release all the exclusive devices
+ *		attached to this host. This should be used very carefully
+ *		and only at the end of execution of your software.
  *
  * NOTE: for all these functions, the following parameters are generic in
  * nature:
@@ -117,7 +120,10 @@ struct ti_sci_board_ops {
  */
 struct ti_sci_dev_ops {
 	int (*get_device)(const struct ti_sci_handle *handle, u32 id);
+	int (*get_device_exclusive)(const struct ti_sci_handle *handle, u32 id);
 	int (*idle_device)(const struct ti_sci_handle *handle, u32 id);
+	int (*idle_device_exclusive)(const struct ti_sci_handle *handle,
+				     u32 id);
 	int (*put_device)(const struct ti_sci_handle *handle, u32 id);
 	int (*is_valid)(const struct ti_sci_handle *handle, u32 id);
 	int (*get_context_loss_count)(const struct ti_sci_handle *handle,
@@ -134,6 +140,7 @@ struct ti_sci_dev_ops {
 				 u32 reset_state);
 	int (*get_device_resets)(const struct ti_sci_handle *handle, u32 id,
 				 u32 *reset_state);
+	int (*release_exclusive_devices)(const struct ti_sci_handle *handle);
 };
 
 /**
@@ -263,6 +270,8 @@ struct ti_sci_core_ops {
  * @set_proc_boot_ctrl: Setup limited control flags in specific cases.
  * @proc_auth_boot_image:
  * @get_proc_boot_status: Get the state of physical processor
+ * @proc_shutdown_no_wait: Shutdown a core without requesting or waiting for a
+ *			   response.
  *
  * NOTE: for all these functions, the following parameters are generic in
  * nature:
@@ -284,6 +293,8 @@ struct ti_sci_proc_ops {
 	int (*get_proc_boot_status)(const struct ti_sci_handle *handle, u8 pid,
 				    u64 *bv, u32 *cfg_flags, u32 *ctrl_flags,
 				    u32 *sts_flags);
+	int (*proc_shutdown_no_wait)(const struct ti_sci_handle *handle,
+				     u8 pid);
 };
 
 #define TI_SCI_RING_MODE_RING			(0)
diff --git a/include/power-domain.h b/include/power-domain.h
index 07370709fe..ef15dc9f60 100644
--- a/include/power-domain.h
+++ b/include/power-domain.h
@@ -55,23 +55,12 @@ struct udevice;
  *
  * @dev: The device which implements the power domain.
  * @id: The power domain ID within the provider.
- *
- * Currently, the power domain API assumes that a single integer ID is enough
- * to identify and configure any power domain for any power domain provider. If
- * this assumption becomes invalid in the future, the struct could be expanded
- * to either (a) add more fields to allow power domain providers to store
- * additional information, or (b) replace the id field with an opaque pointer,
- * which the provider would dynamically allocate during its .of_xlate op, and
- * process during is .request op. This may require the addition of an extra op
- * to clean up the allocation.
+ * @priv: Private data corresponding to each power domain.
  */
 struct power_domain {
 	struct udevice *dev;
-	/*
-	 * Written by of_xlate. We assume a single id is enough for now. In the
-	 * future, we might add more fields here.
-	 */
 	unsigned long id;
+	void *priv;
 };
 
 /**