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| author | Tom Rini <trini@konsulko.com> | 2018-03-01 15:50:52 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-03-01 15:50:52 -0500 |
| commit | 77bba970e2372b01156c66585db3d6fc751c7178 (patch) | |
| tree | 23b16bed6cd2f8e77a93dc51839afef7bd736af6 /include | |
| parent | e1541b1d7fb94ed9ac2bfe4c324afd91d77aee11 (diff) | |
| parent | 92afd7ecf9ffc11971f5a68a5b329927d73586bc (diff) | |
| download | u-boot-77bba970e2372b01156c66585db3d6fc751c7178.tar.gz | |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/socfpga_dbm_soc1.h | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/include/configs/socfpga_dbm_soc1.h b/include/configs/socfpga_dbm_soc1.h new file mode 100644 index 0000000000..1a35c9d73f --- /dev/null +++ b/include/configs/socfpga_dbm_soc1.h @@ -0,0 +1,96 @@ +/* + * Copyright (C) 2018 Marek Vasut <marex@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __CONFIG_DEVBOARDS_DBM_SOC1_H__ +#define __CONFIG_DEVBOARDS_DBM_SOC1_H__ + +#include <asm/arch/base_addr_ac5.h> + +/* Memory configurations */ +#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */ + +/* Booting Linux */ +#define CONFIG_BOOTFILE "fitImage" +#define CONFIG_PREBOOT "run try_bootscript" +#define CONFIG_BOOTCOMMAND "run mmc_mmc" +#define CONFIG_LOADADDR 0x01000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* Environment is in MMC */ +#define CONFIG_ENV_OVERWRITE + +/* Extra Environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "consdev=ttyS0\0" \ + "baudrate=115200\0" \ + "bootscript=boot.scr\0" \ + "bootdev=/dev/mmcblk0p2\0" \ + "rootdev=/dev/mmcblk0p3\0" \ + "netdev=eth0\0" \ + "hostname=dbm_soc1\0" \ + "kernel_addr_r=0x10000000\0" \ + "dfu_alt_info=mmc raw 0 3867148288\0" \ + "update_filename=u-boot-with-spl.sfp\0" \ + "update_sd_offset=0x800\0" \ + "update_sd=" /* Update the SD firmware partition */ \ + "if mmc rescan ; then " \ + "if tftp ${update_filename} ; then " \ + "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \ + "setexpr fw_sz ${fw_sz} + 1 ; " \ + "mmc write ${loadaddr} ${update_sd_offset} ${fw_sz} ; " \ + "fi ; " \ + "fi\0" \ + "fpga_filename=output_file.rbf\0" \ + "load_fpga=" /* Load FPGA bitstream */ \ + "if tftp ${fpga_filename} ; then " \ + "fpga load 0 $loadaddr $filesize ; " \ + "bridge enable ; " \ + "fi\0" \ + "addcons=" \ + "setenv bootargs ${bootargs} " \ + "console=${consdev},${baudrate}\0" \ + "addip=" \ + "setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:" \ + "${netmask}:${hostname}:${netdev}:off\0" \ + "addmisc=" \ + "setenv bootargs ${bootargs} ${miscargs}\0" \ + "addargs=run addcons addmisc\0" \ + "mmcload=" \ + "mmc rescan ; " \ + "load mmc 0:2 ${kernel_addr_r} ${bootfile}\0" \ + "netload=" \ + "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ + "miscargs=nohlt panic=1\0" \ + "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \ + "nfsargs=" \ + "setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath},v3,tcp\0" \ + "mmc_mmc=" \ + "run mmcload mmcargs addargs ; " \ + "bootm ${kernel_addr_r}\0" \ + "mmc_nfs=" \ + "run mmcload nfsargs addip addargs ; " \ + "bootm ${kernel_addr_r}\0" \ + "net_mmc=" \ + "run netload mmcargs addargs ; " \ + "bootm ${kernel_addr_r}\0" \ + "net_nfs=" \ + "run netload nfsargs addip addargs ; " \ + "bootm ${kernel_addr_r}\0" \ + "try_bootscript=" \ + "mmc rescan;" \ + "if test -e mmc 0:2 ${bootscript} ; then " \ + "if load mmc 0:2 ${kernel_addr_r} ${bootscript};" \ + "then ; " \ + "echo Running bootscript... ; " \ + "source ${kernel_addr_r} ; " \ + "fi ; " \ + "fi\0" + +/* The rest of the configuration is shared */ +#include <configs/socfpga_common.h> + +#endif /* __CONFIG_DEVBOARDS_DBM_SOC1_H__ */ |