Merge git://git.denx.de/u-boot-x86

- Allow x86 boards to use TPL, SPL and U-Boot proper
- Update sysreset x86 driver to utilize ACPI registers to do power off
- Add a new chromebook_samus_tpl board for TPL support
- Several minor changes in binman tool

6 files changed, 21 insertions, 14 deletions

diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h
index ca59276892..f26e463fe5 100644
--- a/include/configs/chromebook_link.h
+++ b/include/configs/chromebook_link.h
@@ -18,9 +18,6 @@
 #define CONFIG_ENV_SECT_SIZE		0x1000
 #define CONFIG_ENV_OFFSET		0x003f8000
 
-#define BOOT_DEVICE_SPI			10
-
 #define CONFIG_SPL_BOARD_LOAD_IMAGE
-#define BOOT_DEVICE_BOARD		11
 
 #endif	/* __CONFIG_H */
diff --git a/include/configs/chromebook_samus.h b/include/configs/chromebook_samus.h
index ccb2fe8caa..2f7dd69fb8 100644
--- a/include/configs/chromebook_samus.h
+++ b/include/configs/chromebook_samus.h
@@ -23,4 +23,6 @@
 #define CONFIG_ENV_SECT_SIZE		0x1000
 #define CONFIG_ENV_OFFSET		0x003f8000
 
+#define CONFIG_TPL_TEXT_BASE		0xfffd8000
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h
index 4cd1cac3bd..64e7a60b8a 100644
--- a/include/configs/qemu-x86.h
+++ b/include/configs/qemu-x86.h
@@ -33,11 +33,6 @@
 #define CONFIG_SYS_ATA_IDE1_OFFSET	0x170
 #define CONFIG_ATAPI
 
-/* SPI is not supported */
-
-#define BOOT_DEVICE_SPI			10
-
 #define CONFIG_SPL_BOARD_LOAD_IMAGE
-#define BOOT_DEVICE_BOARD		11
 
 #endif	/* __CONFIG_H */
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index 4180b25f97..7fcf76a6bf 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -36,7 +36,6 @@
 /*-----------------------------------------------------------------------
  * Real Time Clock Configuration
  */
-#define CONFIG_RTC_MC146818
 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS	0
 #define CONFIG_SYS_ISA_IO      CONFIG_SYS_ISA_IO_BASE_ADDRESS
 
diff --git a/include/pch.h b/include/pch.h
index 046a5fde3a..0b44b66df9 100644
--- a/include/pch.h
+++ b/include/pch.h
@@ -16,6 +16,9 @@ enum pch_req_t {
 	/* Returns HDA config info if Azalia V1CTL enabled, -ENOENT if not */
 	PCH_REQ_HDA_CONFIG,
 
+	/* Fills out a struct pch_pmbase_info if available */
+	PCH_REQ_PMBASE_INFO,
+
 	PCH_REQ_TEST1,		/* Test requests for sandbox driver */
 	PCH_REQ_TEST2,
 	PCH_REQ_TEST3,
@@ -24,6 +27,21 @@ enum pch_req_t {
 };
 
 /**
+ * struct pch_pmbase_info - Information filled in by PCH_REQ_PMBASE_INFO
+ *
+ * @pmbase: IO address of power-management controller
+ * @gpio0_en_ofs: Offset of GPIO0 enable register
+ * @pm1_sts_ofs: Offset of status register
+ * @pm1_cnt_ofs: Offset of control register
+ */
+struct pch_pmbase_info {
+	u16 base;
+	u8 gpio0_en_ofs;
+	u8 pm1_sts_ofs;
+	u8 pm1_cnt_ofs;
+};
+
+/**
  * struct pch_ops - Operations for the Platform Controller Hub
  *
  * Consider using ioctl() to add rarely used or driver-specific operations.
diff --git a/include/pci.h b/include/pci.h
index 066238a9c3..508f7bca81 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -546,11 +546,7 @@ extern void pci_cfgfunc_do_nothing(struct pci_controller* hose, pci_dev_t dev,
 extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev,
 				      struct pci_config_table *);
 
-#ifdef CONFIG_NR_DRAM_BANKS
-#define MAX_PCI_REGIONS (CONFIG_NR_DRAM_BANKS + 7)
-#else
-#define MAX_PCI_REGIONS 7
-#endif
+#define MAX_PCI_REGIONS		7
 
 #define INDIRECT_TYPE_NO_PCIE_LINK	1