diff options
| author | Adam Ford <aford173@gmail.com> | 2019-02-25 21:53:46 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-04-12 08:05:49 -0400 |
| commit | 15b8c7505819fa48dd99fb51e91b9536f341fde1 (patch) | |
| tree | f911de62d23290cb80504c683236ee20e70bb3ea /include | |
| parent | 45123804200a268c3bfc879b49bd30aef565b79b (diff) | |
| download | u-boot-15b8c7505819fa48dd99fb51e91b9536f341fde1.tar.gz | |
davinci: da850evm/omapl138-lcdk: Move BSS to SDRAM because SRAM is full
In order to fully support SPL_OF_CONTROL, we need BSS to be a bit
larger. This patch relocates BSS to SDRAM instead of SRAM which
is similar to how ARMv7 boards (like OMAP2+) do it.
This means two new variables are required:
CONFIG_SPL_BSS_START_ADDR set to DAVINCI_DDR_EMIF_DATA_BASE
CONFIG_SPL_BSS_MAX_SIZE is set to 0x1080000 which is 1 byte
before the location where U-Boot will load.
Signed-off-by: Adam Ford <aford173@gmail.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/da850evm.h | 3 | ||||
| -rw-r--r-- | include/configs/omapl138_lcdk.h | 3 |
2 files changed, 5 insertions, 1 deletions
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 583f994807..94848f5128 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -48,7 +48,8 @@ #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ - +#define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE +#define CONFIG_SPL_BSS_MAX_SIZE 0x1080000 /* memtest start addr */ #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 1786e099ad..6680c3e503 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -43,6 +43,9 @@ #define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */ #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ +#define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE +#define CONFIG_SPL_BSS_MAX_SIZE 0x1080000 + /* memtest start addr */ #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) |