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author | Álvaro Fernández Rojas <noltari@gmail.com> | 2018-01-23 17:14:56 +0100 |
---|---|---|
committer | Jagan Teki <jagan@amarulasolutions.com> | 2018-01-24 12:03:43 +0530 |
commit | 8af74edc30bb60a90a5c4d2769ff3129b187796e (patch) | |
tree | f946f505c9b5ec34b4543951124cb3d4d2ca2678 /include/spi.h | |
parent | 48263504c8d501678acaa90c075f3f7cda17c316 (diff) | |
download | u-boot-8af74edc30bb60a90a5c4d2769ff3129b187796e.tar.gz |
drivers: spi: allow limiting reads
For some SPI controllers it's not possible to keep the CS active between
transfers and they are limited to a known number of bytes.
This splits spi_flash reads into different iterations in order to respect
the SPI controller limits.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'include/spi.h')
-rw-r--r-- | include/spi.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/spi.h b/include/spi.h index 08c7480fda..4787454e59 100644 --- a/include/spi.h +++ b/include/spi.h @@ -86,6 +86,8 @@ struct dm_spi_slave_platdata { * @cs: ID of the chip select connected to the slave. * @mode: SPI mode to use for this slave (see SPI mode flags) * @wordlen: Size of SPI word in number of bits + * @max_read_size: If non-zero, the maximum number of bytes which can + * be read at once. * @max_write_size: If non-zero, the maximum number of bytes which can * be written at once, excluding command bytes. * @memory_map: Address of read-only SPI flash access. @@ -102,6 +104,7 @@ struct spi_slave { #endif uint mode; unsigned int wordlen; + unsigned int max_read_size; unsigned int max_write_size; void *memory_map; |