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| author | Tom Rini <trini@konsulko.com> | 2020-02-04 11:36:49 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-02-04 11:36:49 -0500 |
| commit | d4827fcd4c1b04c338e4019e412f495aa4231d24 (patch) | |
| tree | ec6d55971a72f39069ed66a7ca836bdbead324bc /include/ns16550.h | |
| parent | d861183dc531b74479f92bf4c8de8ad60a0a0d56 (diff) | |
| parent | 9e0c131a32028547cc4834f238c614af2675c66d (diff) | |
| download | u-boot-d4827fcd4c1b04c338e4019e412f495aa4231d24.tar.gz | |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86WIP/04Feb2020
- Various minor fixes for x86
- Switch to ACPI mode on Intel edison
- Support run-time configuration for NS16550 driver
- Update coreboot and slimbootloader serial drivers to use NS16550
run-time configuration
- ICH SPI driver fixes to hardware sequencing erase case
- Move ITSS from Apollo Lake to a more generic location
- Intel GPIO driver bug fixes
- Move to vs2017-win2016 platform build host for Azure pipelines
Diffstat (limited to 'include/ns16550.h')
| -rw-r--r-- | include/ns16550.h | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/include/ns16550.h b/include/ns16550.h index 701efeea85..18c9077755 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -31,6 +31,9 @@ #define CONFIG_SYS_NS16550_REG_SIZE (-1) #endif +#ifdef CONFIG_NS16550_DYNAMIC +#define UART_REG(x) unsigned char x +#else #if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0) #error "Please define NS16550 registers size." #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_DM_SERIAL) @@ -44,14 +47,24 @@ unsigned char x; \ unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1]; #endif +#endif /* CONFIG_NS16550_DYNAMIC */ + +enum ns16550_flags { + NS16550_FLAG_IO = 1 << 0, /* Use I/O access (else mem-mapped) */ + NS16550_FLAG_ENDIAN = 1 << 1, /* Use out_le/be_32() */ + NS16550_FLAG_BE = 1 << 2, /* Big-endian access (else little) */ +}; /** * struct ns16550_platdata - information about a NS16550 port * * @base: Base register address - * @reg_width: IO accesses size of registers (in bytes) + * @reg_width: IO accesses size of registers (in bytes, 1 or 4) * @reg_shift: Shift size of registers (0=byte, 1=16bit, 2=32bit...) + * @reg_offset: Offset to start of registers (normally 0) * @clock: UART base clock speed in Hz + * @fcr: Offset of FCR register (normally UART_FCR_DEFVAL) + * @flags: A few flags (enum ns16550_flags) * @bdf: PCI slot/function (pci_dev_t) */ struct ns16550_platdata { @@ -61,6 +74,7 @@ struct ns16550_platdata { int reg_offset; int clock; u32 fcr; + int flags; #if defined(CONFIG_PCI) && defined(CONFIG_SPL) int bdf; #endif |